CN103051170B - Audio-frequency noise eliminating circuit - Google Patents
Audio-frequency noise eliminating circuit Download PDFInfo
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- CN103051170B CN103051170B CN201210583966.3A CN201210583966A CN103051170B CN 103051170 B CN103051170 B CN 103051170B CN 201210583966 A CN201210583966 A CN 201210583966A CN 103051170 B CN103051170 B CN 103051170B
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The invention discloses an audio-frequency noise eliminating circuit which is used for eliminating audio-frequency noise generated by a power factor control circuit in a critical conduction state. The audio-frequency noise eliminating circuit comprises a reference current generating unit, a selecting unit, a charge and discharge unit, an OR gate unit and a trigger unit. The audio-frequency noise eliminating circuit is capable of eliminating audio-frequency noise of a power factor correction circuit working in the critical conduction mode and peak overshoot near input current zeroing.
Description
Technical field
The present invention relates to Active PFC control circuit field, more specifically, is a kind of circuit for eliminating the Active PFC control circuit audio-frequency noise being operated in critical conduction mode.
Background technology
Factor correction refers to and corrects the power factor (PF) of circuit, makes it close to 1, and the energy that electrical network can be made to obtain like this is as much as possible for acting, improves power consumption efficiency.The maximum instantaneous power of the rectified current of inactivity factor correction is several times that have Active PFC, this can increase the load of power supply grid greatly, and the electric power system of inactivity factor correction more holds the serious accidents such as fire hazardous than there being the electric power system of Active PFC.Therefore, under the consideration of green energy conservation safety, Active PFC has been widely used in illumination, TV, computer and various high-power electric appliance.
As shown in Figure 1, be the fundamental diagram of existing Active PFC control circuit, this circuit is that core builds with controller, wherein, arranges in the periphery of controller, power supply V
ifor system provides input voltage, it is the alternating current voltage provided in power supply grid, input current I
ipower supply V
ioutput current.Signal carries out rectification through rectifier bridge, C
ihigh-frequency filter capacitor, for filter away high frequency noise.Rcs is current sampling resistor, is generally 0.25 ohm to 1.5 ohm.Co is output capacitance, and the output voltage of whole system is V
o, for the direct current of 400V, to add upper frequency be 100Hz amplitude is the AC ripple of about 10V under normal circumstances.
Input voltage V
iafter rectifier bridge rectification, controller is sampled as the sinusoidal reference signals of input current to it, shown in Figure 2.Suppose M
1conducting, because M
1conducting resistance and R
cSall very little, M
1the voltage of drain terminal close to zero, output voltage V
ofor 400V, diode D
1cut-off, the electric current in inductance L passes through M
1flow through R
cS; Inductance L left end is the input voltage after rectification, and inductance L right-hand member is ground, and the electric current on inductance increases, i.e. R
cSon voltage increase, work as R
cSon voltage when being greater than the voltage of sinusoidal reference signals, I
cSsignal is 1, by M
1turn off.M
1during shutoff, inductive current can not suddenly change, M
1drain terminal produce very high voltage, diode D
1conducting, the current direction load in inductance L and C
o; Because the maximum of input voltage Vi is 375V, be less than M
1drain terminal voltage 400V+0.7V, so the electric current in inductance L starts to reduce, when the electric current that controller detects on inductance is reduced to zero, controller can produce a positive pulse signal, by M
1open.Circulation like this, makes the peak current on inductance follow sinusoidal reference signals change, shown in Figure 3.Sinusoidal reference signals is the sampling after input voltage Vi rectification, and inductive current is that the input voltage after following rectification changes, therefore input current I
ifollow input voltage V
ichange, power factor (PF) is corrected.As shown in Figure 4, be do not have the input voltage of Active PFC and the schematic diagram of input current, wherein, 1 is input voltage V
i, 2 is input current I
i.As shown in Figure 5, be carry out the input voltage of Active PFC and the schematic diagram of input current through above-mentioned Active PFC control circuit, wherein, 1 is input voltage V
i, 2 is input current I
i.From accompanying drawing relatively, through Active PFC control circuit, input current is corrected, and finally power factor (PF) is corrected.
On the other hand, international body has formulated a series of specification for the harmonic distortion of power supply, and for meeting code requirement, the harmonic distortion of input current is less than specific value.An important component part of Harmonics of Input distortion is the distortion of its zero crossing, and it is mainly caused by the high-frequency filter capacitor (as Ci in Fig. 1) after rectifier bridge and rectifier bridge.As the voltage on high-frequency filter capacitor after instantaneous line voltage is less than rectifier bridge and rectifier diode (D in as Fig. 1
1) conducting voltage sum time, input transient current be zero, cause harmonic distortion.
For the Active PFC control circuit being operated in critical conduction mode, when the voltage on current sampling resistor is greater than sinusoid fiducial voltage, power MOS pipe is (as M in Fig. 1
1) turn off; When the electric current on inductance is zero, power MOS pipe is opened.Therefore, the major technique reducing the input current distortion of zero passage place is at present exactly increase the sinusoid fiducial magnitude of voltage near zero passage.
But this technology also causes some problems.Under normal circumstances, Active PFC control circuit can work when line voltage is 85V ~ 265V, and its input current distortion can meet international norm.For same power factor correction circuit, the input current distortion of the input voltage of 265V is greater than the current distortion of 85V.In order to make maximum current harmonics distortion meet international requirement, the sinusoid fiducial magnitude of voltage near the zero passage of increase is enough large.But, large sinusoid fiducial voltage can make circuit working when low line voltage, power MOS pipe ON time is long near zero passage, switching frequency is less than 20KHz, there is audio-frequency noise, greatly have impact on the application in practice of Active PFC control circuit, whole circuit also can be caused near 20KHz cannot to meet EMI(electromagnetic interference) requirement; In addition, it can cause the input current near zero passage to be greater than desirable Sinusoidal Input Currents, occurs spike overshoot, and this not only adds Harmonics of Input distortion, reduces the operating efficiency of whole circuit.
Therefore, need at present a kind of technology to solve these problems, to eliminate the spike overshoot near audio-frequency noise and input current zero passage that Active PFC control circuit produces, its line voltage at 85V ~ 265V can well be worked.
Summary of the invention
Object of the present invention, is to solve the problem of the audio-frequency noise produced at critical conduction mode in existing Active PFC control circuit, thus the audio-frequency noise providing a kind of innovation eliminates circuit.
Audio-frequency noise of the present invention eliminates circuit, for eliminating the audio-frequency noise that power control circuit produces at critical conduction mode, this power control circuit comprises a controller, this controller is according to the current value of inductance in the magnitude of voltage of sampling resistor in this control circuit and this control circuit, export a current sample decision signal, control opening and turning off of power tube, this audio-frequency noise is eliminated circuit and is comprised:
Reference current generation unit, for generation of a reference current;
Selected cell, this reference current flows to this selected cell, this selected cell comprises a selected cell input and a selected cell output, and, when this selected cell input inputs first logical signal, this selected cell exports this reference current by this selected cell output, and when this selected cell input inputs contrary with this first logical signal second logical signal, this selected cell stops exporting this reference current by this selected cell output;
Charge/discharge unit, the first end of this charge/discharge unit is connected with this selected cell output, the second end grounding connection of this charge/discharge unit;
Or gate cell, should or gate cell comprise one first or door input, one second or door input and one or gate output terminal, wherein, this current sample decision signal be delivered to this first or door input, this selected cell output with this second or door input be connected;
Trigger element, this trigger element comprises a reset terminal, an input end of clock, a forward output and an inverse output terminal, this reset terminal is connected with this or gate output terminal, this input end of clock accesses a zero current detection signal, this forward output exports a logic control signal, and this inverse output terminal is connected with the input of this selected cell, wherein, this zero current detection signal is obtained by carrying out detection to the electric current flowing through this inductance in this power control circuit, and this logic control signal is for driving opening and turning off of this power tube in this power control circuit.
Preferably, this trigger element is a d type flip flop, and the D input of this d type flip flop is connected with supply voltage.
Preferably, this selected cell comprises first switching tube and a second switch pipe,
When described first logical signal of this selected cell input input, this first switching tube is opened, and this second switch pipe turns off simultaneously, and the described reference current utilizing described selected cell output to export is charged to described charge/discharge unit;
When described second logical signal of this selected cell input input, this first switching tube is closed, and this second switch pipe is opened simultaneously, and this charge/discharge unit is discharged by this second switch pipe.
Preferably, described first switching tube is a PMOS, a described second switch Guan Weiyi NMOS tube, this PMOS is connected with the inverting input of described trigger element with the grid of this NMOS tube, this PMOS is connected with the first end of described charge/discharge unit and described or gate cell second or door input with the drain electrode of this NMOS tube, the source electrode of this PMOS inputs described reference current by described reference current generation unit, and the source ground of this NMOS tube connects.
Preferably, described charge/discharge unit comprises a capacitor.
Preferably, the described reference current generation unit PMOS current mirror that comprises a reference current source and be connected with this reference current source.
Preferably, this zero current detection signal is a positive pulse signal exported by zero current detection module.
Audio-frequency noise of the present invention eliminates circuit, can eliminate the spike overshoot near the audio-frequency noise of the Active PFC control circuit being operated in critical conduction mode and input current zero passage, optimize arrival current curve, thus improve the operating efficiency of whole system.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of existing power control circuit;
Fig. 2 is the schematic diagram of the sinusoidal reference signals of input current;
Fig. 3 is the change schematic diagram of inductance peak current;
Fig. 4 does not carry out the input voltage of Active PFC and the waveform schematic diagram of input current;
Fig. 5 have employed the input voltage of Active PFC and the waveform schematic diagram of input current;
Fig. 6 is the schematic diagram that audio-frequency noise of the present invention eliminates circuit;
Fig. 7 is the signal timing diagram in the present invention;
Fig. 8 for do not use audio-frequency noise of the present invention eliminate circuit time, in power control circuit current sampling resistor zero passage near voltage curve;
When Fig. 9 is for adopting audio-frequency noise of the present invention to eliminate circuit, in power control circuit current sampling resistor zero passage near voltage curve;
Figure 10 is arrival current curve figure when not using audio-frequency noise of the present invention elimination circuit;
Figure 11 is arrival current curve figure when adopting audio-frequency noise of the present invention elimination circuit.
Embodiment
Below in conjunction with accompanying drawing, the structure composition of circuit is eliminated to audio-frequency noise of the present invention and operation principle is described in detail.
In general, audio-frequency noise of the present invention eliminates circuit, for eliminating the audio-frequency noise that power control circuit produces at critical conduction mode.Composition graphs 1, as previously discussed, power control circuit comprises a controller, and this controller is according to sampling resistor R in control circuit
cSmagnitude of voltage and this control circuit in the current value of inductance L, export a current sample decision signal I
cS, control opening and turning off of power tube M1.
Particularly, with reference to Fig. 6, audio-frequency noise of the present invention is eliminated circuit 100 and is comprised reference current generation unit 110, selected cell 120, charge/discharge unit 130 or gate cell 140 and trigger element 150.Below the composition of each unit is described in more detail.
Reference current generation unit 110 is for generation of a reference current I
ref, also will be described in more detail below, reference current I
refafter selecting through selected cell 120, charging process is carried out to charge/discharge unit 130.Reference current generation unit 110 can adopt conventional current source circuit to build.In execution mode as shown in Figure 6, the PMOS current mirror 112 that reference current generation unit comprises a reference current source 111 and is connected with this reference current source.Wherein, this PMOS current mirror 112 comprises the identical PMOS of two breadth length ratios, i.e. MP1 and MP2, routinely, in current mirror two metal-oxide-semiconductors connection in, the grid of MP1 with MP2 is connected, the source electrode of MP1 with MP2 is connected with supply voltage VDD, the grid of MP1 and its drain interconnection, and its drain electrode is connected to reference current source 111, and the drain electrode of MP2 is as reference current output, reference current is exported to selected cell 120.
Certainly, easy understand, reference current generation unit 110 also can adopt the current source of other conventional structures, for providing stable reference current for selected cell 120 and charge/discharge unit 130.Further, in the arranging of PMOS current mirror 112, metal-oxide-semiconductor MP1 and MP2 also can select different breadth length ratios, and the reference current now exported by the drain electrode of MP2 is the current value with the current in proportion of reference current source.
As mentioned above, reference current I
refafter generation, flow to selected cell 120 further, selected cell 120 comprises a selected cell input 101 and a selected cell output 102, and, when selected cell input 101 inputs first logical signal, selected cell 120 is by selected cell output 102 output reference electric current I
ref, when selected cell input 101 inputs contrary with this first logical signal second logical signal, selected cell 120 stops exporting this reference current I by selected cell output 102
ref.
Below also will describe in detail, this first logical signal and the second logical signal are provided by trigger element 150.Further, selected cell output 102 is connected with charge/discharge unit 130.In the embodiment illustrated in fig. 2, the first logical signal is logical zero, when being input to selected cell input 101, selected cell 120 is charged to charge/discharge unit 130 by its output output reference electric current; Second logical signal is logical one, and when being input to selected cell input 101, selected cell 120 stops output reference electric current, and now charge/discharge unit 130 is discharged by this selected cell 120.
In execution mode as shown in Figure 6, selected cell 120 comprises first switching tube 121 and a second switch pipe 122, when selected cell 120 input inputs the first logical signal, first switching tube 121 is opened, second switch pipe 122 turns off simultaneously, and the reference current utilizing selected cell output 102 to export is charged to charge/discharge unit 130; When selected cell input 101 inputs the second logical signal, the first switching tube 121 is closed, and second switch pipe 122 is opened simultaneously, and charge/discharge unit 130 is discharged by second switch pipe.
More specifically, in this embodiment, first switching tube 121 is a PMOS MP3, second switch pipe 122 is a NMOS tube MN1, PMOS MP3 is connected with the grid of NMOS tube MN1, composition selected cell input, also will describe below, it is connected with the inverting input of trigger element 150; The drain electrode of MP3 with MN1 is connected with charge/discharge unit 130, also will describe below, and the drain electrode of two pipes is also connected to or the input (second or door input) of gate cell 140, and the source electrode of MP3 is by reference current generation unit 110 input reference electric current I
ref, and the source ground of MN1 connects.Therefore, adopt this setting, when the logical signal inputing to two metal-oxide-semiconductor grids is for " 0 ", MP3 opens, and MN1 turns off, thus reference current conducting, and is delivered to charge/discharge unit 130 and charges; When the logical signal inputing to two metal-oxide-semiconductor grids is " 1 ", MP3 turns off, and MN1 opens, thus reference current turns off, and charge/discharge unit 130 is discharged by MN1.
Be appreciated that selected cell 120 also can adopt other suitable set-up modes, make to provide the selection opened or turn off, to control the discharge and recharge action of charge/discharge unit 130 to reference current to charge/discharge unit 130.In addition, for the first switching tube 121 in present embodiment and second switch pipe 122, other suitable power devices also can be selected to carry out switch motion.
As mentioned above, charge/discharge unit 130, for the output according to selected cell 120, carries out discharge and recharge action, and the first end of charge/discharge unit 130 is connected with selected cell output 102, the second end grounding connection of charge/discharge unit 130.In execution mode as shown in Figure 6, charge/discharge unit comprises a capacitor C.
Or gate cell 140 comprises one first or door input 103, second or door input 104 and one or gate output terminal 105, wherein, current sample decision signal I
cSbe delivered to first or door input 103, selected cell output 102 is connected with second or door input 104, also will describe below, or gate output terminal 105 is connected to the reset terminal of trigger element 150.
Continue composition graphs 6, trigger element 150 comprises a reset terminal R, an input end of clock CK, forward output Q and one inverse output terminal, this reset terminal R is connected with this or gate output terminal 105, input end of clock CK accesses a zero current detection signal ZCD, this forward output Q exports a logic control signal DRIVER, and inverse output terminal is connected with the input 101 of selected cell 120, wherein, composition graphs 1, this zero current detection signal ZCD is obtained by carrying out detection to the electric current flowing through this inductance L in this power control circuit, and logic control signal DRIVER is used for opening and turning off of interior this power tube M1 of driving power factor controlling circuit.In this execution mode of the present invention, when DRIVER is 1, M1 opens, and when DRIVER is 0, M1 turns off.With reference to Fig. 7, in this embodiment, zero current detection signal ZCD is a positive pulse signal exported by zero current detection module.Composition graphs 1, this zero current detection module can detect the electric current flowing through inductance L, and when the electric current flowing through inductance L is zero, then zero current detection module exports a positive pulse signal.
Below in conjunction with Fig. 1, Fig. 6-11, for the embodiment shown in Fig. 6, the operation principle of noise canceller circuit of the present invention is described in detail.
Suppose that the breadth length ratio of current mirror MP1 and MP2 in Fig. 6 is equal, then the charging current of electric capacity C is I
ref.Voltage on electric capacity C is V
c, when ICS is zero, suppose to work as V
cbe greater than V
cRtime (V
cRthreshold voltage for d type flip flop can reset by electric capacity C), or door output reset signal R is 1, and d type flip flop resets, and makes electric capacity C be charged to V from zero
cRtime be T1, then:
T1=(C*V
cR)/I
ref(formula 1)
After d type flip flop resets, it is 0 that the positive of d type flip flop exports, and anti-phase output is 1.Electric capacity C starts rapid electric discharge, and when the breadth length ratio of MN1 is enough large, discharge time is ns level, and this discharge time is negligible.
Schematic diagram according to Fig. 6 can be known, when ICS be 1 or electric capacity C on voltage be greater than V
cRtime, d type flip flop resets, and Q is set to 0, power MOS pipe turns off, and anti-phase output is set to 1, MN1 and opens, and MP3 turns off, and electric capacity C sparks, and on electric capacity C, voltage instantaneous is zero.Power MOS pipe closes has no progeny, and the voltage on current sampling resistor is that the electric current of inductance L in zero, Fig. 1 can not suddenly change, and power MOS pipe M1 drain terminal voltage instantaneous increases, and make diode D1 conducting, inductive current is to output capacitance C
ocharging.Due to V
obe greater than Vi, inductive current starts to reduce; When electric current on inductive current is decreased to zero, zero current detection module produces positive pulse signal ZCD, the Q of the d type flip flop in Fig. 6 is put 1, this DRIVER signal orders about power MOS pipe M1(with reference to Fig. 1) open, the anti-phase output of d type flip flop is now zero, MN1 turns off, and MP3 opens, and electric capacity C starts charging.The curve relation figure of each signal as shown in Figure 7.
As can be seen here, the voltage on electric capacity C is charged to reset threshold voltage V after power MOS pipe M1 opens
cRtime be fixing T1.T1 is with reference current I
ref, the size of electric capacity C and reset threshold voltage V
cRrelevant.Reset threshold voltage V
cRfor fixed value, be the conducting voltage of NMOS tube, the size of adjustment Iref, C can determine the size of T1.
Near input voltage zero passage, input voltage is very little, and output voltage V
overy high, the electric current on inductance is reduced to zero, ZCD positive pulse signal soon and is opened by power MOS pipe M1 again.Therefore, the turn-off time of the power MOS pipe M1 near input voltage zero passage is very short relative to its opening time, negligible, the voltage can found out on current sampling resistor by Fig. 8 and Fig. 9 be zero time almost nil, the switching frequency of the power MOS pipe M1 near input voltage zero passage is exactly the inverse of the ON time of power MOS pipe M1.In order to reduce Harmonics of Input distortion during high line voltage, needing to increase the sinusoid fiducial magnitude of voltage near zero passage, when the sinusoid fiducial magnitude of voltage increased is larger, the switching frequency of the M1 near zero passage can be made to be less than 20KHz, i.e. R near zero passage
cSthe time that ohmically voltage is greater than zero is greater than 0.05ms, as shown in Figure 8.Adopt the circuit in the present invention, the minimal switching frequency of near zero-crossing point is 1/T1, and as shown in Figure 9, if 1/T1 is greater than 20KHz, then the minimal switching frequency of M1 is also greater than 20KHz.
With reference to Fig. 1, for the Active PFC controller of critical conduction mode, when not increasing sinusoid fiducial voltage, its power MOS pipe M1 switching frequency is greater than 40KHz, now the switch of power MOS pipe is controlled by ZCD and ICS, and input current follows input sinusoidal voltage change; Adding the input voltage near zero-crossing point of sinusoid fiducial voltage, when the power MOS pipe ON time near input voltage zero passage is greater than T1, the voltage of electric capacity C is greater than V
cR, d type flip flop resets, and turned off by power MOS pipe, therefore the minimum value of its MOS switching frequency is 1/T1, and 1/T1 is greater than 20KHz, then the Switching audio noise of power MOS pipe is eliminated, as shown in Figure 9.Preferably, 1/T1 can be set between 24KHz ~ 35KHz.
Near input voltage zero passage, when power MOS pipe M1 ON time is long, input current there will be spike, and as shown in Figure 10, now the operating efficiency of whole system reduces, and Harmonics of Input distortion increases.The ON time of the power MOS pipe M1 near input voltage zero passage shortens by circuit provided by the invention, reduces current sampling resistor R
cSon current peak, input current is current sampling resistor R
cSon the half of current peak, the spike overshoot therefore near input current zero passage is eliminated, specifically as shown in figure 11.
In sum, audio-frequency noise of the present invention eliminates circuit, the spike overshoot near the audio-frequency noise of the Active PFC control circuit being operated in critical conduction mode and input current zero passage can be eliminated, optimize arrival current curve, improve the operating efficiency of whole system, make Active PFC control circuit well can realize the function of Active PFC in all cases.
Claims (7)
1. an audio-frequency noise eliminates circuit, for eliminating the audio-frequency noise that power control circuit produces at critical conduction mode, this power control circuit comprises a controller, this controller is according to the current value of inductance in the magnitude of voltage of sampling resistor in this control circuit and this control circuit, export a current sample decision signal, control opening and turning off of power tube, it is characterized in that, this audio-frequency noise is eliminated circuit and is comprised:
Reference current generation unit, for generation of a reference current;
Selected cell, this reference current flows to this selected cell, this selected cell comprises a selected cell input and a selected cell output, and, when this selected cell input inputs first logical signal, this selected cell exports this reference current by this selected cell output, and when this selected cell input inputs contrary with this first logical signal second logical signal, this selected cell stops exporting this reference current by this selected cell output;
Charge/discharge unit, the first end of this charge/discharge unit is connected with this selected cell output, the second end grounding connection of this charge/discharge unit;
Or gate cell, should or gate cell comprise one first or door input, one second or door input and one or gate output terminal, wherein, this current sample decision signal be delivered to this first or door input, this selected cell output with this second or door input be connected;
Trigger element, this trigger element comprises a reset terminal, an input end of clock, a forward output and an inverse output terminal, this reset terminal is connected with this or gate output terminal, this input end of clock accesses a zero current detection signal, this forward output exports a logic control signal, and this inverse output terminal is connected with the input of this selected cell, wherein, this zero current detection signal is obtained by carrying out detection to the electric current flowing through this inductance in this power control circuit, and this logic control signal is for driving opening and turning off of this power tube in this power control circuit.
2. audio-frequency noise according to claim 1 eliminates circuit, and it is characterized in that, this trigger element is a d type flip flop, and the D input of this d type flip flop is connected with supply voltage.
3. audio-frequency noise according to claim 1 eliminates circuit, and it is characterized in that, this selected cell comprises first switching tube and a second switch pipe,
When described first logical signal of this selected cell input input, this first switching tube is opened, and this second switch pipe turns off simultaneously, and the described reference current utilizing described selected cell output to export is charged to described charge/discharge unit;
When described second logical signal of this selected cell input input, this first switching tube is closed, and this second switch pipe is opened simultaneously, and this charge/discharge unit is discharged by this second switch pipe.
4. audio-frequency noise according to claim 3 eliminates circuit, it is characterized in that, described first switching tube is a PMOS, a described second switch Guan Weiyi NMOS tube, this PMOS is connected with the inverting input of described trigger element with the grid of this NMOS tube, this PMOS is connected with the first end of described charge/discharge unit and described or gate cell second or door input with the drain electrode of this NMOS tube, the source electrode of this PMOS inputs described reference current by described reference current generation unit, and the source ground of this NMOS tube connects.
5. audio-frequency noise according to claim 1 eliminates circuit, and it is characterized in that, described charge/discharge unit comprises a capacitor.
6. audio-frequency noise according to claim 1 eliminates circuit, it is characterized in that, the PMOS current mirror that described reference current generation unit comprises a reference current source and is connected with this reference current source.
7. audio-frequency noise according to claim 1 eliminates circuit, and it is characterized in that, this zero current detection signal is a positive pulse signal exported by zero current detection module.
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|---|---|---|---|
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| CN106028557B (en) * | 2016-07-08 | 2018-01-05 | 上海灿瑞科技股份有限公司 | The constant current driver circuit for LED of the low total harmonic distortion of High Power Factor |
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| Publication number | Publication date |
|---|---|
| CN103051170A (en) | 2013-04-17 |
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