CN103035543A - 形成半导体器件的连接突块的方法 - Google Patents
形成半导体器件的连接突块的方法 Download PDFInfo
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- CN103035543A CN103035543A CN2012103775949A CN201210377594A CN103035543A CN 103035543 A CN103035543 A CN 103035543A CN 2012103775949 A CN2012103775949 A CN 2012103775949A CN 201210377594 A CN201210377594 A CN 201210377594A CN 103035543 A CN103035543 A CN 103035543A
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Abstract
本发明涉及形成用于半导体器件的连接突块的方法,在所述半导体器件中形成重布线图案。所述方法包括:制备半导体衬底,在半导体衬底上通过钝化膜部分地暴露出焊盘;在焊盘和钝化膜上形成种子层;形成包括开口图案的光致抗蚀剂图案,所述开口图案包括暴露出焊盘上的种子层的一部分的第一开口以及暴露出钝化膜上的种子层的一部分并且与第一开口分开的第二开口;施行第一电镀,以便在开口图案中形成填充物层;施行第二电镀,以便在填充物层上形成焊料层;去除光致抗蚀剂图案;以及施行回流工艺,以便形成将各个填充物层彼此电连接的塌陷焊料层以及位于形成在第二开口中的填充物层上的焊料突块。
Description
相关申请的交叉引用
本申请要求2011年9月30日在韩国知识产权局提交的韩国专利申请No.10-2011-0100032的优先权,其公开内容通过参考合并于此。
技术领域
本发明思想的示例性实施例涉及在半导体器件上形成连接突块的方法,例如涉及在具有重布线图案的半导体器件上形成连接突块的方法。
背景技术
具有半导体器件的半导体芯片通过焊盘将其内部电路功能扩展到外部电子设备。到目前为止,半导体芯片的焊盘主要通过接合线连接到外部印刷电路板(PCB)。但是随着半导体器件的小型化、随着处理速度的逐渐提高并且随着半导体芯片中的输入/输出信号的数目的增加,将形成在半导体芯片的焊盘上的连接突块直接连接到PCB的方法越来越困难。在通过连接突块去到PCB的连接中,希望提高可靠性并且减少工艺时间/成本。
发明内容
本发明思想的示例性实施例提供了形成半导体器件的连接突块的方法,其中所述半导体器件被形成为具有重布线图案。
根据本发明思想的示例性实施例,提供一种形成半导体器件的连接突块的方法,所述方法包括:制备半导体衬底,在所述半导体衬底上通过钝化膜部分地暴露出焊盘;在所述焊盘和所述钝化膜上形成种子层;在所述焊盘上形成光致抗蚀剂图案和第一开口,所述光致抗蚀剂图案包括开口图案,所述开口图案包括暴露出所述钝化膜上的种子层的一部分并且与所述第一开口分开的第二开口;施行第一电镀,以便在所述开口图案中形成填充物层;施行第二电镀,以便在所述填充物层上形成焊料层;去除所述光致抗蚀剂图案;以及施行回流工艺,以便形成塌陷焊料层和焊料突块,该塌陷焊料层将所述填充物层彼此电连接,并且所述焊料突块位于形成在所述第二开口中的填充物层上。
在示例性实施例中,施行回流工艺可以包括:通过溶解形成在所述第一开口中的填充物层上的焊料层的一部分而形成所述塌陷焊料层。
在示例性实施例中,所述方法还可以包括:在施行回流工艺之后,去除被所述填充物层和所述塌陷焊料层暴露出的种子层的一部分。
在示例性实施例中,所述第一开口的最窄宽度可以小于所述第二开口的最窄宽度,从而通过溶解形成在所述第一开口中的填充物层上的焊料层的一部分而形成所述塌陷焊料层,并且由形成在所述第二开口中的填充物层上的焊料层来形成所述焊料突块。
在示例性实施例中,所述开口图案还可以包括处于所述第一开口与所述第二开口之间的至少一个中间开口,所述中间开口分别与所述第一开口和所述第二开口分开。
在示例性实施例中,所述第一开口和所述至少一个中间开口的剖面可以具有相同的形状,并且所述第一开口和所述至少一个中间开口可以在朝向所述第二开口的方向上被重复布置。
在示例性实施例中,施行回流工艺可以包括:通过溶解形成在所述第一开口和所述中间开口中的填充物层上的焊料层的一部分而形成所述塌陷焊料层。
在示例性实施例中,施行回流工艺可以包括:通过溶解形成在所述第一开口和所述中间开口中的填充物层上的焊料层的一部分而形成所述塌陷焊料层,从而使得所述塌陷焊料层与形成在所述第二开口中的填充物层接触。
在示例性实施例中,形成所述光致抗蚀剂图案还可以包括形成对应于与所述开口图案分开并且暴露出所述钝化膜上的种子层的一部分的虚设开口的光致抗蚀剂图案,施行第一电镀可以包括在所述虚设开口中形成虚设填充物层,并且施行第二电镀可以包括在所述虚设填充物层上形成虚设焊料层。
在示例性实施例中,施行回流工艺可以包括:在所述虚设填充物层上形成虚设焊料突块。
在示例性实施例中,施行回流工艺可以包括:在所述半导体衬底上的相同水平处形成所述焊料突块和所述虚设焊料突块的最上表面。
在示例性实施例中,施行回流工艺可以包括:在所述半导体衬底上的低于所述焊料突块的最上表面的某一水平处形成所述塌陷焊料层的最上表面。
在示例性实施例中,所述方法还可以包括:在施行回流工艺之后去除被所述填充物层和所述塌陷焊料层暴露出的种子层部分,从而使得所述填充物层、所述焊料突块和所述塌陷焊料层分别与所述虚设填充物层和所述虚设焊料突块电绝缘。
根据本发明思想其他示例性实施例,提供一种形成半导体器件的连接突块的方法,所述方法包括:制备半导体衬底,在所述半导体衬底上通过钝化膜部分地暴露出焊盘;形成彼此分开的填充物层,每一个填充物层包括所述钝化膜上的突块填充物图案、用以与所述焊盘部分地重叠的焊盘上的连接填充物图案以及所述突块填充物图案与所述连接填充物图案之间的至少一个中间填充物图案;在所述填充物层上形成焊料层;以及通过溶解形成在所述连接填充物图案和所述中间填充物图案上的焊料层而形成把所述焊盘电连接到所述突块填充物图案的塌陷焊料层。
在示例性实施例中,所述填充物图案还可以包括处于所述钝化膜上并且分别与所述突块填充物图案、所述连接填充物图案和所述中间填充物图案分开的辅助填充物图案,形成塌陷焊料层可以包括将所述焊盘与所述辅助填充物图案电绝缘。
根据本发明思想的其他示例性实施例,提供一种形成半导体器件中的电连接的方法,所述半导体器件包括其上具有焊料层的第一填充物层、其上具有焊料突块的第二填充物层以及部分地被所述第一填充物层覆盖的焊盘,所述方法包括:在所述半导体器件上形成塌陷焊料层;以及将所述第一填充物层、所述第二填充物层、所述焊盘和所述焊料突块电连接。
在示例性实施例中,所述第一填充物层可以被形成为具有小于所述第二填充物层的宽度。
在示例性实施例中,所述方法可以包括:精细地控制所述焊料层塌陷的方向。
在示例性实施例中,所述方法可以包括:在所述半导体器件上形成虚设填充物层;以及在所述虚设填充物层上形成虚设焊料突块。
在示例性实施例中,所述方法可以包括:形成所述虚设填充物层和形成所述虚设焊料突块,从而使得所述虚设填充物层和所述虚设焊料突块与所述焊盘电绝缘。
附图说明
通过下面结合附图进行的详细描述,将会更加清楚地理解本发明思想的示例性实施例,其中:
图1是示出了根据本发明思想的示例性实施例的制备被形成为具有焊盘的半导体衬底的操作的平面图;
图2是示出了根据本发明思想的示例性实施例的制备被形成为具有焊盘的半导体衬底的操作的剖面图;
图3是示出了根据本发明思想的示例性实施例的形成阻挡壁层的操作的剖面图;
图4是示出了根据本发明思想的示例性实施例的形成种子层的操作的剖面图;
图5是示出了根据本发明思想的示例性实施例的形成光致抗蚀剂图案的操作的平面图;
图6是示出了根据本发明思想的示例性实施例的形成光致抗蚀剂图案的操作的剖面图;
图7是示出了根据本发明思想的示例性实施例的形成填充物层的操作的剖面图;
图8是示出了根据本发明思想的示例性实施例的形成焊料层的操作的剖面图;
图9是示出了根据本发明思想的示例性实施例的去除光致抗蚀剂图案的操作的剖面图;
图10和图11分别是示出了根据本发明思想的示例性实施例的施行回流工艺的操作的平面图和剖面图;
图12是示出了根据本发明思想的示例性实施例的形成连接突块的操作的剖面图;
图13是示出了根据本发明思想的其他示例性实施例的形成光致抗蚀剂图案和塌陷焊料层的示例性操作的平面图;
图14是示出了根据本发明思想的其他示例性实施例的形成光致抗蚀剂图案和塌陷焊料层的示例性操作的平面图;以及
图15是示出了根据本发明思想的示例性实施例的形成突块的方法的流程图。
具体实施方式
下面将参照附图更加全面地描述示例性实施例。但是可以按照许多不同形式来具体实现示例性实施例,并且不应当理解为被限制到这里所阐述的实施例;相反,提供这些实施例是为了使得本公开内容透彻且完整,并且将向本领域技术人员全面传达示例性实施例的思想。在附图中,为了清楚起见夸大了各层和各个区段的厚度。附图中的相同附图标记始终指代相同的元件,因此将省略其描述。
应当理解的是,当提到一个元件“连接”或“耦接”到另一个元件时,所述一个元件可以直接连接或耦接到其他元件,或者可以存在中间元件。与此相对,当提到一个元件“直接连接”或“直接耦接”到另一个元件时,则不存在中间元件。这里所使用的术语“和/或”包括所列出的有关项目当中的一项或更多项的任意和所有组合。被用来描述各个元件和各层之间的关系的其他措辞应当按照相同的方式来解释(例如“处于二者之间”对比“直接处于二者之间”,“与之相邻”对比“直接与之相邻”,“处于其上”对比“直接处于其上”)。
应当理解的是,虽然在这里可以使用术语“第一”、“第二”等等来描述元件、组件、区域、层和/或部分,但是这些元件、组件、区域、层和/或部分不应受限于这些术语。这些术语仅仅被用来将一个元件、组件、区域、层或部分与另一个元件、组件、区域、层或部分进行区分。因此,在不背离示例性实施例的教导的情况下,下面所讨论的第一元件、第一组件、第一区域、第一层或第一部分也可以被称作第二元件、第二组件、第二区域、第二层或第二部分。
为了易于描述,在这里可以使用诸如“之下”、“以下”、“下方”、“以上”、“上方”等空间相对术语来描述如图中所示的一个元件或特征与另外的(多个)元件或特征的关系。应当理解的是,所述空间相对术语意图涵盖除了图中所描绘的指向之外的在使用或操作中的器件的不同指向。举例来说,如果图中的器件被翻转,则被描述为处于其他元件或特征“以下”或“之下”的元件将指向其他元件或特征“以上”。因此,示例性术语“以下”可以同时涵盖“以上”和“以下”的指向。还可以令器件处于其他指向(旋转90度或处于其他指向)并且相应地解释这里所使用的空间相对描述符。
这里所使用的术语仅仅是为了描述具体实施例,而不意图限制示例性实施例。除非上下文清楚地另有所指,否则这里所使用的单数形式“一”、“一个”、“该”也意图包括复数形式。还应当理解的是,这里所使用的术语“包括”和/或“包含”表明所述特征、整体、步骤、操作、元件和/或组件的存在,而不排除存在或添加一个或更多其他特征、整体、步骤、操作、元件、组件和/或其组合。
这里将参照作为示例性实施例的理想化实施例(以及中间结构)的示意图的剖面图描述示例性实施例。因此,例如由制造技术和/或容差所导致的与图示的形状有所不同是可以预期的。因此,示例性实施例不应当被理解成受限于这里所示出的区域的具体形状,而是应当包括例如由制造所导致的形状偏差。举例来说,被示出为矩形的注入区域可以具有圆形或弯曲特征和/或其边缘处的注入浓度的梯度,而不是从注入区域到非注入区域的二元改变。同样地,通过注入形成的掩埋区域可能导致在掩埋区域与通过其发生注入的表面之间的区域内的一些注入。因此,图中示出的区域是示意性的,并且其形状不意图示出器件区域的实际形状并且不意图限制示例性实施例的范围。还应当注意的是,在一些替换实施例中,所提到的功能/步骤可能不是按照图中所示的顺序发生的。举例来说,相继示出的两幅图可以实际上基本上被同时执行,或者有时可以按照相反的顺序执行,这取决于所涉及的功能/步骤。
除非另行定义,否则这里所使用的所有术语(其中包括技术和科学术语)具有与示例性实施例所属领域的技术人员通常所理解的相同含义。还应当理解的是,比如在常用的字典中所定义的术语应当被解释为具有与相关领域的情境中一致的含义,而不应当按照理想化或过于正式化的意义来解释(除非在这里明确地如此定义)。
参照用于示出本发明思想的示例性实施例的附图以便获得对于本发明思想及其价值的充分理解。在下文中将通过参照附图解释本发明思想的实施例来详细描述本发明思想。附图中的相同附图标记指代相同的元件。
图1和图2分别是示出了根据本发明思想的示例性实施例的制备其上形成有焊盘112的半导体衬底100的操作的平面图和剖面图。更具体来说,图2是沿着图1的线II-II’截取的剖面图。
图1和图2示出了半导体衬底100的制备。支持焊盘112的半导体衬底100可以把形成在半导体衬底100内部的电路功能扩展到外部。半导体衬底100可以是半导体晶片衬底,其中以矩阵形式设置多个半导体芯片并且可以通过划线将它们彼此分开。
可以通过半导体制造工艺在半导体衬底100中形成包括对应于半导体器件的各个功能电路的各个单独的单元器件的电路单元。也就是说,半导体衬底100可以被形成为包括晶体管、电阻器、电容器、导线以及布置在其间的绝缘膜。
可以通过作为半导体器件的电路单元的最终保护层的钝化膜104来部分地暴露出焊盘112。可以通过将焊盘112电连接到半导体器件的电路单元来将半导体器件电连接到外部设备。
在半导体衬底100中可以形成有各种半导体器件,例如,DRAM或闪存之类的存储器器件、微控制器之类的逻辑器件、模拟器件、数字信号处理器件、芯片上***器件或者这些器件的组合。
图3是示出了根据本发明思想的示例性实施例的形成阻挡壁层108的操作的剖面图。图3和图4示出了在施行下面描述的后续工艺之后沿着图1的II-II’截取的剖面。
参照图3,可以形成覆盖半导体衬底100的整个表面的阻挡壁层108。阻挡壁层108例如可以由钛(Ti)或钛钨(TiW)形成。阻挡壁层108可以通过化学气相沉积(CVD)方法或者例如溅射之类的物理气相沉积(PVD)方法形成,以具有从大约到大约的范围内的厚度。
可以在阻挡壁层108与钝化膜104之间形成缓冲绝缘膜106。缓冲绝缘膜106可以被形成为在半导体衬底100的整个表面上沉积了缓冲绝缘膜106并且形成光致抗蚀剂图案(未示出)之后,通过蚀刻工艺部分地暴露出焊盘112。缓冲绝缘膜106例如可以由聚酰亚胺或者环氧树脂形成。
图4是示出了根据本发明思想的示例性实施例的形成种子层110的操作的剖面图。
参照图4,在半导体衬底100的整个表面上形成种子层110。种子层110例如可以由包括Cu、Ni、Au在内的金属或其他类似材料形成。种子层110可以通过CVD方法或诸如溅射之类的PVD方法形成,以具有从大约到大约的范围内的厚度。
形成阻挡壁层108可以减少或防止种子层110的材料扩散到下方各层中。阻挡壁层108可以作为粘合剂层,从而把种子层110附着到各个下方材料层上,比如焊盘112、钝化膜104或缓冲绝缘膜106。
图5是示出了根据本发明思想的示例性实施例的形成光致抗蚀剂图案120的操作的平面图,图6是示出了根据本发明思想的示例性实施例的形成光致抗蚀剂图案120的操作的剖面图。举例来说,图6是沿着图5的线VI-VI’截取的剖面图。
参照图5和图6,光致抗蚀剂图案120被形成在种子层110上。可以在光致抗蚀剂图案120中形成暴露出种子层110的一部分的开口图案200。
开口图案200可以包括第一开口210和第二开口220。第一开口210可以暴露出焊盘112上方的种子层110的一部分。第二开口220可以暴露出钝化膜104上方的种子层110的一部分。第一开口210可以暴露出钝化膜104上方的种子层110的一部分,并且可以暴露出焊盘112上方的种子层110的一部分。第二开口220可以被形成为仅仅暴露出钝化膜104上方的种子层110的一部分,而不暴露出焊盘112上方的种子层110的一部分。
第一开口210与第二开口220分开并且间隔开,第一开口210的一个末端可以被形成为邻近第二开口220。第一开口210的最窄宽度W1可以被形成为小于第二开口220的最窄宽度W2。第一开口210的所有宽度可以被形成为小于第二开口220的最窄宽度W2。也就是说,第一开口210可以被形成为其宽度小于第二开口220的最窄宽度W2的线性开口,或者第一开口可以被形成为几个线性开口的组合。
第二开口220可以具有任意几何形状,比如圆形、矩形或任何其他多边形;所有这样的开口在这里都被称作“多边形形状”。第二开口220的形状可以是圆形、正方形、类似于圆形的椭圆形或者类似于正方形的矩形。当第二开口220具有圆形形状时,第二开口220的最窄宽度W2可以是第二开口220的直径。当第二开口220具有正方形形状时,第二开口220的最窄宽度W2可以是第二开口220的一条边。
当形成多个焊盘112时,可以形成多个第二开口220以便对应于焊盘112的数目。如下所述,第二开口220可以电连接到突块。
光致抗蚀剂图案120至少还可以包括与第一开口210和第二开口220分开并间隔开的虚设开口250。虚设开口250可以具有基本上与第二开口220相同或类似的剖面。虚设开口250的最窄宽度W3可以等于第二开口220的最窄宽度W2。
所形成的虚设开口250的数目不限于一个,与所形成的焊盘112或第二开口220的数目无关。虚设开口250可以暴露出钝化膜104上方的种子层110的一部分。虚设开口250可以被形成为仅仅暴露出钝化膜104上方的种子层110的一部分,而不暴露出形成在焊盘112上方的种子层110。
图7是示出了根据本发明思想的示例性实施例的形成填充物层114的操作的剖面图。
参照图7,填充物层114可以被形成在在其上形成了光致抗蚀剂图案120的半导体衬底100上。填充物层114可以被形成在光致抗蚀剂图案120的开口图案200中。填充物层114也可以被形成在光致抗蚀剂图案120的虚设开口250中。填充物层114可以通过电镀形成。用于形成填充物层114的电镀可以被称作第一电镀。
在第一开口210中形成的填充物层114的一部分被称作第一填充物层114a,在第二开口220中形成的填充物层114的一部分被称作第二填充物层114b,并且在虚设开口250中形成的填充物层114的一部分可以被称作虚设填充物层114d。
在焊盘112上形成的第一填充物层114a的一部分的厚度可以等于在钝化膜104上形成的第一填充物层114a的厚度(t1a=t1b)。此外,第一填充物层114a、第二填充物层114b和虚设填充物层114d可以被形成为具有相同的厚度。
填充物层114可以通过首先将在其上形成了光致抗蚀剂图案120的半导体衬底100放置在电镀槽(bath)中并且随后施行第一电镀操作而形成。填充物层114可以由选自包括Cu、Ni、Au的组当中的一种金属、这些金属的合金或者选自包括Cu、Ni和Au的组当中的金属的多层结构形成。
填充物层114可以被形成为具有与通过使用光刻工艺形成的光致抗蚀剂图案120一致的较窄宽度。举例来说,第一填充物层114a可以被形成为其宽度比第二填充物层114b和/或虚设填充物层114d的宽度更窄。填充物层114可以被形成为仅仅填充开口图案200和虚设开口250的一部分,而不是完全填充开口图案200和虚设开口250。也就是说,填充物层114可以被形成为其厚度比光致抗蚀剂图案120的厚度更薄。
图8是示出了根据本发明思想的示例性实施例的形成焊料层116的操作的剖面图。
参照图8,焊料层116可以被形成在填充物层114上。焊料层116可以被形成在填充物层114的第一填充物层114a、第二填充物层114b和/或虚设填充物层114d上。焊料层116可以被形成为突出得高于光致抗蚀剂图案120的最上表面。焊料层116可以通过第二电镀操作形成。用于形成焊料层116的电镀被称作第二电镀,而第一电镀则被用于形成填充物层114;这些术语仅被用来区分各个电镀工艺。
在第一开口210上形成的焊料层116的一部分被称作第一焊料层116a,在第二开口220上形成的焊料层116的一部分被称作第二焊料层116b,并且在虚设开口250上形成的焊料层116的一部分被称作虚设焊料层116d。
为了形成焊料层116,可以通过将在其上形成了填充物层114的半导体衬底100放置在第二电镀槽中来施行第二电镀。第二电镀槽可以不同于被用来形成填充物层114的第一电镀槽。焊料层116可以是Sn与Ag的合金,并且必要时可以添加Cu、Pd、Bi或Sd当中的任一项。
焊料层116可以被形成为部分地延伸超出光致抗蚀剂图案120上的填充物层114的一侧。
图9是示出了根据本发明思想的示例性实施例的去除光致抗蚀剂图案120的操作的剖面图。
参照图9,在形成焊料层116之后,去除图8中描绘的光致抗蚀剂图案120。为了去除光致抗蚀剂图案120,可以施行剥离工艺或抛光工艺。
第一填充物层114a和第一焊料层116a可以分别与第二填充物层114b和第二焊料层116b分开并间隔开。虚设填充物层114d和虚设焊料层116d可以分别与第一填充物层114a和第一焊料层116a分开。虚设填充物层114d还可以分别与第二填充物层114b和第二焊料层116b分开并间隔开。
在去除光致抗蚀剂图案120之后,可以施行去除例如形成在半导体衬底100的上表面上或者形成在种子层110的上表面上或者形成在填充物层114的表面上的自然氧化物膜(未示出)的工艺。为了去除自然氧化物膜,可以利用蚁酸HCO2H、羧酸或其他适当的酸对自然氧化物膜进行热处理。在精细并且均匀地分布了可能处于气雾态的蚁酸粒子之后,可以通过在处于从大约200℃到大约250℃的范围内的某一温度下施行热处理来去除自然氧化物膜。
可以施行使用蚁酸的热处理以替代使用熔剂来去除自然氧化物膜。当使用液体熔剂来去除自然氧化物膜时,可以改进填充物层114的可湿性,从而使得焊料层116可以很容易地融化并且覆盖填充物层114的表面,形成在填充物层114的表面上的自然氧化物膜也由于液体熔剂的使用而被去除。但是当使用熔剂时,熔剂残留物可能会保留在种子层110上。因此当在后续工艺中通过湿蚀刻去除种子层110时,处于保留有熔剂残留物的区域内的种子层110可能不会被去除。
当通过利用蚁酸而不是利用熔剂工艺使用热处理工艺来去除自然氧化物膜时,如果使用处于气雾态的蚁酸而不是液体熔剂则不需要去除熔剂的附加工艺。
为了通过熔剂工艺去除自然氧化物膜,可以使用去除熔剂的清洗溶液。但是用于去除熔剂的清洗溶液非常昂贵,并且为了在适当状态下管理和保持用于去除熔剂的清洗溶液需要非常高的成本。但是当通过蚁酸热处理去除自然氧化物膜时,则可以避免前面描述的问题。
图10是示出了根据本发明思想的示例性实施例的施行回流工艺的操作的平面图,图11是示出了施行回流工艺的操作的剖面图。更具体来说,图11是沿着图10的线XI-XI’截取的剖面图。
参照图9到图11,通过对已经去除了图8的光致抗蚀剂图案120的半导体衬底100进行热处理而施行回流工艺。可以在从大约220℃到大约260℃的范围内的某一温度下施行回流工艺。通过回流工艺熔化图9的焊料层116,从而形成回流焊料118。回流焊料118可以包括塌陷焊料层118a和焊料突块118b。
图9的第二焊料层116b在熔化之后不溶解,并且可以由于表面张力而在第二填充物层114b上形成焊料突块118b,并且可以在焊料突块118b与第二填充物层114b之间的界面处形成金属间化合物(IMC)(未示出)。
图9的第一焊料层116a在熔化之后溶解,并且可以在第一填充物层114a上形成塌陷焊料层118a。在通过回流工艺熔化的第一焊料层116a在第一填充物层114a上溶解之后,塌陷焊料层118a可以围绕第一填充物层114a。图中描绘出塌陷焊料层118a的最上表面低于第一填充物层114a的最上表面。但是塌陷焊料层118a的最上表面可以高于第一填充物层114a的最上表面,或者塌陷焊料层118a的一部分可以在第一填充物层114a上。当图9的第一焊料层116a在第一填充物层114a上溶解时,塌陷焊料层118a可以被布置在第一填充物层114a与第二填充物层114b之间并且靠近第二填充物层114b。因此,塌陷焊料层118a可以直接接触第一填充物层114a和第二填充物层114b。
当第一焊料层116a溶解时,根据如图5中所示的光致抗蚀剂图案120的第一开口210的形状,第一焊料层116a在朝向第二填充物层114b的方向上会更厚。由于第一开口210和第二开口220的形状与第一填充物层114a和第二填充物层114b分别相同,因此第一填充物层114a的宽度可以比第二填充物层114b的宽度更窄。相应地,通过回流工艺熔化的第二焊料层116b可以由于表面张力而保留在第二填充物层114b上。但是通过回流工艺熔化的第一焊料层116a不会保留在具有较窄宽度的第一填充物层114a上并且会溶解。此时,通过适当地形成第一填充物层114a的形状(即图5中所示的第一开口210的形状),第一焊料层116a可以在朝向第二填充物层114b的方向上塌陷。也就是说,当构成第一填充物层114a的部分主要朝向第二填充物层114b形成时,第一焊料层116a的溶解会由于表面张力而朝向第二填充物层114b塌陷。相应地,塌陷焊料层118a被形成在第二填充物层114b一侧,因此可以将第一填充物层114a直接连接到第二填充物层114b。
塌陷焊料层118a可以覆盖种子层110的围绕第一填充物层114a的一部分,并且塌陷焊料层118a可以将第一填充物层114a与第二填充物层114b电连接。也就是说,塌陷焊料层118a可以围绕第一填充物层114a的***。
回流焊料118还可以包括虚设焊料突块118d。虚设焊料突块118d可以由于通过回流工艺熔化了虚设焊料层116d之后的虚设填充物层114d上的虚设焊料层116d的表面张力而被形成在虚设填充物层114d上。可以在虚设焊料突块118d与虚设填充物层114d之间的界面处形成金属间化合物(IMC)(未示出)。虚设焊料突块118d可以具有与焊料突块118b基本上相同或近乎类似的形状。
随后,可选地可以通过利用去离子(DI)水施行清洗工艺来去除保留在半导体衬底100上的蚁酸粒子。
图12是示出了根据本发明思想的示例性实施例的形成连接突块的操作的剖面图。
参照图12,去除种子层110的未被填充物层114和塌陷焊料层118a覆盖的要暴露出的部分以及处于未被覆盖的种子层110下方的阻挡壁层108。为了去除种子层110和阻挡壁层108的所述部分,可以通过使用蚀刻剂(例如过氧化氢H2O2)来施行湿蚀刻。在用于去除种子层110和阻挡壁层108的所述部分的湿蚀刻期间,可以去除填充物层114的侧壁的一部分,从而可以部分地减小填充物层114的剖面面积。但是由于已经施行了回流工艺,因此不会发生回流焊料118的附加溶解。
当去除了种子层110的未被填充物层114和塌陷焊料层118a覆盖的要暴露出的部分以及处于未被覆盖的种子层110下方的阻挡壁层108时,可以形成连接突块150B、重布线图案150R和虚设连接突块150D。连接突块150B可以包括第二填充物层114b和焊料突块118b。重布线图案150R可以包括第一填充物层114a和塌陷焊料层118a。虚设连接突块150D可以包括虚设填充物层114d和虚设焊料突块118d。
连接突块150B可以通过重布线图案150R电连接到焊盘112。虚设连接突块150D可以与连接突块150B电绝缘。此外,虚设连接突块150D可以与重布线图案150R绝缘,并且相应地可以与焊盘112绝缘。相应地,第一填充物层114a、第二填充物层114b、塌陷焊料层118a和焊料突块118b可以与包括虚设填充物层114d和虚设焊料突块118d的虚设连接突块150D电绝缘。
连接突块150B可以被形成为具有与虚设连接突块150D相同的形状。但是虽然连接突块150B通过重布线图案150R电连接到焊盘112,但是虚设连接突块150D也可以电浮置。连接突块150B可以被用于把包括在半导体衬底100中的半导体器件通过焊盘112电连接到外部器件,比如印刷电路板(PCB)之类的板或另一个半导体芯片。但是虚设连接突块150D可以用来在半导体衬底100与外部器件(比如印刷电路板(PCB)之类的板或另一个半导体芯片)之间保持一定距离,并且可以在对半导体衬底100施加压力时防止半导体衬底100弯曲或损坏。
半导体衬底100上的连接突块150B和虚设连接突块150D的最上表面关于半导体衬底100可以在相同的水平处。也就是说,可以通过施行回流工艺把连接突块150B和虚设连接突块150D的最上表面形成在相同的水平处。相应地,连接突块150B和虚设连接突块150D在钝化膜104和缓冲绝缘膜106上可以具有相等的高度。
但是通过施行回流工艺,塌陷焊料层118a的最上表面可以被形成在低于焊料突块118b和虚设焊料突块118d的最上表面的某一水平处。图12示出了塌陷焊料层118a的最上表面低于第二填充物层114b和虚设填充物层114d的最上表面。但是塌陷焊料层118a的最上表面可以被形成在高于第二填充物层114b和虚设填充物层114d的最上表面并且低于焊料突块118b和虚设焊料突块118d的最上表面的某一水平处。
当在焊盘上形成连接突块而不形成重布线图案时,连接突块和虚设连接突块的最上表面可能会有共面性问题,从而可能导致半导体组装工艺中的故障。但是由于根据本实施例连接突块150B和虚设连接突块150D的最上表面在相同水平处,因此可以避免在半导体组装工艺中的这种故障。此外,由于连接突块150B不位于焊盘112上,因此在半导体组装工艺中不会对焊盘112施加应力。
此外,由于可以通过仅仅施行用于形成填充物层114的单个光刻工艺来形成重布线图案150R,因此不施行用于形成将连接突块150B连接到焊盘112的重布线图案150R的附加光刻工艺,从而减少了工艺时间并且降低了成本。
图13和图14是示出了根据本发明思想的其他示例性实施例的形成光致抗蚀剂图案120和塌陷焊料层118a的操作的平面图。图13和图14是分别与图5和图10的平面图相对应的平面图。相同的附图标记指代参照图1到图12所描述的元件,并且省略其重复描述。
参照图13,光致抗蚀剂图案120被形成在种子层110上。光致抗蚀剂图案120可以包括暴露出种子层110的一部分的开口图案202。开口图案202可以包括第一开口210-1和第二开口220。开口图案202还可以包括中间开口210-2。第一开口210-1可以暴露出焊盘112上的种子层110的一部分。中间开口210-2可以处于第一开口210-1与第二开口220之间,并且可以分别与第一开口210-1和第二开口220分开。中间开口210-2可以暴露出钝化膜104上的种子层110的一部分。
所形成的第一开口210-1和中间开口210-2的数目可以多于一个。此外,可以关于每个单一的第一开口210-1形成一个或更多中间开口210-2。
第一开口210-1和中间开口210-2的剖面可以具有相同的形状。第一开口210-1和中间开口210-2可以是具有相同形状的开口,并且可以在焊盘112之上朝向第二开口220重复地形成。
当第一开口210-1和中间开口210-2具有相同的形状时,可以将第一开口210称作被形成为暴露出焊盘112上的种子层110的一部分以及钝化膜104上的种子层110的一部分的开口,并且可以将中间开口210-2称作被形成为仅仅暴露出钝化膜104上的种子层110的一部分而不暴露出形成在焊盘112上的种子层110的部分的开口。
第一开口210-1和中间开口210-2的最窄宽度W1a可以小于第二开口220的最窄宽度W2。第一开口210-1和中间开口210-2的所有宽度可以被形成为小于第二开口220的最窄宽度W2。也就是说,第一开口210-1和中间开口210-2可以被形成为其宽度小于第二开口220的最窄宽度W2的线性开口或线性开口组合。
参照图13和图14,在开口图案202中形成填充物层114并且在填充物层114上形成类似于图9中所示的焊料层116的焊料层之后,可以通过施行回流工艺形成塌陷焊料层118-1a和焊料突块118b。
通过把图13和图14中所示的当前实施例与图1到图12中所示的先前实施例进行比较,在当前实施例中,为了形成将焊盘112电连接到焊料突块118b的塌陷焊料层118-1a,形成包括开口图案202的光致抗蚀剂图案120,从而形成第一填充物层114-1a的部分和中间填充物层114-2a的部分,即填充物层114的彼此分开的多个部分。当使用填充物层114的各个部分时,在通过施行用于形成塌陷焊料层118-1a的回流工艺而令焊料层溶解时,可以精细地控制溶解的方向。
图15是示出了根据本发明思想的示例性实施例的形成突块的方法的流程图。为了便于理解,下面将参照图1到图14描述形成突块的方法。
参照图15,制备在其上形成作为最终保护膜的钝化膜104的半导体衬底100(S100)。接下来,形成部分地暴露出半导体衬底100上的焊盘112的缓冲绝缘膜106(S102)。接下来,形成覆盖整个半导体衬底100的阻挡壁层108(S104),并且在阻挡壁层108上形成种子层110(S106)。
形成包括部分地暴露出种子层110的开口图案202的光致抗蚀剂图案120(S108),并且施行第一电镀工艺以便在种子层110上形成填充物层114(S110)。接下来,施行第二电镀工艺以便在填充物层114上形成焊料层116(S112),并且去除被用作电镀屏蔽膜的光致抗蚀剂图案120(S114)。
接下来,通过利用蚁酸施行热处理(而不是熔剂处理)去除半导体衬底100上的自然氧化物膜(116)。接下来,通过施行回流工艺形成焊料突块118b和塌陷焊料层118a(S118)。随后,通过蚀刻工艺去除半导体衬底100上所暴露出的种子层110和种子层110下方的阻挡壁层108(S120)。
虽然参照本发明思想的示例性实施例具体示出并描述了本发明思想,但是应当理解的是,在不背离所附权利要求书的精神和范围的情况下可以在其中做出形式和细节方面的各种改变。
Claims (20)
1.一种形成半导体器件的连接突块的方法,所述方法包括:
制备半导体衬底,在所述半导体衬底上通过钝化膜部分地暴露出焊盘;
在所述焊盘和所述钝化膜上形成种子层;
形成包括开口图案的光致抗蚀剂图案,所述开口图案包括:
暴露出所述焊盘上的种子层的一部分的第一开口;以及
暴露出所述钝化膜上的种子层的一部分并且与所述第一开口分开的第二开口;
施行第一电镀,以便在所述开口图案中形成填充物层;
施行第二电镀,以便在所述填充物层上形成焊料层;
去除所述光致抗蚀剂图案;以及
施行回流工艺,以便形成塌陷焊料层和焊料突块,该塌陷焊料层将所述填充物层彼此电连接,并且该焊料突块位于形成在所述第二开口中的填充物层上。
2.权利要求1的方法,其中,施行回流工艺包括:通过溶解形成在所述第一开口中的填充物层上的焊料层的一部分而形成所述塌陷焊料层。
3.权利要求1的方法,其还包括:在施行回流工艺之后,去除被所述填充物层和所述塌陷焊料层暴露出的种子层的一部分。
4.权利要求1的方法,其中,所述第一开口的最窄宽度小于所述第二开口的最窄宽度,从而通过溶解形成在所述第一开口中的填充物层上的焊料层的一部分而形成所述塌陷焊料层,并且由形成在所述第二开口中的填充物层上的焊料层来形成所述焊料突块。
5.权利要求1的方法,其中,所述开口图案还包括处于所述第一开口与所述第二开口之间的至少一个中间开口,所述至少一个中间开口与所述第一开口和所述第二开口分开。
6.权利要求5的方法,其中,所述第一开口和所述至少一个中间开口的剖面具有相同的形状,并且所述第一开口和所述至少一个中间开口在朝向所述第二开口的方向上被重复布置。
7.权利要求5的方法,其中,施行回流工艺包括:通过溶解形成在所述第一开口和所述中间开口中的填充物层上的焊料层的一部分而形成所述塌陷焊料层。
8.权利要求7的方法,其中,施行回流工艺包括:通过溶解形成在所述第一开口和所述中间开口中的填充物层上的焊料层的一部分而形成所述塌陷焊料层,从而使得所述塌陷焊料层与形成在所述第二开口中的填充物层接触。
9.权利要求1的方法,其中,形成所述光致抗蚀剂图案还包括:形成对应于与所述开口图案分开并且暴露出所述钝化膜上的种子层的一部分的虚设开口的光致抗蚀剂图案,
施行第一电镀包括:在所述虚设开口中形成虚设填充物层,并且
施行第二电镀包括:在所述虚设填充物层上形成虚设焊料层。
10.权利要求9的方法,其中,施行回流工艺包括:在所述虚设填充物层上形成虚设焊料突块。
11.权利要求10的方法,其中,施行回流工艺包括:在所述半导体衬底上的相同水平处形成所述焊料突块和所述虚设焊料突块的最上表面。
12.权利要求10的方法,其中,施行回流工艺包括:在所述半导体衬底上的低于所述焊料突块的最上表面的某一水平处形成所述塌陷焊料层的最上表面。
13.权利要求10的方法,其还包括:
在施行回流工艺之后去除被所述填充物层和所述塌陷焊料层暴露出的种子层部分,从而使得所述填充物层、所述焊料突块和所述塌陷焊料层分别与所述虚设填充物层和所述虚设焊料突块电绝缘。
14.一种形成半导体器件的连接突块的方法,所述方法包括:
制备半导体衬底,在所述半导体衬底上通过钝化膜部分地暴露出焊盘;
形成彼此分开的填充物层,每一个填充物层包括:
所述钝化膜上的突块填充物图案,
用以与所述焊盘部分地重叠的焊盘上的连接填充物图案,以及
所述突块填充物图案与所述连接填充物图案之间的至少一个中间填充物图案;
在所述填充物层上形成焊料层;以及
通过溶解形成在所述连接填充物图案和所述中间填充物图案上的焊料层而形成把所述焊盘电连接到所述突块填充物图案的塌陷焊料层。
15.权利要求14的方法,其中,所述填充物图案还包括处于所述钝化膜上并且与所述突块填充物图案、所述连接填充物图案和所述中间填充物图案分开的辅助填充物图案,
形成塌陷焊料层包括:将所述焊盘与所述辅助填充物图案电绝缘。
16.一种形成半导体器件的连接突块的方法,所述半导体器件包括其上具有焊料层的第一填充物层、其上具有焊料突块的第二填充物层以及部分地被所述第一填充物层覆盖的焊盘,所述方法包括:
在所述半导体器件上形成塌陷焊料层;以及
将所述第一填充物层、所述第二填充物层、所述焊盘和所述焊料突块电连接。
17.权利要求16的方法,其还包括:
将所述第一填充物层形成为具有小于所述第二填充物层的宽度。
18.权利要求16的方法,其还包括:
精细地控制所述焊料层塌陷的方向。
19.权利要求18的方法,其还包括:
在所述半导体器件上形成虚设填充物层;以及
在所述虚设填充物层上形成虚设焊料突块。
20.权利要求19的方法,其中,在形成所述虚设填充物层和形成所述虚设焊料突块时使得所述虚设填充物层和所述虚设焊料突块与所述焊盘电绝缘。
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