CN102983099A - Semiconductor integrated circuit manufacturing method - Google Patents

Semiconductor integrated circuit manufacturing method Download PDF

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Publication number
CN102983099A
CN102983099A CN2011102637951A CN201110263795A CN102983099A CN 102983099 A CN102983099 A CN 102983099A CN 2011102637951 A CN2011102637951 A CN 2011102637951A CN 201110263795 A CN201110263795 A CN 201110263795A CN 102983099 A CN102983099 A CN 102983099A
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plasma
etching
pulse
pulse power
plasma etching
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孟令款
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Institute of Microelectronics of CAS
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Institute of Microelectronics of CAS
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Abstract

Provided is a semiconductor integrated circuit manufacturing method. Pulse plasma is adopted to achieve etch, and the plasma is generated through periodic impulse power exertion. Due to the fact that the pulse plasma has lower electronic temperature and plasma density compared with continuous wave plasma, damage to the plasma is greatly reduced, and formation of notch effects is greatly avoided; and in addition, on the condition that sheath voltage is reduced, when electronegative plasma is injected into a structure of a high aspect ratio hole, accumulated positive charge particles can be neutralized, and therefore imbalance between positive charges and electrons can be buffered and even eliminated to obtain ideal etching morphology.

Description

The semiconductor integrated circuit manufacture method
Technical field
The present invention relates to semiconductor integrated circuit and make the field, especially, relate to a kind of method that adopts the pulse plasma body technology to realize high-aspect-ratio deep-hole structures etching.
Background technology
In in the past 40 years, plasma dry etch process is being played the part of very important role in the semiconductor integrated circuit field of making always.Logical product and memory device can obtain more and more higher performance on the basis that does not increase power consumption, the manufacturing of these high-performance and products with larger capacity, just depending on to a great extent plasma etching technology can be to the heart of integrated circuit---gate electrode, the realization precision is controlled accurately, can obtain vertical pattern control to interconnection and the deep etching of integrated circuit, thereby, so that transistor is overcome a series of restrictions, continue micro according to Moore's Law.
Along with entering 45nm, integrated circuit reaches with lower node, the increase of chip density needs integrated more device on the unit wafer, trench features size (Critical Dimension, CD) width will further dwindle, and the degree of depth can not continue micro, as a result, the depth-to-width ratio of groove (Aspect Ratio, AR) constantly increases.Therefore, adopt conventional plasma process to realize high-aspect-ratio (High Aspect Ratio, HAR) etching of groove will face increasing difficulty, depth-to-width ratio such as uniformity, micro loading effect and etching relies on effect (Aspect Ratio Depended Effect, ARDE) etc.Especially, for the ARDE effect, because etching speed and depth-to-width ratio have strong dependence effect, namely in the highly dense zone of live width because have a less live width size, relatively high gash depth, cause the relative sparse region of etching speed (have larger live width larger) to reduce rapidly, the relation of etching speed and density as shown in Figure 1.In the time will on whole wafer, all guaranteeing to etch into desired depth, namely when sparse region etching finish and in the close quarters situation that etching is not finished yet, if substrate is selected than not sufficiently high words, over etching appears in the part that the continuation etching will cause having finished etching.And, if substrate partly is the insulation dielectric film, because the over etching that continues will accumulate positive charge at channel bottom, cause plasma damage, groove effect (Notching Effect) occurs at sparse region comparatively, as shown in Figure 2, the root of groove is recessed to inside sidewalls.If as the contact hole interconnection (Contact hole) of CMOS leading portion, bring very large challenge will for the filling of ensuing metal, the problem that regional area can't be filled fully may appear, and hole (Void) appears.Thereby, so that contact resistance becomes large, performance of devices is brought impact.
In addition, special in the bottom of groove in superelevation depth-to-width ratio (UHAR, AR>40: 1) hole etching process, the pattern of also the having found groove phenomenon that is distorted.This is because groove has less opening and the relatively high degree of depth, so that the motion of ion in groove is subject to the impact of the positive charge electrostatic force that sidewall and bottom gathers, can't keep deflecting vertically downward always; In addition, the polymer that also may cause etching difficulty and reaction to generate that exhausts of free radical is difficult in time discharge by vacuum pump.As shown in Figure 3, provided the example explanation, wherein vertical dotted line sidewall is the etch topography of expectation, and the solid line sidewall is the off plumb etch topography of actual generation.
Therefore, need a kind of new high-aspect-ratio hole lithographic method, to obtain uniform etching speed and good etch topography.
Summary of the invention
At first, the invention provides a kind of lithographic method of high-aspect-ratio pore structure, wherein, comprising:
In the cavity of plasma etching machine, pass into required etching reaction gas, adopt pulsed plasma etching layer to be etched, obtain required high-aspect-ratio pore structure;
Wherein, described pulsed plasma is to be connected with offset side in the source of the cavity of described plasma etching machine to connect pulse power;
Described pulse power was comprised of a plurality of pulse periods, the pulse frequency by regulating impulse power and pulse duty factor realize control to the plasma that produces;
All have opening and closed condition in each pulse period of described pulse power, under opening, described pulse power is used for the generation of plasma.
In the method for the invention, described plasma etching machine adopts the etching apparatus of inductively coupled plasma (ICP) or cyclotron resonance plasma (ECR).
In the method for the invention, are connected with offset side in the source of the cavity of described plasma etching machine and connect pulse power, that the pulse power that source is connected with offset side is set to is synchronous or asynchronous, homophase or out-phase.
In the method for the invention, the pulse frequency scope of described pulse power be 500Hz to 20kHz, the scope of pulse duty factor is 10% to 90%.
In the method for the invention, the time span of each opening of described pulse power should not make the positive charge that accumulates in the high-aspect-ratio pore structure reach stable state.
In the method for the invention, the time span of each opening of described pulse power relies on effect less than 10 milliseconds with micro loading effect and/or the depth-to-width ratio that resists the advanced wide pore structure reaction zone of different size.
In the method for the invention, counteracting accumulation of positive charges effect in the advanced wide pore structure can be injected into thereby the time span of each closed condition of described pulse power will be grown the electronegativity ion, and the accessory substance of etching reaction in each opening can be removed.
Secondly, the invention provides the lithographic method of another kind of high-aspect-ratio pore structure, wherein, comprising:
Pass into required etching reaction gas in the cavity of plasma etching machine, the method etching that adopts the continuous wave plasma to combine with pulsed plasma layer to be etched obtains required high-aspect-ratio pore structure;
Wherein, by using the first of the described layer to be etched of described continuous wave plasma etching, by means of the terminal point of etch period or terminal point diagnosis and examining system control continuous wave plasma etching;
Then, adopt the remaining part of the described layer to be etched of pulsed plasma etching, until obtain required high-aspect-ratio pore structure;
Wherein, described pulsed plasma is to be connected with offset side in the source of the cavity of described plasma etching machine to connect pulse power;
Described pulse power was comprised of a plurality of pulse periods, the pulse frequency by regulating impulse power and pulse duty factor realize control to the plasma that produces;
All have opening and closed condition in each pulse period of described pulse power, under opening, described pulse power is used for the generation of plasma.
In the method for the invention, adopt Through Optical Interference Spectra to measure the terminal point that described layer film thickness to be etched is controlled the continuous wave plasma etching.
In the method for the invention, it is characterized in that, adopt the optical spectra method to control the terminal point of continuous wave plasma etching by the frequency of measuring different-waveband.
The present invention proposes a kind of lithographic method of high-aspect-ratio pore structure, adopt pulsed plasma to carry out etching, by periodically applying pulse power to produce plasma, owing to have electron temperature and the plasma density lower than continuous wave plasma, so that plasma damage is reduced widely, avoid greatly the formation of Notching effect; In addition, in the situation of sheath layer lower voltage, the positive charged particles of accumulation that when the electronegativity plasma is injected in the high-aspect-ratio pore structure, can neutralize, thus can relax even eliminate positive charge and interelectric imbalance, to obtain desirable etch topography.
Description of drawings
Fig. 1, increases etching speed with density of texture and reduces curve when etching complexity or many configuration process for adopting traditional plasma etch process;
When Fig. 2 is etching high-aspect-ratio hole, in the over etching process, the groove effect (Notching Effect) that the rarefaction occurs
Fig. 3 is when etching superelevation depth-to-width ratio (UHAR: AR>40: 1) hole, the hole etch topography twisted phenomena that adopts traditional plasma technique to occur;
Fig. 4 is that the pulsed plasma of etching machine radio frequency source and the synchronous homophase of bias power produces schematic diagram;
Fig. 5 A, 5B are for adopting pulse plasma body technology, etching high-aspect-ratio pore structure;
Fig. 6 is for adopting pulse plasma body technology, the corresponding diagram of radio-frequency power and etching speed;
Fig. 7 A, 7B are for adopting pulse plasma body technology, the high-aspect-ratio pore structure of etching complexity;
The mode of Fig. 8 for adopting the continuous wave plasma to combine with pulsed plasma, the corresponding diagram of radio-frequency power and etching speed during etching high-aspect-ratio pore structure.
Embodiment
Below, by the specific embodiment shown in the accompanying drawing the present invention is described.But should be appreciated that these descriptions are exemplary, and do not really want to limit the scope of the invention.In addition, in the following description, omitted the description to known configurations and technology, to avoid unnecessarily obscuring concept of the present invention.
Embodiments of the invention relate to the etching that the use pulsed plasma method is carried out the high-aspect-ratio hole, to realize desired etch topography demand.Among the present invention, the high-aspect-ratio hole refers to that depth-to-width ratio is greater than the hole of 30: 1 (be AR>30: 1).According to technology of the present invention, the high-aspect-ratio hole of etching can be used in the leading portion local interlinkage technique (Contact via) of CMOS product, also can be used for the high-aspect-ratio hole etching that DRAM forms electric capacity, or the hole etching of other labyrinths.Applying plasma etching machine of the present invention adopts the etching apparatus of inductively coupled plasma (ICP) or cyclotron resonance plasma (ECR).
The embodiment that the present invention uses at first wants hole of etching.This structure comprises a Semiconductor substrate (not shown), the hard mask 501 on the Semiconductor substrate, and such as Fig. 5 A, layer to be etched 502 and be used to form the required mask arrangement in hole 503.According to concrete application demand, hard mask 501 may not exist.Wherein, Semiconductor substrate can comprise any suitable semiconductor substrate materials, specifically can be but is not limited to silicon, germanium, SiGe, SOI (silicon-on-insulator), carborundum, GaAs and other any III/V compound semiconductor etc.Hard mask on the Semiconductor substrate generally adopts thin dielectric film such as silicon dioxide, silicon nitride or silicon oxynitride etc.According to different application and technology node requirements, the graphical required mask arrangement 503 that forms the hole is also different.In certain embodiments, for example at 90nm and in lower node, the contact hole etching of leading portion local interlinkage generally adopts SiO 2The mask arrangement 503 of/end anti-reflecting layer BARC/ photoresist PR is delivered to layer 502 to be etched through suitable photoetching technique with figure is accurately errorless.
In specific embodiment embodied, layer 502 to be etched comprised thin dielectric film, silicon materials etc., need to adopt different etching gas according to different materials.In some embody, when etching silicon dioxide based dielectric film, more use carbon fluorine base gas and O 2Combination, such as the CF of normal use 4/ CHF 3/ O 2Mist.When the etch silicon sill, there is more combination of gases available, this mainly relies on desired process requirements.In embodying at some, can adopt Cl 2The mist of/HBr, HBr/O 2Mist or SF 6/ O 2Combination come the etch silicon semi-conducting material.Except above-mentioned thin dielectric film, silicon materials, for the non-semiconductor sill, such as metal and compound thereof, also can adopt suitable etching gas to form required figure as Al, W, TiN, TaN etc., as when the etching high-K metal gate structure, take Cl 2/ BCl 3Mist etch away a part, again in conjunction with the wet processing selective etch, until satisfy specification requirement, to realize accurate pattern control.
Adopt suitable plasma process to produce pulsed plasma, have specific pulse frequency and duty ratio, are connected with offset side in the source of the cavity of plasma etching machine and connect pulse power, that the pulse power that source is connected with offset side is set to is synchronous or asynchronous, homophase or out-phase, and everything is decided on the result who uses its menu and regulate.Obviously, pulse duty factor is higher, and pulse frequency is less, and near traditional continuous wave plasma etch process, this may offset the advantage that adopts the pulse plasma body technology.Therefore, it is very important selecting suitable pulse parameter and the radio-frequency power access way of source and offset side.Usually, the pulse frequency scope of pulse power be 500Hz to 20kHz, the scope of pulse duty factor is 10% to 90%.
In some specific embodiments, can select the mode of source and the synchronous homophase of offset side radio-frequency power, referring to accompanying drawing 4, such benefit is to be easy to control and can greatly to reduce radio frequency network matched impedance problem.If source radio-frequency head plasma is in closed condition, the state that the biasing radio frequency plasma is in out will cause sizable rf bias voltage, greatly increases ion bombardment energy.When being in over etching during the stage, will sizable damage be arranged to backing material, be difficult to avoid groove effect (Notching Effect).
Select suitable pulse frequency, " unlatching " and " closing " state, the pulsed plasma of periodic carries out etching to destination layer.In the initial condition of pulse " unlatching ", plasma through exciting generation, finally forms stable glow discharge in etching cavity.Comprise lotus energy electronics, cation and the neutral group of lotus energy in the plasma, in some electronegative gases discharges, also can produce anion.Such as, adopt HBr/O 2When etching Si sill such as polysilicon gate, fleet plough groove isolation structure, during " closing " stage of pulsed discharge is " twilight sunset ", will produce anion B component r -The electronegative gas compositions such as picture halogen (F, Cl, Br) are at the pulse power dwell period, namely during " twilight sunset ", owing to have electron temperature and the plasma density lower than continuous wave plasma, can realize from the electron-ion plasma to the ion in the twilight sunset stage-transformation of ion plasma, be easier to produce negative plasma.
In current embodiment, layer 502 to be etched is SiO 2Thin dielectric film can be selected CF 4/ CHF 3/ O 2Mist." unlatching " pulse power is selected suitable pulse frequency, produces stable plasma.Because pulse power comprises " unlatching " and " closing " state, is different from traditional continuous wave mode, at " unlatching " state, can adjust suitable etching speed, makes its dependence to depth-to-width ratio AR drop to minimum.Simultaneously, the time span of opening should not make the positive charge that accumulates in the high-aspect-ratio pore structure reach stable state; And the time span of opening relies on effect less than 10 milliseconds with micro loading effect and/or the depth-to-width ratio that resists the advanced wide pore structure reaction zone of different size.At " closing " state, selecting suitable pulse frequency is the cycle, the high concentration product that adjustment produces in the time of can be with " unlatching " state, by with reaction zone low concentration gradient outward, form diffusion effect, under the effect of vacuum pump, a large amount of reactants are volatilized away.Repeat same action, until etch into desired depth, form the pattern shown in Fig. 5 B, the hole of different form ratios all has good sidewall pattern.Especially, " closing " state in each cycle is " twilight sunset " stage, because sheath layer lower voltage, the electronegativity plasma can be injected in groove or the deep hole, the positive charged particles of neutralization accumulation, thereby can relax even eliminate positive charge and interelectric imbalance, in order to obtain desirable etch topography.Counteracting accumulation of positive charges effect in the advanced wide pore structure can be injected into thereby the time span of each closed condition will be grown the electronegativity ion, and the accessory substance of etching reaction in each opening can be removed.As so-called groove effect (Notching Effect) problem in Fig. 5 B, not occurring.And owing to adopted suitable pulse frequency and duty ratio size, in next " unlatching " and " closing " cycle, etching speed will keep being unlikely to greatly to reduce with the dependence of AR with similar value of initial period.Radio-frequency power and etching speed are as shown in Figure 6.
In other embodiment, improve throughput or output capacity (Through-put) or the unit interval chip production rate (WPH:Wafer per hour) of chip in order to increase total etching speed, the mode that can take traditional continuous wave mode plasma etch process to combine with the pulse plasma bulk-mode, not only can promote Through-put/WPH, can also on this basis, reduce the generation of groove effect (Notching Effect).Specifically, in initial etch stages, the source of etching cavity is connected continuous wave mode with offset side, and during this period, layer 502 to be etched has higher etching speed.Because at whole crystal column surface, the characteristic size in zones of different hole and density thereof are different, will there be faster etching speed the rarefaction, and the compact district has less etching speed because depth-to-width ratio relies on.Therefore, need adjustment etching parameters such as operation pressure, gas componant and ratio thereof, etch period or over etching to examine the survey terminal point, make when being about to etch into lower film, can transfer at once under the pulse plasma body technology, and be unlikely to that lower film is had more over etching damage.Next, apply periodic pulsed plasma, rely on to be close to stable etching speed in its different cycles, and lower ion bombardment energy, can not damage in the situation of etched hole, so that the deep hole on the whole wafer all obtains the numerical value expected.
For the mode that the continuous wave mode plasma combines with the pulse plasma bulk-mode, more can also be applied on the complex multilayer, reduce the damage to following key stratum, the boost device performance.Can realize undamaged etching power in conjunction with two kinds of patterns, such as Fig. 7 A, complicated multilayer etching structure 706, for example formed by 703 and 704 two parts, they can be different thin dielectric membrane materials, also can comprise the metal-base film material, depend on concrete application and decide.Wherein, the 701st, semiconductor substrate materials, 702 are comprised of dielectric substance, such as SiO 2, SiN, SiON etc., 703 and 704 is layer to be etched, 705 photoresist and the masks that need for forming etched hole are in order to accurately to transmit figure in understructure.In certain embodiments, the 703rd, one deck dielectric substance as thin as a wafer, its thickness in etching process, need control minimum damage or material unaccounted-for (MUF) less than or equal to 10nm.704 because to have be the thicker film of one deck, and its thickness can adopt the etching mode of continuous wave mode, and can have faster etching speed more than or equal to 200nm.According to different material compositions, select suitable etching gas, such as dielectric substance SiO 2/ SiN/SiON need to select carbon fluorine base gas C xF yWith suitable interpolation gas such as O 2, CO, Ar etc.; Metal_based material need to select can etching its gas and higher volatility is arranged at normal temperatures, need to select fluorine base gas such as etching W; Silica-base material need to be selected Cl 2/ HBr, HBr/O 2, SF 6/ O 2Deng mist.As mentioned above, when etching 704 thin dielectric films were about to 703, the connected mode of adjustment source and offset side was transferred to the pulse plasma bulk-mode.Optimal Parameters, periodic pulse power is applied to etching cavity inside, forms stable glow plasma discharge.Such as Fig. 7 B, by lower electron temperature and ion bombardment energy, 703 layers of etchings.Because the pulsed plasma etching has relatively little etching speed, therefore in to 703 layers of etching process, can lower damage be arranged to understructure 702, realize controlled etch topography.Wherein, can adopt Through Optical Interference Spectra to measure the terminal point that 704 film thicknesses are controlled the continuous wave plasma etching, also can adopt the optical spectra method to control the terminal point of continuous wave plasma etching by the frequency of measuring different-waveband.In addition, can also control certain etch period according to the characteristic requirements of layer to be etched, thereby determine the terminal point of continuous wave plasma etching.
For the ease of understanding, the mode that continuous wave mode is combined with the pulse plasma bulk-mode is shown among Fig. 8, and whole etching process is comprised of Etch1 and Etch2 two parts, respectively corresponding continuous wave and impulse wave pattern.At continuous wave mode, power is in continuous opening, yet under pulse mode, pulsed plasma is periodically opened, and the unlatching cycle is T.Two stage etching speed is to be shown among Fig. 8 time averaging mode.Therefore, for the deep hole of labyrinth or the etching of other structures, can strobe pulse plasma etching mode for key stratum, and for not too crucial and require the part of high-throughput can select the etching mode of continuous wave mode, the requirement of productivity ratio and reliability can be fully taken into account in both combinations.
Abovely with reference to embodiments of the invention the present invention has been given explanation.But these embodiment only are for illustrative purposes, and are not in order to limit the scope of the invention.Scope of the present invention is limited by claims and equivalent thereof.Do not depart from the scope of the present invention, those skilled in the art can make a variety of substitutions and modifications, and these substitutions and modifications all should fall within the scope of the present invention.

Claims (11)

1. the lithographic method of a high-aspect-ratio pore structure is characterized in that, comprising:
In the cavity of plasma etching machine, pass into required etching reaction gas, adopt pulsed plasma etching layer to be etched, obtain required high-aspect-ratio pore structure;
Wherein, described pulsed plasma is to be connected with offset side in the source of the cavity of described plasma etching machine to connect pulse power;
Described pulse power was comprised of a plurality of pulse periods, the pulse frequency by regulating impulse power and pulse duty factor realize control to the plasma that produces;
All have opening and closed condition in each pulse period of described pulse power, under opening, described pulse power is used for the generation of plasma.
2. method according to claim 1 is characterized in that, described plasma etching machine adopts the etching apparatus of inductively coupled plasma (ICP) or cyclotron resonance plasma (ECR).
3. method according to claim 1 is characterized in that, is connected with offset side in the source of the cavity of described plasma etching machine to connect pulse power, and that the pulse power that source is connected with offset side is set to is synchronous or asynchronous, homophase or out-phase.
4. method according to claim 1 is characterized in that, the pulse frequency scope of described pulse power be 500Hz to 20kHz, the scope of pulse duty factor is 10% to 90%.
5. method according to claim 1 is characterized in that, the time span of each opening of described pulse power should not make the positive charge that accumulates in the high-aspect-ratio pore structure reach stable state.
6. method according to claim 1 is characterized in that, the time span of each opening of described pulse power relies on effect less than 10 milliseconds with micro loading effect and/or the depth-to-width ratio that resists the advanced wide pore structure reaction zone of different size.
7. method according to claim 1, it is characterized in that, counteracting accumulation of positive charges effect in the advanced wide pore structure can be injected into thereby the time span of each closed condition of described pulse power will be grown the electronegativity ion, and the accessory substance of etching reaction in each opening can be removed.
8. the lithographic method of a high-aspect-ratio pore structure is characterized in that, comprising:
Pass into required etching reaction gas in the cavity of plasma etching machine, the method etching that adopts the continuous wave plasma to combine with pulsed plasma layer to be etched obtains required high-aspect-ratio pore structure;
Wherein, by using the first of the described layer to be etched of described continuous wave plasma etching, by means of the terminal point of etch period or terminal point diagnosis and examining system control continuous wave plasma etching;
Then, adopt the remaining part of the described layer to be etched of pulsed plasma etching, until obtain required high-aspect-ratio pore structure;
Wherein, described pulsed plasma is to be connected with offset side in the source of the cavity of described plasma etching machine to connect pulse power;
Described pulse power was comprised of a plurality of pulse periods, the pulse frequency by regulating impulse power and pulse duty factor realize control to the plasma that produces;
All have opening and closed condition in each pulse period of described pulse power, under opening, described pulse power is used for the generation of plasma.
9. method according to claim 8 is characterized in that, adopts Through Optical Interference Spectra to measure the terminal point that described layer film thickness to be etched is controlled the continuous wave plasma etching.
10. method according to claim 8 is characterized in that, adopts the optical spectra method to control the terminal point of continuous wave plasma etching by the frequency of measuring different-waveband.
11. method according to claim 8 is characterized in that, according to the characteristic requirements of layer to be etched, controls certain etch period, thereby determines the terminal point of continuous wave plasma etching.
CN2011102637951A 2011-09-07 2011-09-07 Semiconductor integrated circuit manufacturing method Pending CN102983099A (en)

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CN108766882A (en) * 2018-05-23 2018-11-06 北京北方华创微电子装备有限公司 Plasma silicon etching method and semiconductor devices
WO2018233455A1 (en) * 2017-06-23 2018-12-27 北京北方华创微电子装备有限公司 Bias modulation method, bias modulation system and plasma processing device
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CN105097524B (en) * 2014-05-04 2018-11-16 中芯国际集成电路制造(上海)有限公司 The forming method of MOS transistor and the forming method of CMOS transistor
CN105097524A (en) * 2014-05-04 2015-11-25 中芯国际集成电路制造(上海)有限公司 Formation method of MOS transistor and formation method of CMOS transistor
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CN111739795A (en) * 2020-06-24 2020-10-02 北京北方华创微电子装备有限公司 Etching method
CN111739795B (en) * 2020-06-24 2023-08-18 北京北方华创微电子装备有限公司 Etching method
CN117059482A (en) * 2023-10-11 2023-11-14 粤芯半导体技术股份有限公司 Silicon dioxide wet etching method
CN117059482B (en) * 2023-10-11 2024-01-26 粤芯半导体技术股份有限公司 Silicon dioxide wet etching method

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