CN102709184B - 含有多晶硅有源层的薄膜晶体管、其制造方法及阵列基板 - Google Patents
含有多晶硅有源层的薄膜晶体管、其制造方法及阵列基板 Download PDFInfo
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Abstract
本发明提供一种制造含有多晶硅有源层的薄膜晶体管的方法,方法包括:在基板上沉积非晶硅层,并对非晶硅层进行构图,形成包括源区、漏区和沟道区的有源层;在源区和漏区上沉积诱导金属;对沉积有诱导金属的有源层进行热处理,使有源层在诱导金属的作用下发生金属诱导晶化和金属诱导横向晶化;在源区和漏区掺入用于收集诱导金属的第一杂质和用于形成PMOS或NMOS第二杂质;对掺杂后的有源层进行热处理,以激活第二杂质,并使得第一杂质对沟通区的残留诱导金属进行吸收。
Description
技术领域
本发明涉及薄膜晶体管(TFT)的制造工艺,特别涉及一种用于显示器件如液晶显示器(LCD)或有机电致发光显示器(OLED)的含有多晶硅有源层的薄膜晶体管、其制造方法及阵列基板。
背景技术
多晶硅由于原子规则排列,载流子迁移率高(10~300cm2/Vs),同时也有较高的驱动电流,可以加快液晶的反应时间,缩小TFT的体积,增加透过面积,得到更高的亮度和解析度。多晶硅的这些优点对于有源矩阵有机电致发光显示器(AMOLED)也是至关重要的,不同于液晶的电压驱动方式,AMOLED采用的是电流驱动方式,只有多晶硅TFT才可以更好地满足其要求。另外,多晶硅的一个显著特点是可以将驱动集成电路(IC)集成至面板上,甚至做成玻璃上的***(System on Glass,SOG),具有更轻、更薄、耗电量更低等优点。
传统多晶硅的制作方法是先在玻璃基板上沉积一层非晶硅(a-Si),再利用退火热处理的方法使非晶硅晶化,但此方法需要长时间在高于600℃的温度下退火,无法应用于显示器的玻璃基板。后来,人们发现,a-Si晶化温度可以采用在a-Si上沉积一些金属的方法来降低,金属可以起到催化剂的作用,能够促进结晶生长,这种方法称为金属诱导晶化(Metal-induced crystallization,MIC),MIC可以将晶化温度降低到500℃以下。但是将MIC应用于多晶硅TFT制作工艺时存在着一个严重的缺点,即金属杂质很容易残留在TFT的沟道区,在沟通区中引起漏电流,导致TFT的特性恶化。
后来,人们发现了另外一种金属诱导晶化现象,即MIC可以向没有金属覆盖的区域横向生长100微米以上,这种现象称为金属诱导横向晶化(Metal-induced lateral crystallization,MILC)。MILC可以在多种金属如镍等的诱导下发生,晶化温度可以低于500℃,晶粒为长条状,尺寸较大。
图1A、1B是现有技术中利用MILC工艺制造多晶硅TFT的示意图。参照图1A、1B,包括如下步骤:首先,在玻璃基板101上以等离子体增强化学气相沉积(PECVD)方法沉积缓冲层102,该缓冲层的材料为SiO2;其次,在缓冲层102上以PECVD或低压化学气相沉积(LPCVD)方法沉积非晶硅层103;再次,在非晶硅层103上的选择位置处(后续形成TFT结构的源/漏区域)采用溅射方法沉积诱导金属镍104;最后,进行退火处理,通常退火时间为0.1~10小时。在退火过程中,非晶硅与镍金属直接接触的区域首先发生MIC而晶化,形成MIC多晶硅区域,即图1B中的103S、103D,随后多晶硅晶粒横向生长入没有与镍金属直接接触的非晶硅区域,形成附图1B中的MILC多晶硅区域103C。由于并没有与金属直接接触,MILC多晶硅区域比MIC多晶硅区域的金属杂质含量要低得多。
但是,采用上述的MILC工艺制备的TFT仍有较大的漏电流,产生此问题的主要原因是沟道两端的MILC与MIC界面所形成的横向晶界和沟道区内MILC晶化形成的晶粒与晶粒之间的横向晶界,这些区域有较高的镍含量。图2是使用二次离子质谱(SIMS)所得到的镍在MIC、MILC以及a-Si区间的一维分布图,从图2可以看出,在MILC区间的镍含量最低,在MILC前沿的晶粒与晶粒之间的镍含量有所增加,而在MIC/MILC界面附近镍含量最高。
发明内容
本发明所要解决的技术问题是提供一种含有多晶硅有源层的薄膜晶体管、其制造方法及阵列基板,以降低MILC工艺在多晶硅TFT沟道区残留的诱导金属的含量,从而降低多晶硅TFT的漏电流,改善多晶硅TFT的电学性能。
为解决上述技术问题,本发明提供技术方案如下:
一种制造含有多晶硅有源层的薄膜晶体管的方法,包括:
在基板上沉积非晶硅层,并对非晶硅层进行构图,形成包括源区、漏区和沟道区的有源层;
在源区和漏区上沉积诱导金属;
对沉积有诱导金属的有源层进行热处理,使有源层在诱导金属的作用下发生金属诱导晶化和金属诱导横向晶化;
在源区和漏区掺入用于收集诱导金属的第一杂质和用于形成PMOS或NMOS第二杂质;
对掺杂后的有源层进行热处理,以激活第二杂质,并使得第一杂质对沟通区的残留诱导金属进行吸收。
一种含有多晶硅有源层的薄膜晶体管,所述薄膜晶体管采用上述的方法制造得到。
一种阵列基板,所述阵列基板中包括有上述的薄膜晶体管。
与现有技术相比,本发明的有益效果是:本发明通过对TFT有源层的非晶硅进行MILC晶化后,在源漏区中掺入用于吸收诱导金属的杂质,然后在热处理条件下,源漏区中掺入的杂质对沟道区域的诱导金属进行吸收,使得沟道区的诱导金属移动到源漏区域,这样,沟道区中残留的诱导金属的含量就得到了降低,从而能够降低多晶硅TFT的漏电流,改善多晶硅TFT的电学性能。
附图说明
图1A、1B是现有技术中利用MILC工艺制造多晶硅TFT的示意图;
图2是使用二次离子质谱所得到的镍在MIC、MILC以及a-Si区间的一维分布图;
图3是本发明实施例制造含有多晶硅有源层的薄膜晶体管的方法流程图;
图4A~4E是本发明实施例制造含有多晶硅有源层的薄膜晶体管的方法示意图。
具体实施方式
为使本发明的目的、技术方案和优点更加清楚,下面将结合附图及具体实施例对本发明进行详细描述。
图3是本发明实施例制造含有多晶硅有源层的薄膜晶体管的方法流程图,参照图3,包括如下步骤:
步骤301:在基板上沉积缓冲层;
参照图4A,在经过预先清洗的玻璃等透明基板401上,以PECVD(等离子体增强化学气相沉积)、LPCVD(低压化学气相沉积)、APCVD(大气压化学气相沉积)、ECR-CVD(电子回旋谐振化学气相沉积)或者溅射等方法形成缓冲层402,以阻挡玻璃中所含的杂质扩散进入有源层中,防止对TFT元件的阈值电压和漏电流等特性产生影响。
该缓冲层可以为单层的氧化硅、氮化硅或者二者的叠层。该层的厚度可为优选厚度为
沉积温度在600℃或更低温度下。除引入了缓冲层外,因传统碱玻璃中铝、钡和钠等金属杂质含量较高,容易在高温处理工艺中发生金属杂质的扩散,玻璃基板建议采用无碱玻璃。
步骤302:在缓冲层上沉积非晶硅层,并对非晶硅层进行构图,形成包括源区、漏区和沟道区的有源层;
继续参照图4A,非晶硅层403在缓冲层402之上沉积,并以光刻工艺形成掩膜,继而采用干法刻蚀方法形成图形,作为TFT的有源层。有源层的厚度为
优选厚度为
其形成方法可以为PECVD、LPCVD或者溅射方法,沉积温度在600℃以下。
步骤303:在源区和漏区上沉积诱导金属,对沉积有诱导金属的有源层进行热处理,使有源层在诱导金属的作用下发生金属诱导晶化和金属诱导横向晶化:
通过光刻工艺形成掩模,在有源层的选择区域上沉积诱导金属,对覆盖诱导金属的非晶硅进行热处理,即可发生MIC(金属诱导晶化)和MILC(金属诱导横向晶化)现象,即在诱导金属直接覆盖的区域形成MIC区域,而无诱导金属覆盖的区域形成MILC区域,这样,有源层中的非晶硅晶化转变为多晶硅。
本发明实施例通过采用在TFT的源区和漏区处覆盖诱导金属的办法进行诱导晶化,可以减少诱导金属对沟道区的污染。参照图4B,在每个TFT单元中,有源层中在诱导金属404直接覆盖处形成两个MIC区域403S(源区)和403D(漏区),在无诱导金属覆盖的沟道区形成MILC区域403C。可选择的诱导金属为镍、铜、金、银、铝、钴、铬等,本实施例中采用的是镍金属,可得到较好的诱导效果和较优的TFT特性。镍层可采用溅射、热蒸发、PECVD、ALD(原子层沉积)等方法形成,其厚度在
范围内,优选厚度为采用ALD方法可以更为精确地控制镍层厚度。产生诱导晶化的热处理方法可以为RTA(快速热退火)、ELA(准分子激光退火)或炉退火的方法。本实施例中采用炉退火的方法,在400℃~600℃的温度下进行退火处理,退火气氛可为氮气、氢气或者真空,退火时间为0.1~50小时。如果采用较高的退火温度,则可使退火时间缩短至2小时以下。
步骤304:在热处理后的有源层上形成栅绝缘层和栅电极的图形;
参照图4C,首先在有源层上采用PECVD、LPCVD、APCVD或ECR-CVD等方法沉积栅绝缘层405;然后采用溅射、热蒸发或PECVD、LPCVD、APCVD、ECR-CVD等方法在栅绝缘层405上沉积栅电极层406;最后,采用湿法刻蚀或干法刻蚀的方法,以光刻工艺形成掩膜,将栅绝缘层405和栅电极层406刻蚀形成图形。
栅绝缘层405的厚度为
可根据具体工艺需要选择合适的厚度,该层可采用单层的氧化硅、氮化硅或者二者的叠层,沉积温度一般在600℃以下。栅电极层406由金属、金属合金如钼、钼合金等或掺杂的多晶硅等导电材料构成,厚度在
范围内,优选厚度为
步骤305:以栅绝缘层和栅电极的图形作为掩膜,在源区和漏区掺入用于收集诱导金属的第一杂质;
采用步骤301~304制备的TFT的有源层中,在MIC/MILC交界面和MILC前沿的晶粒与晶粒之间仍有较高的残余镍含量,这会增大TFT的关态电流,即增大TFT的漏电流,恶化TFT的电学特性。
经研究发现,磷元素具有吸收硅中金属杂质如镍、铁、铜的特性,特别是对镍有较强的吸收作用,因此,在多晶硅TFT中掺杂磷元素可以得到较低的关态电流(10pA以下)。进一步的研究还发现,氮和氮氧混合物也具有吸收镍、金等金属的作用。由于在TFT制备中掺入磷为较常见的工艺,易于实现,因此,在本步骤中,所述第一杂质优选为磷。通过在有源层的源/漏区域掺入磷元素,能够在热处理的条件下,对沟道区的残余镍杂质进行吸收,从而降低TFT的关态电流,改善TFT的电学特性。
离子注入为常用的一种掺杂技术,离子注入技术可采用具有质量分析仪的离子注入、不具有质量分析仪的离子云式注入、等离子注入或者固态扩散式注入等方法,本实施例采用主流的离子云式注入方法。
参照图4D,以栅绝缘层和栅电极的图形作为掩膜,采用离子注入的方法,对TFT结构中的源/漏区进行磷元素的轻剂量掺杂。本实施例中采用PH3/H2的混合气体407作为离子注入时采用的气体,PH3占混合气体407的重量比例在5%~15%之间。离子注入能量为10~200keV,优选为40~100keV。注入剂量在1×1011~1×1020atoms/cm3范围内,优选剂量为1×1013~8×1015atoms/cm3。
步骤306:以栅绝缘层和栅电极的图形作为掩膜,在源区和漏区掺入形成PMOS或NMOS第二杂质;
所述第二杂质为B、P或As,其中,B元素用于形成PMOS,P或As元素用于形成NMOS。本实施例以掺入B元素形成PMOS为例。
参照图4E,以栅绝缘层和栅电极的图形作为掩膜,采用离子注入的方法,对TFT结构中的源/漏区进行硼元素的重剂量掺杂。本实施例中采用B2H6/H2的混合气体408作为离子注入时采用的气体,B2H6占混合气体408的重量比例在5%~15%之间。离子注入能量为10~200keV,优选为40~100keV。注入剂量在1×1011~1×1020atoms/cm3范围内,优选剂量为1×1013~8×1015atoms/cm3。此剂量需大于磷元素的注入剂量,优选为磷元素注入剂量的2~3倍,比如若磷元素注入剂量为1×1015atoms/cm3,则硼元素的注入剂量应为2×1015至3×1015atoms/cm3。
步骤307:对掺杂后的有源层进行热处理,以激活第二杂质,并使得第一杂质对沟通区的残留诱导金属进行吸收。
在有源层中掺入所述第一杂质和所述第二杂质之后,可通过RTA、ELA或炉退火的方法进行TFT的激活工艺。炉退火的方法较为经济、简单,均匀性较佳,本实施例选用在退火炉中以300℃~600℃进行0.5~4小时(优选为1~3小时)的激活热处理。在激活过程中,上述轻剂量掺杂的磷元素即可起到对有源层中镍的吸收作用。由于磷元素仅掺杂在源/漏区域,沟道区的镍便会在磷元素的吸收作用下向源/漏区移动,从而减少沟道区的镍残留,改善所制造TFT的电学特性。
上述实施例制造的TFT为顶栅结构的TFT,对于低栅结构的TFT也可以进行类似处理,不同之处在于:在低栅结构的TFT中,非晶硅层沉积在形成了栅电极和栅绝缘层的基板上,并且,在源区和漏区掺入所述第一杂质和所述第二杂质时需要进行一次补充的掩膜工艺。
综上所述,本发明通过对TFT有源层的非晶硅进行MILC晶化后,在源漏区中掺入用于吸收诱导金属的杂质,然后在热处理条件下,源漏区中掺入的杂质对沟道区域的诱导金属进行吸收,使得沟道区的诱导金属移动到源漏区域,这样,沟道区中残留的诱导金属的含量就得到了降低,从而能够降低多晶硅TFT的漏电流,改善多晶硅TFT的电学性能。
最后应当说明的是,以上实施例仅用以说明本发明的技术方案而非限制,本领域的普通技术人员应当理解,可以对本发明的技术方案进行修改或者等同替换,而不脱离本发明技术方案的精神范围,其均应涵盖在本发明的权利要求范围当中。
Claims (11)
1.一种制造含有多晶硅有源层的薄膜晶体管的方法,其特征在于,包括:
在基板上沉积非晶硅层,并对非晶硅层进行构图,形成包括源区、漏区和沟道区的有源层;
在源区和漏区上沉积诱导金属;
对沉积有诱导金属的有源层进行热处理,使有源层在诱导金属的作用下发生金属诱导晶化和金属诱导横向晶化,在每个TFT单元中,有源层中在诱导金属直接覆盖处形成两个金属诱导晶化区域,在无诱导金属覆盖的沟道区形成金属诱导横向晶化区域;
在源区和漏区掺入用于收集诱导金属的第一杂质和用于形成PMOS或NMOS第二杂质;
对掺杂后的有源层进行热处理,以激活第二杂质,并使得第一杂质对沟通区的残留诱导金属进行吸收;
所述在源区和漏区掺入用于收集诱导金属的第一杂质和用于形成PMOS或NMOS第二杂质为:
在热处理后的有源层上形成栅绝缘层和栅电极的图形;
以栅绝缘层和栅电极的图形作为掩膜,在源区和漏区掺入所述第一杂质和所述第二杂质。
2.如权利要求1所述的方法,其特征在于,所述在基板上沉积非晶硅层为:
在形成了缓冲层的基板上沉积非晶硅层。
3.如权利要求1所述的方法,其特征在于:
所述诱导金属为镍、或铜、或金、或银、或铝、或钴、或铬。
4.如权利要求1所述的方法,其特征在于:
所述沉积的诱导金属的厚度为
5.如权利要求1所述的方法,其特征在于:
对沉积有诱导金属的有源层进行热处理的温度为400℃~600℃,时间为0.1~50小时。
6.如权利要求1所述的方法,其特征在于:
所述第一杂质为磷、氮或氮氧混合物。
7.如权利要求1所述的方法,其特征在于:
掺入的第二杂质的剂量为掺入的第一杂质的剂量的2~3倍。
8.如权利要求1所述的方法,其特征在于:
采用离子注入的方式在源区和漏区掺入所述第一杂质和所述第二杂质,离子注入的能量为40~100keV。
9.如权利要求1所述的方法,其特征在于:
对掺杂后的有源层进行热处理的温度为300℃~600℃,时间为1~3小时。
10.一种含有多晶硅有源层的薄膜晶体管,其特征在于:所述薄膜晶体管采用如权利要求1至9中任一项所述的方法制造得到。
11.一种阵列基板,其特征在于:所述阵列基板中包括有如权利要求10所述的薄膜晶体管。
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CN109449210B (zh) * | 2018-09-19 | 2022-06-10 | 云谷(固安)科技有限公司 | 阵列基板及显示器件 |
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Family Cites Families (34)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100291971B1 (ko) * | 1993-10-26 | 2001-10-24 | 야마자끼 순페이 | 기판처리장치및방법과박막반도체디바이스제조방법 |
US6933182B1 (en) * | 1995-04-20 | 2005-08-23 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing a semiconductor device and manufacturing system thereof |
JPH114001A (ja) * | 1997-06-11 | 1999-01-06 | Semiconductor Energy Lab Co Ltd | 半導体装置およびその作製方法 |
US6501094B1 (en) | 1997-06-11 | 2002-12-31 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device comprising a bottom gate type thin film transistor |
US6218219B1 (en) * | 1997-09-29 | 2001-04-17 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and fabrication method thereof |
KR100276378B1 (ko) * | 1997-11-12 | 2001-01-15 | 주승기 | 박막트랜지스터 및 그 제조방법 |
US6828587B2 (en) * | 2000-06-19 | 2004-12-07 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
JP4993822B2 (ja) * | 2000-06-19 | 2012-08-08 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
KR100426210B1 (ko) * | 2000-11-11 | 2004-04-03 | 피티플러스(주) | 실리콘 박막 결정화 방법 |
US7045444B2 (en) * | 2000-12-19 | 2006-05-16 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing semiconductor device that includes selectively adding a noble gas element |
KR100390523B1 (ko) * | 2001-01-20 | 2003-07-04 | 주승기 | 실리콘 박막 결정화 방법 |
JP3819249B2 (ja) * | 2001-03-26 | 2006-09-06 | 株式会社半導体エネルギー研究所 | 薄膜トランジスタの作製方法 |
KR100426381B1 (ko) * | 2001-03-30 | 2004-04-08 | 주승기 | 결정질 실리콘 활성층을 포함하는 박막트랜지스터의 제조방법 |
KR100434314B1 (ko) * | 2001-05-21 | 2004-06-05 | 엘지.필립스 엘시디 주식회사 | 다결정화 방법 및 이를 이용한 액정표시장치 제조방법 |
JP4115158B2 (ja) * | 2002-04-24 | 2008-07-09 | シャープ株式会社 | 半導体装置およびその製造方法 |
US20030203123A1 (en) * | 2002-04-26 | 2003-10-30 | Applied Materials, Inc. | System and method for metal induced crystallization of polycrystalline thin film transistors |
KR100496287B1 (ko) * | 2002-08-03 | 2005-06-20 | 삼성에스디아이 주식회사 | 실리콘 박막의 결정화 방법, 이를 이용한 박막 트랜지스터및 상기 박막 트랜지스터를 구비한 평판 디스플레이 소자 |
JP2003197529A (ja) * | 2002-12-13 | 2003-07-11 | Sharp Corp | 半導体装置 |
KR100543717B1 (ko) * | 2003-05-27 | 2006-01-23 | 노재상 | 실리콘 박막의 어닐링 방법 및 그로부터 제조된 다결정실리콘 박막 |
KR100928490B1 (ko) * | 2003-06-28 | 2009-11-26 | 엘지디스플레이 주식회사 | 액정표시패널 및 그 제조 방법 |
KR100600853B1 (ko) * | 2003-11-17 | 2006-07-14 | 삼성에스디아이 주식회사 | 평판표시장치 및 그의 제조방법 |
KR100611744B1 (ko) * | 2003-11-22 | 2006-08-10 | 삼성에스디아이 주식회사 | 금속 유도 측면 결정화 방법을 이용한 박막 트랜지스터 및그의 제조 방법 |
KR20050106256A (ko) * | 2004-05-04 | 2005-11-09 | 네오폴리((주)) | 금속유도측면결정화를 이용한 박막 트랜지스터의 제조방법 |
KR20050106250A (ko) * | 2004-05-04 | 2005-11-09 | 네오폴리((주)) | 플라즈마를 이용한 다결정 박막 트랜지스터의 제조 방법 |
KR100686442B1 (ko) * | 2004-06-30 | 2007-02-23 | 네오폴리((주)) | 부식 방지층을 이용한 금속유도측면결정화법에 의한 박막 트랜지스터의 제조방법 |
KR100712112B1 (ko) * | 2004-06-30 | 2007-04-27 | 삼성에스디아이 주식회사 | 반도체 소자 및 그 제조 방법 |
KR100659759B1 (ko) * | 2004-10-06 | 2006-12-19 | 삼성에스디아이 주식회사 | 바텀 게이트형 박막트랜지스터, 그를 구비하는평판표시장치 및 박막트랜지스터의 제조방법 |
KR100776362B1 (ko) * | 2004-12-03 | 2007-11-15 | 네오폴리((주)) | 비정질 실리콘 박막의 결정화 방법 및 이를 이용한 다결정 실리콘 박막 트랜지스터의 제조방법 |
KR100653853B1 (ko) * | 2005-05-24 | 2006-12-05 | 네오폴리((주)) | 비금속 씨드 에피 성장을 이용한 비정질 반도체 박막의결정화 방법 및 이를 이용한 다결정 박막 트랜지스터의제조방법 |
KR101174776B1 (ko) | 2005-10-12 | 2012-08-20 | 엘지디스플레이 주식회사 | Tft 어레이 기판 및 그 제조방법 |
KR100770268B1 (ko) | 2006-05-18 | 2007-10-25 | 삼성에스디아이 주식회사 | 박막트랜지스터의 제조방법 |
JP2009059940A (ja) * | 2007-08-31 | 2009-03-19 | Sharp Corp | 薄膜トランジスタ、薄膜トランジスタの製造方法、及び、電子装置 |
KR101117643B1 (ko) * | 2010-04-08 | 2012-03-05 | 삼성모바일디스플레이주식회사 | 비정질 실리콘막의 결정화 방법, 그리고 박막 트랜지스터 및 이의 제조 방법 |
CN102709184B (zh) * | 2011-05-13 | 2016-08-17 | 京东方科技集团股份有限公司 | 含有多晶硅有源层的薄膜晶体管、其制造方法及阵列基板 |
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JP2012244173A (ja) | 2012-12-10 |
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