CN102694072B - Preparation method for abrupt junction crystalline silicon solar cell - Google Patents
Preparation method for abrupt junction crystalline silicon solar cell Download PDFInfo
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- CN102694072B CN102694072B CN201210183417.7A CN201210183417A CN102694072B CN 102694072 B CN102694072 B CN 102694072B CN 201210183417 A CN201210183417 A CN 201210183417A CN 102694072 B CN102694072 B CN 102694072B
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Abstract
The invention discloses a preparation method for an abrupt junction crystalline silicon solar cell. A crystalline silicon thin film is epitaxially prepared at low temperature on a crystalline silicon chip by adopting a chemical vapor deposition (CVD) method, and doped elements are activated by adopting a quick thermal annealing process; the large-area uniform deposition of the thin film can be realized by adopting hot filament CVD or plasma assisted CVD, so that the uniformity of the crystalline silicon solar cell is ensured; and quick thermal annealing treatment is adopted, so that the defects of the thin film in a low-temperature epitaxial process can be eliminated on the premise of ensuring that an abrupt junction structure is not remarkably diffused, and the doped elements are activated to obtain the crystalline silicon solar cell with a high-performance abrupt junction structure. The performance of a preparation device is optimized, the conversion efficiency of the solar cell is improved, and a process is simple and favorable for the realization of large-scale production.
Description
Technical field
The present invention relates to solar cell device preparing technical field, relate in particular to a kind of preparation method of abrupt junction crystal silicon solar battery.
Background technology
In the non-renewable energy resources such as fossil energy day by day exhausted today, energy crisis is approached day by day, urgently Application and Development of the new energy and renewable energy technologies, and solar energy is one of available most important regeneration clean energy resource of the mankind.In the use of solar energy, solar power generation is again a kind of very important application mode.At present crystal silicon solar battery is the main product of solar power generation, and afterwards still can main status, occuping market in a very long time.Development crystal silicon solar battery technology, to reducing sun cost of electricity-generating, the range of application that expands solar energy has very important significance.The theoretical analysis result of the performance of corresponding solar cell in emitter doped chemical different distributions situation in prior art, visible mutation knot technology is conducive to the raising of solar cell performance.For the improvement of crystal silicon solar battery technology, developing at present the high abrupt junction technology of mixing of shallow junction is a current important development direction recognized within the industry.In crystal silicon solar battery is produced now, the preparation of core process PN junction all adopts the method for phosphorus oxychloride diffusion, the method is a pyroprocess (>800 DEG C), under current device structure and process conditions, if further carry out again the high improvement of mixing technique of shallow junction, the uniformity of the cell piece produced is difficult to ensure, is unfavorable for the carrying out of industrialization.So the method for phosphorus oxychloride diffusion has been difficult to improve at the high technical elements of mixing of shallow junction more.Want further to improve the performance of body silion cell PN junction, must exploitation new technology.Epitaxy is to prepare the method for a kind of excellence of PN junction.But conventional epitaxy needs temperature high (general >600 DEG C), at high temperature can cause interface counterdiffusion, be difficult to ensure the structure of abrupt junction, and cost is high with respect to existing phosphorus oxychloride diffusion technology, is unfavorable for large batch of production.If temperature is too low, be difficult to ensure the quality of epitaxial film.
Summary of the invention
The object of the present invention is to provide a kind of preparation method of abrupt junction crystal silicon solar battery, it has advantages of improves the performance of crystal silicon battery PN junction and the conversion efficiency of battery.
The present invention is achieved like this, and a kind of preparation method of abrupt junction crystal silicon solar battery, is characterized in that, described preparation method comprises:
1) preparation of abrupt junction epitaxial loayer: crystal silicon battery has two kinds of P-matrix and N-matrix.For P-type silicon chip, need epitaxial deposition N-type polycrystal silicon film; To N-matrix, need epitaxial deposition P-type polycrystal silicon film, to form suitable PN junction structure;
Wherein, low-temperature epitaxy N-type polycrystal silicon film on P-type silicon substrate, adopts following technique to realize:
Adopt the method for heated filament CVD, source gas flow ratio: SiH
4: PH
3=1:0.001～1:0.10, thinner ratio is controlled at 90%～98%, and air pressure is controlled at 1Pa～5Pa, underlayer temperature is 150 DEG C～300 DEG C, hot-wire temperature is controlled at 1600 DEG C～2000 DEG C, and the distance control of substrate and heated filament is 3～8cm, and film thickness monitoring is at 10～300nm; Or adopt the method for plasma assisted CVD, source gas flow ratio: SiH
4: PH
3=1:0.001～1:0.10, thinner ratio is controlled at 90%～98%, and air pressure is controlled at 1Pa～20Pa, and underlayer temperature is 150 DEG C～300 DEG C, and radio frequency source power density is controlled at 0.1～2.0W/cm
2, substrate spacing is controlled at 2～4cm, and film thickness monitoring is at 10～300nm;
Wherein, low-temperature epitaxy P-type polycrystal silicon film on N-type silicon substrate, adopts following technique to realize:
Adopt the method for heated filament CVD, source gas flow ratio: SiH
4: B
2h
6=1:0.001～1:0.10, thinner ratio is controlled at 90%～98%, and air pressure is controlled at 1Pa～5Pa, underlayer temperature is 150 DEG C～300 DEG C, hot-wire temperature is controlled at 1600 DEG C～2000 DEG C, and the distance of substrate and heated filament is controlled at 3～8cm, and film thickness monitoring is at 10～300nm; Or adopt the method for plasma assisted CVD, source gas flow ratio: SiH
4: B
2h
6=1:0.001～1:0.10, thinner ratio is controlled at 90%～98%, and air pressure is controlled at 1Pa～20Pa, and underlayer temperature is 150 DEG C～300 DEG C, and radio frequency source power density is controlled at 0.1～2.0W/cm
2, substrate spacing is controlled at 2～4cm, and film thickness monitoring is at 10～300nm;
2) technique of the abrupt junction structure rapid thermal annealing modification of being prepared by low-temperature epitaxy is as follows:
Adopt N
2or Ar gas is protected and annealed, or adopt the mode of vacuum annealing, heating rate is greater than 20 DEG C/min, 800 DEG C～1200 DEG C insulations 10 seconds～200 seconds, and fast cooling subsequently, thus make the abrupt junction structure crystal silicon solar battery of function admirable;
Described thinner ratio is defined as: H
2flow/(SiH
4flow+H
2flow+dopant gas flow).
Technique effect of the present invention is: the present invention adopts heated filament CVD or plasma assisted CVD can realize Large-Area-Uniform deposit film, ensures the uniformity of body silicon solar cell.Adopt quick thermal annealing process, can, ensureing that abrupt junction structure does not occur under the prerequisite of obviously diffusion, eliminate the defect in film in low-temperature epitaxy process, activate doped chemical, obtain the crystal silicon solar battery of function admirable abrupt junction structure.
Embodiment
Below in conjunction with embodiment, the present invention is further elaborated,
For the crystal silicon battery that adopts P-type silicon chip, preparation N-type layer forms PN junction;
Embodiment mono-:
1. the chamber of the silicon chip of handling well early stage being put into deposit film, substrate is heated to 250 DEG C, takes out base vacuum and causes 2 × 10
-4pa.2. when underlayer temperature and vacuum degree reach after requirement, adopt heated filament CVD method epitaxial deposition N-layer, design parameter is as follows: source gas flow ratio: SiH
4: PH
3=1:0.01, thinner ratio is controlled at 95%, and air pressure is controlled at 1Pa, and underlayer temperature is 250 DEG C, and hot-wire temperature is controlled at～and 1850 DEG C, heated filament is 5.0cm to substrate distance, and film thickness monitoring is at 200nm, and described thinner ratio is defined as: H
2flow/(SiH
4flow+H
2flow+dopant gas flow).3. the slice, thin piece after deposition being finished is put into rapid heat-treatment furnace, and logical Ar gas protection, carries out quick thermal annealing process.Design parameter is as follows: 100 DEG C/min of heating rates, 1000 DEG C are incubated 20 seconds, then cooling with stove.
Embodiment bis-:
1, the chamber of the silicon chip of handling well early stage being put into deposit film, substrate is heated to 250 DEG C, takes out base vacuum and causes 2 × 10
-4pa.2, when underlayer temperature and vacuum degree reach after requirement, adopt plasma assisted CVD method epitaxial deposition N-layer, design parameter is as follows: source gas flow ratio: SiH
4: PH
3=1:0.01, thinner ratio is controlled at 95%, and air pressure is controlled at 5Pa, and underlayer temperature is 250 DEG C, and radio frequency substrate power density is controlled at 0.2W/cm
2, the control of two substrates spacing is 2.0cm, film thickness monitoring is at 150nm; Described thinner ratio is defined as: H
2flow/(SiH
4flow+H
2flow+dopant gas flow).3. the slice, thin piece after deposition being finished is put into rapid heat-treatment furnace, and logical Ar gas protection, carries out rapid thermal treatment.Design parameter is as follows: 100 DEG C/min of heating rates, 1050 DEG C are incubated 10 seconds, then cooling with stove.
Claims (2)
1. a preparation method for abrupt junction crystal silicon solar battery, is characterized in that, described preparation method comprises: the 1) preparation of abrupt junction epitaxial loayer: crystal silicon battery has two kinds of P-matrix and N-matrix, for P-type silicon chip, needs epitaxial deposition N-type polycrystal silicon film; To N-matrix, need epitaxial deposition P-type polycrystal silicon film, to form suitable PN junction structure;
Wherein, low-temperature epitaxy N-type polycrystal silicon film on P-type silicon substrate, adopts following technique to realize:
Adopt the method for heated filament CVD, source gas flow ratio: SiH
4: PH
3=1:0.001～1:0.10, thinner ratio is controlled at 90%～98%, and air pressure is controlled at 1Pa～5Pa, underlayer temperature is 150 DEG C～300 DEG C, hot-wire temperature is controlled at 1600 DEG C～2000 DEG C, and the distance control of substrate and heated filament is 3～8cm, and film thickness monitoring is at 10～300nm; Or adopt the method for plasma assisted CVD, source gas flow ratio: SiH
4: PH
3=1:0.001～1:0.10, thinner ratio is controlled at 90%～98%, and air pressure is controlled at 1Pa～20Pa, and underlayer temperature is 150 DEG C～300 DEG C, and radio frequency source power density is controlled at 0.1～2.0W/cm
2, substrate spacing is controlled at 2～4cm, and film thickness monitoring is at 10～300nm;
Wherein, low-temperature epitaxy P-type polycrystal silicon film on N-type silicon substrate, adopts following technique to realize:
Adopt the method for heated filament CVD, source gas flow ratio: SiH
4: B
2h
6=1:0.001～1:0.10, thinner ratio is controlled at 90%～98%, and air pressure is controlled at 1Pa～5Pa, underlayer temperature is 150 DEG C～300 DEG C, hot-wire temperature is controlled at 1600 DEG C～2000 DEG C, and the distance of substrate and heated filament is controlled at 3～8cm, and film thickness monitoring is at 10～300nm; Or adopt the method for plasma assisted CVD, source gas flow ratio: SiH
4: B
2h
6=1:0.001～1:0.10, thinner ratio is controlled at 90%～98%, and air pressure is controlled at 1Pa～20Pa, and underlayer temperature is 150 DEG C～300 DEG C, and radio frequency source power density is controlled at 0.1～2.0W/cm
2, substrate spacing is controlled at 2～4cm, and film thickness monitoring is at 10～300nm;
2) technique of the abrupt junction structure rapid thermal annealing modification of being prepared by low-temperature epitaxy is as follows:
Adopt N
2or Ar gas is protected and annealed, or adopt the mode of vacuum annealing, heating rate is greater than 20 DEG C/min, 800 DEG C～1200 DEG C insulations 10 seconds～200 seconds, and fast cooling subsequently, thus make the abrupt junction structure crystal silicon solar battery of function admirable.
2. the preparation method of a kind of abrupt junction crystal silicon solar battery as claimed in claim 1, is characterized in that: described thinner ratio is defined as: H
2flow/(SiH
4flow+H
2flow+dopant gas flow).
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| CN201210183417.7A CN102694072B (en) | 2012-06-06 | 2012-06-06 | Preparation method for abrupt junction crystalline silicon solar cell |
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| CN102694072A CN102694072A (en) | 2012-09-26 |
| CN102694072B true CN102694072B (en) | 2014-10-29 |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101699633A (en) * | 2009-10-21 | 2010-04-28 | 南京航空航天大学 | PIN Si-based film solar battery and manufacturing method thereof |
| WO2011106624A1 (en) * | 2010-02-26 | 2011-09-01 | Alliance For Sustainable Energy, Llc | Hot wire chemical vapor deposition (hwcvd) with carbide filaments |
| CN102299206A (en) * | 2011-08-30 | 2011-12-28 | 南京航空航天大学 | Heterojunction solar cell and manufacturing method thereof |
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2012
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101699633A (en) * | 2009-10-21 | 2010-04-28 | 南京航空航天大学 | PIN Si-based film solar battery and manufacturing method thereof |
| WO2011106624A1 (en) * | 2010-02-26 | 2011-09-01 | Alliance For Sustainable Energy, Llc | Hot wire chemical vapor deposition (hwcvd) with carbide filaments |
| CN102299206A (en) * | 2011-08-30 | 2011-12-28 | 南京航空航天大学 | Heterojunction solar cell and manufacturing method thereof |
Non-Patent Citations (3)
| Title |
|---|
| A.H. Mahan等.Rapid Thermal Annealing of HWCVD a-Si:H Films: The Effect of the Film Hydrogen Content on the Crystallization Kinetics, Surface Morphology, and Grain Growth.《2005 DOE Solar Energy Technologies Program Review Meeting》.2005, |
| Rapid Thermal Annealing of HWCVD a-Si:H Films: The Effect of the Film Hydrogen Content on the Crystallization Kinetics, Surface Morphology, and Grain Growth;A.H. Mahan等;《2005 DOE Solar Energy Technologies Program Review Meeting》;20051110;第1页的Technical Approach * |
| 黄海宾.热丝CVD法制备硅基薄膜材料及相关太阳电池模拟研究.《中国博士学位论文全文数据库(电子期刊),工程科技II辑》.2012, * |
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