CN102611348B - Pulse-width modulation (PWM) output method for solving problem of nonuniform heating of bridge arm switch of single-phase full-bridge inverter circuit - Google Patents
Pulse-width modulation (PWM) output method for solving problem of nonuniform heating of bridge arm switch of single-phase full-bridge inverter circuit Download PDFInfo
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Abstract
The invention relates to a pulse-width modulation (PWM) output method for solving the problem of nonuniform heating of a bridge arm switch of a single-phase full-bridge inverter circuit. The PWM output method is characterized in that two bridge arms use the modulation wave period T as an interval for alternately outputting PWM waves and square wave voltage. The problem of nonuniform heating caused by great work frequency differences of two bridge arm switches is solved, the temperature of an overheat switch is obviously reduced, insulated gate bipolar translator (IGBT) power switch device faults caused by overheat is effectively overcome, the reliability of a switch device is favorably improved, and the service life is prolonged.
Description
Technical field
The present invention relates to the control fields such as Electric Machines and Electric Apparatus, power electronics, DSP technology, particularly a kind ofly solve the PWM output method that single-phase full bridge inverter circuit brachium pontis switch generates heat uneven.
Background technology
Single-phase DC-AC inversion adopts single-phase full bridge circuit to realize conventionally, and circuit consists of two brachium pontis, as shown in Figure 1.The fixing output single-pole type PWM voltage (left side brachium pontis a point voltage ripple) of a brachium pontis in inversion process, another brachium pontis is fixing output power frequency (50/60HZ) alternation square-wave voltage (right side brachium pontis b point voltage ripple), voltage U between two brachium pontis a, b
abafter LC filtering, be pure single-phase simple alternating current output voltage U
aB, this voltage is done cycle variation with frequency of modulated wave.
Yet PWM change in voltage frequency more than several KHZ, requires power semiconductor switch IGBT to do the switch motion of corresponding frequencies conventionally for this reason, and consequent switching loss and switching frequency are closely related, and the higher loss of frequency is larger.Loss raises device temperature, totally unfavorable to reliability and life-span.As can be seen here, in existing inversion transformation technique, the brachium pontis switch of fixing output PWM voltage is always under the operating state in high frequency break-make, and heating is serious, and rate of breakdown is high; Another brachium pontis is because of fixing output power frequency alternation square wave, and its switch, in low frequency break-make operating state, generates heat lower.Therefore, the existing inversion way of output is because of two brachium pontis operating frequencies great disparities, exists the two brachium pontis switches uneven drawback of generating heat.
Summary of the invention
The object of this invention is to provide the PWM Voltage-output method that single-phase full bridge inverter circuit two brachium pontis switches generate heat uneven that solves.
The present invention realizes by the following technical solutions: a kind ofly solve the PWM output method that single-phase full bridge inverter circuit brachium pontis switch generates heat uneven, it is characterized in that: allow two brachium pontis take modulating wave cycle T and alternately export PWM ripple and square-wave voltage as interval rotation.
In an embodiment of the present invention, the control utmost point of two tandem tap IGBT in each brachium pontis is controlled by dsp controller by drive circuit respectively, by DSP, controls two described brachium pontis output PWM ripple and square-wave voltages.
In an embodiment of the present invention, described control is that a rotation control variables is first set, and this variable has two kinds of logical values, represents respectively former and later two modulating wave cycles, current in which kind of for system judgement in modulating wave cycle; The PWM that controls respectively left brachium pontis and right brachium pontis by comparand register CMPR1, CMPR2 in the task manager EVA of DSP exports; Concrete grammar is: a timer T1 is set for increase and decrease counting mode of operation, the period register T1PR value of this timer T1 is made as carrier cycle time value
t c1/2nd, when the count value generation underflow of counter T1CNT or cycle are during coupling, system proceeds to carries out PWM in interrupt service subroutine and calculates in real time; In interrupt service subroutine, if current PWM calculates the last cycle in modulating wave, according to monopole type SPWM computational methods, calculate in real time the corresponding comparison value of PWM pulsewidth of each carrier cycle, and this value is deposited in comparand register CMPR1, make left brachium pontis output PWM voltage wave; To the assignment of another comparand register CMPR2, divide two stages, if the front half period of current calculating in modulating wave, assignment is carrier cycle time value
t c1/2nd, make right brachium pontis output electronegative potential; If the later half cycle of current calculating in modulating wave, assignment is zero, makes right brachium pontis output high potential, so right brachium pontis output power frequency square wave; The PWM that completes the last modulating wave cycle when system calculates, while proceeding to next cycle, by above-mentioned, exchange respectively for the different disposal method of comparand register CMPR1 and CMPR2, two brachium pontis output waveforms also change immediately, be left brachium pontis output power frequency square wave, right brachium pontis output PWM ripple.
The invention solves single-phase full bridge inverter circuit two brachium pontis switches and cause the uneven problem of generating heat because of operating frequency great disparity, allow overheat awitch IGBT significantly lower the temperature, effectively overcome the overheated switching device fault causing, be conducive to the reliability of lifting switch device, increase the service life.
Accompanying drawing explanation
Fig. 1 is DC-AC inversion single-phase full-bridge circuit schematic diagram.
Fig. 2 is that DSP controls main program flow schematic diagram.
Fig. 3 is that brachium pontis cyclical method generates single-phase monopole type SPWM interruption subroutine schematic flow sheet.
Embodiment
The present embodiment provides a kind of PWM Voltage-output method that single-phase full bridge inverter circuit two brachium pontis switches generate heat uneven that solves, and the method is to allow two brachium pontis take modulating wave cycle T alternately export PWM ripple and square-wave voltage as interval rotation.Be that last cycle device allows Fig. 1 left side brachium pontis export PWM wave voltage, right side brachium pontis output square-wave voltage, next cycle allows left side brachium pontis export square-wave voltage, right side brachium pontis output PWM wave voltage, the way of output that so rotation replaces, has not only kept output voltage waveforms constant, makes again two brachium pontis switch heatings reach balanced, allow overheat awitch significantly lower the temperature, effectively overcome the overheated switching device failure problems causing.
Below we control and to be embodied as example and to realize single-phase full bridge inverter circuit two brachium pontis rotations output PWM ripple and square-wave voltages with dsp controller.Two tandem tap IGBT in every brachium pontis control the utmost point and by drive circuit, are connected to respectively tetra-pins of PWM1~PWM4 of DSP device.Comparand register CMPR1, CMPR2 in the task manager EVA of the DSP respectively left brachium pontis of control chart 1 and the PWM of right brachium pontis exports.Timer T1 is set for increase and decrease counting mode of operation, its period register T1PR value is made as carrier cycle time value
t c1/2nd, when the count value generation underflow of counter T1CNT or cycle are during coupling, program proceeds to carries out PWM in interrupt service subroutine and calculates in real time.In interrupt service subroutine, if current PWM calculates the last cycle in modulating wave, according to monopole type SPWM computational methods, calculate in real time the corresponding comparison value of PWM pulsewidth of each carrier cycle, and this value is deposited in comparand register CMPR1, make the left brachium pontis a point output PWM voltage wave of Fig. 1.To the assignment of another comparand register CMPR2, divide two stages.If the front half period of current calculating in modulating wave, assignment is carrier cycle time value
t c1/2nd, making right brachium pontis b point current potential is N(electronegative potential); If the later half cycle of current calculating in modulating wave, assignment is zero, and making right brachium pontis b point current potential is P(high potential), so b point output power frequency square wave.The PWM that completes the last modulating wave cycle when program calculates, while proceeding to next cycle, by above-mentioned, exchange respectively for the different disposal method of comparand register CMPR1 and CMPR2, two brachium pontis output waveforms also change immediately, be left brachium pontis output power frequency square wave, right brachium pontis output PWM ripple.So circulation endlessly, can realize two brachium pontis by modulating wave cycle automatic alternate output PWM ripple and square wave.
Must be pointed out, for making described exchange processing and can automatically carry out by the modulating wave cycle, be necessary to introduce a control variables and be referred to as rotation control variables in program.This variable has two kinds of logical values, continuous two modulating wave cycles before and after representing respectively, and current in which kind of for procedure identification in modulating wave cycle, carry out for processing.Concrete main program flow schematic diagram refers to Fig. 2, and interruption subroutine schematic flow sheet refers to Fig. 3.
The foregoing is only preferred embodiment of the present invention, all equalizations of doing according to the present patent application the scope of the claims change and modify, and all should belong to covering scope of the present invention.
Claims (1)
1. solve the PWM output method that single-phase full bridge inverter circuit brachium pontis switch generates heat uneven, it is characterized in that: allow two brachium pontis take modulating wave cycle T and alternately export PWM ripple and square-wave voltage as interval rotation; The control utmost point of two tandem tap IGBT in each brachium pontis is controlled by dsp controller by drive circuit respectively, by DSP, controls two described brachium pontis output PWM ripple and square-wave voltages; Described control is that a rotation control variables is first set, and this variable has two kinds of logical values, represents respectively former and later two modulating wave cycles, current in which kind of for system judgement in modulating wave cycle; The PWM that controls respectively left brachium pontis and right brachium pontis by comparand register CMPR1, CMPR2 in the task manager EVA of DSP exports; Concrete grammar is: a timer T1 is set for increase and decrease counting mode of operation, the period register T1PR value of this timer T1 is made as carrier cycle time value
t c1/2nd, when the count value generation underflow of counter T1CNT or cycle are during coupling, system proceeds to carries out PWM in interrupt service subroutine and calculates in real time; In interrupt service subroutine, if current PWM calculates the last cycle in modulating wave, according to monopole type SPWM computational methods, calculate in real time the corresponding comparison value of PWM pulsewidth of each carrier cycle, and this value is deposited in comparand register CMPR1, make left brachium pontis output PWM voltage wave; To the assignment of another comparand register CMPR2, divide two stages, if the front half period of current calculating in modulating wave, assignment is carrier cycle time value
t c1/2nd, make right brachium pontis output electronegative potential; If the later half cycle of current calculating in modulating wave, assignment is zero, makes right brachium pontis output high potential, so right brachium pontis output power frequency square wave; The PWM that completes the last modulating wave cycle when system calculates, while proceeding to next cycle, by above-mentioned, exchange respectively for the different disposal method of comparand register CMPR1 and CMPR2, two brachium pontis output waveforms also change immediately, be left brachium pontis output power frequency square wave, right brachium pontis output PWM ripple.
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