CN102412194A - Manufacturing method of through silicon via - Google Patents

Manufacturing method of through silicon via Download PDF

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Publication number
CN102412194A
CN102412194A CN2011102257384A CN201110225738A CN102412194A CN 102412194 A CN102412194 A CN 102412194A CN 2011102257384 A CN2011102257384 A CN 2011102257384A CN 201110225738 A CN201110225738 A CN 201110225738A CN 102412194 A CN102412194 A CN 102412194A
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hole
tungsten
layer
deep trench
silicon
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CN102412194B (en
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彭虎
程晓华
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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Shanghai Hua Hong NEC Electronics Co Ltd
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Abstract

The invention discloses a manufacturing method of a through silicon via. The method comprises the following steps that: a deep groove or a deep hole is formed; an oxide layer is deposited on side walls and a bottom of the deep groove or the deep hole; a layer of titanium and titanium nitride is deposited; a first layer of tungsten is deposited; back-etching processing is carried out on the first layer of tungsten; a second layer of tungsten is deposited; back-etching processing is carried out on a tungsten layer; when the deep groove or the deep hole is not full, deposition of the second layer of tungsten and tungsten back-etching processing are repeated until the deep groove or the deep hole is filled to the full; a right side metal interconnection line and a right side back-end process are manufactured; thinning processing is carried out on a back side of a silicon chip; and back-side metal is formed and a back-side metallic pattern is manufactured. According to the invention, a tungsten filling process and a tungsten etching process are combined, so that filling of a through silicon via with a high depth to width ratio is realized; moreover, the manufacturing method enables integration with a current integrated circuit technology to be conveniently realized; and a present production device can be used for processing; therefore, process difficulty and costs are reduced.

Description

The manufacture method of silicon through hole
Technical field
The present invention relates to a kind of semiconductor integrated circuit method of manufacturing technology, particularly relate to a kind of manufacture method of silicon through hole.
Background technology
The silicon via process is a kind of emerging ic manufacturing process, is suitable as many-sided performance and promotes, and is used for WLAN and mobile phone intermediate power amplifier, with frequency characteristic that improves circuit greatly and power characteristic.The circuit that the silicon via process will be produced on the silicon chip upper surface is connected to the silicon chip back side through the metal of filling in the silicon through hole; In conjunction with three-dimension packaging technology; Make the IC layout from conventional two-dimensional be arranged side by side develop into more advanced three-dimensional stacked; Component package is more compact like this, and the chip lead distance is shorter, thereby can improve the frequency characteristic and the power characteristic of circuit greatly.
In existing first kind of silicon via process manufacture method, need in the silicon chip matrix, produce hole or the groove with very big depth-to-width ratio through advanced person's etching technics, hole or gash depth are roughly 100 microns; In this hole or groove, fill metal, with behind the silicon chip thinning back side electrode being drawn through the back side.The difficulty that should have technology now is 100 microns etching grooves and metal filled.
Existing second kind of silicon via process manufacture method is behind wafer thinning, to make through hole and metal filled at the silicon chip back side, and silicon chip was processed after this method needed special via etch equipment to carry out attenuate.
Existing the third silicon via process manufacture method is through in FEOL, making groove and adopting silica-filled groove; Behind the wafer thinning silica-filled groove is exposed then; Wet etching is removed the laggard row metal filling of silicon dioxide in the groove; This method can be avoided the laggard hole etching that works of attenuate, but technology is complicated, and cost is higher.
Summary of the invention
Technical problem to be solved by this invention provides a kind of manufacture method of silicon through hole, can realize the filling of the silicon through hole of high-aspect-ratio, be convenient to integrated with existing integrated circuit technology, and can utilize existing equipment to process, can reduce technology difficulty and cost.
For solving the problems of the technologies described above, the manufacture method of silicon through hole provided by the invention comprises the steps:
Step 1, on silicon chip deposit layer of metal front medium layer, utilize lithographic definition to go out the silicon via regions, successively the said before-metal medium layer of the said silicon via regions of etching and said silicon chip and form deep trench or the hole.
Step 2, in said deep trench or hole sidewall and deposit layer of oxide layer.The depositing technics of this oxide layer adopts LPCVD TEOS or SACVD TEOS.
Step 3, in the said deep trench that is formed with said oxide layer or hole sidewall and bottom deposit one deck titanium and titanium nitride; Said titanium and titanium nitride also are deposited to the outside surf zone of said deep trench or hole simultaneously.
Step 4, on said titanium and titanium nitride deposit ground floor tungsten, said ground floor tungsten does not fill up said deep trench or hole.
Step 5, said ground floor tungsten is returned quarter.
Step 6, in the said deep trench that is formed with said ground floor tungsten or hole sidewall and bottom deposit second layer tungsten, said second layer tungsten fills up said deep trench or hole or do not fill up; Said second layer tungsten also is deposited to the outside surf zone of said deep trench or hole simultaneously.
Step 7, the tungsten layer of being made up of said ground floor tungsten and said second layer tungsten returned carve or cmp.
Step 8, when said second layer tungsten does not fill up said deep trench or hole, repeating step six and step 7 are filled until said deep trench or hole.
The front metal interconnection line and the front last part technology of step 9, the said silicon chip of making.
Step 10, said silicon chip back is carried out attenuate, said titanium and titanium nitride, said ground floor tungsten and the said second layer tungsten that will be filled in said deep trench or the hole from the bottom in said deep trench or hole expose.
Step 11, carry out the metal deposit and make the back metal figure from said silicon chip back.
Further improving is that the said before-metal medium layer in the step 1 is boron-phosphorosilicate glass or phosphorosilicate glass.
Further improve and be, the degree of depth in deep trench described in the step 1 or hole is that 50 microns～250 microns, width are 1.5 microns～5 microns;
Further improve and be, the thickness of the said ground floor tungsten of institute's deposit is that the thickness of 1/5～1/2 and said ground floor tungsten of width in said deep trench or hole is less than
Figure BDA0000081749880000031
in the step 4
Further improve and be, the thickness of said ground floor tungsten be said deep trench or hole width 1/4～1/3.
Further improve and be, the thickness of the said second layer tungsten of institute's deposit is that the thickness of 1/5～1/2 and said ground floor tungsten of width in said deep trench or hole is less than
Figure BDA0000081749880000032
in the step 6
Further improve and be, the thickness of said second layer tungsten be said deep trench or hole width 1/4～1/3.
Further improve and be; Adopt comprehensive etching mode time quarter of in the step 5 said ground floor tungsten being carried out, and will be formed at the said ground floor tungsten reservation
Figure BDA0000081749880000041
of the outside surf zone in said deep trench or hole after etching is intact
Further improve and be; Adopt comprehensive etching mode time quarter of in the step 7 said tungsten layer being carried out, and will be formed at the said tungsten layer reservation
Figure BDA0000081749880000042
of the outside surf zone in said deep trench or hole after etching is intact
The combination of tungsten fill process of the present invention and tungsten etching technics; Can realize that high-aspect-ratio is like the filling greater than 30: 1 silicon through hole; And can be convenient to integrated with existing integrated circuit technology, and can utilize existing equipment to process, can reduce technology difficulty and cost.
Description of drawings
Below in conjunction with accompanying drawing and embodiment the present invention is done further detailed saying:
Fig. 1 is an embodiment of the invention flow chart;
Fig. 2-Figure 12 is the silicon chip generalized section in the manufacturing process of embodiment of the invention method;
Figure 13 is the silicon through hole filling effect figure of the manufacture method of embodiment of the invention silicon through hole.
Embodiment
As shown in Figure 1 is embodiment of the invention flow chart.To shown in Figure 12, is the silicon chip generalized section in the manufacturing process of embodiment of the invention method like Fig. 2.The manufacture method of embodiment of the invention silicon through hole comprises the steps:
Step 1, as shown in Figure 2, deposit layer of metal front medium layer 2 on silicon chip 1.As shown in Figure 3, utilize lithographic definition to go out the silicon via regions, the said before-metal medium layer 2 of the said silicon via regions of etching is with said silicon chip 1 and form deep trench or hole 3 successively; The degree of depth in said deep trench or hole 3 is that 30 microns～250 microns, the best are 50 microns～100 microns, and width is that 1.5 microns～5 microns, the best are 2 microns～3 microns; Said before-metal medium layer 2 is boron-phosphorosilicate glass (BPSG) or phosphorosilicate glass (PSG).
Step 2, as shown in Figure 4, in said deep trench or hole 3 sidewalls and deposit layer of oxide layer 4, the depositing technics of this oxide layer 4 adopts LPCVD TEOS or SACVD TEOS.The thickness of the oxide layer 4 is
Figure BDA0000081749880000051
the best choice for the
Step 3, as shown in Figure 5, deposit one deck titanium and titanium nitride 5 in the said deep trench that is formed with said oxide layer 4 or hole 3 sidewalls and bottom; Said titanium and titanium nitride 5 also are deposited to the surf zone of said deep trench or 3 outsides, hole simultaneously.The thickness of the titanium in said titanium and the titanium nitride 5 is the best thickness for the titanium nitride in
Figure BDA0000081749880000055
said titanium and the titanium nitride 5 of
Figure BDA0000081749880000053
, and
Figure BDA0000081749880000056
the best is
Figure BDA0000081749880000058
Step 4, as shown in Figure 6, deposit ground floor tungsten 6A on said titanium and titanium nitride 5, said ground floor tungsten 6A does not fill up said deep trench or hole 3.The thickness of said ground floor tungsten 6A be said deep trench or hole 3 width 1/5～1/2, optimal selection is 1/4～1/3, and the thickness of said ground floor tungsten 6A is less than
Figure BDA0000081749880000059
Step 5, as shown in Figure 7; Said ground floor tungsten 6A is returned quarter; Comprehensive etching mode that adopts is carved in this time, will be formed at the said ground floor tungsten reservation
Figure BDA00000817498800000510
of the outside surf zone in said deep trench or hole after etching is intact
Step 6, as shown in Figure 8, deposit second layer tungsten 6B, said second layer tungsten 6B fills up said deep trench or hole 3 or do not fill up.The thickness of said second layer tungsten 6B be said deep trench or hole 3 width 1/5～1/3, and the thickness of said ground floor tungsten 6A is less than
Figure BDA00000817498800000511
Step 7, as shown in Figure 9; The tungsten layer of being made up of said ground floor tungsten 6A and said second layer tungsten 6B 6 is returned quarter or cmp; Comprehensive etching mode that adopts is carved in this time, and the said tungsten layer 6 that will be formed at the outside surf zone in said deep trench or hole after etching is intact keeps
Figure BDA00000817498800000513
Step 8, when said second layer tungsten 6B does not fill up said deep trench or hole 3, repeating step seven and step 8 are filled until said deep trench or hole 3.
Step 9, shown in figure 10, front metal interconnection line 7 and the front last part technology of making said silicon chip 1 form other positive layer 8.
Step 10, shown in figure 11 is carried out attenuate to the back side of said silicon chip 1, and said titanium and titanium nitride 5, said ground floor tungsten 6A and the said second layer tungsten 6B that will be filled in said deep trench or the hole 3 from the bottom in said deep trench or hole 3 expose.
Step 11, shown in figure 12 is carried out the metal deposit and is formed back metal 9 and make the back metal figure from the back side of said silicon chip 1.
Shown in figure 13; Be the silicon through hole filling effect figure of the manufacture method of embodiment of the invention silicon through hole; This design sketch is that 3 microns, the degree of depth are the SEM figure after 100 microns silicon through hole is filled for the manufacture method that adopts embodiment of the invention silicon through hole to width; Can know that by Figure 13 the silicon through hole has obtained good filling, and the silicon through hole depth-to-width ratio that is filled is as greater than 30: 1.
More than through specific embodiment the present invention has been carried out detailed explanation, but these are not to be construed as limiting the invention.Under the situation that does not break away from the principle of the invention, those skilled in the art also can make many distortion and improvement, and these also should be regarded as protection scope of the present invention.

Claims (9)

1. the manufacture method of a silicon through hole is characterized in that, comprises the steps:
Step 1, on silicon chip deposit layer of metal front medium layer, utilize lithographic definition to go out the silicon via regions, successively the said before-metal medium layer of the said silicon via regions of etching and said silicon chip and form deep trench or the hole;
Step 2, in said deep trench or hole sidewall and deposit layer of oxide layer; The depositing technics of this oxide layer adopts LPCVD TEOS or SACVD TEOS;
Step 3, in the said deep trench that is formed with said oxide layer or hole sidewall and bottom deposit one deck titanium and titanium nitride; Said titanium and titanium nitride also are deposited to the outside surf zone of said deep trench or hole simultaneously;
Step 4, on said titanium and titanium nitride deposit ground floor tungsten, said ground floor tungsten does not fill up said deep trench or hole;
Step 5, said ground floor tungsten is returned quarter;
Step 6, in the said deep trench that is formed with said ground floor tungsten or hole sidewall and bottom deposit second layer tungsten, said second layer tungsten fills up said deep trench or hole or do not fill up; Said second layer tungsten also is deposited to the outside surf zone of said deep trench or hole simultaneously;
Step 7, the tungsten layer of being made up of said ground floor tungsten and said second layer tungsten returned carve or cmp;
Step 8, when said second layer tungsten does not fill up said deep trench or hole, repeating step six and step 7 are filled until said deep trench or hole;
The front metal interconnection line and the front last part technology of step 9, the said silicon chip of making;
Step 10, said silicon chip back is carried out attenuate, said titanium and titanium nitride, said ground floor tungsten and the said second layer tungsten that will be filled in said deep trench or the hole from the bottom in said deep trench or hole expose;
Step 11, carry out the metal deposit and make the back metal figure from said silicon chip back.
2. the manufacture method of silicon through hole according to claim 1, it is characterized in that: the said before-metal medium layer in the step 1 is boron-phosphorosilicate glass or phosphorosilicate glass.
3. the manufacture method of silicon through hole according to claim 1 is characterized in that: the degree of depth in deep trench described in the step 1 or hole is that 50 microns～250 microns, width are 1.5 microns～5 microns.
4. the manufacture method of silicon through hole according to claim 1 is characterized in that: the thickness of the said ground floor tungsten of institute's deposit is that the thickness of 1/5～1/2 and said ground floor tungsten of width in said deep trench or hole is less than
Figure 2
in the step 4
5. like the manufacture method of the said silicon through hole of claim 4, it is characterized in that: the thickness of said ground floor tungsten be said deep trench or hole width 1/4～1/3.
6. the manufacture method of silicon through hole according to claim 1 is characterized in that: the thickness of the said second layer tungsten of institute's deposit is that the thickness of 1/5～1/2 and said ground floor tungsten of width in said deep trench or hole is less than
Figure FDA0000081749870000022
in the step 6
7. like the manufacture method of the said silicon through hole of claim 6, it is characterized in that: the thickness of said second layer tungsten be said deep trench or hole width 1/4～1/3.
8. the manufacture method of silicon through hole according to claim 1; It is characterized in that: adopt comprehensive etching mode time quarter of in the step 5 said ground floor tungsten being carried out, and will be formed at the said ground floor tungsten reservation
Figure FDA0000081749870000023
of the outside surf zone in said deep trench or hole after etching is intact
9. the manufacture method of silicon through hole according to claim 1; It is characterized in that: adopt comprehensive etching mode time quarter of in the step 7 said tungsten layer being carried out, and will be formed at the said tungsten layer reservation of the outside surf zone in said deep trench or hole after etching is intact
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103811407A (en) * 2012-11-06 2014-05-21 上海华虹宏力半导体制造有限公司 Technique method for patterning back surface of silicon wafer
CN104637861A (en) * 2013-11-11 2015-05-20 上海华虹宏力半导体制造有限公司 Silicon through-hole process
CN107658313A (en) * 2017-08-31 2018-02-02 长江存储科技有限责任公司 The wordline forming method of high-aspect-ratio in three-dimensional storage
CN113782489A (en) * 2021-08-27 2021-12-10 上海华虹宏力半导体制造有限公司 Through silicon via and forming method thereof
CN113782490A (en) * 2021-08-31 2021-12-10 上海华力集成电路制造有限公司 Preparation method of flash memory device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101635273A (en) * 2009-06-12 2010-01-27 上海宏力半导体制造有限公司 Preparation method of tungsten plug
CN101924096A (en) * 2009-06-12 2010-12-22 台湾积体电路制造股份有限公司 Through-silicon via structure and formation technology thereof

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101635273A (en) * 2009-06-12 2010-01-27 上海宏力半导体制造有限公司 Preparation method of tungsten plug
CN101924096A (en) * 2009-06-12 2010-12-22 台湾积体电路制造股份有限公司 Through-silicon via structure and formation technology thereof

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103811407A (en) * 2012-11-06 2014-05-21 上海华虹宏力半导体制造有限公司 Technique method for patterning back surface of silicon wafer
CN103811407B (en) * 2012-11-06 2016-04-13 上海华虹宏力半导体制造有限公司 The back-patterned process of silicon chip
CN104637861A (en) * 2013-11-11 2015-05-20 上海华虹宏力半导体制造有限公司 Silicon through-hole process
CN107658313A (en) * 2017-08-31 2018-02-02 长江存储科技有限责任公司 The wordline forming method of high-aspect-ratio in three-dimensional storage
CN113782489A (en) * 2021-08-27 2021-12-10 上海华虹宏力半导体制造有限公司 Through silicon via and forming method thereof
CN113782490A (en) * 2021-08-31 2021-12-10 上海华力集成电路制造有限公司 Preparation method of flash memory device

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