CN102315239A - Photoelectric cell - Google Patents

Photoelectric cell Download PDF

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Publication number
CN102315239A
CN102315239A CN2010105118213A CN201010511821A CN102315239A CN 102315239 A CN102315239 A CN 102315239A CN 2010105118213 A CN2010105118213 A CN 2010105118213A CN 201010511821 A CN201010511821 A CN 201010511821A CN 102315239 A CN102315239 A CN 102315239A
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semiconductor
extension
semiconductor unit
photoelectric cell
unit
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CN102315239B (en
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沈建赋
井长慧
谢明勋
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Epistar Corp
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Epistar Corp
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Priority claimed from US12/830,059 external-priority patent/US9324691B2/en
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Priority to CN201610597613.7A priority Critical patent/CN105977272B/en
Publication of CN102315239A publication Critical patent/CN102315239A/en
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    • H01L27/15Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H01L27/153Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
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    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H01L33/387Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape with a plurality of electrode regions in direct contact with the semiconductor body and being electrically interconnected by another electrode layer
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    • H01L33/38Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
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    • H01L33/38Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
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    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

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Abstract

The invention discloses a kind of photoelectric cell, it comprises substrate; A plurality of semiconductor units electrically connect each other and are positioned on the substrate, and wherein these semiconductor units comprise first semiconductor layer, second semiconductor layer and active area between between it; A plurality of first electrodes lay respectively on first semiconductor layer; Connecting portion is formed on these semiconductor units with these semiconductor units of electrical serial connection; And a plurality of second electrodes lay respectively on second semiconductor layer, wherein, have one to comprise first extension in these first electrodes, and have one to comprise second extension in these second electrodes.

Description

Photoelectric cell
Technical field
The present invention relates to light-emitting component.
Background technology
Because the good light electrical characteristics such as coloured light that the light-emitting diode in the solid-state lighting elements has low power consumption, low-heat generations, operation lifetime length, impact resistance, volume is little, reaction speed is fast and can sends wavelength stabilization, so indicator light and the photovoltaic etc. of household electrical appliances, instrument have been widely used in.In the photoelectric technology development, solid-state lighting elements focuses on its luminous efficiency, operation lifetime and brightness, thereby is expected at the main flow that can become illumination application in the near future.
Be used with the form of array type light-emitting component at present LED, it is applicable to the application of high driving voltage more, and can reduce volume and the weight of LED.The LED producer designs different electrode lay-outs to satisfy the demand of client to high driving voltage LED, to reduce cost and then to enhance productivity to the array type light-emitting component.
Summary of the invention
The application proposes a kind of photoelectric cell, comprises substrate; A plurality of semiconductor units, being electrically connected to each other is positioned on this substrate; Wherein, each semiconductor unit all comprises first semiconductor layer, second semiconductor layer and between the active area between it; A plurality of first electrodes lay respectively on first semiconductor layer; Connecting portion is formed on these a plurality of semiconductor units, electrically is connected in series this a plurality of semiconductor units; And a plurality of second electrodes lay respectively on second semiconductor layer; Wherein, there is one first electrode to comprise first extension, and has one second electrode to comprise second extension.
The application also proposes a kind of photoelectric cell, comprises substrate; A plurality of semiconductor units, being electrically connected to each other is positioned on this substrate; Wherein, each semiconductor unit all comprises first semiconductor layer, second semiconductor layer, and between the active area between it; A plurality of first electrodes lay respectively on first semiconductor layer; Connecting portion is formed on these a plurality of semiconductor units with these a plurality of semiconductor units of electrical serial connection; And a plurality of second electrodes lay respectively on second semiconductor layer; Wherein, have one first electrode to comprise first extension, and have one second electrode to comprise second extension, wherein the driving voltage of these a plurality of semiconductor units is roughly the same.
The application proposes a kind of photoelectric cell in addition, comprises substrate; A plurality of semiconductor units electrically connect each other and are positioned on this substrate, and wherein each semiconductor unit comprises first semiconductor layer, second semiconductor layer and between the active area between it, a plurality of first electrodes lay respectively on first semiconductor layer; And a plurality of second electrodes lay respectively on second semiconductor layer; Wherein a plurality of semiconductor units comprise first semiconductor unit; Second semiconductor unit; And the 3rd semiconductor unit; In first electrode at least one comprises on first semiconductor unit that first electronic pads is positioned at the substrate outermost, and in second electrode at least one comprise on second semiconductor unit that second electronic pads is positioned at the substrate outermost, and wherein first electrode and second electrode comprise first extension and second extending part on the 3rd semiconductor unit that does not have electronic pads.
The application reintroduces a kind of photoelectric cell, comprises substrate; A plurality of semiconductor units electrically connect each other and are positioned on the substrate, and wherein each semiconductor unit comprises first semiconductor layer, second semiconductor layer and between the active area between it; And a plurality of first electrodes and a plurality of second electrode lay respectively on a plurality of semiconductor units; Wherein each semiconductor unit comprises first semiconductor unit; Second semiconductor unit; And the 3rd semiconductor unit; In first electrode at least one comprises on second semiconductor layer that first electronic pads is positioned at first semiconductor unit, and in second electrode at least one comprise on second semiconductor layer that second electronic pads is positioned at second semiconductor unit, and wherein first electrode and second electrode comprise first extension and second extending part on the 3rd semiconductor unit that does not have electronic pads.
Description of drawings
The photoelectric cell vertical view of Fig. 1 for being illustrated according to the application embodiment;
Fig. 2 is a photoelectric cell profile shown in Figure 1;
Fig. 3 is a photoelectric cell 3D stereogram shown in Figure 1;
Fig. 4 is a photoelectric cell equivalent circuit diagram shown in Figure 1;
The photoelectric cell vertical view of Fig. 5 for being illustrated according to the application embodiment;
Fig. 6 is a photoelectric cell 3D stereogram shown in Figure 5;
Fig. 7 is a photoelectric cell equivalent circuit diagram shown in Figure 5;
The photoelectric cell vertical view of Fig. 8 for being illustrated according to the application embodiment;
Fig. 9 is a photoelectric cell 3D stereogram shown in Figure 8;
Figure 10 is a photoelectric cell equivalent circuit diagram shown in Figure 8;
The photoelectric cell vertical view of Figure 11 for being illustrated according to the application embodiment;
Figure 12 is a photoelectric cell 3D stereogram shown in Figure 11;
Figure 13 is a photoelectric cell equivalent circuit diagram shown in Figure 11;
The photoelectric cell vertical view of Figure 14 for being illustrated according to the application embodiment;
Figure 15 is a photoelectric cell 3D stereogram shown in Figure 14;
Figure 16 is a photoelectric cell equivalent circuit diagram shown in Figure 14;
The photoelectric cell vertical view of Figure 17 for being illustrated according to the application embodiment;
Figure 18 is a photoelectric cell 3D stereogram shown in Figure 17;
Figure 19 is a photoelectric cell equivalent circuit diagram shown in Figure 17;
The photoelectric cell vertical view of Figure 20 for being illustrated according to the application embodiment;
Figure 21 is a photoelectric cell 3D stereogram shown in Figure 20;
Figure 22 is a photoelectric cell equivalent circuit diagram shown in Figure 20;
The photoelectric cell vertical view of Figure 23 for being illustrated according to the application embodiment;
Figure 24 is a photoelectric cell 3D stereogram shown in Figure 23;
The photoelectric cell vertical view of Figure 25 for being illustrated according to the application embodiment.
Description of reference numerals
10,20,30,40,50,60,70,80,90 photoelectric cells;
11,21,31,41,51,61,71,81 substrates;
141,241,341,441,541,641,741,841 first electrodes;
142,242,342,442,542,642,742,842 second electrodes;
143,243,343443,543,643,743,843 connecting portions;
121 first semiconductor layers;
123 second semiconductor layers;
122 active areas;
170 grooves;
111,311 cut apart;
1411,2411,3411,4411,5411,6411,7411,8,411 first extensions;
1421,2421,3421,4421,5421,6421,7421,8,421 second extensions;
1412,2412,3412,4412,5412,6412,7412,8412,9,412 first electronic padses;
1422,2422,3422,4422,5422,6422,7422,8422,9,422 second electronic padses;
105,106,107,108,109,205,206,207,208,209,305,306,307,308,309,405,406,407,505,506,507,605,606,607,705,706,707,801,802,803,804,805,806,807 row;
151; 152; 153; 154; 155; 161; 162; 163; 164; 165; 171; 172; 173; 174; 181; 182; 183; 184; 185; 191; 192; 193; 194; 195; 251; 252; 253; 254; 255; 261; 262; 263; 264; 271; 272; 273; 274; 275; 281; 282; 283; 284; 291; 292; 293; 294; 295; 351; 352; 353; 354; 355; 361; 362; 363; 364; 371; 372; 373; 374; 375; 381; 382; 383; 384; 391; 392; 393; 394; 395; 451; 452; 453; 454; 455; 461; 462; 463; 464; 465; 466; 471; 472; 473; 474; 475; 551; 552; 553; 554; 561; 562; 563; 571; 572; 573; 574; 651; 652; 661; 662; 663; 664; 671; 672; 751; 752; 761; 762; 769; 771; 772; 811; 812; 871; 872 semiconductor units;
1411a, the 2411a first curve extension;
1421a, the 2421a second curve extension;
1421b, 2421b, 3411b, 4411a straight-line extension portion;
1411c, 1421c, 2411c, 3411c, 4411c second order extension;
3411a curve extension.
Embodiment
Fig. 1 discloses the vertical view of the photoelectric cell 10 that meets the application embodiment.Photoelectric cell 10 for example is light-emitting diode (LED), laser diode (LD) or solar cell, comprises a plurality of semiconductor units and is formed on the substrate 11, and first electrode, 141, the second electrodes 142 and connecting portion 143 are formed on the semiconductor unit.In present embodiment, photoelectric cell 10 is light-emitting diode (LED).Fig. 2 discloses among Fig. 1 photoelectric cell 10 along the profile of A-A ' line segment.Each semiconductor unit comprises first semiconductor layer, 121, the second semiconductor layers 123, and the active area between first, second semiconductor layer 122.The composition material of first semiconductor layer 121 is III-V semi-conducting materials of doping p-type or n-type impurity; The composition material of second semiconductor layer 123 is III-V semi-conducting materials of doping p-type or n-type impurity, and first semiconductor layer 121 and second semiconductor layer 123 is electrically different.The structure of active area 122 can be single heterojunction structure (SH), double-heterostructure (DH) or multiple quantum trap structure (MQW).Groove 170 is formed in the semiconductor unit through the etching semiconductor unit, and exposes first semiconductor layer 121 of part.A plurality ofly cut apart 111 and be formed between the semiconductor unit, expose part substrate 11.A plurality of first electrodes 141 and second electrode 142 are arranged on the photoelectric cell 10, and wherein first electrode 141 is formed on first semiconductor layer 121 that exposes, and second electrode 142 is formed on second semiconductor layer 123.First electrode 141 comprises first extension, 1411, the second electrodes 142 and comprises second extension 1421.In addition, its first electrode 141 on the semiconductor unit in a plurality of semiconductor units comprises first electronic pads 1412, and second electrode 142 on another semiconductor unit comprises second electronic pads 1422.
In order to satisfy the demand of client to photoelectric cell particular area, electric current and driving voltage, the layout of semiconductor unit and electrode also must special design.The quantity of semiconductor unit is according to formula in principle
Figure BSA00000309506200051
Figure BSA00000309506200052
Or
Figure BSA00000309506200053
Design, wherein, n represents the quantity of semiconductor unit, and V represents the driving voltage of photoelectric cell, V fRepresent the driving voltage of semiconductor unit.In the present embodiment, the size of photoelectric cell 10 is 85 * 85mil 2, its driving voltage is 72V.The driving voltage of each semiconductor unit is essentially 3V, but the driving voltage of semiconductor unit can change because of the quality of technology controlling and process and epitaxial loayer to some extent.In general, on the electrical efficient of photoelectric cell, the driving voltage of semiconductor unit is low more good more.The area of each semiconductor unit is mutually the same haply.According to above-mentioned formula, photoelectric cell 10 comprises 24 semiconductor units, is disposed at row 105,106,107,108 and 109 respectively.First row 105 comprises five semiconductor units 151,152,153,154 and 155, is connected in series towards first direction; Second row 106 comprises five semiconductor units 161,162,163,164 and 165, is connected in series towards second direction; The third line 107 comprises four semiconductor units 171,172,173 and 174, is connected in series towards first direction; Fourth line 108 comprises five semiconductor units 181,182,183,184 and 185, is connected in series towards second direction; Fifth line 109 comprises five semiconductor units 191,192,193,194 and 195, is connected in series towards first direction.First direction and second direction are opposite, and the layout that comprises the semiconductor unit of varying number in the different rows can make the demand that satisfies the client in the configuration more easily.
In the third line 107, the profile of semiconductor unit be rectangle and with other the row in the semiconductor unit shape different, through such design, it is easier to make on the electrode lay-out.With reference to figure 1 and Fig. 3, in first row 105 and fifth line 109, except the semiconductor unit 151,155,191 and 195 that is positioned at substrate 11 corner regions, the electrode lay-out on other semiconductor units is similar.In second row 106 and fourth line 108, except that the semiconductor unit 161,165,181 and 185 near substrate 11 edges, other electrode lay-outs that are positioned on the semiconductor unit are identical.To compare otherness bigger for semiconductor unit in its electrode lay-out of semiconductor unit in the third line 107 and other row; But the electrode lay-out on the semiconductor unit 172 and 173 wherein is identical, and different with the semiconductor unit that is positioned at substrate 11 edges 171 and 174.
First extension 1411 comprises the first curve extension 1411a; Second extension 1421 comprises the second curve extension 1421a, be expert at 105,106,108, and 109 on second extension 1421 of semiconductor unit also comprise the 1421b of straight-line extension portion; Arbitrary limit of the first curve extension 1411a and/or the second curve extension 1421a and semiconductor unit is not parallel to each other.First and third, and the five-element 105,107, and 109 semiconductor unit on first extension 1411 be arranged in groove 170; And extend to second limit of offside from first limit of semiconductor unit, 1421 of second extensions are to extend to first limit from second limit of semiconductor unit.Second with four lines 106 and 108 semiconductor unit on first extension 1411 be to extend to first limit from second limit of semiconductor unit, and second extension 1421 is to extend to second limit from first limit of semiconductor unit.In present embodiment, second extension 1421 is haply near the edge setting of semiconductor unit, and first extension 1411 places semiconductor unit groove 170, electrically connects with first semiconductor layer 121.The quantity of extension can adjust according to the area of semiconductor unit, if the area of semiconductor unit is bigger, just needs more extension.Extension also can form from the first curve extension 1411a extended second order extension 1411c and/or from the extended second order extension of second curve extension 1421a 1421c, disperses to increase electric current.
First electronic pads 1412 and second electronic pads 1422 lay respectively on the semiconductor unit 155 and 191 in relative corner of substrate 11; First electronic pads 1412 contacts with first extension 1411 on the semiconductor unit 155, and second electronic pads 1422 contacts with second extension 1421 on the semiconductor unit 191; Electronic pads engages (flip chip typebonding) usefulness as wire-bonded (wire bonding) or flip-over type.In order to reduce the degree of difficulty on the joint, electronic pads preferably is configured in respectively on the different semiconductor unit on substrate 11 outermost.
In order to be electrically connected each semiconductor unit; Therefore connecting portion 143 is formed between each semiconductor unit; For instance, second extension 1421 on first extension 1411 on the connecting portion 143 and first semiconductor unit and adjacent second semiconductor unit joins.In present embodiment, connecting portion 143 in first and third, and the five-element 105,107, and form the serial connection of first direction between 109, and in second and four lines 106 and 108 between form the reverse serial connection of second direction.Be connected in series semiconductor units 151 and 161,165 and 174,171 and 181 and 185 and 195 through connecting portion 143 between each row.In first and second, four, and the five-element 105,106,108, and 109 in have two connecting portions 143 to be present in therebetween between per two semiconductor units, in the third line 107, have a connecting portion 143 to be present in therebetween between per two semiconductor units.Fig. 4 is the equivalent circuit diagram of the photoelectric cell 10 shown in Fig. 1.
Also can comprise transparency conducting layer between second semiconductor layer 123 of photoelectric cell 10 and second electrode 142; The material of transparency conducting layer is the burning material, for example tin indium oxide (ITO), cadmium tin (CTO), antimony tin, indium zinc oxide, zinc oxide aluminum or zinc-tin oxide.In addition, when metal level has can let the thickness of light transmission the time, also can be used as transparency conducting layer.
Between the substrate 11 and first semiconductor layer 121, also can comprise knitting layer, make semiconductor unit engage with substrate 11.Knitting layer can be insulation transparent knitting layer or conductive, transparent knitting layer; If insulation transparent knitting layer, its material can be polyimides (polyimide), benzocyclobutene (BCB) or cross fluorine cyclobutane (PFCB); If the material of conductive bond layer, its material can be burning material or metal, the burning material comprises tin indium oxide (ITO), cadmium tin (CTO), antimony tin, indium zinc oxide, zinc oxide aluminum or zinc-tin oxide; Metal material comprises nickel, gold, titanium, chromium, aluminium or platinum.Cut apart 111 and be formed between each semiconductor unit, and expose part substrate 11 and/or insulation transparent knitting layer.When knitting layer is the conductive bond layer, cuts apart 111 and pass the conductive bond layer and expose substrate 11 and make and be electrically insulated between each semiconductor unit that this moment, substrate 11 was aluminium nitride (AlN), sapphire or glass.
Fig. 5 discloses the vertical view of the photoelectric cell 20 that meets the application second embodiment.With reference to figure 5-6, photoelectric cell 20 comprises a plurality of semiconductor units and is formed on the substrate 21, and cuts apart 211 and separate via a plurality of, and first electrode 241, second electrode 242 and connecting portion 243 are formed on the semiconductor unit.The structure of semiconductor unit is identical with photoelectric cell 10, comprises first semiconductor layer 121, second semiconductor layer 123, and the active area between first, second semiconductor layer 122.A plurality ofly cut apart 211 and be formed between each semiconductor unit.A plurality of first electrodes 241 and second electrode 242 are arranged on the photoelectric cell 20, and wherein first electrode 241 is formed on first semiconductor layer 121 that exposes, and second electrode 242 is formed on second semiconductor layer 123.First electrode 241 comprises first extension, 2411, the second electrodes 242 and comprises second extension 2421.In addition, first electrode 241 on the semiconductor unit in a plurality of semiconductor units comprises first electronic pads 2412, and second electrode 242 on second half conductor element comprises second electronic pads 2422.
In present embodiment, the size of photoelectric cell 20 is 85 * 85mil 2, its driving voltage is 72V, the area of each semiconductor unit is mutually the same haply, according to above-mentioned formula Photoelectric cell 20 comprises 23 semiconductor units, is disposed at row 205,206,207,208 respectively, reaches in 209.First row 205 comprises five semiconductor units 251,252,253,254, and 255 towards first direction serial connection, and the electrode lay-out on the semiconductor unit in the electrode lay-out on it and photoelectric cell 10 first row 105 is identical; Second row 206 comprises four semiconductor units 261,262,263, and 264 towards second direction serial connection, and the electrode lay-out on the semiconductor unit in the electrode lay-out on it and photoelectric cell 10 the third lines 107 is identical; The third line 207 comprises five semiconductor units 271,272,273,274, and 275 towards first direction serial connection, and the electrode lay-out on the semiconductor unit in the electrode lay-out on it and photoelectric cell 10 first row 105 is identical; Fourth line 208 comprises four semiconductor units 281,282,283, and 284 towards second direction serial connection, and the electrode lay-out on the semiconductor unit in the electrode lay-out on it and photoelectric cell 10 the third lines 107 is identical; Fifth line 209 comprises five semiconductor units 291,292,293,294, and 295 towards first direction serial connection, and the electrode lay-out on the semiconductor unit in the layout of the electrode on it and photoelectric cell 10 first row 105 is identical.
In second and four lines 206,208 in, the profile of semiconductor unit be rectangle and with other the row in the semiconductor unit shape different.With reference to figure 5 and Fig. 6; Electrode lay-out on the semiconductor unit of first row 205, the third line 207 and fifth line 209; Except semiconductor unit 251,255,271,275,291, and 295 on electrode, the electrode lay-out on other semiconductor units is similar haply each other; Electrode lay-out on the semiconductor unit of second row 206 and fourth line 208, except semiconductor unit 261,264,281, and 284 on electrode, the electrode lay-out on other semiconductor units is identical haply each other.First extension 2411 comprises the first curve extension 2411a, and second extension 2421 comprises the second curve extension 2421a.Be expert at 205,207, and 209 semiconductor unit on, second extension 2421 also comprises the 2421b of straight-line extension portion; The first curve extension 2411a and the second curve extension 2421a are not parallel to arbitrary limit of semiconductor unit.First and third, first extension 2411 that reaches on the five-element's 205,207,209 semiconductor units is arranged on first semiconductor layer 121; And extend to second limit with respect to first limit on first limit from semiconductor unit, and 2421 of second extensions are to extend to first limit from second limit.In second, and four lines 206,208 semiconductor units on first extension 2411 extend to first limit from second limit of semiconductor unit, 2421 of second extensions are to extend to second limit from first limit.In present embodiment, second extension 2421 is haply near the edge setting of semiconductor unit, and first extension 2411 places semiconductor unit, electrically connects with first semiconductor layer.Extension also can form from the extended second order extension of first curve extension 2411a 2411c, disperses to increase electric current.
First electronic pads 2412 and second electronic pads 2422 are formed at respectively on semiconductor unit 255 and 291; First electronic pads 2412 contacts with first extension 2411 on the semiconductor unit 255, and second electronic pads 2422 contacts with second extension 2421 on the semiconductor unit 291.Electronic pads is as engaging (bonding) usefulness, and is configured in respectively on the different semiconductor unit on substrate 21 corner regions.
In present embodiment, connecting portion 243 in first and third, and the five-element 205,207, and form the serial connection of first direction between 209, and in second and four lines 206 and 208 between form the reverse serial connection of second direction.Be connected in series semiconductor units 251 and 261,264 and 275,271 and 281 and 284 and 295 through connecting portion 243 between each row.In first and third, and the five-element 205,207, and 209 in two connecting portions 243 are arranged between per two semiconductor units, in second row 206 and fourth line 208, between per two semiconductor units a connecting portion 243 is arranged.Fig. 7 is the equivalent circuit diagram of the photoelectric cell 20 shown in Fig. 5.
Fig. 8 discloses the vertical view of the photoelectric cell 30 that meets the application the 3rd embodiment.With reference to figure 8-9, photoelectric cell 30 comprises a plurality of semiconductor units and is formed on the substrate 31, and first electrode 341, second electrode 342 and connecting portion 343 are formed on the semiconductor unit.The structure of semiconductor unit comprises first semiconductor layer 121, second semiconductor layer 123, and the active area between first, second semiconductor layer 122.A plurality ofly cut apart 311 and be formed between each semiconductor unit.A plurality of first electrodes 341 and second electrode 342 are arranged on the photoelectric cell 30, and wherein first electrode 341 comprises first extension 3411 and is formed on the semiconductor unit outside the semiconductor unit 355, and second electrode 342 comprises second extension 3421.In addition, first electrode 341 on the semiconductor unit 355 comprises first electronic pads 3412, and second electrode 342 on the semiconductor unit 391 comprises second electronic pads 3422.
In present embodiment, the size of photoelectric cell 30 is 50 * 50mil 2, its driving voltage is 72V, and the driving voltage of semiconductor unit is about 3V, and the area of each semiconductor unit is mutually the same haply.Photoelectric cell 30 comprises 23 semiconductor units, is disposed at row 305,306,307,308 respectively, reaches in 309.First row 305 comprises five semiconductor units 351,352,353,354, and 355 is connected in series towards first direction; Second row 306 comprises four semiconductor units 361,362,363, and 364 is connected in series towards second direction; The third line 307 comprises five semiconductor units 371,372,373,374, and 375 is connected in series towards first direction; Fourth line 308 comprises four semiconductor units 381,382,383, and 384 is connected in series towards second direction; Fifth line 309 comprises five semiconductor units 391,392,393,394, and 395 is connected in series towards first direction.
In second and four lines 306,308 in, the profile of semiconductor unit with other the row in the semiconductor unit shape different.With reference to figure 8 and Fig. 9; Electrode lay-out on the semiconductor unit of first row 305, the third line 307 and fifth line 309; Except semiconductor unit 351,355,371,375,391, and 395 on electrode, the electrode lay-out on other semiconductor units is similar haply each other; Electrode lay-out on the semiconductor unit of second row 306 and fourth line 308, except semiconductor unit 361,364,381, and 384 on electrode, other identical haply each other.First extension 3411 can be curve extension 3411a, and it is arranged near the semiconductor unit 361,375,381,391 of substrate 31 peripheries, reaches on 394; First extension 3411 also can be the 3411b of straight-line extension portion, is arranged on other semiconductor units.Second extension 3421 can be the curve extension.
In first and third, and the five-element 305,307,309; Except semiconductor unit 375,395; First extension 3411 of other semiconductor unit on it extends to second limit with respect to first limit from first limit of semiconductor unit, and 3421 of second extensions extend to first limit from second limit.First extension 3411 on the semiconductor unit 375 and 395 extends to second limit from the 3rd limit of semiconductor unit.In second and four lines 306,308, except semiconductor unit 361,381, first extension 3411 on other semiconductor units extends to first limit from second limit, and second extension 3421 extends to second limit from first limit.First extension 3411 on semiconductor unit 361 and 381 extends to first limit from the 3rd limit of semiconductor unit 361 and 381.The curve extension of first extension 3411 and second extension 3421 are not parallel to arbitrary limit of semiconductor unit.In present embodiment, second extension 3421 is haply near the edge setting of semiconductor unit, and first extension 3411 places semiconductor unit, electrically connects with first semiconductor layer.Extension also can form from curve extension 3411a and the extended second order extension of the 3411b of straight-line extension portion 3411c, disperses to increase electric current.
First electronic pads 3412 and second electronic pads 3422 are formed at respectively on semiconductor unit 355 and 391, and second electronic pads 3422 contacts with second extension 3421 on the semiconductor unit 391.Electronic pads engages usefulness as wire-bonded or flip-over type, and is configured in respectively on the different semiconductor unit on substrate 31 corner regions.
In present embodiment, connecting portion 343 in first and third, and the five-element 305,307, and form the serial connection of first direction between 309, and in second and four lines 306 and 308 between form the reverse serial connection of second direction.Be connected in series semiconductor units 351 and 361,364 and 375,371 and 381 and 384 and 395 through connecting portion 343 between each row.In between per two semiconductor units, there is a connecting portion 343 to be present in therebetween.Figure 10 is the equivalent circuit diagram of the photoelectric cell 30 shown in Fig. 8.
Figure 11 discloses the vertical view of the photoelectric cell 40 that meets the application the 4th embodiment.With reference to figure 11-12, photoelectric cell 40 comprises a plurality of semiconductor units and is formed on the substrate 41, and first electrode 441, second electrode 442 and connecting portion 443 are formed on the semiconductor unit.The structure of semiconductor unit comprises first semiconductor layer 121, second semiconductor layer 123, and the active area between first, second semiconductor layer 122.A plurality ofly cut apart 411 and be formed between each semiconductor unit.A plurality of first electrodes 441 and second electrode 442 are arranged on the photoelectric cell 40; Wherein first electrode 441 comprises first extension 4411 and is formed on the semiconductor unit outside the semiconductor unit 455, and second electrode 442 that is formed on the semiconductor unit beyond the semiconductor unit 471 comprises second extension 4421.In addition, first electrode 441 that is formed on the semiconductor unit 455 comprises first electronic pads 4412, and second electrode 442 on semiconductor unit 471 comprises second electronic pads 4422.
In present embodiment, the size of photoelectric cell 40 is 45 * 45mil 2, its driving voltage is 48V, the driving voltage of semiconductor unit is about 3V; According to above-mentioned formula, photoelectric cell 40 comprises 16 semiconductor units, is disposed at row 405,406, reaches in 407.First row 405 comprises five semiconductor units 451,452,453,454, and 455 is connected in series towards first direction; Second row 406 comprises six semiconductor units 461,462,463,464,465, and 466 is connected in series towards second direction; The third line 407 comprises five semiconductor units 471,472,473,474, and 475 is connected in series towards first direction.
The profile of the semiconductor unit in second row 402 with other the row in the semiconductor unit shape different; With reference to Figure 11 and Figure 12, the electrode lay-out on the semiconductor unit of first row 405 and the third line 407, except being positioned at semiconductor unit 451,455,471, reaching the electrode on 475, the electrode lay-out of other semiconductor units is similar haply each other.First extension 4411 comprises 4411a of straight-line extension portion and second order extension 4411c, and the second wherein all extensions 4421 all are the extensions of curve.First extension 4411 on the semiconductor unit of first and two row 405,407 extends to the 3rd limit and the 4th limit adjacent to first limit from first limit of semiconductor unit, and second extension 4421 extends to the 3rd limit and the 4th limit from second limit.First extension 4411 on the semiconductor unit of second row 406 extends to the 3rd limit and the 4th limit from second limit of semiconductor unit, and second extension 4421 extends to the 3rd limit and the 4th limit from first limit.Curve extension 4411 and 4421 is not parallel to arbitrary limit of semiconductor unit.
First electronic pads 4412 and second electronic pads 4422 lay respectively on semiconductor unit 455 and 471, and connecting portion 443 forms serial connection between semiconductor unit.Figure 13 is the equivalent circuit diagram of the photoelectric cell 40 shown in Figure 11.
Figure 14 discloses the vertical view of the photoelectric cell 50 that meets the application the 5th embodiment.Figure 15 is the 3D stereogram of photoelectric cell 50.The size of photoelectric cell 50 is 40 * 40mil 2, its driving voltage is 36V, the driving voltage of semiconductor unit is about 3V; According to formula In the present embodiment, photoelectric cell 50 comprises 11 semiconductor units, is disposed at row 505,506 respectively, reaches in 507.First row 505 comprises four semiconductor units 551,552,553, and 554 is connected in series towards first direction; Second row 506 comprises three semiconductor units 561,562, and 563 is connected in series towards second direction; The third line 507 comprises four semiconductor units 571,572,573, and 574 is connected in series towards first direction.First electrode 541 with first extension 5411 is formed on the semiconductor unit outside the semiconductor unit 554, and second electrode 542 with second extension 5421 is formed on all semiconductor units.First electrode 541 on the semiconductor unit 554 comprises first electronic pads 5412, and second electrode 542 on the semiconductor unit 571 comprises second electronic pads 5422.Connecting portion 543 forms serial connection between semiconductor unit.Figure 16 is the equivalent circuit diagram of the photoelectric cell 50 shown in Figure 14.
Figure 17 discloses the vertical view of the photoelectric cell 60 that meets the application the 6th embodiment.Figure 18 is the 3D stereogram of photoelectric cell 60.The size of photoelectric cell 60 is 120 * 120mil 2, its driving voltage is 24V, the driving voltage of semiconductor unit is about 3V; According to formula
Figure BSA00000309506200121
In the present embodiment, photoelectric cell 60 comprises 8 semiconductor units, is disposed at row 605,606 respectively, reaches in 607.First row 605 comprises two semiconductor units 651 and 652 and is connected in series towards first direction; Second row 606 comprises four semiconductor units 661,662,663, and 664 is connected in series towards second direction; The third line 607 comprises two semiconductor units 671 and 672 and is connected in series towards first direction.First electrode 641 comprises first extension, 6411, the second electrodes 642 and comprises second extension 6421.In addition, its first electrode 641 on the semiconductor unit in a plurality of semiconductor units comprises two first electronic padses 6412, and second electrode 642 on second half conductor element comprises two second electronic padses 6422.Connecting portion 643 forms serial connection between semiconductor unit.Figure 19 is the equivalent circuit diagram of the photoelectric cell 60 shown in Figure 17.
Figure 20 discloses the vertical view of the photoelectric cell 70 that meets the application the 7th embodiment.Figure 21 is the 3D stereogram of photoelectric cell 70.The size of photoelectric cell 70 is 120 * 120mil 2, its driving voltage is 24V, the driving voltage of semiconductor unit is about 3V; According to formula In the present embodiment, photoelectric cell 70 comprises 7 semiconductor units, is disposed at row 705,706 respectively, reaches in 707.First row 705 comprises two semiconductor units 751 and 752 and is connected in series towards first direction; Second row 606 comprises three semiconductor units 761,762, and 769 is connected in series towards second direction; The third line 707 comprises two semiconductor units 771 and 772 and is connected in series towards first direction.First electrode 741 comprises first extension, 7411, the second electrodes 742 and comprises second extension 7421.In addition, first electrode 741 on the semiconductor unit in a plurality of semiconductor units comprises two first electronic padses 7412, and second electrode 742 on second half conductor element comprises two second electronic padses 7422.Connecting portion 743 forms serial connection between semiconductor unit.Figure 22 is the equivalent circuit diagram of the photoelectric cell 70 shown in Figure 20.
Figure 23 discloses the vertical view of the photoelectric cell 80 that meets the application the 8th embodiment.Figure 24 is the 3D stereogram of photoelectric cell 80.The size of photoelectric cell 80 is 85 * 85mil 2, its driving voltage is 144V, the driving voltage of semiconductor unit is about 3V; According to formula
Figure BSA00000309506200123
In the present embodiment, photoelectric cell 80 comprises 48 semiconductor units and is disposed in row 801,802,803,804,805,806 and 807.Row 801,803,805, and 807 in comprise seven semiconductor units respectively and be connected in series towards first direction; Comprising seven semiconductor units in the row 802 and 806 is connected in series towards second direction; Fourth line 804 comprises six semiconductor units and is connected in series towards first direction.First electrode 841 on the semiconductor unit in a plurality of semiconductor units comprises on first semiconductor layer 121 that first electronic pads 8412 is positioned at semiconductor unit 811; And second electrode 842 on the semiconductor unit 871 comprises second electronic pads 8422, and it is positioned on second semiconductor layer 123.In addition, first electrode 841 that has first extension 8411 is positioned on the semiconductor unit outside the semiconductor unit that first electronic pads 8412 put; Second electrode 842 with second extension 8421 is positioned on all semiconductor units.Connecting portion 843 forms serial connection between semiconductor unit.Second electrode 842 on the semiconductor unit 811 that first electronic pads 8412 is positioned at is positioned on second semiconductor layer 123, is connected with first electrode 841 of semiconductor unit 812 through connecting portion 843; First electrode 841 on the semiconductor unit 871 that second electronic pads 8422 is positioned at is positioned on first semiconductor layer 121, is connected with second electrode 842 of semiconductor unit 872 through connecting portion 843.
Figure 25 discloses the vertical view of the photoelectric cell 90 that meets the application the 9th embodiment.Photoelectric cell 90 comprises 48 semiconductor units and is disposed in row 801,802,803,804,805,806 and 807.Its outward appearance and electrode configuration are similar with photoelectric cell 80, and difference is that first electronic pads 9412 is formed on second semiconductor layer 123 of semiconductor unit 811, form with first electrode 841 of semiconductor unit 812 through connecting portion 843 to be connected in series; Second electronic pads 9422 is formed on second semiconductor layer 123 of semiconductor unit 871, forms with second electrode 842 of semiconductor unit 872 through connecting portion 843 to be connected in series.Inject from second electronic pads 9422 as the external power source supply of current; During again by 9412 outputs of first electronic pads; Because semiconductor unit 871 resistance under second electronic pads 9422 are greater than the series resistor of its connecting portion 843 with first electrode 841 of semiconductor unit 812; Therefore electric current directly flows to first electrode 841 of semiconductor unit 812 from second electronic pads 9422 via connecting portion 843, and can not flow to first semiconductor layer 121, active area 122 and second semiconductor layer 123 under the semiconductor unit 871.Same electric current is flowing to first electrode 841 of semiconductor unit 812; After flowing to first electronic pads 9412 via connecting portion 843; Can't flow to first semiconductor layer 121, active area 122 and second semiconductor layer 123 of semiconductor unit 811 belows, but directly export external power source to.Therefore the semiconductor unit 811 and 871 of first electronic pads 9412 and second electronic pads, 9422 belows can not produce light.In order further electrically to completely cut off electronic pads and lower semiconductor unit, can between electronic pads and semiconductor unit, form insulating barrier, avoid forming short circuit because of big electric current causes the semiconductor layer of electric current penetrating electrode pad below.
Because the semiconductor unit of first electronic pads 9412 and second electronic pads, 9422 belows is not luminous; Therefore first electronic pads, 9412 areas can be roughly suitable with the area of semiconductor unit 811; Second electronic pads, 9422 areas can be roughly suitable with the area of semiconductor unit 871, to promote the yield of lead-in wire technology.In addition; First electronic pads 9412 also can be arranged in pairs or groups with second electronic pads 8422 in the photoelectric cell 80 in the photoelectric cell 90; The roughly whole face of first electronic pads 9412 this moment is covered on second semiconductor layer 123 of semiconductor unit 811, and second electronic pads 8422 is positioned on part second semiconductor layer 123 of semiconductor unit 871; The semiconductor unit no current of first electronic pads, 9412 belows injects; Therefore not luminous; And first electrode 841 on the semiconductor unit 871 that second electronic pads 8422 is positioned at; Be connected with second electrode 842 of semiconductor unit 872 through connecting portion 843, when electric current injected, the semiconductor unit 871 that second electronic pads 8422 is positioned at can be luminous.Likewise; Second electronic pads 9422 also can be arranged in pairs or groups with first electronic pads 8412 in the photoelectric cell 80 in the photoelectric cell 90; This moment, first electronic pads 8412 was positioned on part first semiconductor 121 of semiconductor unit 811, and the roughly whole face of second electronic pads 9422 is covered on second semiconductor layer 123 of semiconductor unit 871; Second electrode 842 on the semiconductor unit 811 that first electronic pads is positioned at; Be connected with first electrode 841 of semiconductor unit 812 through connecting portion 843; When electric current injected, semiconductor unit that first electronic pads 8422 is positioned at 811 can be luminous, and can't the flow through active area 122 of semiconductor unit 871 of the electric current that injects second electronic pads 9422; But directly flow to semiconductor unit 872 through connecting portion 843, so the semiconductor unit 871 that second electronic pads 9422 is positioned at is not luminous.
First semiconductor layer, active layer, and the material of second semiconductor layer comprise one or more element and be selected from the group that constitutes by Ga, Al, In, As, P, N and Si, for example GaN, AlGaN, InGaN, AlGaInN, GaP, GaAs, GaAsP, GaNAs or Si; The material of substrate comprises sapphire, GaAs, GaP, SiC, ZnO, GaN, AlN, Cu or Si.
Cited each embodiment of the present invention in order to explanation the present invention, is not in order to limit scope of the present invention only.Anyone was to the present invention did any showing and be prone to the modification of knowing or change neither disengaging spirit of the present invention and scope.

Claims (22)

1. photoelectric cell comprises:
Substrate;
A plurality of semiconductor units electrically connect each other and are positioned on this substrate, wherein these a plurality of semiconductor units each comprise first semiconductor layer, second semiconductor layer and between the active area between its this first and second semiconductor layers;
A plurality of first electrodes lay respectively on this first semiconductor layer;
Connecting portion is formed on these a plurality of semiconductor units with these a plurality of semiconductor units of electrical serial connection; And
A plurality of second electrodes lay respectively on this second semiconductor layer, wherein, have at least one to comprise first extension in these a plurality of first electrodes, and have at least one to comprise second extension in these a plurality of second electrodes.
2. photoelectric cell as claimed in claim 1, wherein the driving voltage of these a plurality of semiconductor units and/or area are roughly the same.
3. photoelectric cell as claimed in claim 2, wherein these a plurality of semiconductor units comprise at least two kinds of different shapes.
4. photoelectric cell as claimed in claim 1 wherein has at least one to comprise straight-line extension portion in this first extension and this second extension, and/or have at least one to comprise the second order extension in this first extension and this second extension.
5. photoelectric cell as claimed in claim 1, wherein these a plurality of first electrodes comprise first extension respectively, and these a plurality of second electrodes comprise second extension respectively.
6. photoelectric cell as claimed in claim 5, wherein these a plurality of first extensions comprise the first curve extension respectively, and these a plurality of second extensions comprise the second curve extension respectively;
This first curve extension and this second curve extension are not parallel to arbitrary limit of these a plurality of semiconductor units.
7. photoelectric cell as claimed in claim 5, wherein these a plurality of first electrodes comprise straight-line extension portion respectively, and these a plurality of second electrodes comprise straight-line extension portion respectively.
8. photoelectric cell as claimed in claim 1, wherein these a plurality of semiconductor units comprise first semiconductor unit, second semiconductor unit and the 3rd semiconductor unit,
Wherein, comprise first electronic pads one of in these a plurality of first electrodes, this first electronic pads is positioned on this first semiconductor unit, and this first semiconductor unit is positioned in the corner district of this substrate;
Comprise second electronic pads one of in these a plurality of second electrodes, this second electronic pads is positioned on this second semiconductor unit, and this second semiconductor unit is positioned in another corner district of this substrate; And
This first extension and this second extending part are on the 3rd semiconductor unit that does not have electronic pads.
9. photoelectric cell as claimed in claim 8; Wherein be positioned at this first electrode on this first semiconductor unit and also comprise extension and contact, and/or be positioned at this second electrode on this second semiconductor unit and also comprise extension and contact with this second electronic pads with this first electronic pads.
10. photoelectric cell as claimed in claim 1 wherein has at least one to comprise the curve extension in this first extension and this second extension, and this curve extension is not parallel to arbitrary limit of these a plurality of semiconductor units.
11. photoelectric cell as claimed in claim 1; This first extension on wherein arbitrary these a plurality of semiconductor units extends to second limit with respect to this first limit from first limit of this semiconductor unit; And this second extension extends to this first limit from this second limit of this semiconductor unit, and this first extending part is between this second extension.
12. photoelectric cell as claimed in claim 1; Wherein these a plurality of semiconductor units comprise the first, second, third and the 4th semiconductor unit; This first and second semiconductor unit is disposed at first row, and the 3rd and the 4th semiconductor unit is disposed at second row adjacent with this first row.
13. photoelectric cell like claim 12; Wherein this first extension and this second extending part are on this first semiconductor unit; This first electrode that is positioned on the 3rd semiconductor unit comprises the 3rd extension; This first extension extends to this first semiconductor unit, second limit from this first semiconductor unit, first limit; This second extension extends to this first limit from this second limit, first limit of approaching substrate most, first limit of this first semiconductor unit wherein, and second limit with respect to this substrate first limit is approached on second limit of this first semiconductor unit most;
The 3rd extension extends to the 3rd semiconductor unit first limit from the 3rd semiconductor unit second limit; Second limit of approaching this substrate most, second limit of the 3rd semiconductor unit wherein, first limit of this substrate is approached on first limit of the 3rd semiconductor unit most.
14. like the photoelectric cell of claim 13, wherein this first electrode comprises the 4th extension that is formed on the 3rd semiconductor unit, the 4th extension extends to second limit of the 3rd semiconductor unit from first limit of the 3rd semiconductor unit.
15. photoelectric cell like claim 13; Wherein these a plurality of electrode lay-outs on this first semiconductor unit are identical with these a plurality of electrode lay-outs on this second semiconductor unit, and/or these a plurality of electrode lay-outs on the 3rd semiconductor unit are identical with these a plurality of electrode lay-outs on the 4th semiconductor unit.
16. photoelectric cell like claim 13; Wherein this a plurality of electrode lay-outs of this first row are inequality with these a plurality of electrode lay-outs of this second row, and/or these first these a plurality of semiconductor unit numbers in capable are different from these a plurality of semiconductor unit numbers of this second row.
17. like the photoelectric cell of claim 13, wherein a plurality of these first row and this second row repeated configuration are on this substrate.
18. photoelectric cell like claim 13; Wherein these a plurality of semiconductor units in this first row are connected in series towards first direction through first connecting portion; These a plurality of semiconductor units in this second row are connected in series towards second direction through second connecting portion, and wherein this first direction and this second direction are opposite.
19. photoelectric cell as claimed in claim 1 also comprises knitting layer, is formed between this substrate and this a plurality of semiconductor layers unit.
20. a photoelectric cell comprises:
Substrate;
A plurality of semiconductor units electrically connect each other and are positioned on this substrate, wherein these a plurality of semiconductor units each comprise first semiconductor layer, second semiconductor layer and the active area between this first and second semiconductor layer;
A plurality of first electrodes lay respectively on this first semiconductor layer; And
A plurality of second electrodes lay respectively on this second semiconductor layer,
Wherein, have at least one to comprise first extension in these a plurality of first electrodes, and have at least one to comprise second extension in these a plurality of second electrodes, wherein the driving voltage of these a plurality of semiconductor units is roughly the same.
21. a photoelectric cell comprises:
Substrate;
A plurality of semiconductor units electrically connect each other and are positioned on this substrate, wherein these a plurality of semiconductor units each comprise first semiconductor layer, second semiconductor layer and the active area between this first and second semiconductor layer,
A plurality of first electrodes lay respectively on this first semiconductor layer; And
A plurality of second electrodes lay respectively on this second semiconductor layer,
Wherein these a plurality of semiconductor units comprise first semiconductor unit; Second semiconductor unit; And the 3rd semiconductor unit; In these a plurality of first electrodes at least one comprises on this first semiconductor unit that first electronic pads is positioned at this substrate outermost, and in these a plurality of second electrodes at least one comprises on this second semiconductor unit that second electronic pads is positioned at this substrate outermost
Wherein this first electrode and this second electrode comprise first extension and second extending part on the 3rd semiconductor unit that does not have electronic pads.
22. a photoelectric cell comprises:
Substrate;
A plurality of semiconductor units electrically connect each other and are positioned on this substrate, wherein these a plurality of semiconductor units each comprise first semiconductor layer, second semiconductor layer and the active area between this first and second semiconductor layer; And
A plurality of first electrodes and a plurality of second electrode lay respectively on these a plurality of semiconductor units,
Wherein these a plurality of semiconductor units comprise first semiconductor unit; Second semiconductor unit; And the 3rd semiconductor unit; In these a plurality of first electrodes at least one comprises on this second semiconductor layer that first electronic pads is positioned at this first semiconductor unit, and in these a plurality of second electrodes at least one comprises on this second semiconductor layer that second electronic pads is positioned at this two semiconductor unit
Wherein this first electrode and this second electrode comprise first extension and second extending part on the 3rd semiconductor unit that does not have electronic pads.
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