CN102221840B

CN102221840B - Voltage-stabilizing circuit and operation amplifying circuit

Info

Publication number: CN102221840B
Application number: CN201010164676.6A
Authority: CN
Inventors: 邱柏翰
Original assignee: Leadtrend Technology Corp
Current assignee: Leadtrend Technology Corp
Priority date: 2010-04-19
Filing date: 2010-04-19
Publication date: 2014-11-05
Anticipated expiration: 2030-04-19
Also published as: CN102221840A

Abstract

The invention is used for providing a circuit of a regulated voltage. An output stage is provided with a power switch which is provided with a control end, a power input end and a power output end. The power input end is coupled with a power voltage; the power output end provides the regulated voltage; an amplifier stage is used for comparing a feedback voltage and a reference voltage, and is provided with a first output end and a second output end; the feedback voltage is approximately proportional to the regulated voltage; a buffer stage is provided with an input end and an output end; and the output end of the buffer stage and the second output end of the amplifier stage together drive the control end of the output stage.

Description

Mu balanced circuit and operation amplifying circuit

Technical field

The present invention is about a kind of circuit and control method, espespecially for circuit and the control method of amplifier and voltage stabilizing.

Background technology

In order to want normal running, many circuit need to have a corresponding fixing voltage more.And these circuit are all generally by an energy supply device (energy source), similarly be a primary power (main power) or a battery (battery), power.Unfortunately, the voltage of this energy supply device often rocks very greatly.Therefore, industry just need to develop various voltage of voltage regulation (regulator circuit), by the output voltage of energy supply device, converts a corresponding stable fixed voltage to, to provide other circuit to be used.

A kind of electric pressure converter that converts direct supply to for direct supply is referred to as low pressure drop (lowdropout, LDO) voltage stabilizer (voltage regulator).Low dropout voltage regulator generally has a power switch, is generally a field-effect transistor, is connected between input power and out-put supply.By feedback mechanism, control the channel impedance of this power switch, to adjust the voltage of out-put supply.

Fig. 1 is a known LDO voltage stabilizer.PMOS MP0 is a power switch.Resistance R 1 produces feedback voltage V with R2 _fb.Transduction amplifier (transconductance amplifier) GM is feedback voltage V relatively _fbwith a default reference voltage V _ref.The output impedance of generalied transduction amplifier GM is very large, so while being directly used for pushing away the grid of PMOS MP0, because the grid of PMOS MP0 has very large stray capacitance, the signal transient reaction velocity of whole LDO voltage stabilizer (signal transient response speed) will be relatively slow.Therefore, between the transduction amplifier GM and PMOS MP0 grid of Fig. 1, there is an impact damper (BUFFER), higher input impedance and a lower output impedance is provided.So, can improve the signal transient reaction velocity of whole LDO voltage stabilizer.

In known technology, there is the practice of many kinds of impact dampers.According to United States Patent (USP) numbering 6,501,305 and 5,861, in 736, teach, impact damper may be emitter follower (emitter follower) or source follower (source follower), as shown in Fig. 2 a and Fig. 2 b, also may be a category-B plug-type (push-pull) amplifier, as shown in Figure 2 c.

Summary of the invention

One embodiment of the invention provide a kind of mu balanced circuit, in order to (regulated) voltage after an adjustment to be provided.Output stage (output stage) has a power switch, and it has a control end, a power input and a power output end.This power input couples a supply voltage, and this power output end provides this adjustment rear voltage.Amplifier stage (amplifier stage), in order to compare a feedback voltage and a reference voltage, has one first output terminal and one second output terminal.The about ratio of this feedback voltage is voltage after this is adjusted.Buffer stage has an input end and an output terminal.This input end is connected to this first output terminal.The output impedance of this output terminal of this buffer stage, is less than the output impedance of this second output terminal of this amplifier.This second output terminal of this output terminal of this buffer stage and this amplifier stage drives this control end of this output stage together.

One embodiment of the invention provide a kind of operation amplifying circuit.Amplifier stage (amplifier stage), in order to compare one first input signal and one second input signal, has a pair of the first output terminal and one second output terminal.Plug-type buffer stage, has a pair of input end and an output terminal, and this is connected to this to the first output terminal to input end.This second output terminal of this output terminal of this buffer stage and this amplifier stage drives an output load together.The output impedance of this output terminal of this buffer stage is less than the output impedance of this second output terminal of this amplifier stage.

One embodiment of the invention provide a kind of mu balanced circuit, in order to (regulated) voltage after an adjustment to be provided.Output stage (output stage), has a power switch, and it has a control end, a power input and a power output end.This power input couples a supply voltage, and this power output end provides this adjustment rear voltage.Amplifier stage (ampli fier stage) is a feedback voltage and a reference voltage relatively, has a pair of the first output terminal and one second output terminal.The about ratio of this feedback voltage is voltage after this is adjusted.Buffer stage, has the plug-type amplifier of an AB class, has a pair of input end and an output terminal, and this is connected to this to the first output terminal to input end.Wherein, this second output terminal of this output terminal of this buffer stage and this amplifier stage drives this control end of this output stage together.

accompanying drawing explanation

Fig. 1 is a known LDO voltage stabilizer.

Fig. 2 a-2c is known impact damper.

Fig. 3 is a LDO voltage stabilizer of implementing according to the present invention.

Fig. 4 is a kind of embodiment of the LDO voltage stabilizer of Fig. 3.

[main element label declaration]

MP0、MP1-4 PMOS

R1, R2 resistance

V _fbfeedback voltage

GM, 20 transduction amplifiers

V _refreference voltage

V _ggrid voltage

V _insupply voltage

BUFFER impact damper

V _outvoltage after adjusting

Np positive output end

Nn negative output terminal

22 differential amplifiers

24 circuit

MN1-4 NMOS

The upper input end of Nu

Input end under Nd

Ng control end

embodiment

For above and other objects of the present invention, feature and advantage can be become apparent, cited below particularlyly go out preferred embodiment, and coordinate appended graphicly, be described in detail below.

For convenience of description, having function that be equal to or similar will represent with identical element numbers.So the element of identical label does not represent that two elements is inevitable identical in different embodiment.Scope of the present invention should be to decide according to claim.

After impact damper in the upper Fig. 2 a-2c of LDO voltage stabilizer collocation of Fig. 1, the grid voltage variation that can produce problem a: PMOSMP0 is not track to track (rail-to-rail).The impact damper of take in Fig. 2 c is example, even if voltage V ₁high to the supply voltage V with input power _inthe same, grid voltage V _gat most also can only be drawn high and be equaled supply voltage V _incut the cut-in voltage V of NPN transistor _be-on.In other words, the grid voltage of the PMOS transistor MP0 in Fig. 1 changes and cannot change completely in supply voltage V _inand between ground voltage, this can reduce the dynamic operation scope of whole LDO voltage stabilizer.

Fig. 3 is a LDO voltage stabilizer of implementing according to the present invention.In Fig. 3, as the feedback voltage V on two input ends of transduction amplifier GM comparison of amplifier stage _fbwith reference voltage V _ref, and there is one first output terminal and one second output terminal.As the impact damper BUFFER in buffer stage, be connected between the first output terminal and PMOS MP0 grid of transduction amplifier GM.Impact damper BUFFER can implement with source follower or emitter follower, as given an example in Fig. 2 a-2c, also can use the amplifier of category-A, category-B or AB class to implement.Generally, as the transduction amplifier GM of amplifier stage with as the impact damper BUFFER in buffer stage, form an operation amplifying circuit.The voltage gain of impact damper BUFFER can be approximately 1.PMOS MP0 in output stage, its grid, except being cushioned the output terminal of device BUFFER drives, is also driven by the second output terminal of transduction amplifier GM, as shown in Figure 3.The source electrode (source) of PMOS transistor MP0 is connected to supply voltage V _in, voltage V after drain electrode (drain) provides and adjusts _out.

Fig. 4 is a kind of embodiment of the LDO voltage stabilizer of Fig. 3.Transduction amplifier 20 has differential amplifier 22, relatively feedback voltage V _fbwith reference voltage V _ref, have a positive output end np and a negative output terminal nn.Differential amplifier 22 also can be implemented with other differential circuit.Circuit 24 can be considered as a gain circuitry with PMOS MP1 and MP2, has two current output terminals respectively in the drain electrode of PMOS MP1 and MP2.NMOS MN1 and MN2 can be considered as another gain circuitry, have two current output terminals respectively in the drain electrode of NMOS MN1 and MN2.The drain electrode of the drain electrode of PMOS MP1 and NMOS MN1 can be considered as the transduceing pair of output of amplifier 20, and the drain electrode of the drain electrode of PMOS MP2 and NMOS MN2 can be considered as another pair of output.

Impact damper 26 is the plug-type amplifier of an AB class, and it has NMOS MN3 and MN4 and PMOS MP3 and MP4.The upper input end nu of impact damper 26 is connected to the drain electrode of PMOS MP1, and lower input end nd is connected to the drain electrode of NMOS MN1.In Fig. 4, NMOS MN3 and MN4 are depletion most (depletion-mode metal-oxide-semiconductor transistor), and other NMOS is enhancement mode (enhance-mode) metal oxide semiconductor transistor.As known to those skilled in the art, enhancement most refers to drain electrode need to add with the conductive channel between source electrode the metal oxide semiconductor transistor that voltage just can form, and the drain electrode that depletion most refers to does not need the metal oxide semiconductor transistor that adds that voltage has just formed with the conductive channel between source electrode.For example, the critical voltage of enhancement mode NMOS (threshold voltage) is to be 0 or negative value on the occasion of, depletion type NMOS.Because NMOS MN3 and MN4 are depletion type NMOS, so, when the voltage of upper input end nu is up to supply voltage V _intime, grid voltage V _galso can draw high and reach supply voltage V _in.

The current output terminal (drain electrode of NMOS MN2 and PMOS MP2) that amplifier 20 is led in the output terminal of impact damper 26 (the namely source electrode of NMOS MN4 and PMOS MP4) transfer links together, together drive the grid of PMOS MP0, namely control end ng.

In Fig. 4, it is all little with the output impedance of MN2 and the output impedance of PMOS MP1 and MP2 than NMOS MN1 that the output impedance of impact damper 26 can design.So, impact damper 26 can discharge and recharge control end ng rapidly, and higher signal transient reaction velocity is provided.

When the voltage of the lower input end nd of impact damper 26 low to 0 current potential, namely during ground connection, because PMOSMP4 is enhancement most, so impact damper 26 cannot be grid voltage V _gmove 0 current potential to.Now, transduction amplifier 20 can pass through NMOS MN2, grid voltage V _gmove 0 current potential to.In other words, although impact damper 26 cannot make grid voltage V _greach track to track and change, but because transduction amplifier 20 has an output directly to drive control end ng, therefore can make grid voltage V _greaching track to track changes.

When general operation, as long as feedback voltage V _fbdeparted from reference voltage V _ref, the impact damper 26 in Fig. 4 just can drive control end ng rapidly, adjusts the channel impedance of PMOS MP0, raises rapidly or reduces and adjust rear voltage V _out, make feedback voltage V _fbapproach reference voltage V _ref.Because impact damper 26 is for having the plug-type amplifier of an AB class of two input ends, so impact damper 26 can react the comparative result of differential amplifier 22 rapidly, with or the mode that pushes away or draw, change rapidly the grid voltage V of control end ng _g.

Once grid voltage V _gwhile surpassing the driving scope of impact damper 26, transduction amplifier 20, by PMOSMP2 or NMOS is MN2, just directly drives control end ng, to reach grid voltage V _gtrack to track changes, and maintains whole dynamic operation scope.

Although the present invention discloses as above with preferred embodiment; so it is not in order to limit the present invention; any have and conventionally know the knowledgeable in the technical field of the invention; without departing from the spirit and scope of the present invention; when doing a little change and retouching, so protection scope of the present invention is when being as the criterion depending on the appended claim scope person of defining.

Claims

1. an operation amplifying circuit, includes:

One amplifier stage, in order to compare one first input signal and one second input signal, has a pair of the first output terminal and one second output terminal; And

One plug-type buffer stage, has a pair of input end and an output terminal, and this is connected to this to the first output terminal to input end;

Wherein, this second output terminal of this output terminal of this buffer stage and this amplifier stage drives an output load together;

The output impedance of this output terminal of this buffer stage is less than the output impedance of this second output terminal of this amplifier stage.

2. operation amplifying circuit according to claim 1, wherein, this buffer stage is the plug-type amplifier of an AB class.

3. operation amplifying circuit according to claim 1, wherein, this buffer stage has two depletion mosts.

4. operation amplifying circuit according to claim 1, wherein, this amplifier stage is a transduction amplifier, there are a differential amplifier and two gain circuitries, this differential amplifier this gain circuitry of connecting respectively, this differential amplifier is a feedback voltage and a reference voltage relatively, and this gain circuitry, according to the output of this differential amplifier, provides output current in this first output terminal and this second output terminal.

5. operation amplifying circuit according to claim 1, wherein, this amplifier stage only has a differential amplifier.

6. operation amplifying circuit according to claim 1, wherein, the voltage gain of this buffer stage is approximately 1.

7. operation amplifying circuit according to claim 1, wherein, this amplifier stage, directly drives a control end by this second output terminal, so that the voltage of this control end changes between track to track.

8. a mu balanced circuit, in order to voltage after an adjustment to be provided, includes:

One output stage, has a power switch, and it has a control end, a power input and a power output end, and this power input couples a supply voltage, and this power output end provides this adjustment rear voltage;

One amplifier stage, in order to compare a feedback voltage and a reference voltage, has a pair of the first output terminal and one second output terminal, and wherein, this feedback voltage ratio is voltage after this is adjusted; And

One buffer stage, has the plug-type amplifier of an AB class, has a pair of input end and an output terminal, and this is connected to this to the first output terminal to input end,

Wherein, this second output terminal of this output terminal of this buffer stage and this amplifier stage drives this control end of this output stage together.

9. mu balanced circuit according to claim 8, wherein, this buffer stage is the plug-type amplifier of an AB class.

10. mu balanced circuit according to claim 8, wherein, this buffer stage has two depletion mosts.

11. mu balanced circuits according to claim 8, wherein, this amplifier stage is a transduction amplifier, there are a differential amplifier and two gain circuitries, this differential amplifier this gain circuitry of connecting respectively, this differential amplifier is this feedback voltage and this reference voltage relatively, and this gain circuitry, according to the output of this differential amplifier, provides output current in this first output terminal and this second output terminal.

12. mu balanced circuits according to claim 8, wherein, this amplifier stage only has a differential amplifier.

13. mu balanced circuits according to claim 8, wherein, the voltage gain of this buffer stage is approximately 1.

14. mu balanced circuits according to claim 8, wherein, this amplifier stage, by this second output terminal, can make the voltage of this control end change between track to track.