CN102221840A - Voltage-stabilizing circuit and operation amplifying circuit - Google Patents
Voltage-stabilizing circuit and operation amplifying circuit Download PDFInfo
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- CN102221840A CN102221840A CN2010101646766A CN201010164676A CN102221840A CN 102221840 A CN102221840 A CN 102221840A CN 2010101646766 A CN2010101646766 A CN 2010101646766A CN 201010164676 A CN201010164676 A CN 201010164676A CN 102221840 A CN102221840 A CN 102221840A
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Abstract
The invention is used for providing a circuit of a regulated voltage. An output stage is provided with a power switch which is provided with a control end, a power input end and a power output end. The power input end is coupled with a power voltage; the power output end provides the regulated voltage; an amplifier stage is used for comparing a feedback voltage and a reference voltage, and is provided with a first output end and a second output end; the feedback voltage is approximately proportional to the regulated voltage; a buffer stage is provided with an input end and an output end; and the output end of the buffer stage and the second output end of the amplifier stage together drive the control end of the output stage.
Description
Technical field
The present invention is about a kind of circuit and control method, refers to be used for the circuit and the control method of amplifier and voltage stabilizing especially.
Background technology
In order to want normal running, many circuit need a corresponding fixing voltage more.And these circuit generally all are by an energy supply device (energy source), similarly are a primary power (main power) or a battery (battery), power.Unfortunately, the voltage of this energy supply device often rocks very greatly.Therefore, industry just need develop and various voltage of voltage regulation (regulator circuit), with the output voltage of energy supply device, converts a corresponding stable fixed voltage to, is used so that other circuit to be provided.
A kind ofly be used for the electric pressure converter that direct supply converts direct supply to and be referred to as low pressure drop (lowdropout, LDO) voltage stabilizer (voltage regulator).Low dropout voltage regulator generally has a power switch, generally is a field-effect transistor, is connected between input power supply and the out-put supply.By feedback mechanism, control the channel impedance of this power switch, to adjust the voltage of out-put supply.
Fig. 1 is a known LDO voltage stabilizer.PMOS MP0 is a power switch.Resistance R 1 produces feedback voltage V with R2
FbTransduction amplifier (transconductance amplifier) GM is feedback voltage V relatively
FbWith a default reference voltage V
RefThe output impedance of generalied transduction amplifier GM is very big, so when directly being used for pushing away the grid of PMOS MP0, because the grid of PMOS MP0 has very big stray capacitance, the signal transient reaction velocity of whole LDO voltage stabilizer (signal transient response speed) will be relatively slow.Therefore, between the transduction amplifier GM and PMOS MP0 grid of Fig. 1, an impact damper (BUFFER) is arranged, a higher input impedance and a lower output impedance are provided.So, can improve the signal transient reaction velocity of whole LDO voltage stabilizer.
In the known technology, the practice of many kinds of impact dampers is arranged.According to United States Patent (USP) numbering 6,501,305 and 5,861, teach in 736, impact damper may be emitter follower (emitter follower) or source follower (source follower), shown in Fig. 2 a and Fig. 2 b, also may be a category-B plug-type (push-pull) amplifier, shown in Fig. 2 c.
Summary of the invention
One embodiment of the invention provide a kind of mu balanced circuit, adjust back (regulated) voltage in order to provide one.Output stage (output stage) has a power switch, and it has a control end, a power input and a power output end.This power input couples a supply voltage, and this power output end provides this adjustment back voltage.Amplifier stage (amplifier stage) has one first output terminal and one second output terminal in order to compare a feedback voltage and a reference voltage.The about ratio of this feedback voltage is adjusted back voltage in this.Buffer stage has an input end and an output terminal.This input end is connected to this first output terminal.The output impedance of this output terminal of this buffer stage is less than the output impedance of this second output terminal of this amplifier.This second output terminal of this output terminal of this buffer stage and this amplifier stage drives this control end of this output stage together.
One embodiment of the invention provide a kind of operation amplifying circuit.Amplifier stage (amplifier stage) in order to compare one first input signal and one second input signal, has a pair of first output terminal and one second output terminal.Plug-type buffer stage has an a pair of input end and an output terminal, this to input end to being connected to this to first output terminal.This second output terminal of this output terminal of this buffer stage and this amplifier stage drives an output load together.The output impedance of this output terminal of this buffer stage is less than the output impedance of this second output terminal of this amplifier stage.
One embodiment of the invention provide a kind of mu balanced circuit, adjust back (regulated) voltage in order to provide one.Output stage (output stage) has a power switch, and it has a control end, a power input and a power output end.This power input couples a supply voltage, and this power output end provides this adjustment back voltage.Amplifier stage (amplifier stage) is a feedback voltage and a reference voltage relatively, has a pair of first output terminal and one second output terminal.The about ratio of this feedback voltage is adjusted back voltage in this.Buffer stage has the plug-type amplifier of an AB class, and an a pair of input end and an output terminal are arranged, and this is connected to this to first output terminal to input end.
Description of drawings
Fig. 1 is a known LDO voltage stabilizer.
Fig. 2 a-2c is known impact damper.
Fig. 3 is one according to LDO voltage stabilizer that the present invention implemented.
Fig. 4 is a kind of embodiment of the LDO voltage stabilizer of Fig. 3.
[main element label declaration]
MP0、MP1-4 PMOS
R1, R2 resistance
V
FbFeedback voltage
GM, 20 transduction amplifiers
V
RefReference voltage
V
gGrid voltage
V
InSupply voltage
The BUFFER impact damper
V
OutAdjust back voltage
The Np positive output end
The Nn negative output terminal
22 differential amplifiers
24 circuit
MN1-4 NMOS
The last input end of Nu
Input end under the Nd
The Ng control end
Embodiment
For above and other objects of the present invention, feature and advantage can be become apparent, cited below particularlyly go out preferred embodiment, and cooperate appended graphicly, be described in detail below.
For the convenience on illustrating, having function that be equal to or similar will represent with the components identical label.So the element of identical label does not represent that two elements is inevitable identical among the different embodiment.Scope of the present invention should decide with the foundation claim.
Behind the impact damper among the last Fig. 2 a-2c of LDO voltage stabilizer collocation of Fig. 1, the grid voltage variation that can produce problem a: PMOSMP0 is not track to track (rail-to-rail).With the impact damper among Fig. 2 c is example, even if voltage V
1High to supply voltage V with the input power supply
InThe same, grid voltage V
gAt most also can only be drawn high and be equaled supply voltage V
InCut the cut-in voltage V of NPN transistor
Be-onIn other words, the grid voltage of the PMOS transistor MP0 among Fig. 1 changes and can't change fully in supply voltage V
InAnd between the ground voltage, this can reduce the dynamic operation scope of whole LDO voltage stabilizer.
Fig. 3 is one according to LDO voltage stabilizer that the present invention implemented.Among Fig. 3, as the feedback voltage V on two input ends of transduction amplifier GM comparison of amplifier stage
FbWith reference voltage V
Ref, and have one first output terminal and one second output terminal.Be connected as the impact damper BUFFER in the buffer stage between first output terminal and PMOS MP0 grid of transduction amplifier GM.Impact damper BUFFER can implement with source follower or emitter follower, as giving an example among Fig. 2 a-2c, also can use the amplifier of category-A, category-B or AB class to implement.Generally, promptly constitute an operation amplifying circuit as the transduction amplifier GM of amplifier stage and as the impact damper BUFFER in the buffer stage.The voltage gain of impact damper BUFFER can be approximately 1.PMOS MP0 in output stage, its grid are also driven by second output terminal of transduction amplifier GM, as shown in Figure 3 except the output terminal that is cushioned device BUFFER drives.The source electrode (source) of PMOS transistor MP0 is connected to supply voltage V
In, drain electrode (drain) then provides adjusts back voltage V
Out
Fig. 4 is a kind of embodiment of the LDO voltage stabilizer of Fig. 3.Transduction amplifier 20 has differential amplifier 22, relatively feedback voltage V
FbWith reference voltage V
Ref, a positive output end np and a negative output terminal nn are arranged.Differential amplifier 22 also can be implemented with other differential circuit.Circuit 24 can be considered as a gain circuitry with PMOS MP1 and MP2, has two current output terminals respectively in the drain electrode of PMOS MP1 and MP2.NMOS MN1 and MN2 can be considered as another gain circuitry, have two current output terminals respectively in the drain electrode of NMOS MN1 and MN2.The drain electrode of the drain electrode of PMOS MP1 and NMOS MN1 can be considered as the transduceing pair of output of amplifier 20, and the drain electrode of the drain electrode of PMOS MP2 and NMOS MN2 can be considered as another to output terminal.
Impact damper 26 is the plug-type amplifier of an AB class, and it has NMOS MN3 and MN4 and PMOS MP3 and MP4.The last input end nu of impact damper 26 is connected to the drain electrode of PMOS MP1, and following input end nd is connected to the drain electrode of NMOS MN1.In Fig. 4, NMOS MN3 and MN4 are depletion most (depletion-mode metal-oxide-semiconductor transistor), and other NMOS is enhancement mode (enhance-mode) metal oxide semiconductor transistor.As known to those skilled in the art, enhancement most refers to drain electrode need add the metal oxide semiconductor transistor that voltage just can form with the conductive channel between the source electrode, and the drain electrode that depletion most refers to does not need to add the metal oxide semiconductor transistor of voltage with regard to having formed with the conductive channel between the source electrode.For example, the critical voltage of enhancement mode NMOS (threshold voltage) is then to be 0 or negative value on the occasion of, depletion type NMOS.Because NMOS MN3 and MN4 are depletion type NMOS, so, when the voltage of last input end nu up to supply voltage V
InThe time, grid voltage V
gAlso can draw high and reach supply voltage V
In
The current output terminal (drain electrode of NMOS MN2 and PMOS MP2) that amplifier 20 is led in the output terminal of impact damper 26 (source electrode of NMOS MN4 and PMOS MP4 just) transfer links together, and together drives the grid of PMOSMP0, just control end ng.
Among Fig. 4, it is all little than the output impedance of the output impedance of NMOS MN1 and MN2 and PMOS MP1 and MP2 that the output impedance of impact damper 26 can design.So, impact damper 26 can discharge and recharge control end ng apace, and the higher signal instantaneous velocity of reaction is provided.
When the voltage of the following input end nd of impact damper 26 low to 0 current potential, just during ground connection, because PMOSMP4 is an enhancement most, so impact damper 26 can't be grid voltage V
gMove 0 current potential to.At this moment, transduction amplifier 20 can pass through NMOS MN2, grid voltage V
gMove 0 current potential to.In other words, though impact damper 26 can't make grid voltage V
gReach track to track and change, but, therefore can make grid voltage V because transduction amplifier 20 has the direct drive controlling end ng of an output
gReaching track to track changes.
When general operation, as long as feedback voltage V
FbDeparted from reference voltage V
Ref, the impact damper 26 among Fig. 4 is drive controlling end ng apace just, adjusts the channel impedance of PMOS MP0, raises apace or reduces and adjust back voltage V
Out, make feedback voltage V
FbApproach reference voltage V
RefBecause impact damper 26 is for having the plug-type amplifier of an AB class of two input ends, so impact damper 26 can react the comparative result of differential amplifier 22 apace, with or the mode that pushes away or draw, change the grid voltage V of control end ng apace
g
In case grid voltage V
gWhen surpassing the driving scope of impact damper 26, transduction amplifier 20, by PMOSMP2 or NMOS is MN2, just direct drive controlling end ng is to reach grid voltage V
gTrack to track changes, and keeps whole dynamic operation scope.
Though the present invention discloses as above with preferred embodiment; right its is not in order to limit the present invention; any have in the technical field of the invention know the knowledgeable usually; without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention is as the criterion when looking appended the claim scope person of defining.
Claims (10)
1. a mu balanced circuit is adjusted back voltage in order to provide one, and this circuit includes:
One output stage has a power switch, and it has a control end, a power input and a power output end, and this power input couples a supply voltage, and this power output end provides this adjustment back voltage;
One amplifier stage in order to compare a feedback voltage and a reference voltage, has one first output terminal and one second output terminal, and wherein, the about ratio of this feedback voltage is adjusted back voltage in this; And
One buffer stage has an input end and an output terminal, and its input end is connected to this first output terminal;
Wherein, this second output terminal of this output terminal of this buffer stage and this amplifier stage drives this control end of this output stage together;
The output impedance of this output terminal of this buffer stage is less than the output impedance of this second output terminal of this amplifier.
2. mu balanced circuit according to claim 1, wherein, this buffer stage is the plug-type amplifier of an AB class.
3. mu balanced circuit according to claim 1, wherein, this buffer stage includes the one source pole follower.
4. mu balanced circuit according to claim 1, wherein, this buffer stage has a depletion most.
5. mu balanced circuit according to claim 1, wherein, this amplifier stage is a transduction amplifier, have the differential amplifier and the gain circuitry that are in series, this differential amplifier is this feedback voltage and this reference voltage relatively, this gain circuitry provides output current in this first output terminal and this second output terminal according to the output of this differential amplifier.
6. mu balanced circuit according to claim 1, wherein, the voltage gain of this buffer stage is approximately 1.
7. mu balanced circuit according to claim 5, wherein, this amplifier stage only has a differential amplifier.
8. mu balanced circuit according to claim 1, wherein, this amplifier stage by this second output terminal, can make the voltage of this control end change between track to track.
9. operation amplifying circuit includes:
One amplifier stage in order to compare one first input signal and one second input signal, has a pair of first output terminal and one second output terminal; And
One plug-type buffer stage has an a pair of input end and an output terminal, this to input end to being connected to this to first output terminal;
Wherein, this second output terminal of this output terminal of this buffer stage and this amplifier stage drives an output load together;
The output impedance of this output terminal of this buffer stage is less than the output impedance of this second output terminal of this amplifier stage.
10. a mu balanced circuit is adjusted back voltage in order to provide one, includes:
One output stage has a power switch, and it has a control end, a power input and a power output end, and this power input couples a supply voltage, and this power output end provides this adjustment back voltage;
One amplifier stage in order to compare a feedback voltage and a reference voltage, has a pair of first output terminal and one second output terminal, and wherein, the about ratio of this feedback voltage is adjusted back voltage in this; And
One buffer stage has the plug-type amplifier of an AB class, and an a pair of input end and an output terminal are arranged, and this is connected to this to first output terminal to input end.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201010164676.6A CN102221840B (en) | 2010-04-19 | 2010-04-19 | Voltage-stabilizing circuit and operation amplifying circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201010164676.6A CN102221840B (en) | 2010-04-19 | 2010-04-19 | Voltage-stabilizing circuit and operation amplifying circuit |
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| Publication Number | Publication Date |
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| CN102221840A true CN102221840A (en) | 2011-10-19 |
| CN102221840B CN102221840B (en) | 2014-11-05 |
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| CN201010164676.6A Expired - Fee Related CN102221840B (en) | 2010-04-19 | 2010-04-19 | Voltage-stabilizing circuit and operation amplifying circuit |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103092243A (en) * | 2011-11-07 | 2013-05-08 | 联发科技（新加坡）私人有限公司 | Signal generating circuit |
| CN103279162A (en) * | 2013-04-19 | 2013-09-04 | 东南大学 | Low-power-consumption reference voltage buffer based on assembly line ADC |
| WO2018161430A1 (en) * | 2017-03-07 | 2018-09-13 | 深圳市大疆创新科技有限公司 | Rtc clock power supply circuit |
| CN109857182A (en) * | 2019-02-26 | 2019-06-07 | 钜泉光电科技(上海)股份有限公司 | A kind of linear voltage-stabilizing circuit and chip |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW413974B (en) * | 1994-12-01 | 2000-12-01 | Texas Instruments Inc | Circuit and method for regulating a voltage |
| US20020079935A1 (en) * | 2000-12-22 | 2002-06-27 | Rincon-Mora Gabriel A. | Buffer/driver for low dropout regulators |
| CN1873576A (en) * | 2006-05-11 | 2006-12-06 | 华润矽威科技（上海）有限公司 | Low voltage difference linear voltage regulator with high ripple suppression ratio of power supply |
| US7199565B1 (en) * | 2006-04-18 | 2007-04-03 | Atmel Corporation | Low-dropout voltage regulator with a voltage slew rate efficient transient response boost circuit |
| CN101292205A (en) * | 2005-08-18 | 2008-10-22 | 德克萨斯仪器德国股份有限公司 | Voltage regulator with low dropout voltage |
-
2010
- 2010-04-19 CN CN201010164676.6A patent/CN102221840B/en not_active Expired - Fee Related
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW413974B (en) * | 1994-12-01 | 2000-12-01 | Texas Instruments Inc | Circuit and method for regulating a voltage |
| US20020079935A1 (en) * | 2000-12-22 | 2002-06-27 | Rincon-Mora Gabriel A. | Buffer/driver for low dropout regulators |
| CN101292205A (en) * | 2005-08-18 | 2008-10-22 | 德克萨斯仪器德国股份有限公司 | Voltage regulator with low dropout voltage |
| US7199565B1 (en) * | 2006-04-18 | 2007-04-03 | Atmel Corporation | Low-dropout voltage regulator with a voltage slew rate efficient transient response boost circuit |
| CN1873576A (en) * | 2006-05-11 | 2006-12-06 | 华润矽威科技（上海）有限公司 | Low voltage difference linear voltage regulator with high ripple suppression ratio of power supply |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103092243A (en) * | 2011-11-07 | 2013-05-08 | 联发科技（新加坡）私人有限公司 | Signal generating circuit |
| CN103279162A (en) * | 2013-04-19 | 2013-09-04 | 东南大学 | Low-power-consumption reference voltage buffer based on assembly line ADC |
| CN103279162B (en) * | 2013-04-19 | 2015-01-28 | 东南大学 | Low-power-consumption reference voltage buffer based on assembly line ADC |
| WO2018161430A1 (en) * | 2017-03-07 | 2018-09-13 | 深圳市大疆创新科技有限公司 | Rtc clock power supply circuit |
| CN109857182A (en) * | 2019-02-26 | 2019-06-07 | 钜泉光电科技(上海)股份有限公司 | A kind of linear voltage-stabilizing circuit and chip |
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| Publication number | Publication date |
|---|---|
| CN102221840B (en) | 2014-11-05 |
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Granted publication date: 20141105 Termination date: 20200419 |