CN102156429B - Multifunctional collection control device of peripheral component interconnection standard interface - Google Patents

Multifunctional collection control device of peripheral component interconnection standard interface Download PDF

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CN102156429B
CN102156429B CN 201010555916 CN201010555916A CN102156429B CN 102156429 B CN102156429 B CN 102156429B CN 201010555916 CN201010555916 CN 201010555916 CN 201010555916 A CN201010555916 A CN 201010555916A CN 102156429 B CN102156429 B CN 102156429B
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module
external interface
fpga
chip
pga
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CN102156429A (en
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陈积明
史治国
王长陶
迪利敏
孙优贤
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Zhejiang University ZJU
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Zhejiang University ZJU
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Abstract

The invention discloses a multifunctional collection control device of a peripheral component interconnection standard interface. A first external interface and a second external interface of the multifunctional collection control device are respectively connected with an input end of an ADC (Analog-to-Digital Converter) module through respective PGA (Programmable Gain Amplifier) modules; a third external interface is connected with a third input end of the ADC module; an FPGA (Field Programmable Gate Array) module is connected with the third external interface through a DAC (Digital-to-Analog Converter) module and a differential module; the third external interface is connected with the FPGA module through a photoelectric coupling module; the FPGA module is respectively connected with the first and the second PGA modules, the ADC module and the third external interface; the FPGA module is finally connected to a PCI (Peripheral Component Interconnection) bus through a PCI bridge chip; and a power supply module supplies power to the device. By using the invention, data of three paths of analog input, two paths of differential encoding input and four paths of single-end digital input sensors are collected, and two paths of analog output, four pairs of differential output and two paths of digital output interfaces are provided to control peripheral equipment of multiple interfaces.

Description

The multi-functional acquisition control device of Peripheral Component Interconnect standard interface
Technical field
The present invention relates to industrial measurement and control field data collection and control device, especially relate to a kind of multi-functional acquisition control device of Peripheral Component Interconnect standard interface.
Background technology
Along with developing rapidly and the day by day raising of integrated circuit technique of computer hardware software engineering, the industrial measurement and control technology has obtained huge progress in China, and becoming most active in a computer technology application branch, computer measurement and control system has become most important Measurement and Control System in industrial and mining enterprises and the industrial system in recent years.
In the application system of industrial measurement and control, a kind of typical structure is various sensor signals to be concentrated collect on the industrial control computer, and then computing machine feeds back to control signal in the application system state of control system by the processing to signal data.And the interface that the most often uses on the industrial control computer is Peripheral Component Interconnect standard (Peripheral Component Interconnection is called for short PCI) bus interface, computing machine uses pci interface to obtain data from application system, and by pci interface the application system is controlled, having the advantages such as high speed is stable, is the preferred option in industrial measurement and control field.It is little that present various harvesters based on pci interface exist the collection signal scope, the shortcomings such as the input and output sensor interface is few, sensor interface is limited, therefore provide a kind of based on the multiple multi-form input and output sensor interface of having of pci interface, the multifunctional signal acquisition control device that can carry out large gain margin amplification to collection signal is very necessary.
Summary of the invention
In order to realize that the sensor interface to multiple multi-form input and output carries out pci data collection and control thereof on the industrial system, the object of the present invention is to provide a kind of multi-functional acquisition control device of Peripheral Component Interconnect standard interface.
The technical solution used in the present invention is:
The present invention includes the first external interface, the second external interface, a PGA module, the 2nd PGA module, ADC module, the 3rd external interface, DAC module, difference block, photoelectric coupling module, FPGA module, pci bridge chip, pci bus and power module; The first external interface is linked the first input end of ADC module by a PGA module, the second external interface is linked the second input end of ADC module by the 2nd PGA module, the 3rd external interface links to each other with the 3rd input end of ADC module, the ADC module links to each other with the FPGA module, the FPGA module is connected with the 3rd external interface respectively by DAC module and difference block, the 3rd external interface is connected with the FPGA module by the photoelectric coupling module, the FPGA module respectively with a PGA module, the 2nd PGA module and the 3rd external interface connect, the FPGA module is connected on the pci bus by pci bridge chip at last, power module is powered to device, and its input voltage+5V is provided by the mainboard of computing machine.
Described the first external interface adopts respectively identical DB9 interface with the second external interface; The 3rd external interface adopts the DB25 interface.
A described PGA module and the 2nd PGA module form by PGA204AP chip and AD526 chip.
Described ADC module adopts the ADS7825P chip, and the ADC module is connected to the digital signal of output the input end of FPGA module through the ALVC164245 chip, and the control signal wire of simultaneously FPGA module output is connected to the input end of ADC module and ALVC164245 chip; Described FPGA module is take the fpga chip XC3S50 of the SPARTAN series of Xilinx company as core.
Described DAC module adopts the AD5725ARSZ chip; Described difference block adopts the SN75174 chip, and FPGA module output terminal is connected to the input end of the 3rd external interface after single-ended difference; Described photoelectric coupling module is comprised of TLP521-2 chip, TLP521-4 chip and HD74HC14P chip, the differential coding input of the 3rd external interface and single-ended digital quantity input signal are connected to the FPGA module through the photoelectric coupling module input end.
Described pci bridge chip adopts the PCI9052 interface chip of PLX company, and pci bridge chip one end is connected with the FPGA module, and the other end is connected with pci bus.
Described pci bus meets the pci bus agreement, and pci bus one end is connected with pci bridge chip, and the other end is inserted in the interior arbitrary PCI slot of computer motherboard.
Its voltage of described power module is input as+5V, is provided by the mainboard on the computing machine, and output provides direct current+3.3V ,+2.5V and+1.2V ,+3.3V provides reference voltage for FPGA ,+2.5V provides boosting voltage for FPGA ,+1.2V provides inner core voltage for FPGA.
The present invention compares with background technology, and the beneficial effect that has is:
Harvester than other peripheral component interconnect standard interface, the multi-functional acquisition control device of Peripheral Component Interconnect standard interface provided by the invention can gather control to multiple multi-form input and output sensor interface, can be to three road analog input sensors, two-pass DINSAR coding input sensor and four tunnel single-ended digital quantity input pickups carry out data acquisition, and can provide the two-way analog output interface circuit, the four pairs of difference output interfaces and two-way digital output interface satisfy the multi-functional collection control requirement in the complicated TT﹠C system so that the multiple interfaces external unit is controlled.
Description of drawings
Fig. 1 is structural principle block diagram of the present invention.
Fig. 2 is the circuit diagram of the first external interface of Fig. 1.
Fig. 3 is the circuit diagram of the 3rd external interface of Fig. 1.
Fig. 4 and Fig. 5 are the circuit diagrams of the PGA module of Fig. 1.
Fig. 6 to Fig. 8 is the circuit diagram of the photoelectric coupling module of Fig. 1.
Fig. 9 is the circuit diagram of the DAC module of Fig. 1.
Figure 10 is the circuit diagram of the difference block of Fig. 1.
Figure 11 is the circuit diagram of the ADC module of Fig. 1.
Figure 12 is the circuit diagram of the ALVC164245 chip of the connection ADC module of Fig. 1 and FPGA module.
Figure 13 is the circuit diagram of the FPGA module of Fig. 1.
Figure 14 is the circuit diagram of the ALVC164245 chip of the connection FPGA module of Fig. 1 and pci bridge chip.
Figure 15 be Fig. 1 be the circuit diagram of pci bridge chip.
Figure 16 is the circuit diagram of the pci bus (PCI BUS) of Fig. 1.
Among the figure, 1, the first external interface, 2, the second external interface, 3, the one PGA module (ProgrammableGain Amplifier is called for short PGA), 4, the 2nd PGA module, 5, ADC module (Analog-to-digitalConverter is called for short ADC), 6, the 3rd external interface, 7, DAC module (Digital-to-analog Converter is called for short DAC), 8, difference block, 9, the photoelectric coupling module, 10, FPGA module (Field ProgrammableGate Array is called for short FPGA), 11, pci bridge chip (Peripheral Component Interconnection is called for short PCI), 12, pci bus, 13, power module.
Embodiment
The present invention is further illustrated below in conjunction with drawings and Examples.
The multi-functional acquisition control device of Peripheral Component Interconnect standard interface of the present invention, its general principles block diagram comprises the first external interface 1, the second external interface 2, a PGA module 3, the 2nd PGA module 4, ADC module 5, the 3rd external interface 6, DAC module 7, difference block 8, photoelectric coupling module 9, FPGA module 10, pci bridge chip 11, pci bus 12 and power module 13 as shown in Figure 1; The first external interface 1 is linked the first input end of ADC module 5 by a PGA module 3, the second external interface 2 is linked the second input end of ADC module 5 by the 2nd PGA module 4, the 3rd external interface 6 links to each other with the 3rd input end of ADC module 5, ADC module 5 links to each other with FPGA module 10, FPGA module 10 is connected with the 3rd external interface 6 respectively by DAC module 7 and difference block 8, the 3rd external interface 6 is connected with FPGA module 10 by photoelectric coupling module 9, FPGA module 10 respectively with a PGA module 3, the 2nd PGA module 4 and the 3rd external interface 6 connect, FPGA module 10 is connected on the pci bus 12 at last by pci bridge chip 11, power module 13 is to the device power supply, and its input voltage+5V is provided by the mainboard of computing machine.
Described the first external interface 1 adopts respectively identical DB9 interface with the second external interface 2, and wherein the circuit diagram of the first external interface 1 as shown in Figure 2; Two-way simulating signal VOUTA and the VOUTB of DAC module 7 outputs of Fig. 9 output on the interface, be respectively the first external interface 1 and the second external interface 2 switch zeroing signal is provided; The circuit connection diagram of the first external interface 1 and a PGA module 3 such as Fig. 2, Fig. 4 and shown in Figure 5; The circuit connection method of the second external interface 2 and the 2nd PGA module 4 is in like manner in the circuit connection method of the first external interface 1 and a PGA module 3.
The 3rd external interface 6 adopts the DB25 interface among Fig. 1, the circuit connection diagram of the 3rd external interface 6 as shown in Figure 3, one tunnel simulating signal of the 3rd external interface 6 is connected to the input end of ADC module 5, be connected to the ADIN3 input end of Figure 11 analog to digital converter such as the ADIN3 of Fig. 3, for analog to digital converter provides one tunnel simulating signal; Two output terminals of FPGA module 10 are connected with DO1p with the single-ended digital quantity input end DO0p of the 3rd external interface 6 by two triodes, can carry out switch control to external sensor; The output terminal of FPGA module 10 is connected on the 3rd external interface 6 through difference block 8, such as Figure 13, Figure 10 and shown in Figure 3, controls rotating speed, the direction of external motor by fpga chip like this and externally does switch control; The output terminal of FPGA module 10 is connected on the 3rd external interface 6 through DAC module 7, such as Figure 13, Fig. 9 and shown in Figure 3, after amplifying through the LM358 chip, the wherein two-way simulating signal DAOUT0 of the 12 position digital signals process digital to analog converter AD5725ARSZ output of FPGA module 10 outputs and DAOUT1 be connected on the input end DAOUT0 and DAOUT1 of the 3rd external interface 6; The 3rd external interface 6 is connected to the input end of FPGA module 10 through photoelectric coupling module 9, physical circuit connection layout such as Fig. 3, Fig. 6, Fig. 7, Fig. 8 and shown in Figure 13.
A PGA module 3 and the 2nd PGA module 4 form by PGA204AP chip and AD526 chip among Fig. 1; The input end of the one PGA module 3 is connected with FPGA module 10 with the first external interface 1, circuit connection diagram such as Fig. 2, Fig. 4, Fig. 5 and shown in Figure 13; The output terminal of the one PGA module 3 is connected with ADC module 5, circuit connection diagram such as Fig. 5 and shown in Figure 11, outputting analog signal ADIN0 after the simulating signal of the first external interface 1 input is amplified through a PGA module 3, ADIN0 is connected to the input end of ADC module 5, for it provides one tunnel simulating signal, the output terminal 2041A0 of FPGA module 10 and 2041A1 are connected to the respective input of PGA204AP chip, the output terminal 5261A0 of FPGA module 10,5261A1 and 5261A2 are connected to the respective input of AD526 chip, can control with FPGA module 10 like this enlargement factor of a PGA module 3; The connection method of the 2nd PGA module 4 and ADC module 5 and FPGA module 10 is in like manner in the connection method of a PGA module 3 and ADC module 5 and FPGA module 10.
ADC module 5 is comprised of the ADS7825P chip among Fig. 1, the ADS7825P chip is four channels, the analog to digital converter of 16bit sampling, the input end of ADC module 5 is connected with a PGA module 3, the 2nd PGA module 4 and the 3rd external interface 6, ADC module 5 is connected to the digital signal of output the input end of FPGA module 10, its circuit connection diagram such as Fig. 3, Fig. 5, Figure 11, Figure 12 and shown in Figure 13 through the ALVC164245 chip; The ADIN1 of the ADIN3 of Fig. 3, the ADIN0 of Fig. 5 and 4 outputs of the 2nd PGA module is connected to ADC module 5 corresponding input ends, for ADC module 5 provides three tunnel simulating signals, 8 position digital signal 7824_5D0 to 7824_5D7 of ADC module 5 outputs are connected to the corresponding input end of ALVC164245 chip, 8 position digital signal AD_D0 to AD_D7 of ALVC164245 chip output are connected to FPGA module 10 corresponding input ends, and the control signal wire of simultaneously FPGA module 10 outputs is connected to the input end of ADC module 5 and ALVC164245 chip.
FPGA module 10 is connected with pci bridge chip 11 with a PGA module 3, the 2nd PGA module 4, ADC module 5, the 3rd external interface 6, DAC module 7, difference block 8, photoelectric coupling module 9 respectively take the fpga chip XC3S50 of the SPARTAN series of Xilinx company as core among Fig. 1.
DAC module 7 is comprised of the AD5725ARSZ chip among Fig. 1, and the AD5725ARSZ chip is 12 a bit parallels input, the digital to analog converter of Voltage-output; FPGA module 10 output terminals are connected to the input end of the 3rd external interface 6 through DAC module 7, its circuit connection diagram such as Figure 13, Fig. 9 and shown in Figure 3, FPGA module 10 provides 12 digital signal and number control signal for DAC module 7, after amplifying through the LM358 chip, the two-way simulating signal DAOUT0 of DAC module 7 outputs and DAOUT1 be connected to the input end of the 3rd external interface 6, the in addition two-way simulating signal of DAC module 7 output is connected on the interface, for the first external interface 1 and the second external interface 2 provide switch zeroing signal.
Difference block 8 is comprised of the SN75174 chip among Fig. 1, FPGA module 10 output terminals are connected with the 3rd external interface 6 after single-ended difference, its circuit connection diagram such as Figure 13, Figure 10 and shown in Figure 3, like this can with FPGA module 10 control external motor rotating speed, turn to and externally do switch control.
Photoelectric coupling module 9 is comprised of TLP521-2 chip, TLP521-4 chip and HD74HC14P chip among Fig. 1, differential coding input PAIN+, PAIN-, PBIN+ and the PBIN-of the 3rd external interface 6 and single-ended digital quantity input signal DIN0 to DIN3 are connected to FPGA module 10 through photoelectric coupling module 9 input end, for FPGA module 10 provides voltage regulation signal, its physical circuit connection layout such as Fig. 3, Fig. 6, Fig. 7, Fig. 8 and shown in Figure 13.
Pci bridge chip 11 adopts the PCI9052 interface chip of PLX company among Fig. 1, and pci bridge chip 11 1 ends are connected with FPGA module 10 by the ALVC164245 chip, and to shown in Figure 15, the other end is connected with pci bus 12, such as Figure 15 and shown in Figure 16 such as Figure 13.
Pci bus 12 meets the pci bus agreement among Fig. 1, and pci bus 12 1 ends are connected with pci bridge chip 11, and such as Figure 16 and shown in Figure 15, the other end is inserted in the interior arbitrary PCI slot of computer motherboard.
Power module 13 its voltages are input as+5V among Fig. 1, are provided by the mainboard on the computing machine, and output provides direct current+3.3V ,+2.5V and+1.2V ,+3.3V provides reference voltage for FPGA ,+2.5V provides boosting voltage for FPGA ,+1.2V provides inner core voltage for FPGA.

Claims (8)

1. the multi-functional acquisition control device of a Peripheral Component Interconnect standard interface is characterized in that: comprise the first external interface (1), the second external interface (2), a PGA module (3), the 2nd PGA module (4), ADC module (5), the 3rd external interface (6), DAC module (7), difference block (8), photoelectric coupling module (9), FPGA module (10), pci bridge chip (11), pci bus (12) and power module (13); The first external interface (1) is linked the first input end of ADC module (5) by a PGA module (3), the second external interface (2) is linked the second input end of ADC module (5) by the 2nd PGA module (4), the 3rd external interface (6) links to each other with the 3rd input end of ADC module (5), ADC module (5) links to each other with FPGA module (10), FPGA module (10) is connected with the 3rd external interface (6) respectively by DAC module (7) and difference block (8), the 3rd external interface (6) is connected with FPGA module (10) by photoelectric coupling module (9), FPGA module (10) respectively with a PGA module (3), the 2nd PGA module (4) and the 3rd external interface (6) connect, FPGA module (10) is connected on the pci bus (12) at last by pci bridge chip (11), power module (13) is to the device power supply, and its input voltage+5V is provided by the mainboard of computing machine.
2. the multi-functional acquisition control device of a kind of Peripheral Component Interconnect standard interface according to claim 1, it is characterized in that: described the first external interface (1) adopts respectively identical DB9 interface with the second external interface (2); The 3rd external interface (6) adopts the DB25 interface.
3. the multi-functional acquisition control device of a kind of Peripheral Component Interconnect standard interface according to claim 1 is characterized in that: a described PGA module (3) and the 2nd PGA module (4) form by PGA204AP chip and AD526 chip.
4. the multi-functional acquisition control device of a kind of Peripheral Component Interconnect standard interface according to claim 1, it is characterized in that: described ADC module (5) adopts the ADS7825P chip, ADC module (5) is connected to the digital signal of output the input end of FPGA module (10) through the ALVC164245 chip, the control signal wire of simultaneously FPGA module (10) output is connected to the input end of ADC module (5) and ALVC164245 chip; Described FPGA module (10) is take the fpga chip XC3S50 of the SPARTAN series of Xilinx company as core.
5. the multi-functional acquisition control device of a kind of Peripheral Component Interconnect standard interface according to claim 1 is characterized in that: described DAC module (7) employing AD5725ARSZ chip; Described difference block (8) adopts the SN75174 chip, and FPGA module (10) output terminal is connected to the input end of the 3rd external interface (6) after single-ended difference; Described photoelectric coupling module (9) is comprised of TLP521-2 chip, TLP521-4 chip and HD74HC14P chip, the differential coding input of the 3rd external interface (6) and single-ended digital quantity input signal are connected to FPGA module (10) through photoelectric coupling module (9) input end.
6. the multi-functional acquisition control device of a kind of Peripheral Component Interconnect standard interface according to claim 1, it is characterized in that: described pci bridge chip (11) adopts the PCI9052 interface chip of PLX company, pci bridge chip (11) one ends are connected with FPGA module (10), and the other end is connected with pci bus (12).
7. the multi-functional acquisition control device of a kind of Peripheral Component Interconnect standard interface according to claim 1, it is characterized in that: described pci bus (12) meets the pci bus agreement, pci bus (12) one ends are connected with pci bridge chip (11), and the other end is inserted in the interior arbitrary PCI slot of computer motherboard.
8. the multi-functional acquisition control device of a kind of Peripheral Component Interconnect standard interface according to claim 1, it is characterized in that: described power module (13) output provides direct current+3.3V, + 2.5V and+1.2V, + 3.3V provides reference voltage for FPGA, + 2.5V provides boosting voltage for FPGA, and+1.2V provides inner core voltage for FPGA.
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CN104571070A (en) * 2013-10-16 2015-04-29 上海航天计算机技术研究所 Modality-triggering excitation signal sending device based on PCI (peripheral component interconnect) bus
CN104965469B (en) * 2015-07-06 2018-09-18 浙江大学 Multi-functional acquisition control device based on cpci bus standard

Citations (4)

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KR20020028534A (en) * 2000-10-10 2002-04-17 조용범 PCI bus controller having DMA interface and HPI of DSP
CN101794268A (en) * 2010-03-16 2010-08-04 中国电子科技集团公司第十四研究所 Processing module capable of reconstructing signals based on VPX bus
WO2010145076A1 (en) * 2009-06-18 2010-12-23 深圳粤和通科技有限公司 Sonet/sdh interface device
CN202008597U (en) * 2010-11-19 2011-10-12 浙江大学 Multifunctional acquisition control device for peripheral component interconnection standard interfaces

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20020028534A (en) * 2000-10-10 2002-04-17 조용범 PCI bus controller having DMA interface and HPI of DSP
WO2010145076A1 (en) * 2009-06-18 2010-12-23 深圳粤和通科技有限公司 Sonet/sdh interface device
CN101794268A (en) * 2010-03-16 2010-08-04 中国电子科技集团公司第十四研究所 Processing module capable of reconstructing signals based on VPX bus
CN202008597U (en) * 2010-11-19 2011-10-12 浙江大学 Multifunctional acquisition control device for peripheral component interconnection standard interfaces

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