CN101958246B - Extend the method for photoresist Acceptable life - Google Patents

Extend the method for photoresist Acceptable life Download PDF

Info

Publication number
CN101958246B
CN101958246B CN201010229380.8A CN201010229380A CN101958246B CN 101958246 B CN101958246 B CN 101958246B CN 201010229380 A CN201010229380 A CN 201010229380A CN 101958246 B CN101958246 B CN 101958246B
Authority
CN
China
Prior art keywords
photoresist
silicon dioxide
low temperature
deposition silicon
acceptable life
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201010229380.8A
Other languages
Chinese (zh)
Other versions
CN101958246A (en
Inventor
朱骏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai IC R&D Center Co Ltd
Original Assignee
Shanghai Integrated Circuit Research and Development Center Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shanghai Integrated Circuit Research and Development Center Co Ltd filed Critical Shanghai Integrated Circuit Research and Development Center Co Ltd
Priority to CN201010229380.8A priority Critical patent/CN101958246B/en
Publication of CN101958246A publication Critical patent/CN101958246A/en
Application granted granted Critical
Publication of CN101958246B publication Critical patent/CN101958246B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Abstract

The present invention proposes a kind of method extending photoresist Acceptable life, comprises the following steps: to provide semi-conductive substrate; Be coated with bottom antireflective coating on the semiconductor substrate; Described bottom antireflective coating is coated with photoresist; Utilize low temperature deposition silicon dioxide technology, after completing the coating of described photoresist, at its outer surface deposition silicon dioxide film.When needs use said structure, first use wet etching to remove the silica membrane on said structure surface, then carry out photoetching, etching operation.The method of the prolongation photoresist Acceptable life that the present invention proposes, be characterized in utilizing low temperature deposition silicon dioxide (LTO) technology, after completing photoresist coating, at its outer surface deposition film silicon dioxide to guarantee that material is not subject to the impact of external environment condition.

Description

Extend the method for photoresist Acceptable life
Technical field
The present invention relates to field of IC technique, particularly a kind of method extending photoresist Acceptable life.
Background technology
Photoetching technique is with the continuous progress of integrated circuit fabrication process, constantly reducing of live width, the area of semiconductor device is just becoming more and more less, and the layout of semiconductor, from common simple function discrete device, develops into the integrated circuit integrating high-density multifunction; By initial IC (integrated circuit) subsequently to LSI (large scale integrated circuit), VLSI (very lagre scale integrated circuit (VLSIC)), until the ULSI of today (ultra large scale integrated circuit), the area of device reduces further, and function is more comprehensively powerful.Consider the complexity of technique research and development, the restriction of chronicity and high cost etc. unfavorable factor, on the basis of prior art level, how to improve the integration density of device further, reduce the area of chip, as much as possiblely on same piece of silicon chip obtain effective chip-count, thus raising overall interests, more and more will be subject to chip designer, the attention of manufacturer.
Along with the intensification of technological cooperation, become the common modality for co-operation of one of semiconductor industry across enterprise, transnational cooperation and multizone cooperation.This wherein just comprises the situation of mutual assist, technique between Semiconductor enterprises.After completing coating technique in a semiconductor production factory wherein, another factory of family is delivered in silicon chip packing to carry out exposing, develop and even etching, this situation often occurs.But due to constantly striding forward of technology, photoresist is also more and more harsher to the requirement of environment, after the gluing of 3-5 in the past, useful life is shortened to several hours, and this is just for this modality for co-operation is provided with obstacle.
Summary of the invention
The present invention proposes a kind of method extending photoresist Acceptable life, be characterized in utilizing low temperature deposition silicon dioxide (LTO) technology, after completing photoresist coating, at its outer surface deposition film silicon dioxide to guarantee that material is not subject to the impact of external environment condition.
In order to achieve the above object, the present invention proposes a kind of method extending photoresist Acceptable life, comprises the following steps:
Semi-conductive substrate is provided;
Be coated with bottom antireflective coating on the semiconductor substrate;
Described bottom antireflective coating is coated with photoresist;
Utilize low temperature deposition silicon dioxide technology, after completing the coating of described photoresist, at its outer surface deposition silicon dioxide film.
Further, when needs use said structure, first use wet etching to remove the silica membrane on said structure surface, then carry out photoetching, etching operation.
Further, the deposition temperature of described low temperature deposition silicon dioxide technology is 100 ~ 200 degree.
Further, the deposition temperature of described low temperature deposition silicon dioxide technology is 100 degree.
Further, the silica-film thickness of described low temperature deposition silicon dioxide technology institute deposit is 1 nanometer ~ 1000 nanometer.
Further, the silica-film thickness of described low temperature deposition silicon dioxide technology institute deposit is 5 nanometers.
Further, described wet etching is removed described silica membrane and is adopted hydrofluoric acid, oxide etching buffer solution or ammoniacal liquor.
The method of the prolongation photoresist Acceptable life that the present invention proposes, be characterized in utilizing low temperature deposition silicon dioxide (LTO) technology, after completing photoresist coating, at its outer surface deposition film silicon dioxide to guarantee that material is not subject to the impact of external environment condition.When deployed, first use wet method removal surface silica dioxide, then photoetching, etched features.Entered experimental verification, the life-span of photoresist can be extended to 1-2 days by original several hours by this mode, and made to be carried out across factory, trans-regional cooperation.
Accompanying drawing explanation
Figure 1 shows that the schematic diagram being coated with bottom antireflective coating and photoresist on substrate.
Figure 2 shows that the schematic diagram of low temperature deposition silicon dioxide.
Figure 3 shows that wet etching removes silica membrane, then carry out the schematic diagram of photoetching, etching operation.
Embodiment
In order to more understand technology contents of the present invention, institute's accompanying drawings is coordinated to be described as follows especially exemplified by specific embodiment.
Please refer to Fig. 1 and Fig. 2, Figure 1 shows that the schematic diagram being coated with bottom antireflective coating and photoresist on substrate, Figure 2 shows that the schematic diagram of low temperature deposition silicon dioxide.The present invention proposes a kind of method extending photoresist Acceptable life, comprises the following steps:
Semi-conductive substrate 100 is provided;
Described Semiconductor substrate 100 is coated with bottom antireflective coating 200;
Described bottom antireflective coating 200 is coated with photoresist 300;
Utilize low temperature deposition silicon dioxide technology, after completing the coating of described photoresist 300, at its outer surface deposition silicon dioxide film 400.
Further, the deposition temperature of described low temperature deposition silicon dioxide technology is 100 ~ 200 degree, and the silica-film thickness of described low temperature deposition silicon dioxide technology institute deposit is 1 nanometer ~ 1000 nanometer.
According to present pre-ferred embodiments, the deposition temperature of described low temperature deposition silicon dioxide technology is 100 degree, and silica membrane 400 thickness of described low temperature deposition silicon dioxide technology institute deposit is 5 nanometers.
Please refer to Fig. 3 again, Figure 3 shows that wet etching removes silica membrane, then carry out the schematic diagram of photoetching, etching operation.When needs use said structure, first use wet etching to remove the silica membrane 400 on said structure surface, then carry out photoetching, etching operation.
Further, described wet etching is removed described silica membrane and is adopted hydrofluoric acid, oxide etching buffer solution or ammoniacal liquor.
According to present pre-ferred embodiments, the present invention adopts hydrofluoric acid wet etching to remove described silica membrane 400.
In sum, the method of the prolongation photoresist Acceptable life that the present invention proposes, be characterized in utilizing low temperature deposition silicon dioxide (LTO) technology, after completing photoresist coating, at its outer surface deposition film silicon dioxide to guarantee that material is not subject to the impact of external environment condition.When deployed, first use wet method removal surface silica dioxide, then photoetching, etched features.Entered experimental verification, the life-span of photoresist can be extended to 1-2 days by original several hours by this mode, and made to be carried out across factory, trans-regional cooperation.
Although the present invention with preferred embodiment disclose as above, so itself and be not used to limit the present invention.Persond having ordinary knowledge in the technical field of the present invention, without departing from the spirit and scope of the present invention, when being used for a variety of modifications and variations.Therefore, protection scope of the present invention is when being as the criterion depending on those as defined in claim.

Claims (6)

1. extend a method for photoresist Acceptable life, it is characterized in that, comprise the following steps:
Semi-conductive substrate is provided;
Be coated with bottom antireflective coating on the semiconductor substrate;
Described bottom antireflective coating is coated with photoresist;
Utilize low temperature deposition silicon dioxide technology, after completing the coating of described photoresist, at its outer surface deposition silicon dioxide film;
Wherein, when needing to carry out photoetching and etching to the photoresist structure of above-mentioned deposition silicon dioxide film, first using wet etching to remove the silica membrane on said structure surface, then carrying out photoetching, etching operation.
2. the method for prolongation photoresist Acceptable life according to claim 1, is characterized in that, the deposition temperature of described low temperature deposition silicon dioxide technology is 100 ~ 200 degree.
3. the method for prolongation photoresist Acceptable life according to claim 2, is characterized in that, the deposition temperature of described low temperature deposition silicon dioxide technology is 100 degree.
4. the method for prolongation photoresist Acceptable life according to claim 1, is characterized in that, the silica-film thickness of described low temperature deposition silicon dioxide technology institute deposit is 1 nanometer ~ 1000 nanometer.
5. the method for prolongation photoresist Acceptable life according to claim 4, is characterized in that, the silica-film thickness of described low temperature deposition silicon dioxide technology institute deposit is 5 nanometers.
6. the method for prolongation photoresist Acceptable life according to claim 1, is characterized in that, described wet etching is removed described silica membrane and adopted hydrofluoric acid, oxide etching buffer solution or ammoniacal liquor.
CN201010229380.8A 2010-07-16 2010-07-16 Extend the method for photoresist Acceptable life Expired - Fee Related CN101958246B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201010229380.8A CN101958246B (en) 2010-07-16 2010-07-16 Extend the method for photoresist Acceptable life

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201010229380.8A CN101958246B (en) 2010-07-16 2010-07-16 Extend the method for photoresist Acceptable life

Publications (2)

Publication Number Publication Date
CN101958246A CN101958246A (en) 2011-01-26
CN101958246B true CN101958246B (en) 2015-08-12

Family

ID=43485511

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201010229380.8A Expired - Fee Related CN101958246B (en) 2010-07-16 2010-07-16 Extend the method for photoresist Acceptable life

Country Status (1)

Country Link
CN (1) CN101958246B (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59193446A (en) * 1983-04-18 1984-11-02 Toyo Ink Mfg Co Ltd Photosensitive laminate
US6242344B1 (en) * 2000-02-07 2001-06-05 Institute Of Microelectronics Tri-layer resist method for dual damascene process
CN101202244A (en) * 2006-12-15 2008-06-18 中芯国际集成电路制造(上海)有限公司 Method for removing photoresist graphical in forming process of dual embedded structure
CN101364537A (en) * 2007-08-09 2009-02-11 中芯国际集成电路制造(上海)有限公司 Manufacturing method for grid and semiconductor device, construction for manufacturing grid

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59193446A (en) * 1983-04-18 1984-11-02 Toyo Ink Mfg Co Ltd Photosensitive laminate
US6242344B1 (en) * 2000-02-07 2001-06-05 Institute Of Microelectronics Tri-layer resist method for dual damascene process
CN101202244A (en) * 2006-12-15 2008-06-18 中芯国际集成电路制造(上海)有限公司 Method for removing photoresist graphical in forming process of dual embedded structure
CN101364537A (en) * 2007-08-09 2009-02-11 中芯国际集成电路制造(上海)有限公司 Manufacturing method for grid and semiconductor device, construction for manufacturing grid

Also Published As

Publication number Publication date
CN101958246A (en) 2011-01-26

Similar Documents

Publication Publication Date Title
CN101399188A (en) Manufacturing method, manufacturing apparatus, control program and program recording medium of semicontructor device
US9209083B2 (en) Integrated circuit manufacturing for low-profile and flexible devices
CN101625968B (en) Method for improving wet etching performance
CN103663357B (en) The lithographic method of silicon
CN102737961B (en) Method for reducing collapsing or shift of photoresist (PR) mask
US8785303B2 (en) Methods for depositing amorphous silicon
US9368407B2 (en) Crack control for substrate separation
CN103021840A (en) Method for preventing over etching of passivation layers
CN105584986A (en) A deep silicon hole etching method
CN101958246B (en) Extend the method for photoresist Acceptable life
CN101625999A (en) Manufacturing method of SONOS storage
CN102037544A (en) Helium descumming
CN103972082A (en) Method for preventing pattern loss and wafer manufacturing method capable of preventing pattern loss
CN1691304B (en) Polysilicon layer buffering local field silicon oxide structure technique for suppressing polysilicon pinhole
US10566204B2 (en) Etching and mechanical grinding film-layers stacked on a semiconductor substrate
CN101943855B (en) Phase shift mask plate structure and manufacture method thereof
US11500293B2 (en) Patterning material film stack with hard mask layer configured to support selective deposition on patterned resist layer
CN102201336A (en) Method for removing residue of etched oxide layer on semiconductor device layer
CN101770161B (en) Method for manufacturing phase shift mask plate and structure thereof
CN110931421A (en) Shallow trench isolation structure and manufacturing method
CN103839885A (en) Method for removing defects
CN110797298A (en) Electronic device and preparation method thereof
CN104810268A (en) Groove-type power device gate oxide layer preparation method
KR102153515B1 (en) Sacrificial material for stripping masking layers
US8912091B2 (en) Backside metal ground plane with improved metal adhesion and design structures

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20150812

CF01 Termination of patent right due to non-payment of annual fee