CN101789420A - System-in-a-package (SIP) structure of semiconductor device and manufacturing method thereof - Google Patents
System-in-a-package (SIP) structure of semiconductor device and manufacturing method thereof Download PDFInfo
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- CN101789420A CN101789420A CN201010104887A CN201010104887A CN101789420A CN 101789420 A CN101789420 A CN 101789420A CN 201010104887 A CN201010104887 A CN 201010104887A CN 201010104887 A CN201010104887 A CN 201010104887A CN 101789420 A CN101789420 A CN 101789420A
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- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
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- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
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- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
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Abstract
The invention relates to a system-in-a-package (SIP) structure of a semiconductor device, comprising a passive component, a base plate, a pad, a first chip, a second chip and a plastic package material, wherein the first chip is larger than the second chip in size. The invention also relates to a method for manufacturing the system-in-a-package (SIP) structure of the semiconductor device. The first chip is arranged on the base plate and is connected with the pad on the base plate by a first bonding wire, the second chip is arranged on the passive component or a geometric body made from high heat conduction material and is connected with by the pad on the base plate by a second bonding wire, so that the second chip can be place right above the first chip in a suspended manner; the plastic package material encapsulates the first chip, the second chip, the passive component, the first bonding wire and the second bonding wire. The invention has the advantages of small packaging size, small packaging density and good frequency response, thus meeting electric property requirements on system-in-a-package.
Description
Technical field
The present invention relates to the system-in-package structure and the manufacture method thereof of a kind of semiconductor device in the semiconductor packaging field, particularly relate to a kind of can be when being applied to the system-level Plastic Package of semiconductor device the unsettled technology that is placed on directly over the small size chip of large size chip.
Background technology
Semiconductor integrated circuit and semiconductor device are all electronic product most important component at present, and wherein the quantity maximum is integrated circuit and the discrete device that adopts Plastic Package.In order to make the semiconductor device after the Plastic Package have more strong functions, multiple functional chip, comprise as functional chips such as processor, memories even can also be that passive devices such as electric capacity are integrated in the packaging body, thereby realize a complete substantially function, claim that usually this encapsulation pattern is a system in package.
In system in package, if desired the chip of different size and passive device are encapsulated in the packaging body, common method for packing is that the chip of different size is assemblied on the substrate, as Fig. 1 side by side.The main flow process of its Plastic Package is as follows: earlier passive device 1 usefulness soldering paste 2 is installed on the pad 3 on the substrate 4, then respectively first chip, 5 usefulness, the first insulation glued membrane 6 is contained on the substrate 4, second chip, 8 usefulness, the second insulation glued membrane 9 is contained on the substrate 4, again first chip 5 and second chip 8 are electrically connected with first bonding wire 7 and second bonding wire 10 and corresponding pad 3 on the substrate 4 respectively, use plastic packaging material 11 first chip 5 at last, second chip 8, passive device 1, first bonding wire 7 and second bonding wire 10, insulate whole devices such as glued membrane 9 and soldering paste 2 and material of the first insulation glued membrane 6 and second sealed, wherein, the size of first chip 5 is less than second chip 8.Pad 3 in the substrate 4 by with substrate 4 in copper wiring 12 connect with weld pad 13 in the substrate 4, thereby device and extraneous being electrically connected that realization is sealed by plastic packaging material 11, wherein, weld pad 13 can be directly as the input and output terminal of whole system level encapsulation body, as Fig. 1; Also can weld soldered ball 14 again on weld pad 13, soldered ball 14 is as the input and output terminal of whole system level encapsulation body, its packing forms such as Fig. 2.The system-in-package structure of this semiconductor device and the weak point of manufacture method are that encapsulation volume is big and packaging density is low.
Another known method as shown in Figure 3 and Figure 4.It is as follows that its plastic packaging encapsulates main flow process: earlier passive device 1 usefulness soldering paste 2 is installed on the pad 3 on the substrate 4, then second chip, 8 usefulness, the second insulation glued membrane 9 is contained on the substrate 4, again first chip, 5 usefulness, the first insulation glued membrane 6 is contained on second chip 8, with second bonding wire 10 second chip 8 is connected with corresponding bonding pad 3 on the substrate 4 earlier then, with first bonding wire 7 first chip 5 is connected with corresponding bonding pad 3 on the substrate 4 again, use plastic packaging material 11 first chip 5 at last, second chip 8, passive device 1, first bonding wire 7 and second bonding wire 10, insulate whole devices such as glued membrane 9 and soldering paste 2 and material of the first insulation glued membrane 6 and second sealed, wherein, the size of first chip 5 is less than second chip 8.Pad 3 in the substrate 4 by with substrate 4 in copper wiring 12 connect with weld pad 13 in the substrate 4, thereby device and extraneous being electrically connected that realization is sealed by plastic packaging material 11, wherein weld pad 13 can be directly as the input and output terminal of whole system level encapsulation body, as Fig. 3; Also can weld soldered ball 14 again on weld pad 13, soldered ball 14 is as the input and output terminal of whole system level encapsulation body, its packing forms such as Fig. 4.The system-in-package structure of this semiconductor device and the weak point of manufacture method are that packaging density is low, bigger deficiency is when first chip 5 is radio circuit, first bonding wire, the 7 oversize meetings that connect the pad 3 on the substrate 4 cause frequency response poor, can't satisfy the electric property requirement of system in package.
Summary of the invention
Technical problem to be solved by this invention provides a kind of system-in-package structure of semiconductor device, makes that the system-in-package structure package dimension of semiconductor device is little, the packaging density height, and frequency response is good.
The technical solution adopted for the present invention to solve the technical problems is: the system-in-package structure that a kind of semiconductor device is provided, comprise passive device, substrate, pad, first chip, second chip and plastic packaging material, wherein, the size of described first chip is less than described second chip, described passive device is installed on the pad on the described substrate, described first chip is installed on the described substrate, and realizes being electrically connected by first bonding wire with the pad on the substrate; Described passive device is arranged around described first chip; Described second chip is unsettled be placed on described first chip directly over; Described second chip is installed on the described passive device or on the solid that highly heat-conductive material is made, and realizes being electrically connected by second bonding wire with the pad on the substrate; Described plastic packaging material is sealed described first chip, second chip, passive device, first bonding wire and second bonding wire, forms the encapsulating structure unit; The system-in-package structure of described semiconductor device is made up of at least one described encapsulating structure unit; Pad on the described substrate by with substrate in copper wiring be connected with weld pad in the substrate.
Be welded with soldered ball on the weld pad of the system-in-package structure of described semiconductor device.
Second chip of the system-in-package structure of described semiconductor device utilizes non-conductive adhesive to be installed on the described passive device or on the solid that highly heat-conductive material is made; Described first chip utilizes non-conductive adhesive to be installed on the described substrate.
The non-conductive adhesive of the system-in-package structure of described semiconductor device is insulating cement or insulation glued membrane.
The passive device of the system-in-package structure of described semiconductor device is installed on the pad on the described substrate with soldering paste.
The encapsulating structure unit of the system-in-package structure of described semiconductor device is arranged with matrix form.
The technical solution adopted for the present invention to solve the technical problems is: a kind of manufacture method of system in package of semiconductor device also is provided, may further comprise the steps:
(1) utilizes soldering paste that passive device is installed on the pad on the substrate, and use the mode of Reflow Soldering to make soldering paste firm;
(2) utilize the insulation glued membrane that first chip is installed on the substrate, solidify the insulation glued membrane by mode of heating in assembling process or after the assembling, it is firm that the chip of winning is combined with substrate;
(3) by first bonding wire pad on first chip and the substrate is realized being electrically connected;
(4) utilize the insulation glued membrane that second chip is installed on the passive device, solidify the insulation glued membrane by mode of heating in assembling process or after the assembling, it is firm to make that second chip combines with passive device; Wherein, the size of first chip is less than second chip;
(5) by second bonding wire pad on second chip and the substrate is realized being electrically connected;
(6) utilize plastic packaging material that first chip, second chip, passive device, bonding wire, insulation glued membrane and soldering paste are sealed, seal the back cure package technology that plastic packaging material is implemented in the back;
(7) substrate that includes the arranged system grade encapsulation body is divided into monomer with the cutting or the mode of punching press.
The manufacture method of the system in package of described semiconductor device is carried out the plasma cleaning to first chip and second chip weld bonding wire in described step (3) and step (5) before and after.
The manufacture method of the system in package of described semiconductor device also comprises between described step (6) and step (7) plants ball sealing dress processing step.
Beneficial effect
Owing to adopted above-mentioned technical scheme, the present invention compared with prior art, have following advantage and good effect: second chip is unsettled be placed on first chip directly over, be large size chip unsettled be placed on the small size chip directly over, thereby realize the little advantage of package dimension, and reduce system cost.Since passive device be positioned at first chip around, make encapsulating structure more compact, have the high advantage of packaging density, simplify high-speed bus design.Adopt the wire length of system-in-package structure of semiconductor device of the present invention moderate, reduce noise, frequency response is good, satisfies the electric property requirement of system in package.
The system in package manufacture method of semiconductor device realizes multiple function in single packaging body, several functionalities is integrated with in the single module in other words, be a kind of possess low cost, small size, dynamical Xie Decision scheme, be the important development direction of encapsulation technology development.
Description of drawings
Fig. 1 is assemblied in the chip of different size on the substrate in the prior art side by side, and the substrate weld pad is directly as the encapsulating structure schematic diagram of system grade encapsulation body input and output terminal;
Fig. 2 is assemblied in the chip of different size on the substrate in the prior art side by side, and the welding soldered ball is as the encapsulating structure schematic diagram of system grade encapsulation body input and output terminal on the substrate weld pad;
Fig. 3 directly overlays first chip on second chip in the prior art, and the substrate weld pad is directly as the encapsulating structure schematic diagram of system grade encapsulation body input and output terminal;
Fig. 4 directly overlays first chip on second chip in the prior art, and the welding soldered ball is as the encapsulating structure schematic diagram of system grade encapsulation body input and output terminal on the substrate weld pad;
Fig. 5 is the system-in-package structure of semiconductor device of the present invention, and the substrate weld pad is directly as the encapsulating structure schematic diagram of system grade encapsulation body input and output terminal;
Fig. 6 is the system-in-package structure of semiconductor device of the present invention, and the welding soldered ball is as the encapsulating structure schematic diagram of system grade encapsulation body input and output terminal on the substrate weld pad;
Fig. 7 is that the system in package manufacture method of semiconductor device is implemented the 1st step back system-in-package structure schematic diagram;
Fig. 8 is that the system in package manufacture method of semiconductor device is implemented the 2nd step back system-in-package structure schematic diagram;
Fig. 9 is that the system in package manufacture method of semiconductor device is implemented the 3rd step back system-in-package structure schematic diagram;
Figure 10 is that the system in package manufacture method of semiconductor device is implemented the 4th step back system-in-package structure schematic diagram;
Figure 11 is that the system in package manufacture method of semiconductor device is implemented the 5th step back system-in-package structure schematic diagram;
The system in package manufacture method of Figure 12 semiconductor device is implemented the 7th step prebasal plate overall schematic;
The system in package manufacture method of Figure 13 semiconductor device is implemented the 7th step metacoxal plate monomer schematic top plan view.
Embodiment
Below in conjunction with specific embodiment, further set forth the present invention.Should be understood that these embodiment only to be used to the present invention is described and be not used in and limit the scope of the invention.Should be understood that in addition those skilled in the art can make various changes or modifications the present invention after the content of having read the present invention's instruction, these equivalent form of values fall within the application's appended claims institute restricted portion equally.
Embodiments of the present invention relate to a kind of system-in-package structure of semiconductor device, as shown in Figure 5, comprise passive device 1, substrate 4, pad 3, first chip 5, second chip 8 and plastic packaging material 11, wherein, the size of described first chip 5 is less than described second chip 8, described passive device 1 is installed on the pad 3 on the described substrate 4, and described first chip 5 is installed on the described substrate 4, and realizes being electrically connected by first bonding wire 7 with the pad 3 on the substrate 4; Around described first chip 5 described passive device 1 is arranged; Described second chip 8 is unsettled be placed on described first chip 5 directly over; Described second chip 8 is installed on the described passive device 1 (as resistance, electric capacity etc.) or on the solid (as block cube, cylinder etc.) that highly heat-conductive material is made, and realizes being electrically connected by second bonding wire 10 with the pad 3 on the substrate 4; Described plastic packaging material 11 is sealed described first chip 5, second chip 8, passive device 1, first bonding wire 7 and second bonding wire 10, forms the encapsulating structure unit; The system-in-package structure of described semiconductor device is made up of at least one described encapsulating structure unit.Pad 3 on the described substrate 4 by with substrate 4 in copper wiring 12 be connected with weld pad 13 in the substrate 4; Described weld pad 13 is as the input and output terminal of whole system level encapsulation body or be welded with the input and output terminal of soldered ball 14 as the whole system level encapsulation body on described weld pad 13, as shown in Figure 6.
The passive device 1 usefulness soldering paste 2 of the system-in-package structure of described semiconductor device is installed on the pad 3 on the described substrate 4.
The present invention can be the encapsulating structure of monomer, the system-in-package structure that promptly has only the semiconductor device that encapsulating structure unit forms also can be by the system-in-package structure of a plurality of semiconductor device of forming with the encapsulating structure unit of arranged on substrate.
Be not difficult to find and since second chip unsettled be placed on first chip directly over, promptly large size chip unsettled be placed on the small size chip directly over, thereby realize the little advantage of package dimension.Since passive device be positioned at first chip around, make encapsulating structure more compact, have the high advantage of packaging density.Adopt structure of the present invention to make the moderate length of bonding wire, thereby realize that frequency response is good, satisfy the electric property requirement of system in package.
Embodiments of the present invention relate to a kind of manufacture method of system in package of semiconductor device, and its concrete steps are as follows:
In the 1st step, passive device 1 usefulness soldering paste 2 is installed on the pad 3 on the substrate 4, and product makes that soldering paste 2 is firm after then passing through Reflow Soldering.Fig. 7 is the product schematic diagram after the system in package manufacture method of semiconductor device implemented for the 1st step.
In the 2nd step, first chip, 5 usefulness first insulation glued membrane 6 is contained on the substrate 4, first glued membrane 6 that insulate that is heating and curing in the assembling process or after the assembling, make combine between win chip 5 and the substrate 4 firm.Fig. 8 is the product schematic diagram after the system in package manufacture method of semiconductor device implemented for the 2nd step.
In the 3rd step, realize being electrically connected by first bonding wire 7 with first chip, 5 corresponding bonding pad 3 on first chip 5 and the substrate 4.Fig. 9 is the product schematic diagram after the system in package manufacture method of semiconductor device implemented for the 3rd step.Can carry out plasma to first chip 5 before and after the welding bonding wire cleans.
In the 4th step, second chip, 8 usefulness second insulation glued membrane 9 is installed on the passive device 1, second glued membrane 9 that insulate that is heating and curing in the assembling process or after the assembling, make combine between second chip 8 and the passive device 1 firm.By this step, can realize second chip, 8 unsettled being stacked on first chip 5, wherein, the size of first chip 5 is less than second chip 8.Figure 10 is the product schematic diagram after the system in package manufacture method of semiconductor device implemented for the 4th step.
In the 5th step, realize being electrically connected by second bonding wire 10 with second chip, 8 corresponding bonding pad 3 on second chip 8 and the substrate 4.Figure 11 is the product schematic diagram after the system in package manufacture method of semiconductor device implemented for the 5th step.Can carry out plasma to second chip 8 before and after the welding bonding wire cleans.
The 6th step, plastic packaging material 11 first chip 5, second chip 8, passive device 1, first bonding wire 7 and second bonding wire 10, the first insulation glued membrane 6 and the second insulation glued membrane 9 and soldering paste 2 etc. all devices and material seal, seal this processing step of back curing of back enforcement plastic packaging material.Fig. 5 is the product schematic diagram after the system in package manufacture method of semiconductor device implemented for the 6th step.
In the 7th step, the mode of cutting of substrate 4 usefulness of the product 15 that is comprising many arranged or punching press is divided into monomer 15, its profile such as Fig. 5.Figure 12 be the system in package manufacture method of semiconductor device implement the 7th the step before the substrate schematic top plan view, Figure 13 be semiconductor device system in package manufacture method implement the 7th the step after substrate monomer schematic diagram, promptly be the schematic top plan view of Fig. 5 product.
Between the 6th step and the 7th step, increase by one and plant ball sealing dress processing step, promptly on the weld pad on the substrate 4 13, weld soldered ball 14, with the input and output terminal of soldered ball 14 as system grade encapsulation body.Fig. 6 is the product profile after the system in package manufacture method of semiconductor device is implemented this step.Do not plant ball sealing dress processing step if do not increase, then by the input and output terminal of the weld pad on the substrate 4 13 as system grade encapsulation body.
This shows, method of the present invention can realize multiple function in single packaging body, that is to say several functionalities is integrated with in the single module, is a kind of possess low cost, small size, dynamical Xie Decision scheme, is the important development direction of encapsulation technology development.
Claims (9)
1. the system-in-package structure of a semiconductor device, comprise passive device (1), substrate (4), pad (3), first chip (5), second chip (8) and plastic packaging material (11), wherein, the size of described first chip (5) is less than described second chip (8), described passive device (1) is installed on the pad (3) on the described substrate (4), it is characterized in that, described first chip (5) is installed on the described substrate (4), and realizes being electrically connected by first bonding wire (7) with the pad (3) on the substrate (4); Described first chip (5) has described passive device (1) on every side; Described second chip (8) is unsettled be placed on described first chip (5) directly over; Described second chip (8) is installed on the described passive device (1) or on the solid that highly heat-conductive material is made, and realizes being electrically connected by second bonding wire (10) with the pad (3) on the substrate (4); Described plastic packaging material (11) is sealed described first chip (5), second chip (8), passive device (1), first bonding wire (7) and second bonding wire (10), forms the encapsulating structure unit; The system-in-package structure of described semiconductor device is made up of at least one described encapsulating structure unit; Pad (3) on the described substrate (4) by with substrate (4) in copper wiring (12) be connected with weld pad (13) in the substrate (4).
2. the system-in-package structure of semiconductor device according to claim 1 is characterized in that, is welded with soldered ball (14) on the described weld pad (13).
3. the system-in-package structure of semiconductor device according to claim 1 is characterized in that, described second chip (8) utilizes non-conductive adhesive to be installed on the described passive device (1) or on the solid that highly heat-conductive material is made; Described first chip (5) utilizes non-conductive adhesive to be installed on the described substrate (4).
4. the system-in-package structure of semiconductor device according to claim 3 is characterized in that, described non-conductive adhesive is insulating cement or insulation glued membrane.
5. the system-in-package structure of semiconductor device according to claim 1 is characterized in that, described passive device (1) is installed on the pad (3) on the described substrate (4) with soldering paste (2).
6. the system-in-package structure of semiconductor device according to claim 1 is characterized in that, described encapsulating structure unit is arranged with matrix form.
7. the manufacture method of the system in package of a semiconductor device is characterized in that, may further comprise the steps:
(1) utilizes soldering paste that passive device is installed on the pad on the substrate, and use the mode of Reflow Soldering to make soldering paste firm;
(2) utilize the insulation glued membrane that first chip is installed on the substrate, solidify the insulation glued membrane by mode of heating in assembling process or after the assembling, it is firm that the chip of winning is combined with substrate;
(3) by first bonding wire pad on first chip and the substrate is realized being electrically connected;
(4) utilize the insulation glued membrane that second chip is installed on the passive device, solidify the insulation glued membrane by mode of heating in assembling process or after the assembling, it is firm to make that second chip combines with passive device; Wherein, the size of first chip is less than second chip;
(5) by second bonding wire pad on second chip and the substrate is realized being electrically connected;
(6) utilize plastic packaging material that first chip, second chip, passive device, bonding wire, insulation glued membrane and soldering paste are sealed, seal the back cure package technology that plastic packaging material is implemented in the back;
(7) substrate that includes the arranged system grade encapsulation body is divided into monomer with the cutting or the mode of punching press.
8. the manufacture method of the system in package of semiconductor device according to claim 6 is characterized in that, before and after the welding bonding wire first chip and second chip is carried out the plasma cleaning in described step (3) and step (5).
9. the manufacture method of the system in package of semiconductor device according to claim 6 is characterized in that, also comprises planting ball sealing dress processing step between described step (6) and step (7).
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| CN201010104887A CN101789420A (en) | 2010-02-03 | 2010-02-03 | System-in-a-package (SIP) structure of semiconductor device and manufacturing method thereof |
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