CN101763905A - Method for testing memory bar by measuring pin resistance value of memory bar - Google Patents
Method for testing memory bar by measuring pin resistance value of memory bar Download PDFInfo
- Publication number
- CN101763905A CN101763905A CN200910109303A CN200910109303A CN101763905A CN 101763905 A CN101763905 A CN 101763905A CN 200910109303 A CN200910109303 A CN 200910109303A CN 200910109303 A CN200910109303 A CN 200910109303A CN 101763905 A CN101763905 A CN 101763905A
- Authority
- CN
- China
- Prior art keywords
- memory bar
- voltage
- pin position
- resistance value
- value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Landscapes
- Measurement Of Resistance Or Impedance (AREA)
Abstract
The invention provides a brand-new method for testing and maintaining a memory bar by measuring the resistance value of the memory bar, which comprises the following steps: converting resistance values of various pins of the memory bar into voltage values; then switching the voltage values of various pins of the memory bar obtained by switching and sampling through a simulation switch; converting the simulation voltage value processed by an operational amplifier unit into a binary digit value by an analog-to-digital conversion unit; and comparing the converted binary digit value with a standard value obtained by a central processing unit and thereby distinguishing the problems of open circuit, short circuit, break down, ageing and the like of a memory bar chip so as to conveniently maintain the memory bar. The memory bar testing and maintaining method overcomes the defects that the resistance value of the memory bar is measured by using a mulimeter in the traditional method, thereby ensuring that the test and the maintenance of the memory bar are highly-efficient and rapid.
Description
Technical field
Memory bar is the vitals of computing machine, and this invention provides the method for a kind of memory bar test and maintenance.It is opposed with the standard electric resistance then and recently determines the quality of memory bar, with convenient for maintaining by measuring the resistance value of each pin position of memory bar.
Background technology
Along with the development in an all-round way of computing machine, the memory bar that one of is equipped with as the standard of computing machine also spreads all over every field.Thereby the test of memory bar and maintenance seem extremely important.Usually all there is a relatively-stationary resistance value in each the pin position of chip on memory bar, by measuring the size of these resistance values, can judge memory bar chip open circuit, and short circuit such as punctures and aging at problem.
List the change situation of the common caused memory bar pin resistance value of memory bar problem below:
1) in the time of certain two pin position short circuit of chip, the resistance to earth value of this pin position will diminish.
2) when open a way in certain pin position of chip, the resistance to earth value of this pin position will become big.
3) after certain pin position of chip was breakdown, the resistance to earth value of this pin position also can change.
4) aging when the chip generation, deviation also can take place in the resistance to earth value of its pin position.
The present invention has around this principle proposed the method for testing of memory bar just.
Current, be to use multimeter to measure the resistance to earth value of each pin position of memory bar successively for the classic method of using the memory bar pin resistance value to test and keep in repair memory bar.There are three remarkable shortcomings in this method:
1) memory bar pin position is a lot, does not wait from many of more than 100 pin positions to 200.The resistance value of using multimeter to measure memory bar pin position one by one need expend a large amount of time.
2) resistance value of the different pin interdigits of memory bar is incomplete same, after the use multimeter measures the resistance value of each pin position, also will manually contrast each resistance value with standard value.Such method of testing is too loaded down with trivial details.
3) each pin position standard electric resistance of different memory bars is not quite similar, so before every kind of memory bar of test, also will use multimeter to measure the standard electric resistance in turn in the pin position one by one earlier.Need expend a large amount of time like this.
Can see that from above-mentioned three major defects traditional memory bar pin resistance value measuring method takes time and effort, efficient is extremely low, is unfavorable for test and maintenance as memory bar.
In order to solve the problem and the defective of above-mentioned convential memory bar test and method for maintaining, the present invention proposes a kind of brand-new memory bar test and method for maintaining.Its major function is:
1), automatically takes turns the resistance value of each pin position of flow measurement memory bar by microcontroller (MCU or ARM) control.
2) resistance value of measuring is understood automatically and standard value contrasts, and demonstrates the pin position that resistance value exceeds error range then.
3), generate the standard electric resistance automatically to different memory bars.The resistance value error scope can be set according to actual conditions.
By above-mentioned analysis as can be seen, the method that memory bar was tested and keeped in repair to the resistance value of passing through each pin position of quick measurement memory bar that the present invention advocated has efficiently, and characteristics such as save time help popularizing and promoting in a large number.
Summary of the invention
The purpose of this invention is to provide a kind of brand-new passing through and measure the method that memory bar was tested and keeped in repair to the memory bar resistance value.This invention has overcome a series of shortcomings of classic method, has characteristics such as efficient, quick.
The present invention is achieved through the following technical solutions:
The present invention by seven chief components (shown in Figure 1 as appended sheets of drawings) is respectively:
1) CPU (central processing unit): it gathers the resistance value of each pin position of memory bar with respect to ground successively by control memory bar pin resistance value sample circuit, compare with each stored memory bar pin position standard electric resistance of storage element then, by display unit the result is shown at last, thereby carry out the maintenance of memory bar.
2) memory bar pin resistance value sampling unit: this part plays the most key effect in the present invention, has comprised five parts (shown in Figure 2 as appended sheets of drawings) altogether, is respectively:
A) resistance is to voltage conversion unit: this unit is a resistance on each memory bar pin bit serial, and be connected on the power supply, thereby the resistance value of memory bar pin position is converted to corresponding voltage value.(synoptic diagram such as appended sheets of drawings are shown in Figure 3)
B) analog switch unit: analog switch is many inputs, the electron device of single output.By channel selecting, can determine which input end to be connected to output terminal.(synoptic diagram such as appended sheets of drawings are shown in Figure 5)
C) analog channel selected cell: this unit scans the magnitude of voltage of each pin position on the memory bar successively according to the order of CPU (central processing unit).
D) amplifier processing unit: this unit carries out processing and amplifying to the magnitude of voltage that analog switch passes over.Can adopt common operational amplifier electron device.
E) D/A conversion unit: this unit converts the analog voltage after handling through amplifier to digital signal, reads and stores for CPU (central processing unit).High-precision D/A conversion unit can provide accurate measured value.
3) liquid crystal display: this part is born Presentation Function of the present invention.
4) storage element: the effect in the present invention of this part is standard value and the error range data that store the memory bar resistance value.
5) usb interface unit: this part plays the present invention is connected to computer, and carries out the effect of exchanges data with the computer main control end.
6) keyboard input block: this part is used for controlling the beginning and the end of test.
7) memory bar receptacle unit: this part is to be used for installing tested memory bar.
Description of drawings
Fig. 1 is a memory bar resistance value tester structural drawing, is overall construction drawing of the present invention, has comprised CPU (central processing unit), memory bar pin resistance value sampling unit, liquid crystal display, storage element, usb interface unit, keyboard input block and memory bar receptacle unit.
Fig. 2 is the structural drawing of memory bar pin resistance value sampling unit, has comprised resistance to voltage conversion unit, analog switch unit, analog channel selected cell, amplifier processing unit and D/A conversion unit.
Fig. 3 is the synoptic diagram of resistance to voltage conversion unit.
Resistance when Fig. 4 is two memory bar pin position short circuits is to the voltage transitions synoptic diagram.
Fig. 5 is the analog switch synoptic diagram.
Embodiment
The present invention proposes a kind of brand-new passing through and measure the method that memory bar was tested and keeped in repair to the memory bar resistance value, its core is: the resistance value of each pin position of memory bar is converted to magnitude of voltage, obtain each pin position magnitude of voltage of memory bar by the analog switch switch sampling then, after the magnitude of voltage process operational amplifier cell processing, by AD conversion unit analog voltage is converted to binary digital value, CPU (central processing unit) obtains through behind the binary numeral after the conversion, this value is contrasted with standard value, thereby differentiate the open circuit of memory bar chip, short circuit, problem such as puncture and aging, and the result is shown by liquid crystal display.In addition, the data that test out can see through USB interface and upload to the computer main control end.
Describe this specific embodiment of the present invention in detail below in conjunction with accompanying drawing.
Before use the present invention begins to test memory bar to be measured, use a known good standard bar to extract the standard electric resistance of each pin position of such memory bar earlier.Method is:
As shown in Figure 1, CPU (central processing unit) (1) starts the resistance value that memory bar pin resistance value sampling unit (2) scans each pin position of memory bar successively, then this value is stored into storage element (4).So just finished the sampling process of memory bar pin position standard electric resistance.
Fig. 2 has described the method for memory bar pin resistance value test in detail.Test at first, at first memory bar to be measured is installed on the memory bar slot of the present invention, central processing unit controls analog channel selected cell (c) is opened analog switch unit (b) then, see through resistance like this to voltage conversion unit (a), corresponding memory bar pin position magnitude of voltage has just flow to amplifier processing unit (d) by analog switch unit (b), amplification and shaping through amplifier processing unit (d), this voltage enters AD conversion unit (e) magnitude of voltage of simulation is converted to the binary digit value, reads for CPU (central processing unit).At this moment CPU (central processing unit) compares its value that obtains and standard value that is kept in the storage element, if the numerical value that reads has exceeded the error range of standard value, CPU (central processing unit) just shows this numerical value by display unit, and shows corresponding memory bar pin position coding.Finish the scanning of each memory bar pin position by the way successively, test has also just been finished.
The test process of summing up above-mentioned memory bar is as follows:
1) each pin resistance value of memory bar is become magnitude of voltage by circuit conversion
2) by each magnitude of voltage of control analog switch scanning sample
3) magnitude of voltage that obtains from analog switch is carried out the processing of operational amplifier
4) magnitude of voltage after the operational amplifier processing is carried out the conversion of analog to digital, read for CPU (central processing unit).
5) CPU (central processing unit) is done contrast to the binary numeral that obtains with standard value.
6) CPU (central processing unit) shows comparing result.
Fig. 3 describes resistance in detail to voltage conversion method.The resistance value that on behalf of the present invention, R1 configure, the magnitude of voltage that on behalf of the present invention, VCC configure, Rx are represented the resistance value of memory bar pin to be measured position, and Vout represents the magnitude of voltage of this resistance to voltage transitions output, and computing formula is: Vout=(VCC*Rx)/(R1+Rx).By choosing suitable R 1 value, just can obtain suitable voltage output value Vout.
Resistance when Fig. 4 has described the short circuit of memory bar pin position is to voltage transitions output situation.Here Rup is the parallel connection value of R1 and two resistance of R2, and Rdown is the parallel connection value of Rx1 and two resistance of Rx2.Vout represents the magnitude of voltage of this resistance to voltage transitions output, and computing formula is: Vout=(VCC*Rdown)/(Rup+Rdown).By setting different R1 and R2 resistance value, the situation when output voltage V out just can reflect position short circuit of memory bar pin and non-short circuit.
Fig. 5 has described the synoptic diagram of analog switch.It is a hyperchannel input, the electron device of single channel output.By analog switch, pin position magnitudes of voltage numerous on the memory bar just can be scanned and be sampled successively.
In addition, this memory bar resistance value method of testing is changed slightly, just can be so that the scope of application of this method of testing expand to, but be not limited to following various situation:
1) by measuring the quality that each pin resistance value of CPU is tested CPU.
2) by measuring the quality that each pin resistance value of board chip set comes the testing host chipset.
3) quality of coming the test memory chip by the resistance value of measuring each pin position of single memory chip.
4) quality of testing the display card chip by the resistance value of measuring each pin position of display card chip.
5) by measuring PCIe, computer main board is tested and keeped in repair to the resistance value of PCI and each pin position of AGP slot.
6) test and keep in repair computer main board by the resistance value of measuring each pin position of memory bar slot.
In sum, the method for testing and keeping in repair memory bar by measurement memory bar resistance value only is the embodiment of this invention, but protection scope of the present invention is not limited thereto.Anyly be familiar with those skilled in the art in the technical scope that the present invention discloses, the variation that can expect easily or replacement all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection domain of claim.
Claims (9)
1. one kind by measuring the method that memory bar was tested and keeped in repair to the memory bar resistance value.It is characterized in that, the resistance value of each pin position of memory bar is converted to magnitude of voltage, obtain each pin position magnitude of voltage of memory bar by the analog switch switch sampling then, after the magnitude of voltage process operational amplifier cell processing, by AD conversion unit analog voltage is converted to binary digital value, CPU (central processing unit) obtains through behind the binary numeral after the conversion, this value is contrasted with standard value, thereby differentiate the open circuit of memory bar chip, short circuit, problem such as puncture and aging, conveniently to carry out the maintenance of memory bar.
2. according to the right 1 described method that each pin resistance value of memory bar is converted to magnitude of voltage.It is characterized in that, resistance on each pin bit serial of memory bar, and be connected to a power supply.Utilize the principle of electric resistance partial pressure that the resistance value of each pin position of memory bar is converted to magnitude of voltage.
3. according to each pin position magnitude of voltage method of sampling of right 1 described memory bar.It is characterized in that, each pin position of memory bar is connected on the analog switch, then by control analog switch passage each pin position magnitude of voltage of sample of memory bar successively.
4. according to right 1 described memory bar pin position voltage signal arithmetic processing method.It is characterized in that, the voltage signal that sends from analog switch unit is handled by operational amplifier.
5. according to the conversion method of right 1 described memory bar pin position simulating signal to digital signal.It is characterized in that, the analog voltage of memory bar pin position is converted to binary numerical value by AD conversion unit.
6. according to the open circuit of right 1 described memory bar chip, short circuit such as punctures and aging at the determination methods of problem.It is characterized in that, the resistance value of the memory bar to be measured that reads with the standard electric resistance ratio of opposing, thereby differentiate.
7. according to right 1 described memory bar scope.It is characterized in that the memory bar scope includes but not limited to various types of SDR memory bars, DDR memory bar, DDR2 memory bar and DDR3 memory bar.
8. right 1 described measurement and method of testing are equally applicable to independent measurement and the test to memory chip.Thereby adopt right 1 described measurement and method of testing to SDR, and DDR, DDR2, measurement that memory chips such as DDR3 carry out and test all are included in the claim scope.
9. the right 1 described measurement and the method for testing scope of application include but not limited to memory bar, CPU, mainboard north and south bridge chip, display card chip, PCI, PCIe and AGP slot, memory bar slot.Thereby adopt right 1 described measurement and method of testing to CPU, and mainboard north and south bridge chip, the display card chip, PCI, PCIe and AGP slot, measurement that memory bar slot etc. carries out and test all are included in the claim scope.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200910109303A CN101763905A (en) | 2009-08-14 | 2009-08-14 | Method for testing memory bar by measuring pin resistance value of memory bar |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200910109303A CN101763905A (en) | 2009-08-14 | 2009-08-14 | Method for testing memory bar by measuring pin resistance value of memory bar |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN101763905A true CN101763905A (en) | 2010-06-30 |
Family
ID=42495008
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN200910109303A Pending CN101763905A (en) | 2009-08-14 | 2009-08-14 | Method for testing memory bar by measuring pin resistance value of memory bar |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101763905A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103377103A (en) * | 2012-04-28 | 2013-10-30 | 珠海格力电器股份有限公司 | Method, device and system for testing stored data |
| CN106249123A (en) * | 2015-06-04 | 2016-12-21 | 发那科株式会社 | Corrosion detection circuitry and motor drive |
| CN109901001A (en) * | 2017-12-07 | 2019-06-18 | 英业达科技有限公司 | The multiple power supplys and grounding leg position conduction detecting system and its method of central processing unit slot |
| CN113220619A (en) * | 2021-04-30 | 2021-08-06 | 山东英信计算机技术有限公司 | Method, system and medium for distributing PCIE channel bandwidth |
-
2009
- 2009-08-14 CN CN200910109303A patent/CN101763905A/en active Pending
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103377103A (en) * | 2012-04-28 | 2013-10-30 | 珠海格力电器股份有限公司 | Method, device and system for testing stored data |
| CN106249123A (en) * | 2015-06-04 | 2016-12-21 | 发那科株式会社 | Corrosion detection circuitry and motor drive |
| US10416071B2 (en) | 2015-06-04 | 2019-09-17 | Fanuc Corporation | Corrosion detection circuit for circuit board and motor drive having the same |
| CN109901001A (en) * | 2017-12-07 | 2019-06-18 | 英业达科技有限公司 | The multiple power supplys and grounding leg position conduction detecting system and its method of central processing unit slot |
| CN109901001B (en) * | 2017-12-07 | 2024-03-29 | 英业达科技有限公司 | System and method for detecting conduction of multiple power and grounding pins of central processing unit slot |
| CN113220619A (en) * | 2021-04-30 | 2021-08-06 | 山东英信计算机技术有限公司 | Method, system and medium for distributing PCIE channel bandwidth |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103048600B (en) | Reverse breakdown voltage test system for semiconductor apparatus | |
| CN104833942B (en) | Electric energy meter battery power consumption automonitor and application method | |
| CN101996121B (en) | Universal serial bus (USB) port testing device and testing method | |
| CN103792498A (en) | Automatic power supply testing method | |
| CN101839931B (en) | Alternating current signal measurement device, system and method | |
| CN106772208B (en) | Single three-phase meter integrated reliability test board | |
| CN105680860B (en) | Improve the circuit and method of microcontroller A/D conversion accuracy | |
| CN101763905A (en) | Method for testing memory bar by measuring pin resistance value of memory bar | |
| CN102288848A (en) | Automatic current test and analysis system and method for constant-temperature crystal oscillator | |
| CN105044622A (en) | Test instrument power supply power self-detection device and self-detection method | |
| CN106226679A (en) | For detecting frock and the method for testing thereof of embedded pos payment terminal mainboard | |
| CN202305670U (en) | Multipath resistor rapid test system | |
| CN2777569Y (en) | Digital current transformer character integrated measurer | |
| CN113406473B (en) | Chip testing method and device, terminal equipment and storage medium | |
| CN103344937B (en) | Intelligent electric energy meter consumption detection equipment and detection method | |
| CN101154468A (en) | Test method for embedded memory chip | |
| CN101415141B (en) | System and method for measuring microphone response time | |
| CN202583376U (en) | I/O detection system of FPGA development board | |
| CN211826336U (en) | Automatic PCB detection platform system | |
| CN102200565A (en) | Chip testing device | |
| TWM458558U (en) | Control interface for testing system | |
| CN106328211A (en) | Method and device for realizing timing sequence test | |
| CN201780338U (en) | Wire-to-wire capacitance testing device | |
| CN204649843U (en) | A kind of circuit board carbon ink device for testing resistance | |
| CN202119852U (en) | Tool circuit used for automatic neilsbed |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| DD01 | Delivery of document by public notice |
Addressee: Xie Qiang Document name: Notification of Passing Preliminary Examination of the Application for Invention |
|
| DD01 | Delivery of document by public notice |
Addressee: Xie Qiang Document name: Notification of Publication of the Application for Invention |
|
| DD01 | Delivery of document by public notice |
Addressee: Xie Qiang Document name: Notification of before Expiration of Request of Examination as to Substance |
|
| DD01 | Delivery of document by public notice |
Addressee: Xie Qiang Document name: Notification that Application Deemed to be Withdrawn |
|
| C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20100630 |