CN101604248B - Embedded system for correcting programs in read only memory and realization method thereof - Google Patents
Embedded system for correcting programs in read only memory and realization method thereof Download PDFInfo
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- CN101604248B CN101604248B CN200910089005A CN200910089005A CN101604248B CN 101604248 B CN101604248 B CN 101604248B CN 200910089005 A CN200910089005 A CN 200910089005A CN 200910089005 A CN200910089005 A CN 200910089005A CN 101604248 B CN101604248 B CN 101604248B
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Abstract
The invention relates to an embedded system, in particular to an embedded system for correcting programs in a read only memory and a realization method thereof. The embedded system comprises a processor, the ROM, an OTP, a monitoring circuit, an either-or controller and the like. A main body of the embedded system adopts the ROM for storage and adopts the OTP to correct faulty programs in the ROM; the OTP and the ROM share an address wire; an address on the address wire is monitored through the monitoring circuit; and the either-or controller controls the selection of the programs in the ROM or selects an instruction of jumping to the OTP according to the monitored address. The system and the method solve the problem that the ROM of a chip of the embedded system cannot be modified, and save the cost when the risk of the chip of the embedded system is reduced, so the system and the method have important application value.
Description
Technical field
The present invention relates to embedded system, relate in particular to the ROM (read-only memory) in the embedded system.
Background technology
Embedded system is a kind of controlled device dedicated computer system inner and that design for application-specific that is embedded into; It is characterized by that system kernel is little, specificity is strong, software solid-state storage etc., is widely used in each field such as home intelligent management, information household appliances, traffic administration, Industry Control, POS network and ecommerce.
The core of embedded system parts are embedded microprocessor (Micro Processor Unit; MPU) or embedded microcontroller (Microcontroller Unit; MCU) or the DSP embedded processor (Embedded Digital Signal Processor, EDSP).MPU, MCU, EDSP are operated in in the particular group institute designed system, and it is integrated in chip internal with many being accomplished by integrated circuit board of tasks in the universal cpu, thereby make system design be tending towards miniaturization and have higher efficient and reliability.
Embedded system mainly contains three kinds of storage meanss at present; Be respectively and utilize special external chip to store, utilize One Time Programmable (the one time programmable in the master chip; Hereinafter to be referred as OTP) module stores, utilizes the ROM (read-only memory) (Read Only Memory is hereinafter to be referred as ROM) in the master chip to store.
The method of utilizing special external chip to store is applicable to the embedded system that procedure quantity is bigger, is characterized in flexibly, is prone to change, and cost is lower when procedure quantity is big, if but the less cost of procedure quantity is higher on the contrary.The method of utilizing the OTP module in the master chip to store is at the production final tache that the OTP that program is written to chip is inner.The method of utilizing the ROM in the master chip to store is in the chip production process, program Solidification to be arrived chip internal.
Under the identical situation of capacity, use the cost of the embedded system of ROM to be lower than the embedded system cost that adopts OTP, therefore for the embedded system to the cost requirement strictness, using ROM is better choice.Yet traditional ROM storage mode in the embedded product production run just with program Solidification in ROM, program can not be by flexible modification.If therefore only adopt the ROM mode to store, in case going wrong, program causes throwing again sheet probably, risk is very high.
In sum; In embedded system, only adopt ROM storage meeting to bring risk to embedded product; And only adopting OTP storage can improve the embedded product cost, therefore a kind of embedded system and its implementation with low cost and can modified R OM program have important practical value.
Summary of the invention
The invention provides embedded system and its implementation of the modified R OM program that can overcome the above problems.
In first aspect, the invention provides a kind of embedded system of modified R OM program, this system comprises processor and the ROM that links to each other through address wire with this processor, so that processor is to the ROM write address.This embedded system comprises OTP, supervisory circuit, alternative controller.OTP and ROM shared address line, and this OTP is used to store the ROM program of correction.Supervisory circuit is positioned on the said address wire, is used to monitor the address on this address wire.The address that the alternative controller arrives according to monitor circuit monitors, control are selected the program among the ROM or are selected to jump to the instruction of OTP.
In second aspect, the invention provides the method for modified R OM program in a kind of embedded system, wherein this embedded system comprises processor and ROM, processor is to the ROM write address.This method comprises: at first monitor said address contents; Judge then whether this address satisfies trigger condition; When said trigger condition is satisfied in this address, send the instruction that jumps to OTP, and this instruction that jumps to OTP is sent to processor, wherein the ROM program of OTP and ROM shared address line and storage correction; Last processor is carried out corresponding operating according to the data that receive.
Embedded system main body of the present invention adopts the ROM storage, through the OTP storage mode erroneous procedures among the ROM is revised, and system and method for the present invention has been practiced thrift cost when reducing the embedded product risk, therefore has important practical value.
Description of drawings
Below with reference to accompanying drawings specific embodiments of the present invention is explained in more detail, in the accompanying drawings:
Fig. 1 is the embedded system block diagram of modified R OM program;
Fig. 2 is the storage format of supervisory circuit register;
Fig. 3 is the process flow diagram of modified R OM program in the embedded system.
Embodiment
After embedded chip production is accomplished; System program is cured among the ROM fully, and can not make any modification, and this moment is if mistake appears in some program among the ROM of finding; Embedded chip is scrapped possibly, and then brings very big risk for the production of embedded product.The present invention is in order to remedy this kind defective, and the final tache of producing at embedded product is burnt to the revision program of ROM erroneous procedures among the OTP, makes a mistake so that revise the systemic-function that is caused by the ROM erroneous procedures.Said embedded chip such as MP3 chip, embedded product such as MP3.
Fig. 1 is the embedded system block diagram of modified R OM program, and this embedded system comprises processor 110, ROM120, OTP130, supervisory circuit 140, alternative controller 150.Wherein, processor 110 is MPU, MCU or EDSP etc., and especially, native system is fit to use breathe out the not processor of structure more.
ROM120 is used to store the main program of embedded system, and in the embedded chip production run, this main program is all solidified.OTP130 is used to store revision program so that the erroneous procedures among the modified R OM, and then accomplish erroneous procedures among the ROM the function that should accomplish originally.
The stored program hardware of embedded system is accomplished by ROM120 and OTP130 jointly, and ROM120 and OTP130 use same set of address space, and selects through the high low level in address.For example like the address on the address wire high four to be 1111 be the OTP130 address, otherwise be the ROM120 address.Should accomplish embedded stored program hardware jointly and be called ROM/OTP.Because the modification content of embedded system program is less with respect to total program of embedded system, so OTP130 memory capacity is less with respect to ROM120.
When trigger condition is satisfied in the address that supervisory circuit 140 monitors, promptly this monitored address be the ROM120 program make mistakes the entry address time, this supervisory circuit 140 transmits control signal and sends the instruction that jumps to OTP130 through data line two.
The address that alternative controller 150 monitors according to supervisory circuit 140, program or selection jump to the instruction of OTP130 among the control selection ROM120.Particularly; Alternative controller 150 is when the control signal that receives from supervisory circuit 140; Select the instruction among the OTP that jumps in the data line two, otherwise select the ROM program in the data line one, and these data that receive are sent to processor 110 through data line three.
Need to prove that Fig. 1 just schematically describes address wire and data line, in fact other designs of number of address lines and data line quantity and embedded system are relevant, do not receive qualification of the present invention.
Fig. 3 is the process flow diagram of modified R OM program in the embedded system.
In step 310, send in the process of address the address on this processor 110 of supervisory circuit 140 monitoring and the ROM/OTP address wire to ROM/OTP at processor 110.
In step 320, judge whether the address that supervisory circuit 140 monitors satisfies trigger condition, and said trigger condition is the address of ROM120 erroneous procedures.
In step 330, when not satisfying trigger condition in the address that supervisory circuit 140 monitors, the data that alternative controller 150 is selected in the data line one are just selected the program among the ROM/OTP, and this ROM program are sent to processor 110 through data line three.
In step 331, processor receives the ROM/OTP program in the data line three, carries out corresponding operating according to this contents of program.
In step 340, when satisfying trigger condition in the address that supervisory circuit 140 monitors, supervisory circuit 140 transmits control signal and sends the instruction that jumps to OTP through data line two to alternative controller 150.
In step 341, alternative controller 150 receives from this control signal of supervisory circuit 140 and chooses and jumps to the instruction that OTP formulates the position in the data two.
In step 342, this jump instruction that alternative controller 150 will receive is sent to processor 110 through data line three.Said jump instruction comprises the specific address that jumps among the OTP, so that processor 110 can correctly jump to relevant position among the OTP.
In step 343, processor 110 jumps in the corresponding revision program of OTP according to the address of OTP in this jump instruction, thereby begins to carry out the corresponding revision program among the OTP, and then accomplishes the correction to the ROM erroneous procedures.
Obviously, under the prerequisite that does not depart from true spirit of the present invention and scope, the present invention described here can have many variations.Therefore, the change that all it will be apparent to those skilled in the art that all should be included within the scope that these claims contain.The present invention's scope required for protection is only limited described claims.
Claims (11)
1. the embedded system of a modified R OM program comprises processor (110) and the ROM (120) that links to each other through address wire with this processor, so that processor (110) is to ROM (120) write address;
It is characterized in that said embedded system comprises One Time Programmable chip OTP (130), supervisory circuit (140), alternative controller (150);
Said OTP (130) and ROM (120) shared address line, and this OTP (130) is used for the final tache produced at embedded product, with ROM (120) procedure stores of revising in this One Time Programmable chip OTP (130);
Said supervisory circuit (140) is positioned on the said address wire, is used to monitor the address on this address wire;
The address that said alternative controller (150) monitors according to supervisory circuit (140), control are selected the program among the ROM (120) or are selected to jump to the instruction of OTP (130).
2. the embedded system of a kind of modified R OM program as claimed in claim 1 is characterized in that, said OTP (130) and said ROM (120) choose through the high low level in address, and OTP (130) memory capacity is less than the memory capacity of ROM (120).
3. the embedded system of a kind of modified R OM program as claimed in claim 1 is characterized in that, said supervisory circuit (140) comprises register, and this register is used to store the instruction of trigger condition and the said OTP of jumping to (130);
Said trigger condition is the entry address of wrong ROM (120) program.
4. the embedded system of a kind of modified R OM program as claimed in claim 3; It is characterized in that; Satisfy under the said trigger condition situation address that supervisory circuit (140) monitors, and transmits control signal and jump to the instruction of OTP (130) to alternative controller (150).
5. the embedded system of a kind of modified R OM program as claimed in claim 4 is characterized in that, said alternative controller (150) is selected the said instruction that jumps to OTP (130) after receiving said control signal.
6. the embedded system of a kind of modified R OM program as claimed in claim 1 is characterized in that, said processor (110) is in embedded microprocessor, embedded microcontroller, the DSP embedded processor.
7. the method for modified R OM program in the embedded system, wherein this embedded system comprises processor (110) and ROM (120), processor is to ROM (120) write address; Said method comprises:
Step 1 is monitored said address contents;
Step 2 judges whether said address satisfies trigger condition;
Step 3 when said trigger condition is satisfied in said address, is sent the instruction that jumps to OTP (130), and this instruction that jumps to OTP (130) is sent to processor (110); Wherein, said OTP (130) and ROM (120) shared address line, and ROM (120) program of storage correction;
Step 4, processor (110) is carried out corresponding operating according to the data that receive;
Before step 1, also be included in the final tache that embedded product is produced, the revision program of ROM erroneous procedures is burnt among the One Time Programmable chip OTP (130).
8. the method for modified R OM program is characterized in that in step 2 in a kind of embedded system as claimed in claim 7, when judging that said trigger condition is not satisfied in said address, the program among the ROM (120) is sent to processor (110).
9. the method for modified R OM program is characterized in that in step 3 in a kind of embedded system as claimed in claim 7, judges that said address is satisfied after the trigger condition and when sending the said OTP of jumping to (130) instruction, transmits control signal.
10. the method for modified R OM program is characterized in that in a kind of embedded system as claimed in claim 7, and said trigger condition is the entry address of wrong ROM (120) program.
11. the method for modified R OM program is characterized in that in a kind of embedded system as claimed in claim 7, said OTP (130) and said ROM (120) choose through the high low level in address, and OTP (130) memory capacity is less than the memory capacity of ROM (120).
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| Application Number | Priority Date | Filing Date | Title |
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| CN200910089005A CN101604248B (en) | 2009-07-20 | 2009-07-20 | Embedded system for correcting programs in read only memory and realization method thereof |
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| CN200910089005A CN101604248B (en) | 2009-07-20 | 2009-07-20 | Embedded system for correcting programs in read only memory and realization method thereof |
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| CN101604248A CN101604248A (en) | 2009-12-16 |
| CN101604248B true CN101604248B (en) | 2012-09-26 |
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Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102129486A (en) * | 2010-10-20 | 2011-07-20 | 杭州晟元芯片技术有限公司 | Novel OTP implementation method |
| CN103927195B (en) * | 2013-12-17 | 2017-10-20 | 记忆科技(深圳)有限公司 | One Time Programmable chip OTP upgrade method |
| CN104598408B (en) * | 2015-02-05 | 2018-10-26 | 深圳芯邦科技股份有限公司 | A kind of disposable programmable read only memory data burning method |
| CN105512560B (en) * | 2015-11-27 | 2018-11-16 | 深圳国微技术有限公司 | A kind of disposable programmable memory chip and and its control method |
| CN106598660A (en) * | 2016-12-08 | 2017-04-26 | 深圳市博巨兴实业发展有限公司 | Program memory management device used for microcontroller |
| CN107133066A (en) * | 2017-04-01 | 2017-09-05 | 深圳市博巨兴实业发展有限公司 | A kind of storage multiplexed control system in MCU chip |
| CN110058951A (en) * | 2019-04-24 | 2019-07-26 | 核芯互联科技(青岛)有限公司 | A kind of method and apparatus for repairing low volume data mistake inside ROM |
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| CN1254129A (en) * | 1998-11-12 | 2000-05-24 | 英业达集团(西安)电子技术有限公司 | Device for safely updating read-only memory and its method |
| CN1291773A (en) * | 1999-08-31 | 2001-04-18 | 松下电器产业株式会社 | Semiconductor device |
| CN1902583A (en) * | 2003-12-31 | 2007-01-24 | 桑迪士克股份有限公司 | Flash memory system startup operation |
| CN1920777A (en) * | 2006-09-15 | 2007-02-28 | 中山大学 | System software upgrading method for digital household appliances and updated system |
| CN101183313A (en) * | 2003-12-25 | 2008-05-21 | 松下电器产业株式会社 | Information processing apparatus and a rom image generation apparatus for the apparatus |
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Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1254129A (en) * | 1998-11-12 | 2000-05-24 | 英业达集团(西安)电子技术有限公司 | Device for safely updating read-only memory and its method |
| CN1291773A (en) * | 1999-08-31 | 2001-04-18 | 松下电器产业株式会社 | Semiconductor device |
| CN101183313A (en) * | 2003-12-25 | 2008-05-21 | 松下电器产业株式会社 | Information processing apparatus and a rom image generation apparatus for the apparatus |
| CN1902583A (en) * | 2003-12-31 | 2007-01-24 | 桑迪士克股份有限公司 | Flash memory system startup operation |
| CN1920777A (en) * | 2006-09-15 | 2007-02-28 | 中山大学 | System software upgrading method for digital household appliances and updated system |
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