CN101556889B - Method for manufacturing electron emission source of surface-conduction electron-emitter flat panel display - Google Patents
Method for manufacturing electron emission source of surface-conduction electron-emitter flat panel display Download PDFInfo
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- CN101556889B CN101556889B CN2009100225644A CN200910022564A CN101556889B CN 101556889 B CN101556889 B CN 101556889B CN 2009100225644 A CN2009100225644 A CN 2009100225644A CN 200910022564 A CN200910022564 A CN 200910022564A CN 101556889 B CN101556889 B CN 101556889B
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Abstract
The invention relates to the technology of a surface-conduction electron-emitter flat panel display, disclosing a method for manufacturing an electron emission source of a surface-conduction electron-emitter flat panel display. The method comprises following steps: firstly, silicon oxide nanowire arrays are manufactured on the 110 surfaces of monocrystalline silicon pieces with a wet etching method and a selective oxidation process; secondly, L-shaped electron-emitter film arrays are manufactured on the silicon oxide nanowire in a way of sputtering or ink-jet printing; thirdly, nanometer aperture arrays are manufactured by corroding the silicon oxide nanowire and peeling off the electron-emitter film on the silicon oxide nanowire; and finally line electrodes and row electrodes are manufactured.
Description
Technical field
The present invention relates to surface conductive electron-emission flat panel display spare technology, particularly a kind of electron source emission source manufacture method of surface conductive electron-emission flat panel display spare.
Background technology
Compare with the plasma Display Technique with traditional lcd technology, Surface-conduction Electron-emitter Display technology (Surface-conduction Electron-emitter Display, be called for short SED) among quietly the growth, and with its contrast height, power consumption is low, and the screen response speed has caused widely soon to be paid close attention to.The sixties in last century, the scientist of the former Soviet Union takes the lead in finding that the SnO 2 thin film that deposits presents discontinuous graininess between two parallel poles, on film, apply voltage this moment, conductive channel between the particle can be burnt gradually, when the resistance of SnO 2 thin film acquires a certain degree, if above film, apply anode voltage, just begin to occur electronics emission phenomenon, be the film field emission.
The SED technology is a based thin film field emission principle.Its core component is the electron emission source that is positioned on the glass substrate.This is the film that the extremely thin ratio of one deck is easier to the electron gain emissivities, has a width to be about the slit of 10nm in the central authorities of film.When two lateral electrodes of film apply voltage about 10V to slit, because tunnel effect, electronics will fly to the other end from an end of slit.Under the effect of anode voltage, the tunneling electron of considerable part can " being pulled out " and anode is moved, and then impact fluorescence powder and produce luminous.The cathode base of SED is to be made of a plurality of such electron emission source arrays.The key technology of SED is at the nano slit that forms on each electron emission film of cathode base about 10nm, is nano slit.Just the manufacturing process of nano slit is a key in the SED technology on the electron emissive film.
Externally disclose design and the manufacture method of SED Japanese patent laid-open 7-235255 number and Japanese patent laid-open 8-321254 number, the manufacturing process of its electron emission source also becomes current international main flow technology.This electron emission source is arranged on the glass substrate, comprises pair of electrodes and is connected electron emission film between the electrode.Electrode material uses Pd usually, Pt, Ag, Cu, conductive materials such as Cr, two electrodes be spaced apart 10um, width is 100um, thickness is a few nanometer to tens nanometers, electrode is made the method that adopts silk screen printing and is realized.Adopt the method for inkjet printing between two electrodes, to make palladium oxide (PdO) electron emission film with emissivities.Then, under vacuum atmosphere, apply voltage between two electrodes, PdO is reduced into Pd, because the reduction of film is shunk, can promote the generation of slit when this changes, and forms electron emission source.At last, adopt " activation " technology to form the illuvium of carbon and/or carbon compound on the slit both sides, strengthen launching effect.
Yet there are following two significant problems in the manufacture craft of the electron emission source of traditional SED display device:
Add pulse voltage between (1) two electrode and fire slit, cause the slit location that produces on the electron emission film and the inconsistency of width, exist the deviation of the emission characteristics between electron emission source big.
Add pulse voltage between (2) two electrodes and fire slit, have part high value material in the middle of the slit, have the part, cause electron emission source to lose efficacy easily.
Summary of the invention
The object of the present invention is to provide a kind of electronic emission source preparation method of surface conductive electron-emission flat panel display spare, can accurately produce the nano slit of the electron emission source of structure unanimity, eliminate the deviation of the emission characteristics between electron emission source, and the inefficacy probability of electron emission source is little.
In order to achieve the above object, the present invention by the following technical solutions with to realize.
A kind of electronic emission source preparation method of surface conductive electron-emission flat panel display spare is characterized in that, may further comprise the steps:
(1) adopt low-pressure chemical vapor phase deposition technology, deposit silicon nitride layer on monocrystalline silicon piece applies photoresist layer again on silicon nitride layer;
(2) make grizzly bar shape mask, and be shielding with grizzly bar shape mask, the etching photoresist layer obtains the photoresist grizzly bar; Be shielding with the photoresist grizzly bar again, the wet etching silicon nitride layer obtains the silicon nitride grizzly bar; Continue the wet etching monocrystalline silicon piece, form U type monocrystalline silicon groove, chemistry is removed the photoresist grizzly bar on the silicon nitride grizzly bar then;
(3) high-temperature oxydation U type monocrystalline silicon groove forms U type silica groove; Falling the silicon nitride grizzly bar at wet etching, is shielding with U type silica groove, the wet etching monocrystalline silicon piece, and the two side of protruding U type silica groove obtains silica white nano-wire; High-temperature oxydation monocrystalline silicon piece once more;
(4) the electron emission film array of making " L " shape on silica white nano-wire, an arm of " L " shape is crossed over silica white nano-wire; Erosion removal silica white nano-wire then, and peel off electron emission film on the silica white nano-wire, form electron emission source array with nano slit; At last, make column electrode and row electrode.
Further characteristics of the present invention are:
Described wet etching silicon nitride layer is to adopt the phosphoric acid of mass concentration 85% at 180 ℃ of following wet etchings.
Described wet etching monocrystalline silicon piece is the Tetramethylammonium hydroxide TMAH anisotropic wet etch that adopts mass concentration 82.5%.
Described chemistry is removed the photoresist grizzly bar on the silicon nitride grizzly bar, is to adopt the organic solvent-acetone dissolving and wash photoresist off.
Described erosion removal silica white nano-wire is to adopt the HF acid corrosion of mass concentration 1% to remove
The described electron emission film array of making " L " shape on silica white nano-wire is to adopt inkjet printing technology or sputtering technology to make.
Described making column electrode and row electrode are to adopt silk-screen printing technique to make.
The present invention adopts technologies such as etching directly accurately to make the nano slit of electron emission source, nano slit structure unanimity, eliminated the deviation of the emission characteristics between electron emission source, and the inefficacy probability of electron emission source is little, quality and rate of finished products that can the surface conductive electron-emission flat panel display; Solution is by the inhomogeneities and the unreliability of the processing of nano slit between traditional SED electron emissive film, and the electronic transmitting efficiency that is brought thus is low, shortcomings such as lack of homogeneity.
In addition, the present invention has abandoned the process that traditional SED fires nano slit, and the design ampacity of column electrode and row electrode significantly reduces, and its cross section also significantly reduces simultaneously, has saved the precious materials that is used for column electrode and row electrode.
Description of drawings
The present invention is described in further detail below in conjunction with the drawings and specific embodiments.
Structural representation in the manufacturing process of the electron emission source that Fig. 1-Figure 16 is, wherein, the figure in every picture group (b) is the A-A cutaway view of figure (a).
Figure 17 is the used grizzly bar shape of a UV photoetching mask schematic diagram.
Figure 18 forms the used mask schematic diagram of electron emission film array of " L " shape for adopting sputtering technology.
Embodiment
A kind of concrete manufacture method of the electron emission source of the surface conductive electron-emission flat panel display spare of this law invention may further comprise the steps:
The first step organizes 1 with reference to figure, adopts low-pressure chemical vapor phase deposition (LPCVD) technology, and deposition thickness is the silicon nitride layer (Si3N4) of 30nm on 110 monocrystalline silicon piece.
Second step, organize 2 with reference to figure, adopt whirl coating technology, going up coating one layer thickness at silicon nitride layer (Si3N4) is the ultraviolet lithography glue of 200nm.
The 3rd step, with reference to Figure 17, make grizzly bar shape mask, wherein grill width is 500um, grizzly bar is spaced apart 500um; Utilize ultraviolet ray (UV) photoetching then, obtain organizing the photoresist grizzly bar shown in 3 as figure.
The 4th step was shielding with the photoresist grizzly bar, at 180 ℃ of phosphoric acid wet etching silicon nitride layers that adopt mass concentration 85% down, obtained the silicon nitride grizzly bar, organized shown in 4 as figure.
The 5th step with reference to Fig. 5, was shielding with the photoresist grizzly bar, adopted the monocrystalline silicon sheet surface of 110 of mass concentration 2.5% Tetramethylammonium hydroxide (TMAH) anisotropic wet etches, and etching depth is 60nm.
The 6th step, utilize the photoresist grizzly bar on the organic solvent-acetone removal silicon nitride grizzly bar, organize shown in 6 as figure.
In the 7th step, under 950 ° of high temperature, logical oxygen is 110 monocrystalline silicon sheet surface oxidation 10 minutes, obtains thickness and be the U type silica grizzly bar (SiO2) about 10nm, as the mask of etching monocrystalline silicon piece, organizes shown in 7 as figure.
The 8th step, under 180 ℃, adopt the phosphoric acid wet etching of mass concentration 85% to fall the silicon nitride grizzly bar, organize shown in 8 as figure.
The 9th step was shielding with U type silica grizzly bar, adopted the monocrystalline silicon piece of 110 of TMAH anisotropic wet etches, protruded the two side of U type silica grizzly bar, and forming wide is 10nm, high for the silica white nano-wire of 60nm, organizes shown in 9 as figure.
In the tenth step, under about 950 ° of high temperature, logical oxygen is 110 monocrystalline silicon sheet surface oxidation 200 minutes, prepares a layer thickness and be the SiO2 about 200nm, makes the substrate surface of monocrystalline silicon piece non-conductive, organizes shown in 10 as figure.
The 11 step, clean the monocrystalline silicon piece that is distributed with the monox nanometer linear array, organize shown in 11 as figure.
The 12 step, the electron emission film array of inkjet printing on silica white nano-wire " L " shape, an arm of " L " shape is crossed over silica white nano-wire, organizes shown in 12 as figure; Also can adopt sputtering technology to form the electron emission film array of " L " shape, its mask plate as shown in figure 18.
The 13 step, adopt the HF acid corrosion of mass concentration 1% to remove silica white nano-wire, and the electron emission film on the silica white nano-wire is peeled off, form electron emission source array with the narrow crack of nanometer, organize shown in 13 as figure.
The 14 step, adopt the method for silk screen printing, will link together with the platinum bar with the one side of all electron emission sources in the delegation, the formation column electrode, i.e. scan electrode is shown in figure picture group 14.
The 15 step, adopt the method for silk screen printing, the intersection of column electrode and row electrode is separated with insulating pattern, organize shown in 15 as figure.
The 16 step, adopt the method for silk screen printing, the another side of all electron emission sources in the same row is linked together with the platinum bar, formation row electrode gets final product, and organizes shown in 16 as figure.
Although below in conjunction with the accompanying drawings embodiment of the present invention are described, invention is not limited to above-mentioned specific embodiments, and above-mentioned specific embodiments only is schematic, guiding, rather than restrictive.Those of ordinary skill in the art under the situation that does not break away from the scope that claim of the present invention protects, can also make a variety of forms under the enlightenment of this specification, these all belong to the row of the present invention's protection.
Claims (7)
1. the electronic emission source preparation method of a surface conductive electron-emission flat panel display spare is characterized in that, may further comprise the steps:
(1) adopt low-pressure chemical vapor phase deposition technology, deposit silicon nitride layer on monocrystalline silicon piece applies photoresist layer again on silicon nitride layer;
(2) make grizzly bar shape mask, and be shielding with grizzly bar shape mask, the etching photoresist layer obtains the photoresist grizzly bar; Be shielding with the photoresist grizzly bar again, the wet etching silicon nitride layer obtains the silicon nitride grizzly bar; Continue the wet etching monocrystalline silicon piece, form U type monocrystalline silicon groove, chemistry is removed the photoresist grizzly bar on the silicon nitride grizzly bar then;
(3) high-temperature oxydation U type monocrystalline silicon groove forms U type silica groove; Wet method etches away the silicon nitride grizzly bar again, is shielding with U type silica groove, the wet etching monocrystalline silicon piece, and the two side of protruding U type silica groove obtains silica white nano-wire; High-temperature oxydation monocrystalline silicon piece once more;
(4) the electron emission film array of making " L " shape on silica white nano-wire, an arm of " L " shape is crossed over silica white nano-wire; Erosion removal silica white nano-wire then, and peel off electron emission film on the silica white nano-wire, form electron emission source array with nano slit; At last, make column electrode and row electrode.
2. the electronic emission source preparation method of a kind of surface conductive electron-emission flat panel display spare according to claim 1 is characterized in that, described wet etching silicon nitride layer is to adopt the phosphoric acid of mass concentration 85% at 180 ℃ of following wet etchings.
3. the electronic emission source preparation method of a kind of surface conductive electron-emission flat panel display spare according to claim 1, it is characterized in that, described wet etching monocrystalline silicon piece is the Tetramethylammonium hydroxide TMAH anisotropic wet etch that adopts mass concentration 82.5%.
4. the electronic emission source preparation method of a kind of surface conductive electron-emission flat panel display spare according to claim 1 is characterized in that, described chemistry is removed the photoresist grizzly bar on the silicon nitride grizzly bar, is to adopt the organic solvent-acetone dissolving and wash photoresist off.
5. the electronic emission source preparation method of a kind of surface conductive electron-emission flat panel display spare according to claim 1 is characterized in that, described erosion removal silica white nano-wire is to adopt the HF acid corrosion of mass concentration 1% to remove.
6. the electronic emission source preparation method of a kind of surface conductive electron-emission flat panel display spare according to claim 1, it is characterized in that, the described electron emission film array of making " L " shape on silica white nano-wire is to adopt inkjet printing technology or sputtering technology to make.
7. the electronic emission source preparation method of a kind of surface conductive electron-emission flat panel display spare according to claim 1 is characterized in that, described making column electrode and row electrode are to adopt silk-screen printing technique to make.
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| US10259704B2 (en) | 2016-04-07 | 2019-04-16 | Regents Of The University Of Minnesota | Nanopillar-based articles and methods of manufacture |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101775589A (en) * | 2010-03-25 | 2010-07-14 | 西安交通大学 | Preparation method of surface conduction electron-emitter film with Nb-Si-N nanometer bi-phase structure |
| CN101814408B (en) * | 2010-04-07 | 2011-11-16 | 西安交通大学 | Manufacturing method of surface-conduction electron emission source based on nano-imprint |
| CN101989520B (en) * | 2010-10-22 | 2012-07-25 | 西安交通大学 | Laminated film and method for manufacturing waveform-contour controlled surface-conduction electron emission source of laminated film |
| CN102637561B (en) * | 2012-04-21 | 2015-04-15 | 福州大学 | Manufacturing method of surface conduction electron emission source with uniform and controllable nano gaps |
| CN104407473B (en) * | 2014-11-14 | 2017-09-29 | 深圳市华星光电技术有限公司 | A kind of transparent liquid crystal display device |
| CN104536199A (en) * | 2014-12-15 | 2015-04-22 | 深圳市华星光电技术有限公司 | Transparent liquid crystal display device |
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| US20050035701A1 (en) * | 2003-08-12 | 2005-02-17 | Choi Jun-Hee | Field emission display having carbon nanotube emitter and method of manufacturing the same |
| CN1822281A (en) * | 2005-01-06 | 2006-08-23 | 三星Sdi株式会社 | Method of patterning catalyst layer for synthesis of carbon nanotubes and method of fabricating field emission device using the method |
| US20060232191A1 (en) * | 2005-04-15 | 2006-10-19 | Samsung Electronics Co., Ltd. | Gate-controlled electron-emitter array panel, active matrix display including the same, and method of manufacturing the panel |
| CN101192494A (en) * | 2006-11-24 | 2008-06-04 | 清华大学 | Electron emission element preparation method |
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| US20050035701A1 (en) * | 2003-08-12 | 2005-02-17 | Choi Jun-Hee | Field emission display having carbon nanotube emitter and method of manufacturing the same |
| CN1822281A (en) * | 2005-01-06 | 2006-08-23 | 三星Sdi株式会社 | Method of patterning catalyst layer for synthesis of carbon nanotubes and method of fabricating field emission device using the method |
| US20060232191A1 (en) * | 2005-04-15 | 2006-10-19 | Samsung Electronics Co., Ltd. | Gate-controlled electron-emitter array panel, active matrix display including the same, and method of manufacturing the panel |
| CN101192494A (en) * | 2006-11-24 | 2008-06-04 | 清华大学 | Electron emission element preparation method |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US10259704B2 (en) | 2016-04-07 | 2019-04-16 | Regents Of The University Of Minnesota | Nanopillar-based articles and methods of manufacture |
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