CN101452893B - Display device and manufacturing method of the same - Google Patents

Display device and manufacturing method of the same Download PDF

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Publication number
CN101452893B
CN101452893B CN200810185705XA CN200810185705A CN101452893B CN 101452893 B CN101452893 B CN 101452893B CN 200810185705X A CN200810185705X A CN 200810185705XA CN 200810185705 A CN200810185705 A CN 200810185705A CN 101452893 B CN101452893 B CN 101452893B
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layer
semiconductor layer
film
grid
gate insulation
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CN101452893A (en
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福地邦彦
藤井岩
中村理
前川慎志
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H01L29/6675—Amorphous silicon or polysilicon transistors
    • H01L29/66765—Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/02—Electroplating of selected surface areas
    • C25D5/022—Electroplating of selected surface areas using masking means
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
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    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
    • H01L27/1274—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor
    • H01L27/1285—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor using control of the annealing or irradiation parameters, e.g. using different scanning direction or intensity for different transistors
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    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
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    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
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    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
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    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
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    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G02F1/136295—Materials; Compositions; Manufacture processes
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Abstract

The invention relates to a display device and a manufacturing method thereof. According to one aspect of the present invention, at least one or more of patterns required for manufacturing a display device, such as a conductive layer which forms a wiring or an electrode and a mask, is formed by a droplet discharging method. At that time, a portion of the gate insulating film where is not located under the semiconductor layer is removed by during manufacturing steps of the present invention.

Description

Display unit and autofrettage thereof
The application is that application number is dividing an application of 200480040429.8 female cases.The applying date of this mother's case is on November 5th, 2004; Denomination of invention is " display unit and an autofrettage thereof "; International publication number is WO2005/047968.
Technical field
The present invention relates to a kind of display unit, be included in for example transistorized active element that forms on the glass substrate, and relate to a kind of method of making this display unit.
Background technology
Usually, as the technology of making semiconductor integrated circuit, make various films form the driven with active matrix liquid crystal indicator that the pattern manufacturing is included in the thin-film transistor that forms on the glass substrate by the light exposure of using photomask.
But, become bigger along with making the employed glass substrate size of this type of liquid crystal indicator, having become is difficult to form the pattern method with low-cost high production rate manufacturing display floater by routine.Therefore, even by formation and big substrate corresponding display panel such as continuous exposures, process time is also owing to the multiexposure, multiple exposure processing increases.In addition, a kind of light exposure apparatus that can handle this type of big substrate of research and development needs huge investment.
In addition, various therein films are all forming on the substrate surface and etched subsequently removing so that only keep under the situation of manufacture method of required part, along with substrate dimension becomes bigger, the material cost of cost is higher, and need handle for example a large amount of refuses of liquid wastes.
Summary of the invention
In view of above problem is finished the present invention.An object of the present invention is to provide a kind of display unit, it can be by improving the simplified manufacturing technique manufacturing of material efficiency.Another object of the present invention provides a kind of manufacture method of this display unit.
According to an aspect of the present invention, by forming pattern selectively, at least one that formation manufacturing display unit is required or a plurality of pattern, for example form wiring or the conductive layer of electrode and the mask layer that is used to form predetermined pattern, and remove the not a part of grid insulating film under semiconductor layer simultaneously.Droplet discharge method be used for by from fine holes selectively combinations of injections thing drop form predetermined pattern selectively.In addition, can use screen printing technique or offset printing technology.
A kind of method of making display unit of the present invention comprises: the first step forms grid by droplet discharge method having insulating surface or have on the substrate of preliminary treatment surface of base; In second step, forming gate insulation layer on this grid and on this gate insulation layer, forming first semiconductor layer; The 3rd step, by droplet discharge method on first semiconductor layer with the zone of gate overlap on form the path protection layer; In the 4th step, on gate insulation layer, first semiconductor layer and path protection layer, form and contain second semiconductor layer with a kind of conductivity-type impurity; In the 5th step, on second semiconductor layer, form first mask layer selectively; In the 6th step, use the first mask layer etching, second semiconductor layer, first semiconductor layer and grid insulating film under it; In the 7th step, on grid, form first insulating barrier selectively by droplet discharge method; In the 8th step, form source wiring and drain electrode wiring selectively by droplet discharge method; The 9th step, etching second insulating barrier on the path protection layer; In the tenth step, on the whole surface of substrate, form passivating film; In the 11 step, on the whole basal plane of passivating film, form second insulating barrier by droplet discharge method; The 12 step, etch passivation film on drain electrode wiring; With the 13 step, on second insulating barrier, form transparent conductive film so that connect drain electrode wiring.In the 11 step, second insulating barrier forms on the whole surface of substrate except drain electrode wiring wherein and zone that transparent conductive film is connected selectively by droplet discharge method.
A kind of method of making display unit of the present invention comprises: the first step forms grid by droplet discharge method having insulating surface or have on the substrate of basis film; In second step, forming gate insulation layer on this grid and on this gate insulation layer, forming first semiconductor layer; The 3rd step, by droplet discharge method on first semiconductor layer with the zone of gate overlap on form the path protection layer; In the 4th step, on gate insulation layer, first semiconductor layer and path protection layer, form and contain second semiconductor layer with a kind of conductivity-type impurity; In the 5th step, on second semiconductor layer, form first mask layer selectively; In the 6th step, use the first mask layer etching, second semiconductor layer, first semiconductor layer and grid insulating film under it; In the 7th step, on grid, form first insulating barrier selectively by droplet discharge method; In the 8th step, form source wiring and drain electrode wiring selectively by droplet discharge method; In the 9th step, use source wiring and drain electrode wiring as mask etching second insulating barrier on the path protection layer; In the tenth step, on the whole surface of substrate, form passivating film; In the 11 step, on the whole surface of passivating film, form second insulating barrier by droplet discharge method; In the 12 step, use second insulating barrier as mask etch passivation film on drain electrode wiring; With the 13 step, on second insulating barrier, form transparent conductive film so that connect drain electrode wiring.In the 11 step, second insulating barrier forms on the whole surface of substrate except drain electrode wiring wherein and zone that transparent conductive film is connected selectively by droplet discharge method.
In above-mentioned second step, preferably strengthen vapour growth (plasma CVD) or be not exposed to each layer that atmosphere forms the gate insulation layer and first semiconductor layer continuously by sputter by plasma.
Hierarchical sequence ground forms first silicon nitride film, silica (silicon oxide) film and second silicon nitride film, to form grid insulating film; Therefore can prevent gate oxidation.In addition, can obtain the grid insulating film that forms on the upper side at grid insulating film and the preferred interfaces between the semiconductor layer.
As mentioned above, according to another aspect of the present invention, grid, wiring and the mask that uses in forming the pattern process forms by forming method of patterning selectively.But at least one that the manufacturing display unit is required or a plurality of pattern can achieve the goal thus by forming the formation such as droplet discharge method of the pattern of making liquid crystal indicator selectively.
Display unit of the present invention comprises the pixel electrode that is connected to thin-film transistor.The grid that provides on one of substrate is provided this thin-film transistor; At least one the island shape grid insulating film that comprises silicon nitride layer, silicon oxynitride layer and silicon oxide layer that contacts with grid; Semiconductor layer; And the source wiring and the drain electrode wiring that form by conductive material that are connected to semiconductor layer.In addition, provide an end of semiconductor layer, make it not stretch out from an end of gate insulation layer.In thin-film transistor, grid, island shape grid insulating film, semiconductor layer and source wiring and drain electrode wiring are from substrate side lamination in turn.
Display unit of the present invention comprises the pixel electrode that is connected to thin-film transistor.The grid that provides on one of substrate is provided this thin-film transistor; At least one the island shape grid insulating film that comprises silicon nitride layer, silicon oxynitride layer and silicon oxide layer that contacts with grid; Semiconductor layer; And the source wiring and the drain electrode wiring that form by conductive material that are connected to semiconductor layer.In addition, provide an end of semiconductor layer, make an end of itself and gate insulation layer coincide.
Display unit of the present invention comprises the pixel electrode that is connected to thin-film transistor.The grid that provides on one of substrate is provided this thin-film transistor; At least one the island shape grid insulating film that comprises silicon nitride layer, silicon oxynitride layer and silicon oxide layer that contacts with grid; Semiconductor layer; Be connected to the source wiring and the drain electrode wiring that form by conductive material of semiconductor layer; And the silicon nitride layer or the silicon oxynitride layer that contact with drain electrode wiring with source wiring.In addition, provide an end of semiconductor layer, make it not stretch out from an end of gate insulation layer.
Display unit of the present invention comprises the pixel electrode that is connected to thin-film transistor.The grid that provides on one of substrate is provided this thin-film transistor; At least one the island shape grid insulating film that comprises silicon nitride layer, silicon oxynitride layer and silicon oxide layer that contacts with grid; Semiconductor layer; Be connected to the source wiring and the drain electrode wiring that form by conductive material of semiconductor layer; And the silicon nitride layer or the silicon oxynitride layer that contact with drain electrode wiring with source wiring.In addition, provide an end of semiconductor layer, make an end of itself and gate insulation layer coincide.
Display unit of the present invention comprises: the first film transistor with the grid that provides on one of substrate; At least one the island shape grid insulating film that comprises silicon nitride layer, silicon oxynitride layer and silicon oxide layer that contacts with grid; Semiconductor layer; With the source wiring and the drain electrode wiring that form by conductive material that are connected to semiconductor layer; Be connected to the transistorized pixel electrode of the first film and have the drive circuit that formed and the first film transistor have second thin-film transistor of same structure; And the wiring layer that stretches out and be connected to the transistorized grid of the first film from drive circuit.At this, an end of the semiconductor layer of pixel region or drive circuit area can be provided, make it not stretch out from an end of gate insulation layer.
Display unit of the present invention comprises: the first film transistor with the grid that provides on one of substrate; At least one the island shape grid insulating film that comprises silicon nitride layer, silicon oxynitride layer and silicon oxide layer that contacts with grid; Semiconductor layer; With the source wiring and the drain electrode wiring that form by conductive material that are connected to semiconductor layer; Be connected to the transistorized pixel electrode of the first film and have the drive circuit that formed and the first film transistor have second thin-film transistor of same structure; And the wiring layer that stretches out and be connected to the transistorized grid of the first film from drive circuit.At this, an end of semiconductor layer can be provided, make an end of itself and gate insulation layer coincide.
Display unit of the present invention comprises: the first film transistor with the grid that provides on one of substrate; At least one the island shape grid insulating film that comprises silicon nitride layer, silicon oxynitride layer and silicon oxide layer that contacts with grid; Semiconductor layer; With the source wiring and the drain electrode wiring that form by conductive material that are connected to semiconductor layer; The silicon nitride layer or the silicon oxynitride layer that contact with drain electrode wiring with source wiring; Be connected to the transistorized pixel electrode of the first film and have the drive circuit that formed and the first film transistor have second thin-film transistor of same structure; And the wiring layer that stretches out and be connected to the transistorized grid of the first film from drive circuit.At this, an end of the semiconductor layer of pixel region or drive circuit area can be provided, make it not stretch out from an end of gate insulation layer.
Display unit of the present invention comprises: the first film transistor with the grid that provides on one of substrate; At least one the island shape grid insulating film that comprises silicon nitride layer, silicon oxynitride layer and silicon oxide layer that contacts with grid; Semiconductor layer; With the source wiring and the drain electrode wiring that form by conductive material that are connected to semiconductor layer; The silicon nitride layer or the silicon oxynitride layer that contact with drain electrode wiring with source wiring; Be connected to the transistorized pixel electrode of the first film and have the drive circuit that formed and the first film transistor have second thin-film transistor of same structure; And the wiring layer that stretches out and be connected to the transistorized grid of the first film from drive circuit.At this, an end of semiconductor layer is provided, make an end of itself and gate insulation layer coincide.
According to the present invention, this display unit is a liquid crystal indicator, and substrate is clipped in the middle liquid crystal material.
According to the present invention, grid or grid wiring can be formed by conductive material by forming pattern selectively.Ag or contain the alloy of Ag; Scribble the Cu particle of NiB, Ag, or its laminated material etc. can be used as conductive material.Can prevent grid or grid wiring oxidation by silicon nitride film or silicon oxynitride film are provided thereon.
According to the present invention, can (be also referred to as crystallite by the vapour growth by using semiconductor material gas or amorphous semiconductor that sputter forms (below be also referred to as AS), half amorphous semiconductor as the semiconductor layer of thin-film transistor critical piece, below be also referred to as SAS) etc. formation, described semiconductor material gas is by the representative of operable silane and germanium.
SAS is a kind of semiconductor with the intermediate structure between amorphous and the crystal structure (comprising monocrystalline and polycrystalline).This be a kind of have in stable condition and at free energy comprising the elicit illness state semiconductor of crystalline region with shortrange order and distortion of lattice.At least can observe the crystalline region of 0.5nm in a part of zone in film to 20nm.When containing silicon as key component, Raman spectrum is moved to and is lower than 520cm -1Frequency side less.In X-ray diffraction, observe (111) or (220) diffraction maximum that produces by silicon crystal lattice.Contain at least 1 atom % or more hydrogen or halogen nertralizer as dangling bonds.SAS forms by silicide gas being carried out grow discharge decomposition (plasma CVD).Remove SiH 4Outside, Si 2H 6, SiH 2Cl 2, SiHCl 3, SiCl 4, SiF 4Deng being used as silicide gas.In addition, can mix GeF 4This silicide gas can be used H 2Perhaps H 2With one or more He, Ar, Kr and the dilution of Ne rare gas element.Thinner ratio variation from 2 times to 1000 times.Pressure limit is approximately 0.1Pa to 133Pa, supply frequency be 1MHz to 120MHz, be preferably 13MHz to 60MHz.Substrate heating temperature can be 300 ℃ or lower.It is desirable to, as the impurity element in the film, for example the Atmospheric components impurity of oxygen, nitrogen or carbon is 1 * 10 20Atom/cm 3Or still less, oxygen concentration is 5 * 10 particularly 19Atom/cm 3Or still less, be preferably 1 * 10 19Atom/cm 3Or still less.
Only the drive circuit that forms with the n-channel thin film transistors can provide by using SAS.Therefore, can be at 1cm by using 2/ Vsec is to 15cm 2The thin-film transistor of operating under the field effect mobility of/Vsec forms drive circuit on a substrate.
According to the present invention, forming wiring or mask pattern can directly carry out by droplet discharge method etc.; Therefore can obtain the wherein thin-film transistor that the material efficiency expection improves and manufacturing step is simplified of material, and the liquid crystal indicator that obtains using this thin-film transistor.
In addition, except the zone under the semiconductor layer, do not form grid insulating film; Therefore TFTs is connected to each other with wiring easily.If TFTs is formed by poly semiconductor with high field effect mobility or microcrystalline silicon semiconductor, then for example the various circuit of scan line drive circuit can be assembled on the substrate easily by the technology identical with pixel TFT.
Description of drawings
Fig. 1 is the vertical view that shows the liquid crystal indicator structure.
Fig. 2 is the vertical view that shows the liquid crystal indicator structure.
Fig. 3 is the vertical view that shows the liquid crystal indicator structure.
Fig. 4 A is the cutaway view of the manufacture method of explanation liquid crystal indicator to 4E.
Fig. 5 A is the cutaway view of the manufacture method of explanation liquid crystal indicator to 5E.
Fig. 6 A is the cutaway view of the manufacture method of explanation liquid crystal indicator to 6D.
Fig. 7 A is the cutaway view of the manufacture method of explanation liquid crystal indicator to 7E.
Fig. 8 A is the cutaway view of the manufacture method of explanation liquid crystal indicator to 8D.
Fig. 9 A is the cutaway view of the manufacture method of explanation liquid crystal indicator to 9C.
Figure 10 A is the cutaway view of the manufacture method of explanation liquid crystal indicator to 10E.
Figure 11 A is the cutaway view of the manufacture method of explanation liquid crystal indicator to 11E.
Figure 12 A is the cutaway view of the manufacture method of explanation liquid crystal indicator to 12E.
Figure 13 is the cutaway view of the manufacture method of explanation liquid crystal indicator.
Figure 14 A shows the vertical view and the cutaway view of the manufacture method of describing liquid crystal indicator to 14C.
Figure 15 A is to the vertical view and the cutaway view of the manufacture method of 15C explicit declaration liquid crystal indicator.
Figure 16 A is to the vertical view and the cutaway view of the manufacture method of 16C explicit declaration liquid crystal indicator.
Figure 17 A is to the vertical view and the cutaway view of the manufacture method of 17C explicit declaration liquid crystal indicator.
Figure 18 is the cutaway view of the manufacture method of explanation liquid crystal indicator.
Figure 19 A and 19B are the accompanying drawings of the assembly method (COG) of explanation liquid crystal indicator drive circuit.
Figure 20 A and 20B are the accompanying drawings of the assembly method (TAB) of explanation liquid crystal indicator drive circuit.
Figure 21 A and 21B are the accompanying drawings of the assembly method (COG) of explanation liquid crystal indicator drive circuit.
Figure 22 is the accompanying drawing of the circuit structure of explanation when the scan line drive circuit of liquid crystal indicator is formed by TFT.
Figure 23 is the accompanying drawing of the circuit structure (shift-register circuit) under the scan line drive circuit of the explanation liquid crystal indicator situation about being formed by TFT.
Figure 24 is the accompanying drawing of the circuit structure (buffer circuit) under the scan line drive circuit of the explanation liquid crystal indicator situation about being formed by TFT.
Figure 25 is the calcspar that shows the LCD TV main structure.
Figure 26 is the accompanying drawing of explanation liquid crystal display device module structure.
Figure 27 is the accompanying drawing that the television receiver structure of finishing according to the present invention is described.
Figure 28 is the vertical view that shows liquid crystal indicator.
Figure 29 is the equivalent circuit schematic of liquid crystal indicator shown in Figure 28.
Figure 30 is the accompanying drawing of explanation liquid droplet ejection system structure.
Embodiment
Embodiment of the present invention pattern will elaborate with reference to the accompanying drawings.Should point out that the same tag numeral is represented same section in each accompanying drawing, and should explanation will not repeat in the following description.In addition, it should be understood that various changes and modifications will be conspicuous to those skilled in the art, unless this changes and improvements break away from content of the present invention and scope.Therefore, explain the explanation that the invention is not restricted in this embodiment pattern.
Fig. 1 shows the vertical view of the present invention's liquid crystal indicator structure in a certain respect.On substrate 100, form pixel 102 wherein and be arranged in pixel portion 101, scan line input 103 and holding wire input 104 in the matrix with insulating surface.Provide number of pixels according to various standards.The number of pixels of XGA can be 1024 * 768 * 3 (RGB), the number of pixels of UXGA can be 1600 * 1200 * 3 (RGB), and the number of pixels of the complete some high-resolution corresponding with it (full-speck high vision) is 1920 * 1080 * 3 (RGB).
Pixel 102 is by making scan line that is sent by scan line input 103 and the holding wire cross arrangement of being sent by holding wire input 104 in drive circuit in matrix.The grid of the thin-film transistor that provides in the pixel 102 is provided the scan line that sends, and transmits to it.The holding wire that sends is electrically connected on source electrode or drain electrode, transmits to it.Each pixel 102 has switch element and connected pixel electrode.The representative instance of switch element is TFT.The gate electrode side of TFT is connected to scan line, and its source electrode or drain side are connected to holding wire; Therefore each pixel can be by independently controlling from the signal of outside input.As representative instance, switch element, TFT can provide in drive circuit.TFT in the drive circuit can have with pixel 102 in the identical structure of TFTs; Therefore TFTs in the drive circuit and the TFTs in the pixel 102 can make simultaneously.
TFT comprises semiconductor layer, gate insulation layer and the grid as key component.Also comprise the wiring that is connected with the drain region with the source electrode that in semiconductor layer, forms.Wherein the top gate type arranged from substrate side of semiconductor layer, gate insulation layer and grid, wherein the bottom gate type arranged from substrate side of grid, gate insulation layer and semiconductor layer is commonly referred to as the structure of TFT.But any structure can be applied to the present invention.
By using the amorphous semiconductor made from vapor growth method or sputtering method by the semiconductor material gas of silane or germane representative (following also be expressed as " AS "); By the poly semiconductor that uses luminous energy or heat energy that the amorphous semiconductor crystallization is formed; Half amorphous (be also referred to as crystallite, and following also be expressed as " SAS ") semiconductor or the like can be as the material that forms semiconductor layer.
SAS is a kind of semiconductor with the intermediate structure between amorphous and the crystal structure (comprising monocrystalline and polycrystalline).This be a kind of have in stable condition and at free energy comprising the elicit illness state semiconductor of crystalline region with shortrange order and distortion of lattice.At least can observe the crystalline region of 0.5nm in a part of zone in film to 20nm.When containing silicon as key component, Raman spectrum is moved to and is lower than 520cm -1Frequency side less.In X-ray diffraction, observe (111) or (220) diffraction maximum that produces by silicon crystal lattice.Contain at least 1 atom % or more hydrogen or halogen nertralizer as dangling bonds.SAS forms by silicide gas being carried out grow discharge decomposition (plasma CVD).Remove SiH 4Outside, Si 2H 6, SiH 2Cl 2, SiHCl 3, SiCl 4, SiF 4Deng being used as silicide gas.In addition, can mix GeF 4This silicide gas can be used H 2Perhaps H 2With one or more He, Ar, Kr and the dilution of Ne rare gas element.Thinner ratio variation from 2 times to 1000 times.Pressure limit is approximately 0.1Pa to 133Pa, supply frequency be 1MHz to 120MHz, be preferably 13MHz to 60MHz.Substrate heating temperature can be 300 ℃ or lower.It is desirable to, as the impurity element in the film, for example the Atmospheric components impurity of oxygen, nitrogen or carbon is 1 * 10 20Atom/cm 3Or still less, particularly, oxygen concentration is 5 * 10 19Atom/cm 3Or still less, be preferably 1 * 10 19Atom/cm 3Or still less.
As the conductive material that is used for forming wiring, can use the metal that contains on a small quantity for example Ag (silver), Au (gold), Cu (copper), W (tungsten), Al (aluminium), scribble the composition of the Cu etc. of Ag on a small quantity by droplet discharge method.In addition, can mix the tin indium oxide (ITO) of launching light or the tin indium oxide (ITSO) that contains silica.Especially, because grid wiring preferably has low resistance, thus preferably use any material that is dissolved in or is dispersed in the solvent of gold, silver wherein or copper, and consider resistivity value, more preferably use to have low-resistance silver or copper.
As the conductive material that is used to form wiring, silver is expensive.Therefore, if can form the lines with several microns width by using the droplet jet system in the future, can pass through in conjunction with electroplating technology so, for example copper facing obtains required width.Under the situation of electroplating, can adopt wherein electroplate liquid mobile method on big substrate, replace the method for wherein big substrate immersion as the electroplating bath in pond.
In order to improve the conductive material that is used to form wiring and the adhesiveness between substrate, organic mesosphere insulation film, inorganic intermediate layer insulation film or the conductive film, can form adhesiveness improving layer to 10nm thickness by the metal material of Ti (titanium), W (tungsten), Cr (chromium), Al (aluminium), Ta (tantalum), Ni (nickel), Zr (zirconium), Hf (hafnium), V (vanadium), Ir (iridium), Nb (niobium), Pd (palladium), Pt (platinum), Mo (molybdenum), Co (cobalt) or Rh (rhodium) with 0.01nm by sputter or gas deposition.Preferably therefore on the surface that pattern is provided on the substrate, carry out preliminary treatment.Can form TiO xPhotocatalyst layer replace metal material.This adhesiveness improving layer not only can form under conductive material layer, and can on conductive material layer, form, to improve the adhesiveness between conductive material layer and organic mesosphere insulation film that will form, inorganic intermediate layer insulation film or the conductive film.
Fig. 1 shows the structure of liquid crystal indicator, and wherein the signal of input scan line and holding wire is controlled by external drive circuit.In addition, as shown in Figure 2, drive IC 105 and 106 can be assembled on the substrate 100 by COG (chip on glass).Drive IC s can form on the single crystal semiconductor substrate or can formed by the circuit with the TFT on glass substrate.
As shown in Figure 3, when the TFT that provides on pixel was formed by SAS, scan line drive circuit 107 can whole formation on substrate 100.Reference numerals 108 expression protection diodes.
Figure 30 shows a kind of pattern of the liquid droplet ejection apparatus that is used to form pattern.Each head 1405 of liquid droplet ejection apparatus 1403 is connected respectively to control device 1407.Control device 1407 sprays from head 1405 according to the program control drop of input computer 1410.When the intermediate layer insulation film formed by a large amount of injections, a plurality of narrow lines used same materials overlapping so that improve output.The timing of liquid droplets can be determined according to the mark 1411 that for example forms on substrate 1400.In addition, reference point can be fixed on the edge of substrate 1400 as reference.Reference point is surveyed by the imaging device 1404 of for example CCD, and computer 1410 identifications produce control signal by the digital signal of image processing apparatus 1409 conversions.Certainly, the pattern-information that form on substrate 1400 is arranged in recording medium 1408.According to this information, control signal can be transferred to control device 1407, and each head 1405 of liquid droplet ejection apparatus 1403 can be controlled respectively.
In addition, under the situation of using big substrate, liquid droplet ejection apparatus 1403 can have the size that equals the liquid crystal indicator Breadth Maximum.If the size of liquid droplet ejection apparatus 1403 equals the Breadth Maximum of the liquid crystal indicator that will make, then can make this liquid crystal indicator effectively.
Next, will the details of relevant pixel 102 be described according to the manufacturing step that uses droplet discharge method.
Embodiment pattern 1
In the present embodiment pattern, path protection type method of manufacturing thin film transistor will be described.
Fig. 4 A shows by droplet discharge method formation grid and the process that is connected to the grid wiring of this grid to 6E.
Except the non-alkali glass substrate and ceramic substrate of barium borosilicate glass, alumina-borosilicate glass or the aluminosilicate glass for example made with molten method or float glass process, that can bear processing temperature etc. has stable on heating plasticity substrate and can be used for substrate 100.In addition, also can application examples such as the Semiconductor substrate of monocrystalline silicon, wherein for example the surface of stainless metal substrate provides the substrate of insulating barrier.
Metal material or its oxide (TiO by for example Ti (titanium), W (tungsten), Cr (chromium), Al (aluminium), Ta (tantalum), Ni (nickel), Zr (zirconium), Hf (hafnium), V (vanadium), Ir (iridium), Nb (niobium), Pd (palladium), Pt (platinum), Mo (molybdenum), Co (cobalt) or Rh (rhodium) xDeng) the adhesiveness improving layer 201 preferred methods by for example sputter or gas deposition that form form (Fig. 4 A) on substrate 100.Adhesiveness improving layer 201 can form has the film thickness of 0.01nm to 10nm; But because can form it extremely thin, it needn't have layer structure.Therefore, preferably on the surface that figuratum grid etc. will be provided, carry out preliminary treatment.When obtaining suitable adhesiveness, grid can directly form on substrate 100 by droplet discharge method, and does not form adhesiveness improving layer 201.
Can suitably use adhesiveness improving layer 201 so that improve the adhesiveness of all layers of following formation, and improve the adhesiveness between substrate 100 and the grid wiring 202.
Grid wiring 202 and grid 203 form (Fig. 4 B) by spraying the composition that contains conductive material with droplet discharge method on adhesiveness improving layer 201.The metal that contains for example silver, gold, copper, tungsten or aluminium can be as the conductive material that forms these layers as the composition of key component.In addition, can mix the tin indium oxide (ITO) of launching light and the tin indium oxide (ITSO) that contains silica.Especially, grid wiring is preferably low-resistance.Therefore, preferably use any material that is dissolved in or is dispersed in the solvent of gold, silver wherein or copper, and consider resistivity value, more preferably use to have low-resistance silver or copper.But, under the situation of using silver or copper, can provide block film to be used for impurity measurement in addition.Solvent has the ester class of butyl acetate for example, the alcohols of for example isopropyl alcohol, organic solvent of for example acetone etc. accordingly.By regulating suitably reconciliation statement surface tension and viscosity such as solvent density and interpolation surfactant.
The nozzle diameter that is used for droplet discharge method is set to 0.02 μ m to 100 μ m (be preferably 30 μ m or still less), preferably is set to 0.001pl to 100pl (be preferably 10pl or still less) from the composition emitted dose of nozzle ejection.Have two types of (on-demand) type as required be used for droplet discharge method and continuous types, the both can use.In addition, exist to use the piezoelectric system by applying the voltage transition performance to piezoelectric and make the composition boiling and will be used for the heating system of the composition of droplet discharge method with nozzle ejection by being arranged on heater in the nozzle, the both can use.Distance between object and the nozzle spray-orifice is preferably as close as possible, so that make drop drop in desired location, it preferably is set to 0.1mm to 3mm (be preferably 1mm or still less).When keeping relative distance, one of nozzle and object move and the required pattern that draws.In addition, before the combinations of injections thing, can on the object surface, carry out plasma treatment.This point is to utilize when carrying out plasma treatment, and the surface of object becomes hydrophilic and hydrophobic.For example, its become the affinity deionized water with and become and repel slurry with the alcohol dissolving.
The step of combinations of injections thing can under low pressure be carried out, and makes that when on combinations of injections thing and the arrival object, the solvent of composition can volatilize, and can omit or shorten subsequent drying and baking step.After the combinations of injections thing, one of drying and baking step or both carry out at atmospheric or low pressure by laser emission, rapid thermal annealing, heating furnace etc.Dry and baking step all is a heat treatment step.For example, drying carried out 3 minutes and dried carrying out 15 minutes to 120 minutes 200 ℃ to 350 ℃ temperature at 100 ℃.Therefore, target, temperature and time are different.In order to make dry and baking step carries out well, can heated substrate, its temperature is set to 100 ℃ to 800 ℃ (being preferably 200 ℃ to 350 ℃), still depends on the material of substrate etc.Through this step, the solvent in the composition is evaporated or dispersant is removed by chemistry, and resin around cures and contraction, quickens fusion and welding thus.This point is carried out under oxygen, nitrogen or air atmosphere.But, carry out under the oxygen atmosphere that preferred solvolysis therein of this step or metallic element disperse to remove easily.
Continuous wave or pulsed gas laser or solid-state laser can be used to use the radiation of laser.Exist excimer laser, Ar laser etc. as the gaseous state laser, and for example exist to use and doped YAG or YVO such as Cr, Nd 4The laser of crystal as solid-state laser.With regard to laser absorption rate, preferably use continuous-wave laser.In addition, also can use so-called laser emission mixed method in conjunction with continuous oscillation and impulse hunting.Yet the heat treatment by laser emission can second be carried out fast from several microseconds to tens, depends on the substrate thermal endurance.Rapid thermal annealing (RTA) makes temperature raise fast under inert gas atmosphere by using the infrared lamp of emission from the ultraviolet light to the infrared light, Halogen lamp LED etc., applies several microseconds and carries out to the Fast Heating of a few minutes.This processing is carried out fast; Therefore, only can be heated basically, and therefore have the impregnable advantage of lower level on uppermost surface.
Form after grid wiring 202, grid 203 and the adhesiveness improving layer 201, it is desirable to carry out of the processing of one of following two steps as the adhesiveness improving layer 201 that its surface is exposed.
First method is by making the step (referring to Fig. 4 C) with grid wiring 202 and grid 203 nonoverlapping adhesiveness improving layers 201 insulation formation insulating barriers 205.In other words, make with grid wiring 202 and grid 203 nonoverlapping adhesiveness improving layer 201 oxidations and insulate.Under adhesiveness improving layer 201 situation by oxide isolated in such a way, adhesiveness improving layer 201 is preferably formed has the film thickness of 0.01nm to 10nm, makes that it can be oxidized easily.Should point out, be exposed to the method for oxygen atmosphere or the method for heat-treating can be used as method for oxidation.
Second method is to use grid wiring 202, grid 203, and grid 203 is as mask etching and the step of removing adhesiveness improving layer 201.Using under the situation of this step, without limits for the film thickness of adhesiveness improving layer 201.
Next, by using plasma CVD method or sputtering method on grid and grid wiring, to form gate insulation layer (seeing Fig. 4 D) with individual layer or laminar structure.As particularly preferred pattern, the three level stack body of insulating barrier 207 of forming the insulating barrier 205 comprise silicon nitride, comprise the insulating barrier 206 of silica and comprising silicon nitride is as grid insulating film.Should point out that for example the rare gas of argon gas can be included in the reactant gas and sneak into the insulation film that will form, so that be formed on the fine and close insulation film that has gate leak current under the low deposition temperature hardly.Because the deterioration that causes of oxidation can comprise silicon nitride or silicon nitride oxide and the insulating barrier 205 that contacts with grid 203 with grid wiring 202 and being prevented by formation.
Next, on grid, form semiconductor layer 208, have gate insulation layer therebetween.Semiconductor layer 208 uses the AS that is made by the semiconductor material gas of silane or germane representative to form by with vapor phase growth method or sputtering method, is perhaps formed by SAS.Plasma CVD method or hot CVD method can be used as vapor phase growth method.
Under the situation of using the plasma CVD method, AS is by the SiH that is semiconductor material gas 4Perhaps SiH 4And H 2Mist form.Work as SiH 4Use H 2When diluting 3 times to 1000 times formation mists, perhaps ought use GeF 4Dilute Si 2H 6Make Si 2H 6To GeF 4Gas flow rate when being 20 to 40 to 0.9, can obtain the Si ratio of components and be 80% or more SAS.Especially because semiconductor layer 208 can have from the degree of crystallinity at the interface on basis, so latter instance is preferred.
Through above step, possible is is not exposed to atmosphere and forms insulating barrier 205 continuously to semiconductor layer 208.In other words, can form each interface between the laminate layers and be not subjected to Atmospheric components pollute and air in floating impurity element gas dirt-carrying dye; The TFT changes of properties is reduced.
Next, path protection film 209 by on insulating barrier 208 therein grid 203 in its position that forms down selectively the combinations of injections thing form.That is to say path protection film 209 and grid 203 overlapping (referring to Fig. 4 E).For example the resin material of epoxy resin, acrylic resin, phenolic resins, novolac resin, melmac or polyurethane resin is as path protection film 209.In addition, path protection film 209 forms with droplet discharge method by using organic material, and described organic material is benzocyclobutene, parylene, flash of light or luminous polyimides for example; By for example compound-material of silica alkyl polymer polymerization manufacturing; The composite material that contains water-soluble homopolymer and water solubility copolymer; Or the like.In using any material, by suitable reconciliation statement surface tension and viscosity such as retarder thinner or interpolation surfactants.
Next, n N-type semiconductor N film 210 forms (Fig. 5 A) on semiconductive thin film 208 and path protection film 209.N N-type semiconductor N film 210 can use silane gas and phosphine gas to be formed by AS or SAS.
Next, mask 211 forms on n type semiconductor layer 210.Have with the semiconductor layer 213 of semiconductor layer 212 same conductivity by using mask 211 etching n type semiconductor layer 210, semiconductor layer 208, insulating barrier 205, comprising the insulating barrier 206 of silica and form (Fig. 5 B and Fig. 5 C) by the insulating barrier 207 that silicon nitride forms.Here, carry out etching and make an end of semiconductor layer 210 and an end of gate insulation layer coincide, that is to say that this end of semiconductor layer 210 does not stretch out from this end of gate insulation layer.Etched semiconductor layer is called island semiconductor layer, and etched gate insulation layer is called island shape gate insulation layer.
Remove after the mask 211, combinations of injections thing on the position that source wiring 215 on the grid wiring 202 and wherein will form, it prevents short circuit between grid wiring and the source wiring, forms mesosphere insulation film 214 (Fig. 5 D) thus.Mesosphere insulation film 214 by epoxy resin for example, acrylic resin, phenolic resins, novolac resin, melmac or and the resin of polyurethane resin form.In addition, mesosphere insulation film 214 uses organic material to form by droplet discharge method, and described organic material is benzocyclobutene, parylene, flash of light or luminous polyimides for example; By for example compound-material of silica alkyl polymer polymerization manufacturing; The composition that contains water-soluble homopolymer and water solubility copolymer; Or the like.In using any material, by suitable reconciliation statement surface tension and viscosity such as retarder thinner or interpolation surfactants.Mesosphere insulation film can make surface planarization.
Next, source wiring and drain electrode wiring 215 and the 216 composition formation (Fig. 5 E) that contain conductive material by using droplet discharge method to spray.
Subsequently, use source wiring and drain electrode wiring 215 and 216 as the n N-type semiconductor N film 210 on the mask etching path protection film 209; Therefore the n N-type semiconductor N film 217 and 218 that forms source electrode and drain region is formed (Fig. 6 A).Conductor resistance can reduce with the n N-type semiconductor N film 217 and 218 that forms source electrode and drain region.In this embodiment pattern, source wiring and drain electrode wiring are as mask; Alternatively, another mask can independently provide.
Next, the insulating barrier 219 as passivation film forms on whole surface so that protect channel region (Fig. 6 B).Insulating barrier 219 is preferred with the silicon nitride film formation that forms by plasma CVD or sputter.Require this film meticulous, prevent for example organic substance, metal thus and the pollutant of the steam that suspends enters in air.For this purpose, if silicon nitride film is by using silicon as the RF sputter formation as sputter gas of the mixture of the rare gas element of object and nitrogen and for example argon gas; Fineness can be by obtaining promoting that it is preferred with rare gas element dipping film thus.
Next, insulating barrier 220 forms (Fig. 6 C) on the whole surface of substrate.Insulating barrier 220 is by providing the opening with through hole to form according to pixel wherein by the position that forms corresponding to first electrode 226.This insulating barrier 220 can be by for example inorganic insulating material of silica, silicon nitride, silicon oxynitride, aluminium oxide, aluminium nitride, aluminum oxynitride etc.; Acrylic acid, methacrylic acid and its derivative; Has stable on heating high molecular weight material, for example polyimides, aromatic polyamides or polybenzimidazoles; Comprise the Si-O-Si key, wherein compound is by silicon, oxygen and hydrogen manufacturing, by the inorganic siloxanes that uses siloxanes substrate material to form as parent material; Or wherein the hydrogen on the silicon forms with the organosiloxane insulating material that the organic group of for example methyl or phenyl replaces.When insulating barrier 220 by light-sensitive material or non-photosensitive materials, when for example acrylic acid or polyimides form, because its edge has radius of curvature continually varying shape and do not have the discontinuous formation of segmentation than the film in the upper strata, so it is preferred.
Insulating barrier 220 forms on whole surface by droplet discharge method, spin coating or dip coated.Opening forms by the predetermined portions at insulating barrier 220 such as etching.Here, in the insulating barrier 219 quilt etchings simultaneously of 220 times formation of insulating barrier, so that the predetermined portions of grid wiring 202, source wiring and drain electrode wiring 215 and 216 is exposed.In addition, when insulating barrier 220 forms selectively by droplet discharge method, because needn't etching isolation layer 220, so it is preferred.
As the method that in insulating barrier 220, forms opening, can use following steps.At first, before forming insulating barrier 220, the whole surface of substrate is by being coated with for example liquid repellent agent of fluorine-based coupling agent, as fluoroalkyl silane; The organic material that perhaps contains fluorine, for example CHF 3Produce water proofing property.Subsequently, mask material is applied to wherein will form the part of opening, and carries out O 2Polishing etc.; Remove the liquid repellent agent that on the zone except part, applies thus with mask.Next, remove mask, and on the whole surface of substrate, form insulating barrier 220 by spin coating, dip coated or droplet discharge method.Insulating barrier 220 does not form in the part that produces water proofing property; Form opening in this part thus.Should point out, in applying liquid repellent agent,, just not need the step that forms mask, removes liquid repellent agent and remove mask as long as opening is coated with liquid repellent agent by droplet discharge method.
Next, the pixel electrode layer corresponding to pixel electrode 221 is electrically connected to drain electrode wiring 216 (Fig. 6 D) by the composition that injection contains conductive material.Pixel electrode 221 forms by the composition that oven dry has specific pattern, and described composition contains tin indium oxide (ITO), contains the tin indium oxide (ITSO) of silica, zinc oxide (ZnO), tin oxide (SnO 2) etc.Under the situation of reflection-type liquid-crystal display device, can use the composition that contains Ag (silver), Au (gold), Cu (copper), W (tungsten) or Al (aluminium) as key component.As another kind of method, transparent conductive film or reflective conductive film form by sputter; Mask pattern forms by droplet discharge method; And pixel electrode can be by forming in conjunction with etching.Figure 14 A display plane structure, Figure 14 B shows A-B, and Figure 14 C shows the longitudinal component structure corresponding to C-D; Therefore can be simultaneously referring to accompanying drawing.
By above step, finish the TFT substrate 200 that is used for liquid crystal indicator, wherein bottom gate (reverse interleaved) TFT is connected (Fig. 6 D) with pixel electrode on substrate 100.
Next, the insulating barrier 222 that is called correcting layer forms so that cover pixel electrode 221 by printing or spin coating.Insulating barrier 222 can form as shown selectively by silk screen printing or hectographic printing.Grind thereafter.Subsequently, on the peripheral region of the pixel that forms by droplet discharge method, forming sealant 223 (Figure 13).
To have as the insulating barrier 224 of correcting layer with as the counter substrate 229 of the conductive layer 225 of reverse electrode and paste on the TFT substrate 200, have the spacer (not shown) therebetween.Gap between the substrate can have liquid crystal layer, makes liquid crystal indicator (Figure 13) thus.Filler can be sneaked into sealant 223.In addition, counter substrate 229 can have colour filter or screen optical thin film (black matix) etc.Should point out after pasting counter substrate 229, distribution method (sessile drop method) is arranged or inject the dip coated (pump plays method) of liquid crystal by capillarity as the method that forms liquid crystal layer.
As mentioned above, in this embodiment pattern, can omit the use photomask by skipping the light step of exposure, thereby can simplify technology.In addition because on substrate, directly form some patterns by droplet discharge method, so liquid crystal indicator can make easily, even one side of this substrate (after the fifth-generation computer) has one meter or higher length.
Embodiment pattern 2
Path protection type structure is shown in the embodiment pattern 1.In this embodiment, the channel etch type that does not wherein form the path protection film will be described as another kind of pattern.
Grid wiring 202 and grid 203 form by spray the composition that contains conductive material on substrate 100.Next, has the grid insulating film of individual layer or hierarchy by plasma CVD or sputter formation.As special preferred form, the three level stack body of insulating barrier 206 that have the insulating barrier 205 that formed by silicon nitride, is formed by silica and the insulation film 207 that formed by silicon nitride is equivalent to grid insulating film.In addition, until the semiconductive thin film 208 that forms as active layer.Therefore, Fig. 4 A is similar to embodiment pattern 1 to the step shown in the 4D.
Next, n N-type semiconductor N film 301 forms (Fig. 7 A) on semiconductive thin film 208.N N-type semiconductor N film 301 can use silane gas and phosphine gas to be formed by AS or SAS.
By above step, possible is is not exposed to atmosphere and forms insulating barrier 205 continuously to semiconductor layer 301.In other words, can form each interface between the laminate layers and be not subjected to Atmospheric components pollute and air in the pollution impurity element that suspends pollute; The TFT changes of properties is reduced.
Next, mask 302 is by droplet discharge method combinations of injections thing formation (Fig. 7 B) selectively on semiconductor layer 301.Use mask 302 with semiconductor layer 208 and n type semiconductor layer 301, and gate insulation layer 205,206 and gate insulation layer 207 etchings simultaneously; Form semiconductor layer 303 and n type semiconductor layer 304 (Fig. 7 C) thus.
Remove after the mask 302, combinations of injections thing on the position that source wiring 306 on the grid wiring 202 and wherein will form forms intermediate layer film 305 (Fig. 7 D) thus.Intermediate layer film 305 by epoxy resin for example, acrylic resin, phenolic resins, novolac resin, melmac or and the resin of polyurethane resin form.In addition, mesosphere insulation film 305 uses organic material to form by droplet discharge method, and described organic material is benzocyclobutene, parylene, flash of light or luminous polyimides for example; By for example compound-material of silica alkyl polymer polymerization manufacturing; The composition that contains water-soluble homopolymer and water solubility copolymer; Or the like.In using any material, by suitable reconciliation statement surface tension and viscosity such as retarder thinner or interpolation surfactants.
The composition that contains conductive material sprays on semiconductor layer 304; Form source wiring and drain electrode wiring 306 and 307 (Fig. 7 E) thus.
Subsequently, semiconductor layer 308 and 309 is by using source wiring and drain electrode wiring 306 and 307 to form as mask etching n type semiconductor layer 304.In this case, semiconductor layer 303 is also etched to a certain extent, and forms semiconductor layer 310 (Fig. 8 A).Subsequent step and step identical (Fig. 8 B is to 8D) in the embodiment pattern 1.
By above step, finish the TFT substrate 300 that is used for liquid crystal indicator, wherein bottom gate (reverse interleaved) passage etching TFT is connected (Fig. 8 D) with pixel electrode 221 on substrate 100.Figure 15 A display plane structure, Figure 15 B shows A-B, and Figure 15 C shows the longitudinal component structure corresponding to C-D; Therefore can be simultaneously referring to accompanying drawing.
The embodiment mode 3
In embodiment pattern 1 and 2, being wherein in each pattern, the whole surface of substrate covers with protective layer 219 and insulation film 220.In the present embodiment pattern, only TFT and wiring cover with protective layer 219 and insulation film 701.
On substrate 100, form after the semiconductive thin film, form insulation film so that the protection channel region.Thus, Fig. 6 A is similar to embodiment pattern 1 with the step shown in the 6B.Under the situation that forms the channel etch type semiconductive thin film, can use embodiment pattern 2.
Next, insulating barrier 701 only forms (Fig. 9 A) selectively by droplet discharge method on semiconductor layer, grid wiring 202 and the source wiring of substrate and drain electrode wiring 215 and 216.Insulating barrier 701 is in the part that will not be electrically connected to subsequently the pixel electrode 221 that forms on drain electrode wiring 216, and will be electrically connected on the outside wiring (not shown) on grid wiring and the source wiring 215 and form.This insulating barrier 701 can be by for example inorganic insulating material of silica, silicon nitride, silicon oxynitride, aluminium oxide, aluminium nitride, aluminum oxynitride etc.; Acrylic acid, methacrylic acid and its derivative; Has stable on heating high molecular weight material, for example polyimides, aromatic polyamides or polybenzimidazoles; Comprise the Si-O-Si key, wherein compound is by silicon, oxygen and hydrogen manufacturing, by the inorganic siloxanes that uses siloxanes substrate material to form as parent material; Or wherein the hydrogen on the silicon forms with the organosiloxane insulating material that the organic group of for example methyl or phenyl replaces.When insulating barrier by light-sensitive material or non-photosensitive materials, when for example acrylic acid or polyimides form, because its edge has radius of curvature continually varying shape and do not have the discontinuous formation of segmentation than the film in the upper strata, so it is preferred.
Then, protective layer 219 forms opening thus by using insulating barrier 710 as the in addition etching of the dry ecthing of mask or wet etching.At this, the predetermined portions of the predetermined portions of the grid wiring 202 under protective layer 219 and source electrode and drain electrode wiring 215 and 216 is exposed.
Next, the pixel electrode layer corresponding to pixel electrode 702 is electrically connected to drain electrode wiring 216 (Fig. 9 C) by spraying the composition that contains conductive material selectively.Pixel electrode 702 forms by the composition that oven dry has specific pattern, and described composition contains tin indium oxide (ITO), contains the tin indium oxide (ITSO) of silica, zinc oxide (ZnO), tin oxide (SnO 2) etc.Under the situation of reflection-type liquid-crystal display device, can use the composition that contains the metallic particles of Ag (silver), Au (gold), Cu (copper), W (tungsten) or Al (aluminium) for example as key component.As another kind of method, transparent conductive film or reflective conductive film form by sputter; Mask pattern forms by droplet discharge method; And pixel electrode can be by forming in conjunction with etching.
By above step, finish the TFT substrate 700 that is used for liquid crystal indicator, wherein bottom gate (reverse interleaved) TFT is connected (Fig. 9 C) with pixel electrode 221 on substrate 100.Figure 16 A represents planar structure, and Figure 16 B represents A-B, and Figure 16 C represents the longitudinal component structure corresponding to C-D; Therefore can be simultaneously referring to accompanying drawing.
Embodiment pattern 4
To describe a kind of pattern in the embodiment pattern 4, wherein pixel electrode 501 forms for 516 times at drain electrode wiring.As an example of embodiment pattern, a kind of path protection type that wherein is provided for protecting the insulating barrier (hereinafter referred to as the path protection layer) of channel region will be described at this.Which kind of method that don't work, can forming wherein, channel region does not have as implementing the passage etching type of the path protection layer in the scheme mode 3 yet.
Figure 10 A to 10E, 11A to 11E and 12A represent on substrate 100, to form grid and be connected to the step of the grid wiring of this grid to 12E by droplet discharge method.
Adhesiveness improving layer 201 forms (Figure 10 A) by sputter, vapor deposition etc. on substrate 100.Should point out that if can obtain sufficient adhesiveness, grid can directly form, and does not form the adhesiveness improving layer on substrate 100.
Pixel electrode layer corresponding to pixel electrode 501 forms (Figure 10 B) by spray the composition that contains conductive material selectively on adhesiveness improving layer 201.Pixel electrode 501 can have the composition formation of specific pattern by oven dry, and described composition contains tin indium oxide (ITO), contains the tin indium oxide (ITSO) of silica, zinc oxide (ZnO), tin oxide (SnO 2) etc.Under the situation of reflection-type liquid-crystal display device, can use the composition that contains the metallic particles of Ag (silver), Au (gold), Cu (copper), W (tungsten) or Al (aluminium) for example as key component.As another kind of method, transparent conductive film or reflective conductive film form by sputter; Mask pattern forms by droplet discharge method; And pixel electrode can be by forming in conjunction with etching.In addition, pixel electrode can form for 201 times in the adhesiveness improving layer before forming adhesiveness improving layer 201.
Grid wiring 502 and grid 503 form on adhesiveness improving layer 201 (Figure 10 C) by spraying the composition that contains conductive material with droplet discharge method.For example containing, the composition of the metallic particles of Ag (silver), Au (gold), Cu (copper), W (tungsten) or Al (aluminium) can be used as the conductive material that forms these layers.In addition, can mix the tin indium oxide (ITO) of launching light and the tin indium oxide (ITSO) that contains silica.Especially, grid wiring is preferably low-resistance.Therefore, preferably use any material that is dissolved in or is dispersed in the solvent of gold, silver wherein or copper, and consider resistivity value, more preferably use to have low-resistance silver or copper.But, under the situation of using silver or copper, can provide block film to be used for impurity measurement in addition.Solvent has the ester class of butyl acetate for example, the alcohols of for example isopropyl alcohol, organic solvent of for example acetone etc. accordingly.By regulating suitably reconciliation statement surface tension and viscosity such as solvent density and interpolation surfactant.
Form after grid wiring 202, the grid 503, it is desirable to carry out one of following two steps, the processing of the adhesiveness improving layer 201 that is exposed as its surface.
First method is by making the step (referring to Figure 10 D) with grid wiring 502, grid 503 and pixel electrode 501 nonoverlapping adhesiveness improving layers 201 insulation formation insulating barriers 504.Here, make with grid wiring 502 and grid 503 nonoverlapping adhesiveness improving layer 201 oxidations so that insulation.Under adhesiveness improving layer 201 situation by oxide isolated in such a way, adhesiveness improving layer 201 is preferably formed has the film thickness of 0.01nm to 10nm, its oxidation easily like this.Should point out, be exposed to the method for oxygen atmosphere or the method for heat-treating can be used as method for oxidation.
Second method is to use grid wiring 502, grid 503 and pixel electrode 501 as mask etching with remove the step of adhesiveness improving layer 201.Using under the situation of this step, without limits for the film thickness of adhesiveness improving layer 201.
Next, gate insulation layer forms with individual layer or hierarchy by using plasma CVD method or sputtering method.As particularly preferred form, the three level stack body of the insulating barrier 506 of form the insulating barrier 505 made by silicon nitride, being made by silica and the insulating barrier 507 made by silicon nitride is as grid insulating film.Should point out that for example the rare gas of argon gas can be included in the active gases and sneak into the insulation film that will form, so that be formed on the fine and close insulation film that has gate leak current under the low deposition temperature hardly.Because the deterioration of oxidation can be prevented by formed the insulating barrier 505 that contacts with grid 503 with grid wiring 502 by silicon nitride or silicon nitride oxide.
Next, form semiconductor layer 508 (Figure 10 E).Semiconductor layer 508 uses the AS or the SAS that are made by the semiconductor material gas of silane or germane representative to form by using vapor phase growth method, and perhaps by sputtering method, the AS or the SAS that use silicon target to make form.Plasma CVD method or hot CVD method can be used as vapor phase growth method.
Under the situation of using the plasma CVD method, AS is by the SiH that is semiconductor material gas 4Perhaps SiH 4And H 2Mist form.Work as SiH 4Use H 2When diluting 3 times to 1000 times formation mists, perhaps work as Si 2H 6Use GeF 4Dilution is Si as a result 2H 6To GeF 4Gas flow rate when being 20 to 40 to 0.9, can obtain the Si composition ratio and be 80% or more SAS.Especially because semiconductor layer 508 can have from the degree of crystallinity at the interface of substrate, so latter instance is preferred.
By above step, possible is is not exposed to air and forms insulating barrier 505 continuously to semiconductor layer 508.In other words, can form each interface between the laminate layers and not dyed by pollution impurity element gas dirt-carrying floating in Atmospheric components and the air; The TFT changes of properties is reduced.
Next, path protection film 509 by relative with grid 503 and be positioned on the insulating barrier 508 the position selectively the combinations of injections thing form (referring to Figure 11 A).For example the resin material of epoxy resin, acrylic resin, phenolic resins, novolac resin, melmac or polyurethane resin is as path protection film 509.In addition, path protection film 209 forms with droplet discharge method by using organic material, and described organic material is benzocyclobutene, parylene, flash of light or luminous polyimides for example; By for example compound-material of silica alkyl polymer polymerization manufacturing; The composite material that contains water-soluble homopolymer and water solubility copolymer; Or the like.In using any material, by suitable reconciliation statement surface tension and viscosity such as retarder thinner or interpolation surfactants.
Next, n N-type semiconductor N film 510 forms (Figure 11 B) on semiconductive thin film 508.N N-type semiconductor N film 510 can use silane gas and phosphine gas to be formed by AS or SAS.
Next, mask 511 forms (Figure 11 C) by droplet discharge method on semiconductor layer 510.By the insulating barrier 506 that uses mask 511 etching n type semiconductor layer 510, semiconductor layer 508, semiconductor layer 505, is formed by silica, by the insulating barrier 507 that silicon nitride forms, formation has the semiconductor layer 513 (Figure 11 D) with semiconductor layer 512 same conductivity.
Remove after the mask 511, combinations of injections thing on the position that source wiring 515 on the grid wiring 502 and wherein will form forms mesosphere insulation film 514 (Figure 11 E) thus.Mesosphere insulation film 214 by epoxy resin for example, acrylic resin, phenolic resins, novolac resin, melmac or and the resin of polyurethane resin form.In addition, mesosphere insulation film 514 uses organic material to form by droplet discharge method, and described organic material is benzocyclobutene, parylene, flash of light or luminous polyimides for example; By for example compound-material of silica alkyl polymer polymerization manufacturing; The composition that contains water-soluble homopolymer and water solubility copolymer; Or the like.In using any material, by suitable reconciliation statement surface tension and viscosity such as retarder thinner or interpolation surfactants.
Next, source wiring and drain electrode wiring 515 and 516 spray the composition formation (Figure 12 A) that contains conductive material selectively by droplet discharge method.As the conductive material that is used to form wiring, can use and contain for example composition of the metallic particles of Ag (silver), Au (gold), Cu (copper), W (tungsten) or Al (aluminium).Equally, transparent indium tin oxide (ITO), the tin indium oxide (ITSO) that contains silica, organo indium, organotin, zinc oxide, titanium nitride etc. can be used as material mixing.
Subsequently, use source wiring and drain electrode wiring 515 and 516 as the semiconductive thin film with a kind of conductivity types 513 on the mask etching path protection film 509; Therefore the n N-type semiconductor N film 217 and 218 that forms source electrode and drain region is formed (Figure 12 B).
Next form the protective layer 519 that belongs to insulating barrier so that protect channel region (Figure 12 C).Insulating barrier 519 is preferred with the silicon nitride film formation that forms by plasma CVD or sputter.Require this film meticulous, prevent for example organic substance, metal thus and the pollutant of the steam that suspends enters in air.For this purpose, if silicon nitride film is by using silicon as the RF sputter formation as sputter gas of the mixture of the rare gas element of object and nitrogen and for example argon gas; Fineness can be by obtaining promoting that it is preferred with rare gas element dipping film thus.
Next, insulating barrier 520 only forms (Figure 12 D) selectively by droplet discharge method on semiconductor layer, grid wiring 502 and the source wiring of substrate and drain electrode wiring 515 and 516.Insulating barrier 520 is in the part that will not be electrically connected to subsequently the pixel electrode 521 that forms on drain electrode wiring 516, and will be electrically connected on the outside wiring (not shown) on grid wiring 502 and the source wiring 515 and form.This insulating barrier 520 can be by for example inorganic insulating material of silica, silicon nitride, silicon oxynitride, aluminium oxide, aluminium nitride, aluminum oxynitride etc.; Acrylic acid, methacrylic acid and its derivative; Has stable on heating high molecular weight material, for example polyimides, aromatic polyamides or polybenzimidazoles; Comprise the Si-O-Si key, wherein compound is by silicon, oxygen and hydrogen manufacturing, by the inorganic siloxanes that uses siloxanes substrate material to form as parent material; Or wherein the hydrogen on the silicon forms with the organosiloxane insulating material that the organic group of for example methyl or phenyl replaces.
Then, insulating barrier 519 forms opening (Figure 12 E) thus by using insulating barrier 520 as the in addition etching of the dry ecthing of mask or wet etching.At this, grid wiring 502, source wiring and drain electrode wiring 515 and 516, and the predetermined portions that is positioned at the pixel electrode 501 under the insulating barrier 519 is exposed.
By above step, finish the TFT substrate 500 that is used for liquid crystal indicator, wherein bottom gate (reverse interleaved) TFT is connected (Figure 12 E) with pixel electrode on substrate 100.Figure 17 A display plane structure, Figure 17 B shows A-B, and Figure 17 C shows the longitudinal component structure corresponding to C-D; Therefore can be simultaneously referring to accompanying drawing.
Embodiment 1
As described in Figure 3, in the liquid crystal indicator of making by embodiment pattern 1, embodiment pattern 2, embodiment mode 3 or embodiment pattern 4, can on substrate 100, form scan line drive circuit by form semiconductor layer by SAS.
Figure 22 shows the scan line drive circuit of being made up of the n-channel type TFTs that uses SAS, wherein obtains 1cm 2/ Vsec is to 15cm 2The field effect mobility of/Vsec.
Square described in the reference numerals 1500 is corresponding to being the impulse output circuit of step output sample pulse among Figure 22, and shift register is made up of n sheet impulse output circuit.Reference numerals 1501 expression buffer circuits, and pixel 1502 (corresponding to the pixel among Fig. 3 102) is connected its end.
Figure 23 shows the concrete structure of impulse output circuit 1500, and circuit is made up of to 613 n-channel-style TFTs 601.At this moment, the size of TFTs can be determined according to the operating characteristic of the n-channel-style TFTs that uses SAS.For example, when passage length was set at 8 μ m, channel width can be set at 10 μ m to 80 μ m.
In addition, the concrete structure of Figure 24 display buffer circuit 1501.Buffer circuit is made up of with the same manner n-channel-style TFTs620 to 635.At this moment, the size of TFTs can be determined according to the operating characteristic of the n-channel-style TFTs that uses SAS.For example, when passage length was set at 10 μ m, channel width can be set at 10 μ m to 1800m.
Necessary is by wiring TFTs to be connected to each other with the realization sort circuit, and Figure 18 is presented at the structure example of wiring in this case.As embodiment pattern 1; Figure 18 shows a kind of state; the semiconductor layer 212 that wherein forms grid 203, gate insulation layer (the three level stack body of the insulating barrier 205 that forms by silicon nitride, the insulating barrier 206 that forms by silica and the insulating barrier 207 that forms by silicon nitride), forms by SAS, the insulating barrier 209 that forms the path protection layer, the n- type semiconductor layer 217 and 218 that forms source electrode and drain electrode, and the wiring 215 and 216 that is connected to source electrode and drain electrode.In this case, with form grid 203 on substrate, form connecting wiring 232,233 and 234 in the identical step.Opening provides in gate insulation layer, and connecting wiring 232,233 and 234 is exposed like this.By by the wiring 215 that is connected to source electrode and drain electrode with 216 and the connecting line 235 that in same steps as, forms TFTs be connected realize various circuit.
Embodiment 2
With reference to Figure 28 a kind of pattern is described, wherein partly provides the protection diode for scan line input part and holding wire input.For the pixel among Figure 28 102 provides TFT 260 and electric capacity 265.This TFT have with embodiment pattern 1 in the identical structure of TFT.Reference numerals 1224 remarked pixel electrodes, and 1204 expression electric capacity lines.
For the holding wire input partly provides protection diode 261 and 262.The protection diode is made in the step identical with TFT 260 and by all being connected to one of grid and drain electrode or source electrode as diode.Figure 29 shows the equivalent circuit diagram of vertical view shown in Figure 28.
Protection diode 261 comprises the insulating barrier of grid 250, semiconductor layer 251, path protection 252 and connects up 249 and 253.Protection diode 262 has same structure.The common potential line 254 that connects this protection diode forms at the layer identical with grid with 255.Therefore, must in gate insulation layer, form connecting hole to be electrically connected wiring 253.
Mask can form by droplet discharge method, can carry out etch process and form connecting hole in gate insulation layer.In this case, when applying etch process by atmospheric pressure discharge, local discharge process equally may, with and needn't on the whole surface of substrate, form mask.
Protection diode 261 with 262 be connected to TFT 260 in source electrode and the wiring 215 of drain electrode and 216 identical layers in form, and have the structure that the wiring 249 that wherein connects is connected to source side or drain side.
The input of scan signal line side part has equally and protects diode 263 and 264 and the 256 identical structures that connect up.According to the present invention, the protection diode that provides in input phase can form simultaneously.Should point out that the position of placing the protection diode is not limited to the present embodiment pattern, and also can provide as shown in Figure 3 between drive circuit and pixel.
Embodiment 3
Next, will be with reference to the form of Figure 19 to 21 description according to assembling drive circuit on the liquid crystal indicator of any one manufacturing of embodiment pattern 1 to 4.
At first, with reference to figure 19A and 19B the display unit of using COG is described.In this display unit, on substrate 1001, provide to show for example pixel region 1002 and scan line drive circuit 1003 and 1004 of the information of writings and image.Substrate 1005 and 1008 with a plurality of drive circuits is divided into rectangular shape.The drive circuit (hereinafter referred to as drive IC s) that separates is connected to substrate 1001.Figure 19 A shows a plurality of drive IC s 1007, and with 1006 ends that are connected to drive IC s1007.Figure 19 B display driver IC 1010, and with 1009 ends that are connected to drive IC 1010.
With reference to figure 20A and 20B the display unit of using TAB is described.Pixel region 1002, scan line drive circuit 1003 and 1004 are provided on substrate 1001.Here, in Figure 20 A, a plurality ofly be with 1006 to stick on the substrate 1001, and drive IC s 1007 is connected to and is with 1006.Among Figure 20 B, be with 1009 to stick on the substrate 1001, and drive IC 1010 is connected to and is with 1009.Under the situation that adopts the latter, with regard to intensity, can provide the sheet metal of fixed drive IC 1010 etc. simultaneously.
With regard to improving productivity ratio, a plurality of drive IC s that are used for liquid crystal indicator can be assemblied in has the rectangular substrate 1005 and 1008 of 300mm to 1000mm or higher side.
Wherein driving circuit section and I/O end can form on substrate 1005 and 1008 as a plurality of circuit patterns that unit uses, and finally are separated and obtain.With regard to the length of drive IC long side, consider the length of a pixel portion or a side of pel spacing, can form long side and be 15 to 80mm and short side be 1 to 6mm rectangle, shown in Figure 19 A and 20A.A side of pixel portion 1002, or a side of pixel portion 1002 adds that the length of a side of each drive circuit 1003 and 1004 can be used to form drive IC, shown in Figure 19 B and 20B.
First of drive IC on the IC chip is the length than long side.When use has 15 to 80mm during than the drive IC of long side, corresponding to the number of the required drive IC s of the assembling of pixel region 1002 number less than the IC chip.Therefore, the process yield in the manufacturing can be improved.When drive IC forms on glass substrate, because drive IC is not limited to the substrate shape as the parent main body, so can not reduce productivity ratio.Compare with obtain the IC chip from circular silicon wafer, this point is important advantage.
Among Figure 19 A, 19B, 20A and the 20B, the drive IC 1007 or 1010 with drive circuit is assemblied in the region exterior of pixel region 1002.Drive IC s 1007 and 1010 is a signal-line driving circuit.In order to form the panchromatic pixel region corresponding to RGB, 3072 holding wires of XGA classification and 4800 holding wires of UXGA classification are necessary.The number of above-mentioned holding wire forms lead-out wires by the several squares in pixel region 1002 edges separately, and concentrates according to the pitch of the output of drive IC s1007 and 1010.
Drive IC is preferably formed by the crystal semiconductor that forms on substrate.This crystal semiconductor preferably forms by the light radiation with continuous-wave laser.Therefore, continuous wave solid-state laser or gaseous state laser are as the oscillator of emission laser.When using continuous-wave laser, almost there is not crystal defect.Therefore, transistor can have the polycrystalline semiconductor thin film manufacturing of big grain size by use.In addition because the mobility or the speed of response are good, so high-speed driving is possible, and possible be the work ratio of comparing conventional element, further improve the work ratio of element; Therefore because almost do not have performance change, so can obtain high reliability.Should point out that transistorized channel-length direction can be identical with the scanning direction of laser, with further improvement rate.This point is because producing by continuous-wave laser in the step of laser crystallization, when transistorized channel-length direction is almost parallel (preferred-30 ° to 30 °) with the scanning direction of laser with respect to substrate, can obtain high mobility.It is identical with the flow direction of electric current to form in the zone channel-length direction at passage, and in other words the direction that moves with electric charge wherein is identical.The transistor of Xing Chenging has the active layer that comprises polycrystalline semiconductor thin film thus, and wherein crystal grain extends in channel direction, and this point means that the grain boundary almost forms along channel direction.
In carrying out laser crystallization, preferably laser narrows down on a large scale, and its bundle spot preferably have the width of about 1mm to 3mm, its width with the shorter lateral sides of such of drive IC is identical.In addition, in order to ensure will be by the suitable and effective energy density of the object of radiation, the radiation areas of laser be preferably rectilinear form.But here rectilinear form is not represented the line in the intrinsic implication, but expression has the rectangle or the ellipse of wide aspect ratio.For example, rectilinear form represents that aspect ratio is 2 or the rectangle or the ellipse of higher (preferred 10 to 10000).Therefore, productivity ratio can equate to be improved with the width of the shorter lateral sides of such of drive IC by the width that makes laser beam spot.
Show a kind of pattern among Figure 19 A and 19B and Figure 20 A and the 20B, wherein scan line drive circuit assembles with the form of signal-line driving circuit with whole formation of pixel portion and drive IC.But the present embodiment pattern is not limited to this form, and drive IC can be with the form assembling of scan line drive circuit and signal-line driving circuit.Under the sort of situation, preferably make the specification of the drive IC s that uses in scan line side and signal line side different.
In pixel region 1002, holding wire and scan line intersect to form matrix, and transistor is arranged in each cross section.According to an aspect of the present invention, having the TFT of the channel part that is formed by amorphous semiconductor or half amorphous semiconductor can be as being arranged on transistor in the pixel portion 1002.Amorphous semiconductor is formed by plasma CVD method, sputtering method etc.Possible is at 300 ℃ or more forms half amorphous semiconductor with plasma CVD under the low temperature.Even under the situation of the non-alkali glass substrate of for example 550mm * 650mm external dimensions, form the required film thickness of transistor and also form at short notice.The feature of this production technology is effective in the display unit of making the large scale screen.In addition, half amorphous TFT can obtain 1 to 15cm by formed channel region by SAS 2The field effect mobility of/Vsec.TFT can be as the switch element of pixel or the element of formation scan line drive circuit.Therefore, can make the EL display floater of realizing system on the plate.
Figure 19 A shows that to 20B each TFT has under the condition of the semiconductive thin film that is formed by SAS, and scan line drive circuit integrally formed situation on substrate like this is as implementing in the scheme mode 3.Have in use under the TFT situation of the semiconductor layer that is formed by AS, scan line drive circuit and signal-line driving circuit can be with the form assemblings of drive IC s.
Under the sort of situation, preferably make the specification difference of the drive IC s that uses between scan line and the signal line side.For example, the transistor of composition scanning line driving ICs needs the withstanding pressure of about 30V; But 100kHz or driving frequency still less and high speed operation are unwanted relatively.Therefore, preferably set the transistorized passage length (L) of sufficiently long composition scan line driver.On the other hand, approximately the withstanding pressure of 12V is enough for the transistor of holding wire drive IC s; But driving frequency and the high speed operation of about 65MHz that need be under 3V.Therefore, preferably set basis micron law set to be formed the transistorized passage length etc. of driver.
Figure 21 A and 21B are presented under the liquid crystal indicator situation among Fig. 2, and wherein drive IC is by the COG assembled construction.Figure 21 A shows that drive IC wherein 106 uses anisotropic conductive material to be assemblied in structure on the TFT substrate.Pixel portion 101, holding wire input 104 (identical under the situation of scan line drive circuit 103) are being provided on the TFT substrate 200.Counter substrate 229 usefulness sealants 226 paste TFT substrate 200.Liquid crystal layer 230 forms between substrate.
FPC 812 uses anisotropic conductive material to be connected to holding wire input 104.Anisotropic conductive material comprises resin 815 and conductive particle 814, and its each surface is tens to the hundreds of micron with covering such as Au and its diameter.Owing to have conductive particle 214, holding wire input 104 to be electrically connected to the wiring 813 that in FPC 812, forms.Drive IC 106 also is connected to the TFT substrate with anisotropic conductive material.Because the conductive particle 810 that is included in the resin 811 is arranged, the input-output end 809 that provides in drive IC 106 is electrically connected to holding wire input 104.
Shown in Figure 21 B, drive IC 106 usefulness adhesives 816 are fixed to TFT substrate 200, and the input-output end 809 of drive IC can connect up with Au and 817 is connected to holding wire input 104.Then, use sealing resin 818 to seal at this.About the assembly method of drive IC without limits, can use known method, for example COG, wire-bonded or TAB.
Drive IC forms the thickness identical with counter substrate.Therefore, they can have height much at one, produce thin display unit with an integral body.In addition, each substrate is formed by a kind of material; Even therefore when the variations in temperature in the display unit, do not produce thermal stress yet, and do not damage the performance of the circuit that comprises TFTs thus.In addition, shown in this embodiment, the drive circuit drive IC assembling longer than IC chip, the number that will be assemblied in the drive IC s on the pixel region like this can reduce.
As mentioned above, drive circuit can be assemblied on the liquid crystal indicator.
Embodiment 4
Liquid crystal television receiver can be finished by the liquid crystal indicator of making according to embodiment pattern 1 to 4.Figure 25 shows the calcspar of liquid crystal television receiver main structure.There is such situation in structure as shown in fig. 1, and wherein scan line drive circuit 403 and signal-line driving circuit 402 assemble by only forming pixel portion 401 by the TAB method.Structure as shown in Figure 2, scan line drive circuit 403 and signal-line driving circuit 402 are assemblied in pixel region 401 and its periphery by the COG method.As shown in Figure 3, have such situation, wherein TFT is formed by SAS, and signal-line driving circuit 402 is by the whole form assembling that forms pixel region 401 with drive IC, and scan line drive circuit 403 is assemblied on the substrate.But, can use any form.
As the another kind of structure of external circuit, at the input side of vision signal, provide tuner 404, amplify the video amplifier circuit 405 of the vision signal of coming self-tuner; The conversion of signals that to wherein export corresponding to every kind of colour of red, green and blue becomes the video processing circuit 406 of colour signal; Vision signal is converted to the control circuit 407 of the input specification of drive IC; Or the like.Control circuit 407 enters scan line side and signal line side with signal output respectively.Under the situation of digital drive, signal distribution circuit 408 provides on signal line side, and can have wherein supplied with digital signal by being divided into the structure that the m-section provides.
In the signal of being received by tuner 404, audio signal is transferred to audio signal amplifier circuit 409, and provides output via audio signal processing circuit 410 for loud speaker 413.Control circuit 411 receives the control information (receive frequency) of receiving platforms or from the volume of importation 412, and sends signals to tuner 404 or audio signal processing circuit 410.
Figure 26 is the example of liquid crystal display device module.TFT substrate 200 and counter substrate 229 usefulness sealants 226 are fixing, and provide pixel portion 101 and liquid crystal layer 230 to form the viewing area therebetween.Realizing needing color layer 270 in colored the demonstration.Under the situation of RGB system, provide color layer 270 corresponding to each color of red, green and blue corresponding to each pixel.Polarizer 271 and 267 provides in the outside of the substrate 229 on TFT substrate 200 and opposite.Light source is made up of cold-cathode tube 258 and light guide plate 259, and circuit board 257 is connected to TFT substrate 200 by flexible circuit board 273 and terminal 231, and introduces the external circuit of control circuit for example or power supply circuits.
Figure 27 shows a kind of state, and wherein television receiver is finished by shell 2301 that liquid crystal display device module is packed into.Display screen 2303 is formed by liquid crystal display device module, and loud speaker 2304, Operational Conversion Unit 2305 etc. provide as other auxiliary device.Therefore, can finish television receiver according to the present invention.
Certainly, liquid crystal indicator of the present invention is not limited to television receiver, and it for example is applicable to AT STATION, the message panel at place, airport, the show media of mobile telephone display etc., perhaps advertising display panel on the street and PC monitor.
Description of symbols
100: substrate, 101: pixel portion, 102: pixel; 103: scan line input, 104: holding wire input, 105: drive IC; 106: drive IC, 107: scan line drive circuit, 108: the protection diode; the 200:TFT substrate, 201: cohesive improving layer, 202: the grid wiring layer; 203: gate electrode, 204: insulating barrier, 205: insulating barrier; 206: insulating barrier, 207: insulating barrier, 208: semiconductive thin film; 209: path protection film, 210: semiconductive thin film, 211: mask; 212: semiconductive thin film, 213: semiconductive thin film, 214: mesosphere insulation film; 215: source wiring, 216: drain electrode wiring, 217: semiconductive thin film; 218: semiconductive thin film, 219: protective layer, 220: insulating barrier; 221: pixel electrode layer, 222: insulating barrier, 223: sealant; 224: insulating barrier, 225: conductive layer, 226: sealant; 229: counter substrate, 230: liquid crystal layer, 231: terminal; 232: connecting line layer, 233: connecting line layer, 234: the connecting line layer; 235: connecting line layer, 249: wiring, 250: gate electrode; 251: semiconductive thin film, 252: insulating barrier, 253: wiring layer; 254: common voltage wiring, 255: wiring, 256: signal line layer; 257: circuit board, 258: cold-cathode tube, 259: the light guide plate; 260:TFT, 261: protection diode, 262: the protection diode; 265: capacitor, 270: color layer, 271: polarizer; 272: polarizer, 273: flexible printed circuit, 300:TFT substrate; 301: semiconductive thin film, 302: mask, 303: semiconductive thin film; 304: semiconductive thin film, 305: intermediate layer film, 306: source wiring; 307: drain electrode wiring, 308: semiconductive thin film, 309: semiconductive thin film; 310: semiconductive thin film, 401: pixel region, 402: signal-line driving circuit; 403: scan line drive circuit, 404: tuner, 405: the video amplifier circuit; 406: video processing circuit, 407: control circuit, 408: signal divider circuit; 409: audio signal amplifier circuit, 410: audio signal processing circuit, 411: control circuit; 412: input block, 413: loudspeaker, 500:TFT substrate; 501: pixel electrode layer, 502: grid wiring layer, 503: gate electrode; 504: insulating barrier, 505: insulating barrier, 506: insulating barrier; 507: insulating barrier, 508: semiconductor layer, 509: the path protection film; 510: semiconductive thin film, 511: mask, 512: semiconductive thin film; 513: semiconductive thin film, 514: mesosphere insulation film, 515: source wiring; 516: drain electrode wiring, 517: semiconductive thin film, 518: semiconductive thin film; 519: insulating barrier; 520: insulating barrier, 801:TFT, 602:TFT; 603:TFT; 604:TFT, 605:TFT, 606:TFT; 607:TFT; 608:TFT, 609:TFT, 610:TFT; 611:TFT; 612:TFT, 613:TFT, 620:TFT; 621:TFT; 622:TFT, 623:TFT, 624:TFT; 625:TFT; 626:TFT, 627:TFT, 630:TFT; 631:TFT; 632:TFT, 633:TFT, 634:TFT; 635:TFT; the 700:TFT substrate, 701: insulating barrier, 702: pixel electrode layer; 809: the input-output end; 810: conductive particle, 811: resin, 812:FPC; 813: wiring; 814: conductive particle, 815: resin, 816: adhesive material; the 817:Au wiring; 818: encapsulant resins, 1001: substrate, 1002: pixel region; 1003: drive circuit; 1004: drive circuit, 1005: substrate, 1006: band; 1007: drive IC; 1008: substrate, 1009: band, 1010: drive IC; 1204: the electric capacity line; 1224: pixel electrode, 1400: substrate, 1403: liquid droplet ejection apparatus; 1404: imaging device; 1405: head, 1407: control device, 1408: storage medium; 1409: image processing apparatus; 1410: computer, 1411: mark, 1500: impulse output circuit; 1501: buffer circuit; 1502: pixel, 2301: shell, 2303: display screen; 2304: loudspeaker and 2305: Operational Conversion Unit.

Claims (17)

1. method of making display unit may further comprise the steps:
On substrate, form grid by droplet discharge method;
On grid, form gate insulation layer,
On gate insulation layer, form first semiconductor layer,
On first semiconductor layer, form path protection layer, described path protection layer and gate overlap by droplet discharge method;
On the path protection layer, form and contain second semiconductor layer with a kind of conductivity-type impurity;
On second semiconductor layer, form first mask layer;
Use the first mask layer etching, first semiconductor layer, second semiconductor layer and gate insulation layer;
On grid, form first insulating barrier by droplet discharge method;
Form source wiring and drain electrode wiring by droplet discharge method;
Etching second semiconductor layer on the path protection layer;
On the whole surface of substrate, form passivating film;
On passivating film, form second insulating barrier by droplet discharge method;
Etch passivation film on drain electrode wiring; With
On second insulating barrier, form transparent conductive film so that connect drain electrode wiring.
2. be not exposed to atmosphere according to the process of claim 1 wherein the step that forms gate insulation layer and on grid, form first semiconductor layer to carry out continuously.
3. be not exposed to atmosphere according to the process of claim 1 wherein the step that forms gate insulation layer and formation first semiconductor layer to carry out continuously.
4. according to the process of claim 1 wherein that gate insulation layer is formed by the laminated material that wherein forms silicon nitride film, silicon oxide film and silicon nitride film in proper order.
5. use the first mask layer etching, second semiconductor layer, first semiconductor layer and gate insulation layer according to the process of claim 1 wherein, wherein provide an end of first semiconductor layer to make it not stretch out from an end of gate insulation layer.
6. according to the process of claim 1 wherein that display unit is a liquid crystal indicator.
7. method of making display unit may further comprise the steps:
On substrate, form grid by droplet discharge method selectively with one of insulating surface and preliminary treatment surface of base;
On grid, form gate insulation layer,
On gate insulation layer, form first semiconductor layer,
By droplet discharge method on first semiconductor layer with the zone of gate overlap on form the path protection layer selectively;
On gate insulation layer, first semiconductor layer and path protection layer, form and contain second semiconductor layer with a kind of conductivity-type impurity;
On second semiconductor layer, form first mask layer selectively;
Use the first mask layer etching, first semiconductor layer, second semiconductor layer and gate insulation layer;
On grid, form first insulating barrier selectively by droplet discharge method;
Form source wiring and drain electrode wiring selectively by droplet discharge method;
Etching second semiconductor layer on the path protection layer;
On the whole surface of substrate, form passivating film;
On passivating film, form second insulating barrier selectively by droplet discharge method;
Etch passivation film on drain electrode wiring; With
On second insulating barrier, form transparent conductive film so that connect drain electrode wiring.
8. according to the method for claim 7, the step that wherein forms gate insulation layer and form first semiconductor layer on grid is carried out continuously and is not exposed to atmosphere.
9. according to the method for claim 7, the step that wherein forms gate insulation layer and form first semiconductor layer is carried out continuously and is not exposed to atmosphere.
10. according to the method for claim 7, wherein gate insulation layer is formed by the laminated material that wherein forms silicon nitride film, silicon oxide film and silicon nitride film in proper order.
11. according to the method for claim 7, wherein use the first mask layer etching, second semiconductor layer, first semiconductor layer and gate insulation layer, wherein provide an end of first semiconductor layer to make it not stretch out from an end of gate insulation layer.
12. according to the method for claim 7, wherein display unit is a liquid crystal indicator.
13. a method of making display unit may further comprise the steps:
On substrate, form grid by droplet discharge method selectively with one of insulating surface and preliminary treatment surface of base;
On grid, form gate insulation layer,
On gate insulation layer, form first semiconductor layer of layering,
By droplet discharge method on the semiconductor layer with the zone of gate overlap on form the path protection layer selectively;
On gate insulation layer, first semiconductor layer and path protection layer, form and contain second semiconductor layer with a kind of conductivity-type impurity;
On described second semiconductor layer, form first mask layer selectively;
By using the first mask layer etching, first semiconductor layer, second semiconductor layer and grid insulating film;
On grid, form first insulating barrier selectively by droplet discharge method;
Form source wiring and drain electrode wiring selectively by droplet discharge method;
Use source wiring and drain electrode wiring as mask etching second semiconductor layer on the path protection layer;
On the whole surface of substrate, form passivating film;
On passivating film, form second insulating barrier selectively by droplet discharge method;
Use second insulating barrier as mask etch passivation film on drain electrode wiring; With
On second insulating barrier, form transparent conductive film so that connect drain electrode wiring.
14. according to the method for claim 13, the step that wherein forms gate insulation layer and form first semiconductor layer is carried out continuously and is not exposed to atmosphere.
15. according to the method for claim 13, wherein gate insulation layer is formed by the laminated material that wherein forms silicon nitride film, silicon oxide film and silicon nitride film in proper order.
16. according to the method for claim 13, wherein use the first mask layer etching, second semiconductor layer, first semiconductor layer and gate insulation layer, wherein provide an end of first semiconductor layer to make it not stretch out from an end of gate insulation layer.
17. according to the method for claim 13, wherein display unit is a liquid crystal indicator.
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US20090325333A1 (en) 2009-12-31
TWI364111B (en) 2012-05-11

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