CN101243409A - 通过切换寄存器组在具有至少两个执行单元的计算机***中确定起动状态的方法和设备 - Google Patents

通过切换寄存器组在具有至少两个执行单元的计算机***中确定起动状态的方法和设备 Download PDF

Info

Publication number
CN101243409A
CN101243409A CNA2006800296254A CN200680029625A CN101243409A CN 101243409 A CN101243409 A CN 101243409A CN A2006800296254 A CNA2006800296254 A CN A2006800296254A CN 200680029625 A CN200680029625 A CN 200680029625A CN 101243409 A CN101243409 A CN 101243409A
Authority
CN
China
Prior art keywords
register
performance
performance element
comparison pattern
switching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CNA2006800296254A
Other languages
English (en)
Chinese (zh)
Inventor
R·韦伯尔
B·米勒
E·博尔
Y·科拉尼
R·格默利克
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Robert Bosch GmbH
Original Assignee
Robert Bosch GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert Bosch GmbH filed Critical Robert Bosch GmbH
Publication of CN101243409A publication Critical patent/CN101243409A/zh
Pending legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1658—Data re-synchronization of a redundant component, or initial sync of replacement, additional or spare unit
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1629—Error detection by comparing the output of redundant processing systems
    • G06F11/1641—Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/845—Systems in which the redundancy can be transformed in increased performance

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
CNA2006800296254A 2005-08-08 2006-07-27 通过切换寄存器组在具有至少两个执行单元的计算机***中确定起动状态的方法和设备 Pending CN101243409A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102005037259.7 2005-08-08
DE200510037259 DE102005037259A1 (de) 2005-08-08 2005-08-08 Verfahren und Vorrichtung zur Festlegung eines Startzustandes bei einem Rechnersystem mit wenigstens zwei Ausführungseinheiten durch Umschalten von Registersätzen

Publications (1)

Publication Number Publication Date
CN101243409A true CN101243409A (zh) 2008-08-13

Family

ID=37434688

Family Applications (1)

Application Number Title Priority Date Filing Date
CNA2006800296254A Pending CN101243409A (zh) 2005-08-08 2006-07-27 通过切换寄存器组在具有至少两个执行单元的计算机***中确定起动状态的方法和设备

Country Status (5)

Country Link
EP (1) EP1917590A1 (de)
JP (1) JP2009505187A (de)
CN (1) CN101243409A (de)
DE (1) DE102005037259A1 (de)
WO (1) WO2007017398A1 (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015114952A (ja) * 2013-12-13 2015-06-22 株式会社日立製作所 ネットワークシステム、監視制御装置およびソフトウェア検証方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0256029A (ja) * 1988-08-20 1990-02-26 Fujitsu Ltd 汎用レジスタ切換方式
US6625749B1 (en) * 1999-12-21 2003-09-23 Intel Corporation Firmware mechanism for correcting soft errors
US6615366B1 (en) * 1999-12-21 2003-09-02 Intel Corporation Microprocessor with dual execution core operable in high reliability mode
JP2004178427A (ja) * 2002-11-28 2004-06-24 Toshiba Microelectronics Corp 中央処理装置
DE10349580A1 (de) * 2003-10-24 2005-05-25 Robert Bosch Gmbh Verfahren und Vorrichtung zur Operandenverarbeitung in einer Prozessoreinheit

Also Published As

Publication number Publication date
DE102005037259A1 (de) 2007-02-15
EP1917590A1 (de) 2008-05-07
WO2007017398A1 (de) 2007-02-15
JP2009505187A (ja) 2009-02-05

Similar Documents

Publication Publication Date Title
US5276823A (en) Fault-tolerant computer system with redesignation of peripheral processor
US7134047B2 (en) Firmwave mechanism for correcting soft errors
US6640313B1 (en) Microprocessor with high-reliability operating mode
US5384906A (en) Method and apparatus for synchronizing a plurality of processors
JP2009516277A (ja) 少なくとも２つのレジスタ付き処理ユニットを有するシステムにおいてエラーを除去する装置および方法
US6571324B1 (en) Warmswap of failed memory modules and data reconstruction in a mirrored writeback cache system
US6173414B1 (en) Systems and methods for reduced error detection latency using encoded data
JP2008518310A (ja) マルチプロセッサシステム内のメモリユニットを監視する方法および装置
US20070245133A1 (en) Method and Device for Switching Between at Least Two Operating Modes of a Processor Unit
US8812781B2 (en) External state cache for computer processor
US7249358B2 (en) Method and apparatus for dynamically allocating processors
US5632013A (en) Memory and system for recovery/restoration of data using a memory controller
CN103744754A (zh) 一种抗辐射加固并行星载计算机***及其使用方法
WO2014099021A1 (en) Multiple computer system processing write data outside of checkpointing
US20150286544A1 (en) Fault tolerance in a multi-core circuit
RU2360280C2 (ru) Способ и устройство для обработки операндов в процессоре
US20130145111A1 (en) Memory control device, information processing device, and control method for memory control device
US5408651A (en) Store "undo" for cache store error recovery
JP2009505179A (ja) 少なくとも２つの実行ユニットを有する計算機システムにおいてレジスタのマーキングによってスタート状態を定める方法および装置
US20080313384A1 (en) Method and Device for Separating the Processing of Program Code in a Computer System Having at Least Two Execution Units
DE102006050715A1 (de) Verfahren und System zum Erzeugen eines gültigen Signals
US20080229134A1 (en) Reliability morph for a dual-core transaction-processing system
CN101243409A (zh) 通过切换寄存器组在具有至少两个执行单元的计算机***中确定起动状态的方法和设备
Kempf et al. Runtime adaptive cache checkpointing for risc multi-core processors
US20040154017A1 (en) A Method and Apparatus For Dynamically Allocating Process Resources

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C02 Deemed withdrawal of patent application after publication (patent law 2001)
WD01 Invention patent application deemed withdrawn after publication