Background technology
Under the promotion of Digital Signal Processing and large scale integrated circuit technology huge advance made, wireless communication technology just strides forward rapidly towards the digitlization direction, in digital information processing system often process chip just can realize the frequency spectrum shift, extraction/interpolation, filtering, equilibrium of signal, synchronously, functions such as modulating/demodulating, error correction, information source coding/decoding.Certainly everything that is to say to have analog/digital conversion (A/D) or digital-to-analog conversion (D/A) between analog radio frequency (RF) front end and baseband digital signal treatment system all to be digitized as prerequisite.After radiofrequency signal is received by antenna induction, after preliminary election, low noise amplification (LNA), mixing, filtering and amplification, produce second intermediate-freuqncy signal, by behind the anti-aliasing filter as the analog input signal of analog-to-digital converter (A/D), the main effect of analog-to-digital converter is the digital signal that the analog signal conversion of the continuous time that will be suitable for propagating in wireless channel becomes discrete time.Its position in communication system can be placed on antenna tuner output, two/three medium frequency output ends or base band according to the application scenario.Finish digitized spectra by digital down converter then and move, down-sampled, use the outer energy of digital filter inhibition zone at last, and send data to nextport universal digital signal processor NextPort.
Desampling fir filter not only will be born down-sampled task in the prior art, also need to bear the task of filtering interference signal, for example adjacent frequently or with signal noise frequently, therefore desampling fir filter should carry out down-sampled processing to the input data simultaneously and removes interference noise in these input data again.Because prime NCO (the numerically controlled oscillator of desampling fir filter, digital controlled oscillator) provide the speed of input data very high for desampling fir filter, so the algorithm steps that this desampling fir filter can be handled in a clock cycle is exactly very limited, for example to offer the data rate of desampling fir filter be 30MHz to NCO, and the clock of desampling fir filter self is 60MHz, therefore desampling fir filter can only be carried out 2 step algorithms in the clock cycle for the input data, if guarantee the desampling fir filter processing speed, then just need to improve the clock of desampling fir filter self, or the quantity of increase desampling fir filter internal multiplier, make this desampling fir filter can in a clock cycle of input data, carry out more calculation step.Yet often for a chip, because the shared clock of all modules meetings of this chip internal, so the clock of its chip integral body is relatively-stationary, that is to say like this if guarantee the processing speed of this desampling fir filter, just must increase the number of multipliers of desampling fir filter inside, therefore just cause the too huge problem of desampling fir filter internal area in the prior art, thereby increased the power consumption of entire chip.
Summary of the invention
The object of the invention provides a kind of method and desampling fir filter of down-sampled filtering, and it can effectively reduce the chip area of desampling fir filter, thereby reduces the power consumption of entire chip.
For solving the problems of the technologies described above, the present invention proposes a kind of desampling fir filter, at least comprise down-sampled filtration module of the first order and second level anti-interference filtration module, the down-sampled filtration module of the described first order is used for the input data are carried out down-sampled processing, generates down-sampled data; Described second level anti-interference filtration module is used for the down-sampled data that the down-sampled filtration module of the described first order generates are carried out interference filter.
Wherein, described second level anti-interference filtration module comprises adjacent interference filter submodule frequently, is used for the down-sampled data that the down-sampled filtration module of the described first order generates are carried out neighbour's interference filter frequently.
Wherein, described second level anti-interference filtration module also comprises co-channel interference filtering submodule, and the down-sampled data or the described adjacent filtered data of interference filter submodule frequently that are used for the down-sampled filtration module of the described first order is generated are carried out co-channel interference filtering.
Wherein, also comprise controller, be used to control described co-channel interference filtering submodule.
Wherein, the down-sampled filtration module of the described first order is identical with the clock frequency of second level anti-interference filtration module.
Wherein, described input data are produced by digital controlled oscillator NCO, and input rate is 30MHz.
Wherein, the down-sampled data input rate of the down-sampled filtration module generation of the described first order is 10MHz.
The present invention also proposes a kind of down-sampled filtering method, may further comprise the steps: the input data are carried out down-sampled processing, generate down-sampled data; Down-sampled data to described generation are carried out interference filter.
Wherein, describedly down-sampled data are carried out interference filter specifically comprise: the down-sampled data of described generation are carried out neighbour interference filter and/or co-channel interference filtering frequently.
Wherein, before described down-sampled data to generation are carried out co-channel interference filtering, further comprising the steps of: as to judge whether and to carry out co-channel interference filtering to described down-sampled data; If desired, then described down-sampled data are carried out co-channel interference filtering.
Technical scheme of the present invention has the following advantages: because desampling fir filter is divided into two-stage, the down-sampled filtration module of the first order carries out down-sampled, second level anti-interference filtration module is carried out interference filter, the input data of second level anti-interference filtration module are through the down-sampled processing of the down-sampled filtration module of the first order, therefore its data rate is far smaller than the data rate that NCO provides for desampling fir filter, the clock cycle of input data of algorithm steps can carry out in to(for) the anti-interference filtration module of the second level will increase greatly like this, thereby reduce the number of multipliers of second level anti-interference filtration inside modules, effectively reduce area of chip, reduced the power consumption of entire chip.
And prioritization scheme of the present invention is divided into two-stage with desampling fir filter, carry out neighbour's frequency and/or co-channel interference filtering by second level anti-interference filtration module, so just made things convenient for control, can selectively carry out interference filter by the user for neighbour's frequency and/or co-channel interference filtering.And the present invention also can realize control separately to co-channel interference filtering, makes the user when not needing to carry out co-channel interference filtering, in time this co-channel interference filter function is closed.
Embodiment
Below in conjunction with drawings and Examples, the specific embodiment of the present invention is described in further detail:
Spirit of the present invention is that the speed that will import data by the down-sampled filtration module of the first order reduces, and reduces the circuit hardware scale of second level anti-interference filtration module, thereby reduces the power consumption of entire chip.
According to foregoing invention spirit, the embodiment of the invention has proposed a kind of multistage desampling fir filter, at first the data of NCO input are carried out down-sampled processing by the down-sampled filtration module of the first order, the speed of the input data of the down-sampled processing of process will reduce greatly, and the input data rate of second level anti-interference filtration module will not be subjected to the influence of NCO, and by the down-sampled filtration module decision of the first order, the down-sampled filtration module of the first order has reduced the sample rate of low-frequency modulation signal, thereby reduced requirement to the subsequent module operating rate, make subsequent module in an input clock cycle, can handle more algorithm, reduce the circuit scale of subsequent module, improved the stability of system.For example NCO to desampling fir filter provide the input data speed be 30MHz, speed through the down-sampled data after the down-sampled processing of the down-sampled filtration module of the first order is 10MHz, this just means the desampling fir filter that is all 60MHz for a clock frequency, the 30MHz that provides for NCO imports data, desampling fir filter can only be carried out 2 step calculation step in each clock cycle of these input data, and just can carry out 6 step calculation step for each clock cycle second level anti-interference filtration module of input data through the down-sampled data of 10MHz after down-sampled the processing, will significantly reduce the needed number of multipliers of second level anti-interference filtration module like this.Certainly the described speed through the down-sampled data after the down-sampled filtration module processing of the first order of the above embodiment of the present invention is 10MHz, it is the more excellent execution mode of the embodiment of the invention,, its occurrence is not subjected to the influence of NCO by the parameter decision of the down-sampled filtration module of the first order.So just can reach the purpose of the down-sampled data rate of control by the performance parameter of the down-sampled filtration module of the control first order according to the operating rate needs of system's subsequent module when design.For example for after down-sampled processing, carrying out neighbour interference filter and/or co-channel interference filtering frequently, the needed multiplier of 30MHz data that handling NCO provides will be 3 times of the down-sampled data of processing 10MHz, therefore should the neighbour frequently the area of interference filter and/or co-channel interference filtration module will correspondingly reduce 1/3, along with reducing of chip area, the power consumption of chip also will correspondingly reduce.The foregoing description described " carrying out down-sampled processing " a kind of better embodiment that just embodiment of the invention proposed by the down-sampled filtration module of the first order, certainly also can be in the advance data processing of its form of Xingqi of down-sampled processing, and the above-mentioned desampling fir filter of the embodiment of the invention also can be made of multistage, for example the first order is carried out down-sampled, neighbour's interference filter is frequently carried out in the second level, and the third level carries out co-channel interference filtering.
As shown in Figure 1, structure chart for embodiment of the invention desampling fir filter, this desampling fir filter comprises down-sampled filtration module 11 of the first order and second level anti-interference filtration module 12 at least, the input data that the down-sampled filtration module 11 of the first order is used for NCO is provided are carried out down-sampled processing, and second level anti-interference filtration module 12 is used for the down-sampled data that the down-sampled filtration module 11 of the first order generates are carried out interference filter.The input data of second level anti-interference filtration module 12 receptions are through the down-sampled filtration module 11 down-sampled processing of the first order like this, the input rate of its data will be far smaller than the input rate that NCO provides the input data, and the input data rate of second level anti-interference filtration module 12 will not be subjected to the influence of NCO, and by down-sampled filtration module 11 decisions of the first order.Therefore the clock cycle for the input data in second level anti-interference filtration module 12 will provide more calculation step, so these second level anti-interference filtration module 12 needed multipliers will significantly reduce, thereby the minimizing chip area reduces the chip overall power.For example, the data rate that NCO provides desampling fir filter is 30MHz, speed through the down-sampled data after the down-sampled filtration module 11 down-sampled processing of the first order is 10MHz, therefore be all the chip of 60MHz for clock frequency, each clock cycle of input data can only provide twice computing concerning the 30MHz data that NCO provides, and the down-sampled data of the 10MHz after down-sampled processing each clock cycle of input data 6 computings just can be provided, so the quantity of required multiplier also can be reduced to original 1/3.Wherein, the clock frequency of down-sampled filtration module 11 of the first order and second level anti-interference filtration module 12 can be identical, for example all is the chip clock of 60MHz.
Wherein, second level anti-interference filtration module 12 comprises adjacent interference filter submodule 121 frequently, is used for the down-sampled data that the down-sampled filtration module 11 of the first order generates are carried out neighbour's interference filter frequently.
Wherein, second level anti-interference filtration module 12 also comprises co-channel interference filtering submodule 122, be used for to the down-sampled data that the down-sampled filtration module of the first order 11 generates carry out co-channel interference filtering or to the neighbour frequently interference filter submodule 121 data of carrying out behind the adjacent interference filter frequently carry out co-channel interference filtering again.This co-channel interference filtering submodule 122 can use separately in second level anti-interference filtration module 12, also can cooperate adjacent interference filter submodule frequently 121 to use, and the data behind neighbour's frequency interference filter submodule 121 adjacent interference filters are frequently carried out co-channel interference filtering.The second level anti-interference filtration module 12 that the embodiment of the invention proposed comprises adjacent interference filter submodule 121 and co-channel interference filtering submodule 122 frequently; it is one of embodiment of the invention preferred implementation; this second level anti-interference filtration module 12 also can comprise other functional module, so other function of providing of second level anti-interference filtration module 12 also should be embodiment of the invention protection range and contains.
Wherein, desampling fir filter also comprises controller 13, be used to control the unlatching of co-channel interference filtering submodule 122 or close, when the user does not need to carry out co-channel interference filtering, this co-channel interference filtering submodule 122 is not closed, for example the user does not want to continue to watch conventional digital TV channel and wishes to watch satellite TV channel, receive satellite TV channel this moment does not just need to carry out co-channel interference filtering, therefore just this co-channel interference filtering submodule 122 is closed in user's switching channels.Wherein this controller 13 can be placed in the outside of desampling fir filter place chip, so just can make to the user a kind of pattern of closing this co-channel interference filtering submodule 122 by force is provided when the converted channel.
As shown in Figure 2, the flow chart for the down-sampled filtering method of the embodiment of the invention may further comprise the steps:
Step S201: the input data are carried out down-sampled processing, generate down-sampled data.At first the data of NCO input are carried out down-sampled processing, will reduce greatly, and the input data rate of system's subsequent module will not be subjected to the influence of NCO through the speed of the down-sampled data of down-sampled processing, and by the down-sampled filtration module decision of the first order.For example NCO data rate that desampling fir filter is provided is 30MHz, speed through the down-sampled data after the down-sampled processing of the down-sampled filtration module of the first order will become 10MHz, therefore be the chip of 60MHz for clock frequency, each clock cycle of input data can only be carried out 2 step computings concerning the 30MHz data that NCO provides, and the down-sampled data of the 10MHz after down-sampled processing each clock cycle of input data just can carry out 6 and go on foot computings.
Step S202: the down-sampled data that generate are carried out interference filter.For example the down-sampled data that generate are carried out neighbour interference filter and/or co-channel interference filtering frequently.This moment, the data input rate for neighbour's frequency interference filter and/or co-channel interference filtering was far smaller than the data input rate that NCO provides, therefore when carrying out neighbour's frequency interference filter and/or co-channel interference filtering, a clock cycle of input data can be handled repeatedly computing, adjacent interference filter frequently and/or the required number of multipliers of co-channel interference filtering will significantly reduce, therefore reduce chip area, reduced the power consumption of chip.For example NCO data rate that desampling fir filter is provided is 30MHz, speed through the down-sampled data after the down-sampled processing of the down-sampled filtration module of the first order will become 10MHz, then carry out neighbour interference filter and/or co-channel interference filtering frequently for the data after down-sampled processing, the needed multiplier of 30MHz data that then handling NCO provides will be 3 times of the down-sampled data of processing 10MHz, therefore should the neighbour frequently the area of interference filter and/or co-channel interference filtration module will correspondingly reduce 1/3, along with reducing of chip area, the power consumption of chip integral body also will correspondingly reduce.The foregoing description described " carrying out down-sampled processing " a kind of better embodiment that just embodiment of the invention proposed by the down-sampled filtration module of the first order, certainly also can before down-sampled processing, carry out the data processing of alternate manner, and the above-mentioned desampling fir filter of the embodiment of the invention is not limited to two-layer configuration, also can be made of multilevel hierarchy.
The embodiment of the invention also proposes a kind of before down-sampled data are carried out co-channel interference filtering, judges whether to carry out down-sampled data the pattern of co-channel interference filtering.Current state machine according to system judges whether that needs carry out co-channel interference filtering, for example the user does not want to continue to watch conventional digital TV channel and wishes to watch satellite TV channel, receive satellite TV channel this moment does not just need to carry out co-channel interference filtering, therefore co-channel interference filtering should be closed.If what the user watched is conventional digital TV channel rather than satellite TV channel, because when receiving conventional digital television signal, receive the interference of other signal of frequency together possibly, so need to open the co-channel interference filter function this moment.
The multilevel hierarchy of desampling fir filter is proposed by the embodiment of the invention, this desampling fir filter can be divided into two-stage at least, the down-sampled filtration module of the first order carries out down-sampled, second level anti-interference filtration module is carried out interference filter, because the input data of second level anti-interference filtration module are through the down-sampled processing of the down-sampled filtration module of the first order, its data input rate is far smaller than the data input rate that NCO provides for desampling fir filter, and its occurrence is not subjected to the influence of NCO by the parameter decision of the down-sampled filtration module of the first order.Therefore reduce the required multiplier number of second level anti-interference filtration module effectively, thereby reduced area of chip, reduced the power consumption of chip.And the control section of this second level anti-interference filtration module also can place chip exterior, makes the user when not needing to carry out co-channel interference filtering, in time this co-channel interference filter function is closed, and makes things convenient for the at any time switching of user to channel.
The above only is a preferred implementation of the present invention; should be pointed out that for those skilled in the art, under the prerequisite that does not break away from the principle of the invention; can also make some improvements and modifications, these improvements and modifications also should be considered as protection scope of the present invention.