CN100429753C - 等离子体处理方法、半导体基板以及等离子体处理装置 - Google Patents

等离子体处理方法、半导体基板以及等离子体处理装置 Download PDF

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CN100429753C
CN100429753C CNB2004800036633A CN200480003663A CN100429753C CN 100429753 C CN100429753 C CN 100429753C CN B2004800036633 A CNB2004800036633 A CN B2004800036633A CN 200480003663 A CN200480003663 A CN 200480003663A CN 100429753 C CN100429753 C CN 100429753C
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dielectric film
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北川淳一
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Abstract

本发明对于半导体基板的表面通过利用了微波的等离子体，同时进行等离子体氧化处理和氮化处理，还根据需要，在基于所述那种等离子体氧氮化处理而形成绝缘膜之后，再对该绝缘膜进一步进行等离子体氮化处理。由此，可以形成电气性能良好的绝缘膜(硅氧化膜)。

Description

等离子体处理方法、半导体基板以及等离子体处理装置
技术领域
本发明涉及使用等离子体在半导体基板的表面上形成绝缘膜的等离子体处理方法以及由此制造的半导体基板，以及用于实施等离子体处理方法的等离子体处理装置。
背景技术
至今，在硅基板上形成的绝缘膜多使用通过在1000℃以上的高温下进行氧化处理而形成的热氧化膜。最近，由于精微化技术的进步，需要减少仅仅由热能量而进行Si与O的反应的这种氧化膜(绝缘膜)的厚度。
但是，如果采用在高温下进行的热氧化处理而得到绝缘膜的形成方法，随着厚度变薄，漏电流等增大而难于得到可靠性高的绝缘膜。另外，对于通过绝缘膜使电流流动而进行读写的非易失性存储器，还有由于在绝缘膜中被俘获的空穴或者电子，造成存储器特性的降低。特别空穴的俘获影响产品的可靠性。
为了解决该问题，与热氧化法反应机制不同而使用等离子体的活性原子态氧(以下称“氧自由基”)而进行的氧化处理被付诸实现。通过该方法，在将等离子体的电子温度保持在低温状态下，可以形成氧化膜，其结果是可以降低被处理基板和处理装置内壁的损伤。另外，通过降低空穴俘获，可以不降低可靠性而形成厚度薄的氧化膜。
作为使用等离子体的氧化膜的形成方法，有在日本国专利公开公报的特开平11-293470号公报中记载的方法。根据该方法，在向处理室内导入含硅气体以及含氧气体后生成这些气体的等离子体，在基板上堆积硅氧化膜而形成膜的硅氧化膜的成膜方法中，除了前述含硅气体以及含氧气体之外，向处理室内导入氢气，在处理室内生成含氢的等离子体。由此，可以得到与热氧化膜相匹敌的良好的膜质量。
但是，使用等离子体在基板表面上形成的氧化膜(绝缘膜)，与通过高温氧化处理得到的氧化膜相比，被认为电子俘获特性不好，所以电应力变弱，作为成品的特性变坏。
另外，为了改良热氧化膜的诸特性，还在热氧化后进行热氮化。氮化弥补了在热氧化时发生的不完全的SiO的结合，改善各种特性。但是，使用热氮化法时，氮的深度方向的分布偏向基板界面部，均匀的氧化膜的改善不充分。所以，为了提高电应力弱的等离子体氧化膜的特性，与热氧化·氮化膜同样研究了在等离子体氧化处理后进行氮化处理的方法。
发明内容
本发明是鉴于上述那样的状况，而以提供形成电气特性良好的绝缘膜(硅氧氮化膜)的方法以及通过该方法制造的半导体基板和等离子体处理装置为目的。
为了达到上述的目的，在涉及本发明的第1方式的等离子体处理方法中，对于半导体基板的表面同时进行等离子体氧化处理和等离子体氮化处理。由此，改善被形成的绝缘膜的俘获特性。另外，所谓同时进行氧化和氮化是指至少稳定地进行各自的处理的主要处理期间是同时期的，各自的处理的开始和结束时间也可以不同。
等离子体的电子密度在1.0×1012(1/cm3)以上、而电子温度在1.0(eV)以下是优选的。另外，作为等离子体源，利用微波的等离子体源可以容易地生成具有这些值的电子密度、电子温度的等离子体。而且利用微波的等离子体可以平坦地形成平的等离子体区域，适于本发明那样的氧氮化膜。
也可以通过上述那样的等离子体氧氮化处理而形成绝缘膜后，对于该绝缘膜再进行等离子体氮化处理。由此，可以进行在热氮化、热氧氮化处理中难于控制的氮深度方向的分布控制。另外，在同时进行氧化、氮化处理时，可以通过进行氧气气体混合比的控制，控制氮分布。
改变氧气氮气的混合比、即流量比例的话，可以改变绝缘膜中的氮浓度的峰值。所以，在这种情况下，在形成前述那样的绝缘膜后不需要进行等离子体的氮化处理。根据发明者的发现，氧气与氮气的流量比率设定为1∶4～1∶6的话，如后述的那样，可分别在与基板的界面侧和绝缘膜的表面侧形成氮浓度峰值。
涉及本发明的第2方式的半导体基板，氮从绝缘膜的表面向着到与硅基板的界面的厚度方向扩散，在比绝缘膜的表面更加靠近界面的地方具有氮分布的峰值。或者，在绝缘膜的表面附近和界面附近的2处具有氮分布的峰值。由此，可以得到具有改善了等离子体形成的绝缘膜的俘获特性的绝缘膜的半导体基板。在具有这种构造的半导体基板上，防止在后工序中的不必要的再氧化，另外对于被注入的杂质具有阻挡。所以，可以得到不容易受半导体制造工序的条件的影响的、具有稳定的绝缘膜的半导体基板。
本发明的第3方式，在对半导体基板进行等离子体处理的等离子体处理装置，具有：收容前述半导体基板的处理容器、向前述处理容器导入微波的微波导入部、向前述处理容器供给处理气体的气体供给部，前述气体供给部向前述处理容器同时供给氧和氮，对前述半导体基板的表面同时进行氧化处理和氮化处理，形成绝缘膜。
在该情况下，也可以构成为，前述气体供给部在前述半导体基板的氧化·氮化处理之后，向前述处理容器供给氮，再对前述绝缘膜进一步进行氮化处理。
根据该等离子体处理装置，可以很好地实施前述等离子体处理方法，另外可以很好地制造前述的半导体基板。
附图说明
图1是表示涉及本发明的实施例的等离子体处理装置的构成的一个例子的示意图(断面图)。
图2(A)、(B)是表示实施例1的等离子体处理工序的一部分的示意图。
图3(A)是说明俘获特性的图，(B)是作为一个例子表示测量俘获特性的示意的图。
图4是表示各种绝缘膜的俘获特性的图。
图5是表示直到绝缘破坏为止的随时间变化的特性的表。
图6(A)、(B)是表示实施例2的等离子体处理工序的一部分的示意图。
图7是表示根据本发明的实施例1得到的绝缘膜中的氮分布的图。
图8是表示根据本发明的实施例2得到的绝缘膜中的氮分布的图。
具体实施方式
图1表示用于本发明的等离子体基板处理装置10的简要构成的一个例子。用于本发明的等离子体处理装置10具有：具备了保持作为被处理基板的硅晶片W的基板保持台12的处理容器11，处理容器11内的气体(gas)通过未被图示的排气泵从排气口11A以及11B排气。另外基板保持台12具有加热硅晶片W的加热器功能。
在处理容器11的装置上方，与基板保持台12上的硅晶片W相对应而设置开口部。该开口部被由石英和氧化铝组成的电介质板13堵塞，在电介质板13的上部(外侧)，设置起天线作用的槽板14。在槽板14的更上方(外侧)，配置由石英、氧化铝、氮化铝等组成的电介质板15。该电介质板15也被称为滞波板或者波长缩短板。在电介质板15的上部(外侧)配置冷却板16。在冷却板16的内部设置流通冷媒的冷媒路16a。另外，在处理容器11的上端中央，设置导入微波的同轴波导管18。
在基板保持台12的周围，配置由铝构成的气体挡板(隔板)26。在气体挡板26的下面设置石英罩28。
在处理容器11的内壁上，设置为了导入用于等离子体处理的气体的气体喷嘴22。同样地，在处理容器11的内壁的内侧上，按照包围容器整体那样形成温度调整媒体流通路24。
接下来表示使用该等离子体处理装置10实施本发明的一个例子。首先，将作为半导体基板的硅晶片W设置在等离子体处理装置10的处理容器11中之后，通过排气口11A、11B进行处理容器11内部的空气的排气，处理容器11的内部被设定到规定的处理压力上。然后，在被设置了硅晶片W的处理容器11中从气体喷嘴22，将非活性气体和氧气和氮气进行预先混合后导入。这些气体也可以被导入具有多个气体喷嘴22、而从各喷嘴分别导入处理容器11。或者，也可以将多个分别流通气体的配管在气体喷嘴22的附近汇成一体，在喷嘴附近一边将这些气体进行混合，一边导入。不管怎样，只要在同一等离子体处理机会按照同时存在这些气体那样供给的话，用哪一种方法供给都可以。
另外，通过同轴波导管18供给的几GHz的频率的微波通过电介质板15、槽板14、电介质板13被导入处理容器11中。由该微波激发等离子体，从非活性气体、氧气和氮气的混合气体中生成氧自由基和氮自由基。
这时的等离子体的电子密度在1.0×1012(1/cm3)以上，而电子温度在1.0(eV)以下是优选的。由此可以抑制对于所形成的氧氮化膜的破坏。
在这一点上，例如其他的高密度生成用的等离子体源，例如ECR等离子体对于基板给予等离子体的破坏的可能性大。即，存在对于基板蓄积不必要的电荷，或者切断形成了的Si-N-O的链的危险，不能形成质量好的氧氮化膜。
所以，如果用实施例那样由利用了微波的高密度、低电子温度的等离子体进行处理的话，由于没有那种蓄积不必要的电荷、或者切断形成了的Si-N-O的链的危险，所以可以形成质量好的氧氮化膜。
另外，由于是那种高密度、低电子温度的等离子体，所以可以使硅晶片W相对于等离子体接近配置，所以可以抑制成膜速度的下降。
即，虽然在现有的等离子体源、例如ECR等离子体中，由于是高能量，所以硅晶片W需要从等离子体区域适当离开配置，若如此，发生的氧自由基在到达硅晶片W之前其寿命早结束的概率大，所以带来由此引起的成膜速度的降低。
在该实施例中，通过利用微波的等离子体进行处理，所以可以将硅晶片W接近等离子体那样配置，其结果是在氧自由基的寿命结束之前，可以使多数的氧自由基到达硅晶片W。所以，可以不降低成膜速度，形成好的氧化膜、氧氮化膜。
到达了硅基板21的表面氧自由基和氮自由基是指图2(B)所示的那样对硅基板21的表面进行氧氮化处理，形成所需厚度(例如，～10nm)的硅氧氮化膜22。这样，可以得到具有同时进行氧化和氮化而形成的绝缘膜的半导体基板(实施例1)。
另外，为了进行比较，准备了具有热氧化膜的半导体基板(现有的例子)、具有等离子体氧化后进行等离子体氮化的绝缘膜的半导体基板(比较例1)和仅仅有等离子体氧化膜的半导体基板(比较例2)。然后，与前述的实施例1一起测量俘获(TRAP)特性并进行比较评价。将其结果在图4(A)、(B)中表示。
电子的俘获的构成在图3(A)中作为例子表示。例如，在进行闪存储器30的改写时，电子被从半导体基板31通过绝缘膜(氧化膜)32拉入浮动栅33。在这时，绝缘膜32的膜质不好的话，许多电子35留在该绝缘膜中，而逐渐使电子(-)不通。将这种现象成为俘获，在该例子当中，闪存储器30被改写后，由于该被俘获的电子35，存储器的写入特性变坏。
俘获特性的测量，例如如图3(B)将半导体基板作成MOS电容器36后测量。在如前述那样形成的硅基板21上设置绝缘膜(氧化膜)22，通过按照在其上面流过规定电流那样设置电极37而形成该MOS电容器。通过测量该电极37和半导体基板21之间的电位差，测量俘获特性。
在使用N-MOS电容器的情况下，在电极37上加负电压，测量电压随时间的变化。一般地，测量数据与图4(A)、(B)大有区别，在测量初期(图4B)，空穴俘获被观测，电子俘获从以后的测量(图4A)观测到。加在半导体基板和电极之间的电压的初期值随着时间的经过渐渐地转向负侧。表示出偏转的电压值愈大则被俘获的电子就愈多，电子就变得不容易通过绝缘膜。如果是前述那样的闪存储器的话，在写入时，俘获愈大，则电子愈难通过，所以不容易写入，结果是可以看到写入的特性变坏。
图4将这样测量了的电子的俘获特性用表示与初始电压的偏差的关系来表示的。横轴表示被标准化了的时间，纵轴表示与初始电压值的偏差(Vg-shift)。该偏差是被加的初始电压值和随时间变化的绝缘膜的两端之间的测量电压之差。所以，显示电子俘获增加的话，则向负侧偏移。
实线表示根据现有例子的热氧化膜得到的结果，而单点划线表示具有根据本发明的实施例1的同时进行等离子体氧化和等离子体氮化而生成的等离子体氧氮化膜(绝缘膜)的半导体基板。另外，双点划线表示具有在等离子体氧化后进行等离子体氮化而生成的比较例1的绝缘膜的半导体基板，虚线表示具有等离子体氧化膜的比较例2的半导体基板。由图可知，相对于实施例1具有与现有的热氧化膜几乎相同的良好的特性，任意一个比较例因电子俘获的量多而作为绝缘膜的性能不够充分。
另外，为了比较一般的电气特性，对于施加电荷流电流时直到绝缘破坏为止的随时间变化的特性(TDDB：Time Dependent DielectricBreakdown)以及漏(leak)电流，针对前述试样分别求得的值在图5的表中表示。在此，将热氧化膜的值作为基准进行相对评价。另外，在该表中按照可以更加综合地把握绝缘膜的特性那样，将图4所示的俘获特性作为定性的表现而加以标记。
由该结果可以知道，在TDDB、漏电流中的任何一个中，利用等离子体得到的绝缘膜相对于现有的热氧化膜表现出同等或者更高的特性。对于TDDB根据本发明的实施例1特别良好，另外对于漏电流利用等离子体而形成的绝缘膜表现出超过现有例子的特性。另外，空穴俘获被认为是决定绝缘膜寿命(TDDB)的要素，与电子俘获一起愈少，则绝缘膜愈良好。
接下来，使用该等离子体处理装置10表示实施本发明的另一个例子。
不需要将在前述的实施例1中得到的半导体基板从处理容器11中取出，而继续设置在处理容器11中。在实施例1中使用的气体等通过排气口11A、11B从处理容器11排出。然后，从气体喷嘴22将非活性气体和氮气混合后导入处理容器11中。
另外，通过同轴波导管18供给的频率为几GHz的微波通过电介质板15、槽板14、电介质板13被导入处理容器11中。由该微波激发等离子体，从已经被导入的非活性气体和氮气的混合气体中生成氮自由基。
到达了半导体基板的表面的氮自由基如图6(B)所示的那样将位于半导体基板表面的绝缘膜22进一步进行氮化处理，形成所需厚度(例如，～10nm)的硅氧氮化膜22A。如此，得到了具有在同时进行氧化和氮化之后进一步进行了氮化处理的绝缘膜22A的半导体基板(实施例2)。
对于这样得到的根据本发明的半导体基板，将调查绝缘膜厚度方向的氮分布状况的结果在图7中表示。在图7中，横轴表示蚀刻时间。表示出与绝缘膜的厚度方向的距离相对应，时间愈多则被蚀刻的愈多，距离绝缘膜的表面就愈远而变深的情况。纵轴表示氮的相对频谱强度，强度愈大，则氮大量分布而存在。
图7表示对于实施例1的氮分布，氮至少沿从绝缘膜的表面到与半导体基板的界面的厚度方向扩散，在比表面更加靠近界面的地方具有氮分布的峰值。由此，可以得到具备良好俘获特性的绝缘膜的半导体基板。
图8表示对于实施例2的氮分布，绝缘膜中的氮分布的峰值，在表面的附近和界面附近的2处发生。由此，除了等离子体形成的绝缘膜的俘获特性得到改善之外，防止在后续工序中的再氧化，相对于被注入的杂质形成阻挡。所以可以得到不易受到半导体制造工序条件影响的具有稳定的绝缘膜的半导体基板。
这样，在实施例2中，通过设定适当的处理条件，可以改变氮分布的峰值位置。由此，可以进行对于在现有的高温氧氮化处理中难于控制的氮分布的绝缘膜厚度方向的控制。
在如实施例2那样同时进行了氧化和氮化之后，即使不再进行氮化处理，如图8所示的那样，可以形成绝缘膜中的氮分布峰值在表面的附近和界面附近的2处发生的绝缘膜。
即，首先在处理容器11内使氧气和非活性气体等离子体化，对于硅晶片W形成氧化膜。接下来，将非活性气体、氧气和氮气的混合气体导入处理容器11内，进行等离子体化，对于硅晶片W进行氧氮化处理，形成氧氮化膜。例如在形成8nm的绝缘膜的情况下，使氧化膜的厚度为6nm，氧氮化膜的厚度为2nm。那时，设定氧气和氮气的混合气体的流量比为1∶4～1∶6左右。
如此，可以形成绝缘膜中的氮分布峰值在表面的附近和界面附近的2处发生的绝缘膜。
如以上说明的那样，根据本发明，由于对于半导体基板的表面同时进行等离子体的氧化处理和等离子体的氮化处理，形成的绝缘膜的俘获特性得到了改善。另外，从TDDB和漏电流来看的话，可以得到比现有好的多的绝缘膜。
另外，在上述那样的等离子体氧化·氮化处理之后，再进行等离子体氮化处理的情况下，可以进行在高温氧氮化处理中难于控制的氮深度方向的分布的控制。其结果是，可以与用途相对应而得到适当特性的氧氮化膜。
如以上那样，根据本发明，即使在低温下形成绝缘膜也可以得到具有电气特性和可靠性能够与热绝缘膜相匹敌或者超过热绝缘膜的半导体基板。
在产业上利用的可能性
本发明对于半导体装置、特别是非易失性存储器的绝缘膜的形成是有用的。

Claims (11)

1.一种使用等离子体对处理容器内的半导体基板形成绝缘膜的等离子体处理方法，其特征在于，、
在同一处理时供给非活性气体和氧气和氮气，
通过从作为天线的槽板导入的微波对所述非活性气体和氧气和氮气进行等离子体激发，
通过由所述等离子体对所述基板表面进行氧氮化处理，在所述基板表面形成氧氮化膜。
2.如权利要求1所述的等离子体处理方法，其特征在于，
在形成所述氧氮化膜后，供给非活性气体和氮气，通过微波对该非活性气体和氮气进行等离子体激发，使所述氧氮化膜再氮化。
3.如权利要求1所述的等离子体处理方法，其特征在于，
在比所述绝缘膜的表面更加靠近所述绝缘膜与所述基板的界面的地方具有氮分布的峰值。
4.如权利要求2所述的等离子体处理方法，其特征在于，
在所述绝缘膜的表面侧和所述绝缘膜与所述基板的界面侧的2处具有氮分布的峰值。
5.如权利要求1～4中任一项所述的等离子体处理方法，其特征在于，所述等离子体的电子密度在1.0×1012(1/cm3)以上，所述等离子体的电子温度在1.0(eV)以下。
6.如权利要求1～4中任一项所述的等离子体处理方法，其特征在于，氮气的流量多于氧气的流量。
7.如权利要求1～4中任一项所述的等离子体处理方法，其特征在于，氧气与氮气的流量比率为1∶4～1∶6。
8.一种在半导体设备中使用的半导体基板，其特征在于，
其具有绝缘膜，该绝缘膜是在同一处理时供给非活性气体和氧气和氮气，通过从作为天线的槽板导入的微波对该非活性气体和氧气和氮气进行等离子体激发，利用该等离子体，对所述半导体基板的表面进行氧氮化处理，在该半导体基板表面形成的氧氮化膜的绝缘膜。
9.如权利要求8所述的半导体基板，其特征在于，
氧气和氮气的流量比率为1∶4～1∶6。
10.如权利要求8所述的半导体基板，其特征在于，
氮气的流量多于氧气的流量。
11.一种对半导体基板进行等离子体处理的等离子体处理装置，其特征在于，该等离子体处理装置包括：
***述基板的处理容器；
配置在所述处理容器上的电介质板；
配置在所述电介质板上、向所述处理容器导入微波的作为天线的槽板；和
向所述处理容器供给处理气体的气体供给部，
其中，在同一处理时从所述气体供给部向所述处理容器供给非活性气体和氧气和氮气，通过从所述槽板导入的所述微波，进行该非活性气体和氧气和氮气的等离子体激发，利用该等离子体，对所述基板的表面同时进行氧化处理和氮化处理，在该基板表面形成氧氮化膜的绝缘膜。
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