CN100385790C - Switched capacitor circuit capable of minimizing clock feedthrough effect and correlation method - Google Patents
Switched capacitor circuit capable of minimizing clock feedthrough effect and correlation method Download PDFInfo
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- CN100385790C CN100385790C CNB2004100785431A CN200410078543A CN100385790C CN 100385790 C CN100385790 C CN 100385790C CN B2004100785431 A CNB2004100785431 A CN B2004100785431A CN 200410078543 A CN200410078543 A CN 200410078543A CN 100385790 C CN100385790 C CN 100385790C
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Abstract
A switched-capacitive circuit, used in a voltage controlled oscillator, for reducing the clock feedthrough effect, by which instantaneous frequency drift caused was reduced.Said switchedcapacitive was switched from a gateway status to a turnoff state gradually, then the clock feedthrough effect was reduced to the least.A pularity of switch members which have different size were used to switch a capacitance from an internal capacitance node to a grounded node. When said switched-capacitive circuit was switched to the turnoff state, a pularity of control signal will be switched in order, in accordance with the size of switch members. Said switch member were gradually opened according to their decreasing volume. Moreover, a lowpass could be set at the front of controlling of the least switched-module for further reducing the clock feedthrough effect.
Description
Technical field
The present invention relates to a kind of switch capacitor circuit, be particularly related to a kind of switch capacitor circuit that is used in the voltage controlled oscillator, can be used to lower clock feed-through effect, the pressuring controlling oscillator frequency drift phenomenon in the time of also therefore can being suppressed at phase-locked stage of frequency correction stage and frequency synthesizer.
Background technology
(voltage controlled oscillator VCO) is one and often is used in the wireless communication system (wireless communication systems) voltage controlled oscillator, carries out the assembly of frequency synthesis (frequencysynthesis) work.For example people such as Welland is in United States Patent (USP) the 6th, 226, described in No. 506 the patent, wireless communication system need be gone up the work of carrying out frequency synthesis at RX path circuit (receive path circuitry) and transfer path circuit (transmit path circuitry) usually.
Fig. 1 is the schematic diagram of known technology one voltage controlled oscillator 10.The LC formula voltage controlled oscillator 10 that is used for a frequency synthesizer (frequency synthesizer) among the figure includes a resonant cavity (resonator), basic structure of resonant cavity then includes an inductance 12, is coupled between one first vibration node OSC_P and the one second vibration node OSC_N.One continous way (continuously) variable capacitance 14 and a plurality of discrete type (discretely) variable capacitance 16 are in parallel with inductance 12.Continous way variable capacitance 14 is to be used for work (fine tuning) that a target capacitance value is finely tuned, is the work (coarse tuning) that is used for carrying out coarse adjustment as for 16 of a plurality of discrete type variable capacitances.The ohmic loss (resistive loss) that electric capacity and inductance itself caused is then compensated by negative electricity resistance generator (negativeresistance generator) 18, to keep the vibration of system.
Each discrete type variable capacitance in these discrete type variable capacitances 16 all constitutes a switching type capacitor (switched-capacitor) circuit, each switch capacitor circuit all be subjected to one independently control signal (be respectively SW_1～SW_N) control.According to a control signal SW_N, a switch capacitor circuit 20 can optionally allow an electric capacity 24 connect or do not connect the resonant cavity of (connect or disconnect) voltage controlled oscillator 10.The different paths of these switch capacitor circuits/combination of opening circuit can make this LC formula resonant cavity have bigger capacitance mobility scale, therefore can increase the frequency range that voltage controlled oscillator 10 can vibrate.
Fig. 2 is the schematic diagram of known technology one switch capacitor circuit 20a.One electric capacity 30 is to be coupled between the first vibration node 0SC_P and the node A.One switch module 32 optionally allows node A connect or does not connect earth point, and wherein switch module 32 is controlled by a control signal SW.When switch module 32 is switched on (close), the capacitance of electric capacity 30 can be added in the integral capacitor value of resonant cavity of voltage controlled oscillator 10.When switch module 32 is opened circuit (open), the capacitance of seeing into from the first vibration node OSC_P just becomes the capacitance of electric capacity 30 and switch module 32 tandem compound (series combination) at the parasitic capacitance value (parasitic capacitance) of off state.
Fig. 3 is the schematic diagram of known technology one differential switch capacitor circuit 20b.Common-mode noise suppresses the ability of (common-mode noise rejection) because the framework of differential type has preferably, so often is widely used in the environment of high speed integrated circuit.In differential switch capacitor circuit 20b, an anode (positive side) electric capacity 40 is to be coupled between the first vibration node OSC_P and the node A.One anode switch module (switch element) 42 optionally allows node A connect or does not connect earth point.One negative terminal electric capacity 44 is to be coupled between the second vibration node OSC_N and the Node B.One negative terminal switch module 46 optionally allows Node B connect or does not connect earth point.These two switch modules 42,46 are controlled by identical control signal SW all.When switch module 42,46 was switched on, the tandem compound of the capacitance of anode electric capacity 40 and negative terminal electric capacity 44 will be added to the integral capacitor value of voltage controlled oscillator 10.As for when switch module 42,46 is opened circuit, differential input capacitance value promptly becomes the tandem compound of the capacitance of anode electric capacity 40, negative terminal electric capacity 44 and other parasitic capacitance.State when whole input capacitance value can be lower than all switch modules 42,46 and is switched on when all switch modules 42,46 are all opened circuit.
Fig. 4 then is the schematic diagram of known technology one second differential switch capacitor circuit 20c.The second differential switch capacitor circuit 20c is except including the identical assembly with the first differential switch capacitor circuit 20b, other includes a center switch assembly 48, is used for being reduced to the switch conduction resistance value (turn-on switch resistance) between node A and the Node B.These three switch modules 42,46,48 are controlled by identical control signal SW all.When switch module 42,46,48 was switched on, the tandem compound of the capacitance of anode electric capacity 40 and negative terminal electric capacity 44 will be added to the integral capacitor value of voltage controlled oscillator 10.Extremely when switch module 42,46,48 is opened circuit, differential input capacitance value promptly becomes the tandem compound of the capacitance of anode electric capacity 40, negative terminal electric capacity 44 and other parasitic capacitance.State when whole input capacitance value can be lower than all switch modules 42,46,48 and all is switched on when all switch modules 42,46,48 are all opened circuit.
No matter what use is monofocal framework or Fig. 3 and differential type framework shown in Figure 4 shown in Figure 2, when switch capacitor circuit 20a, 20b or 20c are opened circuit, step variation in voltage (momentary voltagestep change) when (also comprising Node B in the differential type framework at Fig. 3 and Fig. 4) on the node A and can produce a flash.Above-mentioned instantaneous step voltage change can cause resonant cavity integral capacitor value to produce should not change, last, had also caused the frequency of voltage controlled oscillator 10 to produce the drift that should not have.Owing to the example in the 2nd, 3,4 figure has been to use nmos switch, therefore instantaneous step voltage change is the voltage decline (voltage drop) for producing when switch module 32,42,46,48 is opened circuit.
With monofocal framework shown in Figure 2 is example, when switch module 32 was opened circuit, charged carrier (charge carriers) can be injected into (injected) and be connected in junction capacitance (junction capacitance) between switch module 32 first ends and second end.The injection of charged carrier has promptly caused the step voltage change of node A.Above-mentioned effect is so-called clock feed-through effect (clockfeedthrough effect), and occurs from control end (that is grid of the MOS transistor) feedthrough (feedthrough) of switch module 32 form of (that is the drain electrode of MOS transistor and source electrode) to switch module 32 two other end points with control signal SW.When switch module 32 was switched on, because node A is coupled in earth point, so the feedthrough of control signal SW can not have any impact.Yet when switch module 32 was opened circuit, the feedthrough meeting of control signal SW caused a step voltage, and promptly node A goes up the voltage decline that produces.And because node A has produced the situation that voltage descends, by the N of switch module 32 drain electrode ends
+Diffusion (N
+Diffusion) and the formed diode of the substrate of P type (P type substrate) under off state, have a little suitable bias voltage (forward biased) and produce leakage current (leakage current).When the leakage current of junction rectifier charges to node A lentamente, this node potential can return to the earth point current potential.The voltage that produces in node A reduces and the action that recovers can change the load capacitance value (load capacitance) of voltage controlled oscillator 10 resonant cavities, the frequency drift (frequency drift) that has also just caused voltage controlled oscillator 10 to produce should not to exist.
As for when differential type switch capacitor circuit 20c shown in Figure 4 is opened circuit, it also can run into the problem of identical clock feed-through effect on node A and Node B.Positive end node A can be because the clock feed-through effect of the clock feed-through effect of anode switch module 42 and center switch assembly 48 produces the step voltage that should not have.Identical, the negative terminal Node B also can produce the step voltage that should not have because of the clock feed-through effect of negative terminal switch module 46 and the clock feed-through effect of center switch assembly 48.On be set forth in step voltage that node A and Node B produce and change and recover and all can change the capacitance of the resonant cavity of voltage controlled oscillator 10, and cause the frequency of voltage controlled oscillator 10 to produce instantaneous drift situation.
Summary of the invention
Therefore one of purpose of the present invention is to provide a kind of switch capacitor circuit that can lower clock feed-through effect, to solve the problem that known technology was faced.
According to an aspect of of the present present invention, be to disclose a kind of switch capacitor circuit that lowers clock feed-through effect, include: one first anode switch module, be used for according to one first control signal, optionally allow one first positive end node connect or do not connect one the 3rd node, wherein this first positive end node is to be coupled in an anode electric capacity; One second anode switch module is used for optionally allowing this first positive end node connect or do not connect a Section Point according to one second control signal; One the 3rd switch module is used for according to one the 3rd control signal, optionally allows the 3rd node connect or does not connect this Section Point; And a sequence controller, be coupled in these switch modules, be used for producing this first control signal, this second control signal, and the 3rd control signal.
According to another aspect of the present invention, be that exposure is a kind of when opening circuit a switch capacitor circuit, be used for lowering the method for clock feed-through effect, this method includes following steps: (a) use one first anode switch module disjunction, one first positive end node and one the 3rd node; (b) use one second anode switch module disjunction this first positive end node and a Section Point; And (c) use one the 3rd anode switch module disjunction the 3rd node and this Section Point; Wherein, this first positive end node is to be coupled in an anode electric capacity, and the execution sequence of step (b), (c) is for variable.
An advantage of the present invention is, by each switch module that opens circuit from large to small of the component size according to each switch module, this switch capacitor circuit can be opened circuit gradually, thus, clock feed-through effect and betide in the voltage controlled oscillator 10 unfavorable frequency drift and can thereby be reduced.
Another advantage of the present invention then is, is independent of an earth point or power supply supply node by the switch module that uses one the 3rd switch module with maximum, and when the switch module of maximum was opened circuit, the leakage current of the maximum switch module of flowing through can be blocked.The switch module of above-mentioned extra use can be independent from an earth point or power supply supply node with the switch module (having maximum leakage current) of maximum effectively.Therefore when frequency synthesizer was in phase-locked period, the change in voltage in the resonant cavity on the node A of switch capacitor circuit can be littler, so voltage controlled oscillator 10 can be stable at a steady frequency quickly.
Description of drawings
Fig. 1 is the schematic diagram of known technology one voltage controlled oscillator.
Fig. 2 is the schematic diagram of known technology one switch capacitor circuit.
Fig. 3 is the schematic diagram of known technology one differential switch capacitor circuit.
Fig. 4 is the schematic diagram of known technology one second differential switch capacitor circuit.
Fig. 5 is the switch capacitor circuit first embodiment schematic diagram of the present invention.
Fig. 6 is for cooperating the variation diagram of each control signal of Fig. 5 with respect to the time.
Fig. 7 is for cooperating the variation diagram of each control signal of Fig. 5 with respect to the time.
Fig. 8 is for cooperating the variation diagram of each control signal of Fig. 5 with respect to the time.
Fig. 9 is the switch capacitor circuit second embodiment schematic diagram of the present invention.
Figure 10 is for cooperating the variation diagram of each control signal of Fig. 9 with respect to the time.
Figure 11 is switch capacitor circuit the 3rd an embodiment schematic diagram of the present invention.
Figure 12 is for cooperating the variation diagram of each control signal of Figure 11 with respect to the time.
Figure 13 is switch capacitor circuit the 4th an embodiment schematic diagram of the present invention.
Figure 14 is for cooperating the variation diagram of each control signal of Figure 13 with respect to the time.
The reference numeral explanation
10 voltage controlled oscillators
12 inductance
14 variable capacitances
16 discrete type variable capacitances
18 negative electricity resistance generators
20,20a, 20b, 20c, 20d, 20e, 20f, 20g switch capacitor circuit
24,30,40,44,50 electric capacity
32,52,54,56,122,142 switch modules
40,110,130 anode electric capacity
42,114,118,134,138 end switch assemblies
44,112,132 negative terminal electric capacity
46,116,120,136,140 negative terminal switch modules
48,126,146 center switch assemblies
90,148 low pass filters
58,124,144 sequence controllers
Embodiment
Fig. 5 is the switch capacitor circuit first embodiment schematic diagram of the present invention.Switch capacitor circuit 20d among Fig. 5 includes an electric capacity 50, one first switch modules 52, one second switch assemblies 54, the 3rd switch module 56, and a sequence controller (sequence controller) 58.In this embodiment, three switch modules are all nmos pass transistor, and first switch module, 52 its component size are greater than second switch assembly 54, and second switch assembly 54 is greater than the 3rd switch module 56.Electric capacity 50 is to be coupled between one first a vibration node OSC_P and the node A.First switch module 52 is used for according to one first control signal SW1, optionally allows node A connect or does not connect node C.Second switch assembly 54 is used for according to one second control signal SW2, optionally allows node A connect or does not connect one second vibration node OSC_N, and wherein, the second vibration node OSC_N is coupled to earth point.The 3rd switch module 56 is used for according to one the 3rd control signal SW3, optionally allows node C connect or does not connect the second vibration node OSC_N.58 of sequence controllers are used for producing this first control signal SW1, this second control signal SW2 and the 3rd control signal SW3.Except framework that can be was as shown in Figure 5 implemented, switch module as used herein can also be the PMOS transistor, and this moment second, vibration node OSC_N can be coupled to power supply supply node (VCC).As for using under the transistorized framework of PMOS, then need to use with the nmos pass transistor framework under anti-phase control signal.
Fig. 6 is for cooperating each control signal of Fig. 5 variation Figure 60 with respect to the time.In order to make switch capacitor circuit 20d be switched to an off state gradually, sequence controller 58 can allow switch assembly 52,54,56 by according to the component size order, is descendingly opened circuit in regular turn.Because first switch module 52 is greater than other two switch modules, therefore first switch module 52 can be at t
1In time, opened circuit at first.Because second switch assembly 54 is greater than the 3rd switch module 56, so 54 of second switch assemblies are at t
2In time, opened circuit.At last, at t
3The time the 3rd switch module 56 just can be opened circuit.Because node A goes up Zhao Yin and is mainly determined by the parasitic capacitance value between grid and drain electrode and the ratio of the parasitic capacitance value between drain electrode and source electrode in the voltage change of clock feed-through effect, capacitance when between grid and drain electrode more hour, control signal when height changes low since the voltage that the feedthrough effect is produced change will be more little.Advantage of the present invention is exactly because above-mentioned reason can be opened circuit at first because of clock feed-through effect produces big switch module 52 meetings that descend than big voltage.Before second switch assembly 54 was opened circuit, node A can be coupled in earth point always, and therefore the clock feed-through effect that is caused by first switch module 52 does not have too much influence.If it is little to do very second switch assembly 54, then the clock feed-through effect that is caused when conducting state is switching to off state when second switch assembly 54 will be little of ignoring.
Yet when second switch assembly 54 was opened circuit, node A still can experience negative voltage decline (negative voltage drop) slightly because of clock feed-through effect.Because have leakage current (leakage current) to pass through in the switch module 52,54,56, the current potential of node A finally can return the earth point current potential.Yet switch module is big more, and leakage current also will be big more, and the main effect of the 3rd switch module 56 is exactly will be with first switch module 52 (maximum switch module), and independent between earth point, returns the earth point current potential with the current potential that postpones node A.The current potential that postpones node A by during frequency synthesizer phase-locked (phaselocking period) returns the earth point current potential, and the current potential of node A just can remain on the longer time of back bias voltage (but current potential changes lentamente) slightly.Therefore frequency synthesizer can lock the frequency of voltage controlled oscillator 10 quickly.
Fig. 7 is for cooperating each control signal of Fig. 5 variation Figure 70 with respect to the time.In order to make switch capacitor circuit 20d be switched to an off state gradually, sequence controller 58 must guarantee that first switch module, 52 quilts are at t
1In time, opened circuit at first. Second switch assembly 54 and 56 whiles of the 3rd switch module are at t
2In time, opened circuit.
Fig. 8 is for cooperating each control signal of Fig. 5 variation Figure 80 with respect to the time.Identical, in order to make switch capacitor circuit 20d be switched to an off state gradually, sequence controller 58 must guarantee that first switch module 52 is at t
1In time, opened circuit at first.Yet in order further to reduce when node A is not connected in earth point, cause node A current potential to change fast by the leakage current of first switch module 52, the 3rd switch module 56 can be at t
2In time, opened circuit, and after first switch module 52 and earth point disjunction (disconnect), second switch assembly 54 is just at t
3In time, opened circuit.
Fig. 9 is the switch capacitor circuit second embodiment schematic diagram of the present invention.Switch capacitor circuit 20e among Fig. 9 include with aforementioned first embodiment in the identical haply composition assembly of switch capacitor circuit 20d, and include a low pass filter 90 in addition, second switch assembly 54 and the 3rd switch module 56 are used for opening circuit gradually.This moment, first switch module 52 was controlled by the first control signal SW1, second switch assembly 54 and 56 of the 3rd switch modules are subjected to the signal (SW2_filter) that low pass filter 90 exports simultaneously and control, wherein, SW2_filter is the signal after the second control signal SW2 process low-pass filtering.In addition, among Fig. 5, low pass filter can also be added in the rear of the second control signal SW2 and the 3rd control signal SW3 respectively.
Figure 10 is for cooperating each control signal of Fig. 9 variation Figure 100 with respect to the time.In order to make switch capacitor circuit 20e be switched to an off state gradually, sequence controller 58 must allow first switch module 52 at t
1In time, opened circuit at first.Low pass filter 90 can be so that SW2_filter (promptly being used for controlling the signal of second switch assembly 54 and the 3rd switch module 56) be transformed into a low logical value (logic low) from a high logic value (logic high) gradually, so can reduce the step voltage change (voltage step change) that produces at node A.Because second switch assembly 54 is opened circuit gradually, node A also can be come from the earth point disjunction gradually.When second switch assembly 54 is opened circuit gradually, in one period time of delay, clock feed-through effect still can have the guiding path (resistance value in this path can increase change gradually greatly along with the time) that is connected to earth point in the switch module 54, so can thereby alleviate.Compared to known technology, the present invention is when off state, and the suitable bias voltage of the formed parasitic diode of switch module 54 drain electrode ends (parasitic diode) can be reduced to minimum.Clock feed-through effect on each time point all can thereby be even lower.As shown in Figure 9, the 3rd switch module 56 also is subjected to the output signal of low pass filter 90 and controls (being SW2_filter), occurs in the clock feed-through effect of the 3rd switch module itself with attenuating.In addition, the 3rd switch module 56 can also be controlled by the second control signal SW2 directly, and does not use through the control signal after the low-pass filtering.
Figure 11 is switch capacitor circuit the 3rd an embodiment schematic diagram of the present invention.Switch capacitor circuit 20f among Figure 11 includes an anode electric capacity 110, one negative terminal electric capacity 112, one first anode switch module 114, one first negative terminal switch module 116, one second anode switch module, 118, one second negative terminal switch modules 120, the 3rd switch module 122, one center switch assembly 126, and a sequence controller 124.Switch module in this embodiment is all nmos pass transistor, and the first anode switch module 114 has identical component size in fact with the first negative terminal switch module 116, and all greater than the second anode switch module 118 and the second negative terminal switch module 120 (these two switch modules in fact also have identical component size).In addition, the 3rd switch module 122 has in fact and the second anode switch module 118 and the identical component size of the second negative terminal switch module 120.Center switch assembly 126 is then greater than the first anode switch module 114 and the first negative terminal switch module 116.Anode electric capacity 110 is to be coupled between one first a vibration node OSC_P and the node A.112 of negative terminal electric capacity are to be coupled between one second a vibration node OSC_N and the Node B.Center switch assembly 126 is used for according to a central control signal SW_center, optionally allows node A connect or does not connect Node B.The first anode switch module 114 is used for according to one first control signal SW1, optionally allows node A connect or does not connect node C.The first negative terminal switch module 116 is used for according to the first control signal SW1, optionally allows Node B connect or does not connect node C.The second anode switch module 118 is used for according to the second control signal SW2, optionally allows node A connect or does not connect earth point, and the second negative terminal switch module 120 then is used for according to the second control signal SW2, optionally allows Node B connect or does not connect earth point.The 3rd switch module 122 is used for according to one the 3rd control signal SW3, optionally allows node C connect or does not connect earth point.At last, 124 of sequence controllers are used for producing this first, second, third control signal SW1, SW2, SW3 and central control signal SW_center.
Figure 12 is for cooperating each control signal of Figure 11 variation Figure 128 with respect to the time.In order to make switch capacitor circuit 20f be switched to an off state gradually, sequence controller 124 must make center switch assembly 126 at t
1In time, opened circuit at first.Next be that the first anode switch module 114 and the first negative terminal switch module 116 are at t
2In time, opened circuit.In order further to prevent when node A, B and the earth point disjunction (disconnect), owing to the conducting of leakage current in the first anode switch module 114 and the first negative terminal switch module 116 causes load capacitance to change, therefore the 3rd switch module 122 can be at t
3In time, opened circuit.The first anode switch module 114 and the first negative terminal switch module 116 by the 3rd switch module 122 after the earth point disjunction, 120 of the second anode switch module 118 and the second negative terminal switch modules are at t
4In time, opened circuit.Though include center switch assembly 126 among Figure 11, and sequence controller 124 can produce central control signal SW_center, in fact center switch assembly 126 is alternative assemblies that add or do not add, and the main purpose that adds this assembly is to be used for reducing whole switch conduction resistance value (turn-on switch resistance).If do not add center switch assembly 126, then switch capacitor circuit 20f itself is another embodiment of the differential switch capacitor circuit of the present invention.
In addition, open circuit second and the time point t of the 3rd anode/negative terminal switch module
3With t
4Three kinds of different combinations can be arranged.That is to say time point t
3Can with t
4Simultaneously or t
3Leading t
4, or even t
3Fall behind t
4For each different combination, low pass filter can be incorporated in the rear of control signal SW2, SW3 respectively, to reduce the clock feed-through effect that each corresponding switch is caused.
Figure 13 is switch capacitor circuit the 4th an embodiment schematic diagram of the present invention.Switch capacitor circuit 20g among Figure 13 includes an anode electric capacity 130, one negative terminal electric capacity 132, one first anode switch module 134, one first negative terminal switch module, 136, one second anode switch modules, 138, one second negative terminal switch modules 140, one the 3rd switch module 142, one center switch assembly, 146, one low pass filters 148, and a sequence controller 144.Switch module in this embodiment is all the PMOS transistor, the first anode switch module 134 has identical component size in fact with the first negative terminal switch module 136, and all greater than the second anode switch module 138 and the second negative terminal switch module 140 (these two switch modules in fact also have identical component size).In addition, the 3rd switch module 142 in fact also has identical component size with the second anode switch module 138 and the second negative terminal switch module 140.Center switch assembly 146 is then greater than the first anode switch module 134 and the first negative terminal switch module 136.Sequence controller 144 is used for producing a central control signal SW_center, one first control signal SW1, and one second control signal SW2.Second control signal is connected to an input of low pass filter 148, and the output of low pass filter 148 is then exported the second control signal SW2 through the form after the low-pass filtering, i.e. SW2_filter.Anode electric capacity 130 is coupled between one first a vibration node OSC_P and the node A.Negative terminal electric capacity 132 is coupled between one second a vibration node OSC_N and the Node B.Center switch assembly 146 is used for according to a central control signal SW_center, optionally allows node A connect or does not connect Node B.The first anode switch module 134 is used for according to one first control signal SW1, optionally allows node A connect or does not connect node C.The first negative terminal switch module 136 is used for according to the first control signal SW1, optionally allows Node B connect or does not connect node C.The second anode switch module 138 is used for according to control signal SW_filter, optionally allow node A connect or do not connect a power supply and supply node VCC, the second negative terminal switch module 140 is used for according to control signal SW_filter, optionally allows Node B connect or do not connect power supply supply node VCC.142 of the 3rd switch modules are used for according to control signal SW_filter, optionally allow node C connect or do not connect power supply supply node.
Use the framework of NMOS as Figure 11, the sequence controller among Figure 13 can produce a plurality of control signals, is used for controlling center switch assembly 146, first anode/negative terminal switch module, second anode/negative terminal switch module, and the 3rd switch module.The control signal that second anode/negative terminal switch module and the 3rd switch module use can as discussed previouslyly have multiple different combination, and the framework of Figure 13 down can also be respectively at adding low pass filter before the relevant control signal, with further reduction clock feed-through effect.
Figure 14 is for cooperating each control signal of Figure 13 variation Figure 150 with respect to the time.In order to make switch capacitor circuit 20g be switched to an off state gradually, sequence controller 144 must guarantee that center switch assembly 146 is in t
1In time, opened circuit at first.Next be that the first anode switch module 134 and the first negative terminal switch module 136 are in t
2In time, opened circuit.In order further to prevent when node A and Node B and the node VCC disjunction, owing to the conducting of leakage current in the first anode switch module 134 and the first negative terminal switch module 136 causes load capacitance to change, therefore the 3rd switch module 142, the second anode switch module 138 and the second negative terminal switch module 140 can be in t under the control of control signal SW2_filter
3In time, opened circuit.Please note, though include center switch assembly 146 among Figure 13, and sequence controller 144 can produce central control signal SW_center, in fact center switch assembly 146 is alternative assemblies that add or do not add, and the main purpose that adds this assembly is to be used for reducing whole switch conduction resistance value.If do not include center switch assembly 146, then switch capacitor circuit 20g itself is another embodiment of the differential switch capacitor circuit of the present invention.
Compared to known technology, the present invention can switch to an off state with a switch capacitor circuit gradually, so the clock feed-through effect in the voltage controlled oscillator 10 (can cause undesirable frequency drift) can suitably be lowered.When opening circuit when action, the practice of known technology can be subjected to the influence of clock feed-through effect, and produces a step variation in voltage at an internal electrical capacitive node (internalcapacitive node) of the resonant cavity (resonator) of voltage controlled oscillator 10.Above-mentioned step voltage change can cause a formed junction rectifier of switch module drain electrode end that is in off state by a little suitable bias voltage, up to the voltage that descends is got back to earth point or power supply supply current potential because of the leakage current charging till.According to framework of the present invention, the step voltage change meeting that betides this internal electrical capacitive node is lowered.When opening circuit action, the instantaneous capacitance that framework of the present invention can lower voltage controlled oscillator 10 resonant cavities changes, and therefore can reduce the instantaneous drift of frequency of voltage controlled oscillator 10.In addition, the flow through leakage current of maximum switch module can be stopped by another less switch module.Above-mentioned less switch module can be effectively independent from an earth point or power supply supply node with the switch module (having maximum leakage current) of maximum.Therefore can be during phase-locked at frequency synthesizer, keep in the resonant cavity change in voltage slowly of the capacitive node in the switch capacitor circuit, make voltage controlled oscillator 10 can reach the locking of frequency more fast.
The above only is preferred embodiment of the present invention, and all equalizations of being done according to the present patent application claim change and modify, and all should belong to the covering scope of patent of the present invention.
Claims (29)
1. switch capacitor circuit that can lower clock feed-through effect includes:
One first anode switch module is used for optionally allowing one first positive end node connect or do not connect one the 3rd node according to one first control signal, and wherein, this first positive end node is to be coupled in an anode electric capacity;
One second anode switch module is used for optionally allowing this first positive end node connect or do not connect a Section Point according to one second control signal;
One the 3rd switch module is used for according to one the 3rd control signal, optionally allows the 3rd node connect or does not connect this Section Point; And
One sequence controller is coupled in these switch modules, is used for producing this first control signal, this second control signal, and the 3rd control signal.
2. switch capacitor circuit as claimed in claim 1, wherein, the component size of this first anode switch module is greater than this second anode switch module.
3. switch capacitor circuit as claimed in claim 1, wherein, the component size of this first anode switch module is greater than this second anode switch module, the component size of this second anode switch module is greater than the 3rd switch module, and this sequence controller can be according to the component size order of switch module, descending these switch modules that open circuit in regular turn.
4. switch capacitor circuit as claimed in claim 1, wherein, this second anode switch module has identical component size in fact with the 3rd switch module.
5. switch capacitor circuit as claimed in claim 1, wherein, this switch capacitor circuit includes a mechanism in addition, is used for making that at least this second anode switch module or the 3rd switch module are opened circuit gradually.
6. switch capacitor circuit as claimed in claim 5, wherein, each switch module all is to be a transistor, and the mechanism that can make this second anode switch module or the 3rd switch module be opened circuit includes a low pass filter of the control end that is coupled in this second anode switch module or the 3rd switch module gradually.
7. switch capacitor circuit as claimed in claim 1, wherein, the 3rd node is to be earth point, and these switch modules are to be nmos pass transistor.
8. switch capacitor circuit as claimed in claim 1, wherein, the 3rd node is to be a direct current power supply node, these switch modules are to be the PMOS transistor.
9. switch capacitor circuit as claimed in claim 1, wherein, this switch capacitor circuit includes in addition:
One first negative terminal switch module is used for according to this first control signal, optionally allows one first negative terminal node connect or do not connect the 3rd node, and wherein, this first negative terminal node is to be coupled in a negative terminal electric capacity; And
One second negative terminal switch module is used for according to this second control signal, optionally allows this first negative terminal node connect or do not connect this Section Point.
10. switch capacitor circuit as claimed in claim 9, wherein:
This first negative terminal switch module has identical component size in fact with this first anode switch module; And
This second negative terminal switch module has identical component size in fact with this second anode switch module.
11. switch capacitor circuit as claimed in claim 9, wherein, this switch capacitor circuit includes in addition:
One center switch assembly is used for optionally allowing this first positive end node connect or do not connect this first negative terminal node according to a central control signal;
Wherein, this sequence controller is to be coupled in this center switch assembly, is used for producing this central authorities' control signal.
12. switch capacitor circuit as claimed in claim 11, wherein, the component size of this center switch assembly is greater than this first anode switch module and this first negative terminal switch module.
13. switch capacitor circuit as claimed in claim 11, wherein, the component size of this first anode switch module is greater than this second anode switch module, the component size of this second anode switch module is greater than the 3rd switch module, this first negative terminal switch module has identical component size in fact with this first anode switch module, this second negative terminal switch module has identical component size in fact with this second anode switch module, this center switch assembly and this sequence controller opens circuit at first, then according to the component size order, descending these anode switch modules and these negative terminal switch modules of opening circuit in regular turn.
14. switch capacitor circuit as claimed in claim 11, wherein, the component size of this first anode switch module is greater than this second anode switch module and the 3rd switch module, this first negative terminal switch module has identical component size in fact with this first anode switch module, this second negative terminal switch module has identical component size in fact with this second anode switch module, this center switch assembly and this sequence controller opens circuit at first, this first anode switch module and this first negative terminal switch module next then open circuit.
15. switch capacitor circuit as claimed in claim 1, wherein, the component size of this first anode switch module is greater than this second anode switch module and the 3rd switch module, this first anode switch module and this sequence controller opens circuit at first.
16. one kind when opening circuit a switch capacitor circuit, be used for lowering the method for clock feed-through effect, this method includes following steps:
(a) use one first anode switch module disjunction, one first positive end node and one the 3rd node;
(b) use one second anode switch module disjunction this first positive end node and a Section Point; And
(c) use one the 3rd anode switch module disjunction the 3rd node and this Section Point;
Wherein, this first positive end node is to be coupled in an anode electric capacity.
17. method as claimed in claim 16, wherein, the component size of this first anode switch module is greater than this second anode switch module.
18. method as claimed in claim 16, wherein, this second anode switch module has identical component size in fact with the 3rd switch module.
19. method as claimed in claim 16, wherein, step (a) is in step (b) and (c) is performed before.
20. method as claimed in claim 16, wherein, this method includes open circuit this second anode switch module or the 3rd switch module at least in addition gradually.
21. method as claimed in claim 20, wherein, each switch module all is to be a transistor, and open circuit this second anode switch module or the 3rd switch module then include control end prerequisite confession one low pass filter in this second anode switch module or the 3rd switch module gradually.
22. method as claimed in claim 16, wherein, the 3rd node is to be earth point, and these switch modules are to be nmos pass transistor.
23. method as claimed in claim 16, wherein, the 3rd node is to be a direct current power supply node, and these switch modules are to be the PMOS transistor.
24. method as claimed in claim 16, wherein, this method includes following steps in addition:
(d) use one first negative terminal switch module disjunction, one first negative terminal node and the 3rd node; And
(e) use one second this first negative terminal node of negative terminal switch module disjunction and this Section Point;
Wherein, this first negative terminal node is to be coupled in a negative terminal electric capacity.
25. method as claimed in claim 24, wherein:
This first negative terminal switch module has identical component size in fact with this first anode switch module; And
This second negative terminal switch module has identical component size in fact with this second anode switch module.
26. method as claimed in claim 24, wherein, step (a) is carried out simultaneously with step (d); Step (b) is carried out simultaneously with step (e).
27. method as claimed in claim 24, wherein, this method includes following steps in addition:
(f) use a center switch assembly disjunction this first positive end node and this first negative terminal node.
28. method as claimed in claim 27, wherein, the component size of this center switch assembly is greater than this first anode switch module and this first negative terminal switch module.
29. method as claimed in claim 27, wherein step (f) is preceding being performed of step (a).
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/605,095 US6815996B1 (en) | 2003-06-03 | 2003-09-09 | Switched capacitor circuit capable of minimizing clock feedthrough effect in a voltage controlled oscillator circuit |
| US10/605,095 | 2003-09-09 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1595793A CN1595793A (en) | 2005-03-16 |
| CN100385790C true CN100385790C (en) | 2008-04-30 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2004100785431A Active CN100385790C (en) | 2003-09-09 | 2004-09-09 | Switched capacitor circuit capable of minimizing clock feedthrough effect and correlation method |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN100385790C (en) |
| TW (1) | TWI234925B (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102780451A (en) * | 2011-05-13 | 2012-11-14 | 瑞昱半导体股份有限公司 | Switched capacitor circuit with switching loss compensation mechanism and compensation method thereof |
| TWI783202B (en) * | 2019-10-15 | 2022-11-11 | 瑞昱半導體股份有限公司 | Multiplexer device and signal switching method |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101420211B (en) * | 2007-10-24 | 2011-06-01 | 佳邦科技股份有限公司 | Chip type feed-through filter having over-voltage protection function |
| JP2010220200A (en) * | 2009-02-19 | 2010-09-30 | Renesas Electronics Corp | Conduction switching circuit, conduction switching circuit block, and operation method for conduction switching circuit |
| CN111740736A (en) * | 2020-06-30 | 2020-10-02 | 深圳市芯天下技术有限公司 | Control method and circuit for switching frequency of oscillator |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4622480A (en) * | 1982-04-26 | 1986-11-11 | Nippon Telegraph & Telephone Public Corporation | Switched capacitor circuit with high power supply projection ratio |
-
2004
- 2004-08-20 TW TW93125286A patent/TWI234925B/en not_active IP Right Cessation
- 2004-09-09 CN CNB2004100785431A patent/CN100385790C/en active Active
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4622480A (en) * | 1982-04-26 | 1986-11-11 | Nippon Telegraph & Telephone Public Corporation | Switched capacitor circuit with high power supply projection ratio |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102780451A (en) * | 2011-05-13 | 2012-11-14 | 瑞昱半导体股份有限公司 | Switched capacitor circuit with switching loss compensation mechanism and compensation method thereof |
| TWI783202B (en) * | 2019-10-15 | 2022-11-11 | 瑞昱半導體股份有限公司 | Multiplexer device and signal switching method |
Also Published As
| Publication number | Publication date |
|---|---|
| TW200511715A (en) | 2005-03-16 |
| TWI234925B (en) | 2005-06-21 |
| CN1595793A (en) | 2005-03-16 |
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