CA1025334A - Dual growth rate method of depositing epitaxial crystalline layers - Google Patents

Dual growth rate method of depositing epitaxial crystalline layers

Info

Publication number
CA1025334A
CA1025334A CA199,858A CA199858A CA1025334A CA 1025334 A CA1025334 A CA 1025334A CA 199858 A CA199858 A CA 199858A CA 1025334 A CA1025334 A CA 1025334A
Authority
CA
Canada
Prior art keywords
growth rate
rate method
crystalline layers
epitaxial crystalline
depositing epitaxial
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA199,858A
Other languages
French (fr)
Other versions
CA199858S (en
Inventor
Glenn W. Cullen
John F. Corboy
Nicholas Pastal
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
RCA Corp
Original Assignee
RCA Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by RCA Corp filed Critical RCA Corp
Application granted granted Critical
Publication of CA1025334A publication Critical patent/CA1025334A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/0242—Crystalline insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
    • H01L21/02573—Conductivity type
    • H01L21/02576—N-type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
    • H01L21/02573—Conductivity type
    • H01L21/02579—P-type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/007—Autodoping
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/025—Deposition multi-step
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/129—Pulse doping
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/15—Silicon on sapphire SOS

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Chemical Vapour Deposition (AREA)
CA199,858A 1973-08-17 1974-05-14 Dual growth rate method of depositing epitaxial crystalline layers Expired CA1025334A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US389192A US3885061A (en) 1973-08-17 1973-08-17 Dual growth rate method of depositing epitaxial crystalline layers

Publications (1)

Publication Number Publication Date
CA1025334A true CA1025334A (en) 1978-01-31

Family

ID=23537232

Family Applications (1)

Application Number Title Priority Date Filing Date
CA199,858A Expired CA1025334A (en) 1973-08-17 1974-05-14 Dual growth rate method of depositing epitaxial crystalline layers

Country Status (14)

Country Link
US (1) US3885061A (en)
JP (1) JPS547556B2 (en)
BE (1) BE814071A (en)
CA (1) CA1025334A (en)
CH (1) CH590084A5 (en)
DE (1) DE2422508C3 (en)
FR (1) FR2245406B1 (en)
GB (1) GB1459839A (en)
IN (1) IN141844B (en)
IT (1) IT1012165B (en)
NL (1) NL7406548A (en)
SE (1) SE401463B (en)
SU (1) SU612610A3 (en)
YU (1) YU39168B (en)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3986192A (en) * 1975-01-02 1976-10-12 Bell Telephone Laboratories, Incorporated High efficiency gallium arsenide impatt diodes
US4201604A (en) * 1975-08-13 1980-05-06 Raytheon Company Process for making a negative resistance diode utilizing spike doping
AU530905B2 (en) 1977-12-22 1983-08-04 Canon Kabushiki Kaisha Electrophotographic photosensitive member
DE2943634C2 (en) * 1979-10-29 1983-09-29 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Epitaxial reactor
US4279688A (en) * 1980-03-17 1981-07-21 Rca Corporation Method of improving silicon crystal perfection in silicon on sapphire devices
US4596208A (en) * 1984-11-05 1986-06-24 Spire Corporation CVD reaction chamber
GB2185758B (en) * 1985-12-28 1990-09-05 Canon Kk Method for forming deposited film
US4838983A (en) * 1986-07-03 1989-06-13 Emcore, Inc. Gas treatment apparatus and method
US4772356A (en) * 1986-07-03 1988-09-20 Emcore, Inc. Gas treatment apparatus and method
US4775641A (en) * 1986-09-25 1988-10-04 General Electric Company Method of making silicon-on-sapphire semiconductor devices
US5281283A (en) * 1987-03-26 1994-01-25 Canon Kabushiki Kaisha Group III-V compound crystal article using selective epitaxial growth
JPS63237517A (en) * 1987-03-26 1988-10-04 Canon Inc Selective formation of iii-v compound film
CA1332039C (en) * 1987-03-26 1994-09-20 Takao Yonehara Ii - vi group compound crystal article and process for producing the same
CA1321121C (en) * 1987-03-27 1993-08-10 Hiroyuki Tokunaga Process for producing compound semiconductor and semiconductor device using compound semiconductor obtained by same
US5304820A (en) * 1987-03-27 1994-04-19 Canon Kabushiki Kaisha Process for producing compound semiconductor and semiconductor device using compound semiconductor obtained by same
JPH01161826A (en) * 1987-12-18 1989-06-26 Toshiba Corp Vapor phase epitaxial growth method
US5104690A (en) * 1990-06-06 1992-04-14 Spire Corporation CVD thin film compounds
USH1145H (en) 1990-09-25 1993-03-02 Sematech, Inc. Rapid temperature response wafer chuck
JP2000223419A (en) * 1998-06-30 2000-08-11 Sony Corp Method of forming single crystal silicon layer, and semiconductor device and manufacture thereof
RU2618279C1 (en) * 2016-06-23 2017-05-03 Акционерное общество "Эпиэл" Method of manufacturing the epitaxial layer of silicon on a dielectric substrate
CN116884832B (en) * 2023-09-06 2023-12-15 合肥晶合集成电路股份有限公司 Semiconductor device and method for manufacturing the same

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3189494A (en) * 1963-08-22 1965-06-15 Texas Instruments Inc Epitaxial crystal growth onto a stabilizing layer which prevents diffusion from the substrate
US3663319A (en) * 1968-11-20 1972-05-16 Gen Motors Corp Masking to prevent autodoping of epitaxial deposits
US3669769A (en) * 1970-09-29 1972-06-13 Ibm Method for minimizing autodoping in epitaxial deposition
US3765960A (en) * 1970-11-02 1973-10-16 Ibm Method for minimizing autodoping in epitaxial deposition
JPS5113607B2 (en) * 1971-08-24 1976-05-01

Also Published As

Publication number Publication date
AU6895474A (en) 1975-11-20
DE2422508B2 (en) 1978-11-23
IN141844B (en) 1977-04-23
FR2245406B1 (en) 1982-09-24
YU39168B (en) 1984-08-31
CH590084A5 (en) 1977-07-29
DE2422508A1 (en) 1975-03-13
GB1459839A (en) 1976-12-31
JPS547556B2 (en) 1979-04-07
BE814071A (en) 1974-08-16
DE2422508C3 (en) 1979-08-02
NL7406548A (en) 1975-02-19
SE7406350L (en) 1975-02-18
US3885061A (en) 1975-05-20
YU223674A (en) 1982-05-31
SU612610A3 (en) 1978-06-25
JPS5046481A (en) 1975-04-25
FR2245406A1 (en) 1975-04-25
SE401463B (en) 1978-05-16
IT1012165B (en) 1977-03-10

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