BR9712107A - Módulo de chip e processo para a fabricação de um módulo de chip. - Google Patents
Módulo de chip e processo para a fabricação de um módulo de chip.Info
- Publication number
- BR9712107A BR9712107A BR9712107-0A BR9712107A BR9712107A BR 9712107 A BR9712107 A BR 9712107A BR 9712107 A BR9712107 A BR 9712107A BR 9712107 A BR9712107 A BR 9712107A
- Authority
- BR
- Brazil
- Prior art keywords
- chip module
- contact elements
- chip
- circuit board
- another
- Prior art date
Links
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07745—Mounting details of integrated circuit chips
- G06K19/07747—Mounting details of integrated circuit chips at least one of the integrated circuit chips being mounted as a module
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07743—External electrical contacts
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49855—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers for flat-cards, e.g. credit cards
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3421—Leaded components
- H05K3/3426—Leaded components characterised by the leads
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/1015—Shape
- H01L2924/1016—Shape being a cuboid
- H01L2924/10161—Shape being a cuboid with a rectangular active surface
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10954—Other details of electrical connections
- H05K2201/10977—Encapsulated connections
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
- H05K2203/1305—Moulding and encapsulation
- H05K2203/1316—Moulded encapsulation of mounted components
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
- Y10T29/49146—Assembling to base an electrical component, e.g., capacitor, etc. with encapsulating, e.g., potting, etc.
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49169—Assembling electrical component directly to terminal or elongated conductor
- Y10T29/49171—Assembling electrical component directly to terminal or elongated conductor with encapsulating
- Y10T29/49172—Assembling electrical component directly to terminal or elongated conductor with encapsulating by molding of insulating material
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Credit Cards Or The Like (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Patente de Invenção: <B>"MóDUO DE CHIP E PROCESSO PARA A FABRICAçãO DE UM MóDULO DE CHIP".<D>Denominação da invenção: módulo de chip e processo para a fabricação de um módulo de chip. A invenção refere-se a um módulo de chip com um campo de contato (3) disposto em seu lado externo (2), com vários elementos de contato (4), em essência planos, isolados um do outro, de material condutor em termos elétricos, e com pelo menos um chip semicondutor (6) com um ou vários circuitos semicondutores integrados, o qual é ou os quais são, respectivamente, ligados eletricamente por meio de conexões de ligação (8) com os elementos de contato (4) do campo de contato (3). Os elementos de contato (4) do módulo de chip (1) são formados mediante um portador de sistema pré-fabricado (20) ("leadframe") para o apoio do pelo menos um chip semicondutor (6) e em pelo menos dois lados opostos do módulo de chip (1) através de conexões (8), viradas para fora, guiadas em série uma ao lado da outra, para a montagem de superfície do módulo de chip (1) na superfície de equipagem (9) de uma placa de circuito impresso externa e um substrato de platina extrno (10), respectivamente.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19639025A DE19639025C2 (de) | 1996-09-23 | 1996-09-23 | Chipmodul und Verfahren zur Herstellung eines Chipmoduls |
PCT/DE1997/001805 WO1998013870A1 (de) | 1996-09-23 | 1997-08-21 | Chipmodul und verfahren zur herstellung eines chipmoduls |
Publications (1)
Publication Number | Publication Date |
---|---|
BR9712107A true BR9712107A (pt) | 1999-08-31 |
Family
ID=7806627
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
BR9712107-0A BR9712107A (pt) | 1996-09-23 | 1997-08-21 | Módulo de chip e processo para a fabricação de um módulo de chip. |
Country Status (11)
Country | Link |
---|---|
US (1) | US6313524B1 (pt) |
EP (1) | EP0948815B1 (pt) |
JP (1) | JP2000505242A (pt) |
KR (1) | KR100363296B1 (pt) |
CN (1) | CN1238856A (pt) |
AT (1) | ATE213359T1 (pt) |
BR (1) | BR9712107A (pt) |
DE (2) | DE19639025C2 (pt) |
RU (1) | RU2165660C2 (pt) |
UA (1) | UA57033C2 (pt) |
WO (1) | WO1998013870A1 (pt) |
Families Citing this family (30)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19541072A1 (de) * | 1995-11-03 | 1997-05-07 | Siemens Ag | Chipmodul |
EP1009023A1 (de) * | 1998-12-09 | 2000-06-14 | ESEC Management SA | Verfahren zur Verbindung von zwei Leiterstrukturen und Kunststoffobjekt |
FR2798000B1 (fr) * | 1999-08-27 | 2002-04-05 | St Microelectronics Sa | Procede de mise en boitier d'une puce a capteurs en particulier optiques et dispositif semi-conducteur ou boitier renfermant une telle puce |
US7102892B2 (en) | 2000-03-13 | 2006-09-05 | Legacy Electronics, Inc. | Modular integrated circuit chip carrier |
US6713854B1 (en) | 2000-10-16 | 2004-03-30 | Legacy Electronics, Inc | Electronic circuit module with a carrier having a mounting pad array |
FR2808608A1 (fr) * | 2000-05-03 | 2001-11-09 | Schlumberger Systems & Service | Carte a memoire electronique destinee a etre introduite dans un dispositif de traitement |
US7337522B2 (en) | 2000-10-16 | 2008-03-04 | Legacy Electronics, Inc. | Method and apparatus for fabricating a circuit board with a three dimensional surface mounted array of semiconductor chips |
KR100897314B1 (ko) * | 2001-03-14 | 2009-05-14 | 레가시 일렉트로닉스, 인크. | 반도체 칩의 3차원 표면 실장 어레이를 갖는 회로 기판을 제조하기 위한 방법 및 장치 |
JP2003100980A (ja) * | 2001-09-27 | 2003-04-04 | Hamamatsu Photonics Kk | 半導体装置及びその製造方法 |
FR2831718B1 (fr) * | 2001-10-31 | 2004-09-24 | Gemplus Card Int | Raccordement electrique male d'un plot de connexion d'une puce a une interface de communication, notamment pour objet portable intelligent tel qu'une carte a puce |
DE10208168C1 (de) * | 2002-02-26 | 2003-08-14 | Infineon Technologies Ag | Datenträgerkarte |
JP4303699B2 (ja) * | 2002-04-01 | 2009-07-29 | パナソニック株式会社 | 半導体装置およびその製造方法 |
DE10303740B4 (de) * | 2003-01-30 | 2006-09-14 | Infineon Technologies Flash Gmbh & Co. Kg | Sicherheitsspeicherkarte und Herstellungsverfahren |
JP4416432B2 (ja) * | 2003-05-12 | 2010-02-17 | シチズン電子株式会社 | 電源回路装置 |
DE10325566A1 (de) * | 2003-06-05 | 2005-01-13 | Infineon Technologies Ag | Chipkartenmodul |
DE10350699B3 (de) | 2003-10-30 | 2005-06-30 | Rehm Anlagenbau Gmbh | Verfahren und Vorrichtung zum Aufschmelzlöten mit Volumenstromsteuerung |
US20100140627A1 (en) * | 2005-01-10 | 2010-06-10 | Shelton Bryan S | Package for Semiconductor Devices |
WO2006076381A2 (en) | 2005-01-12 | 2006-07-20 | Legacy Electronics, Inc. | Radial circuit board, system, and methods |
JP4890872B2 (ja) * | 2006-01-30 | 2012-03-07 | ルネサスエレクトロニクス株式会社 | 光半導体封止用透明エポキシ樹脂組成物及びそれを用いた光半導体集積回路装置 |
US8030746B2 (en) * | 2008-02-08 | 2011-10-04 | Infineon Technologies Ag | Integrated circuit package |
EP2256672B1 (en) * | 2008-02-22 | 2016-04-13 | Toppan Printing Co., Ltd. | Transponder and book form |
US8649820B2 (en) | 2011-11-07 | 2014-02-11 | Blackberry Limited | Universal integrated circuit card apparatus and related methods |
USD703208S1 (en) | 2012-04-13 | 2014-04-22 | Blackberry Limited | UICC apparatus |
US8936199B2 (en) | 2012-04-13 | 2015-01-20 | Blackberry Limited | UICC apparatus and related methods |
USD701864S1 (en) * | 2012-04-23 | 2014-04-01 | Blackberry Limited | UICC apparatus |
DE102013211117A1 (de) * | 2013-06-14 | 2014-12-18 | Robert Bosch Gmbh | Trägerplatte für elektrische Schaltungen mit Abstandshaltern zur Montage von Bauteilen |
FR3034552B1 (fr) * | 2015-04-02 | 2017-05-05 | Oberthur Technologies | Module dual pour carte duale a microcircuit |
DE102016110780A1 (de) | 2016-06-13 | 2017-12-14 | Infineon Technologies Austria Ag | Chipkartenmodul und Verfahren zum Herstellen eines Chipkartenmoduls |
EP3499560B1 (en) * | 2017-12-15 | 2021-08-18 | Infineon Technologies AG | Semiconductor module and method for producing the same |
US20220157671A1 (en) * | 2020-11-13 | 2022-05-19 | Cree, Inc. | Packaged rf power device with pcb routing |
Family Cites Families (30)
Publication number | Priority date | Publication date | Assignee | Title |
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US3517438A (en) * | 1966-05-12 | 1970-06-30 | Ibm | Method of packaging a circuit module and joining same to a circuit substrate |
DE3307704C2 (de) * | 1983-03-04 | 1986-10-23 | Brown, Boveri & Cie Ag, 6800 Mannheim | Stromrichtermodul mit Befestigungslaschen |
FR2579798B1 (fr) * | 1985-04-02 | 1990-09-28 | Ebauchesfabrik Eta Ag | Procede de fabrication de modules electroniques pour cartes a microcircuits et modules obtenus selon ce procede |
US4996411A (en) * | 1986-07-24 | 1991-02-26 | Schlumberger Industries | Method of manufacturing a card having electronic memory and a card obtained by performing said method |
JPH0831556B2 (ja) * | 1987-02-20 | 1996-03-27 | 株式会社東芝 | 半導体装置用リードフレーム |
JPS6450444U (pt) * | 1987-09-22 | 1989-03-29 | ||
FR2645680B1 (fr) * | 1989-04-07 | 1994-04-29 | Thomson Microelectronics Sa Sg | Encapsulation de modules electroniques et procede de fabrication |
DE3912891A1 (de) * | 1989-04-19 | 1990-11-08 | Siemens Ag | Montagevorrichtung zur kontaktierung und zum einbau eines integrierten schaltkreissystems fuer eine wertkarte |
FR2659157B2 (fr) | 1989-05-26 | 1994-09-30 | Lemaire Gerard | Procede de fabrication d'une carte dite carte a puce, et carte obtenue par ce procede. |
JPH034543A (ja) * | 1989-05-31 | 1991-01-10 | Ricoh Co Ltd | 半導体装置 |
JPH0324741A (ja) * | 1989-06-21 | 1991-02-01 | Toshiba Corp | Tab用フイルムキャリア |
EP0408904A3 (en) * | 1989-07-21 | 1992-01-02 | Motorola Inc. | Surface mounting semiconductor device and method |
JPH03241765A (ja) * | 1990-02-20 | 1991-10-28 | Matsushita Electron Corp | 半導体装置 |
JP2756184B2 (ja) * | 1990-11-27 | 1998-05-25 | 株式会社日立製作所 | 電子部品の表面実装構造 |
JPH0555438A (ja) * | 1991-08-26 | 1993-03-05 | Rohm Co Ltd | 電子部品のリード端子構造 |
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US5455740A (en) * | 1994-03-07 | 1995-10-03 | Staktek Corporation | Bus communication system for stacked high density integrated circuit packages |
US5474958A (en) * | 1993-05-04 | 1995-12-12 | Motorola, Inc. | Method for making semiconductor device having no die supporting surface |
US5367124A (en) * | 1993-06-28 | 1994-11-22 | International Business Machines Corporation | Compliant lead for surface mounting a chip package to a substrate |
JP3233507B2 (ja) * | 1993-08-13 | 2001-11-26 | 株式会社東芝 | 半導体装置 |
DE4336501A1 (de) * | 1993-10-26 | 1995-04-27 | Giesecke & Devrient Gmbh | Verfahren zur Herstellung von Ausweiskarten mit elektronischen Modulen |
DE4431754C1 (de) * | 1994-09-06 | 1995-11-23 | Siemens Ag | Trägerelement |
US5541450A (en) * | 1994-11-02 | 1996-07-30 | Motorola, Inc. | Low-profile ball-grid array semiconductor package |
FR2734983B1 (fr) * | 1995-05-29 | 1997-07-04 | Sgs Thomson Microelectronics | Utilisation d'un micromodule comme boitier de montage en surface et procede correspondant |
JPH09260550A (ja) * | 1996-03-22 | 1997-10-03 | Mitsubishi Electric Corp | 半導体装置 |
JP3779789B2 (ja) * | 1997-01-31 | 2006-05-31 | 株式会社ルネサステクノロジ | 半導体装置およびその製造方法 |
US5869889A (en) * | 1997-04-21 | 1999-02-09 | Lsi Logic Corporation | Thin power tape ball grid array package |
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-
1996
- 1996-09-23 DE DE19639025A patent/DE19639025C2/de not_active Expired - Fee Related
-
1997
- 1997-08-21 EP EP97941800A patent/EP0948815B1/de not_active Expired - Lifetime
- 1997-08-21 BR BR9712107-0A patent/BR9712107A/pt not_active IP Right Cessation
- 1997-08-21 WO PCT/DE1997/001805 patent/WO1998013870A1/de active IP Right Grant
- 1997-08-21 CN CN97180008A patent/CN1238856A/zh active Pending
- 1997-08-21 JP JP10515123A patent/JP2000505242A/ja not_active Ceased
- 1997-08-21 DE DE59706411T patent/DE59706411D1/de not_active Expired - Fee Related
- 1997-08-21 AT AT97941800T patent/ATE213359T1/de not_active IP Right Cessation
- 1997-08-21 UA UA99031563A patent/UA57033C2/uk unknown
- 1997-08-21 KR KR1019997002466A patent/KR100363296B1/ko not_active IP Right Cessation
- 1997-08-21 RU RU99108432/28A patent/RU2165660C2/ru not_active IP Right Cessation
-
1999
- 1999-03-23 US US09/274,506 patent/US6313524B1/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
UA57033C2 (uk) | 2003-06-16 |
ATE213359T1 (de) | 2002-02-15 |
EP0948815B1 (de) | 2002-02-13 |
DE59706411D1 (de) | 2002-03-21 |
JP2000505242A (ja) | 2000-04-25 |
CN1238856A (zh) | 1999-12-15 |
RU2165660C2 (ru) | 2001-04-20 |
US6313524B1 (en) | 2001-11-06 |
KR20000048549A (ko) | 2000-07-25 |
DE19639025A1 (de) | 1998-04-02 |
EP0948815A1 (de) | 1999-10-13 |
DE19639025C2 (de) | 1999-10-28 |
KR100363296B1 (ko) | 2002-11-30 |
WO1998013870A1 (de) | 1998-04-02 |
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