BR8404846A - Sistema vetorial de processamento de cados - Google Patents

Sistema vetorial de processamento de cados

Info

Publication number
BR8404846A
BR8404846A BR8404846A BR8404846A BR8404846A BR 8404846 A BR8404846 A BR 8404846A BR 8404846 A BR8404846 A BR 8404846A BR 8404846 A BR8404846 A BR 8404846A BR 8404846 A BR8404846 A BR 8404846A
Authority
BR
Brazil
Prior art keywords
cados
processing
vector system
vector
processing cados
Prior art date
Application number
BR8404846A
Other languages
English (en)
Inventor
Yuji Oinaga
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of BR8404846A publication Critical patent/BR8404846A/pt

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/80Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053Vector processors
    • G06F15/8076Details on data register access
    • G06F15/8084Special arrangements thereof, e.g. mask or switch

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Complex Calculations (AREA)
  • Advance Control (AREA)
BR8404846A 1983-09-26 1984-09-26 Sistema vetorial de processamento de cados BR8404846A (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58177748A JPS6069746A (ja) 1983-09-26 1983-09-26 ベクトル・デ−タ処理装置の制御方式

Publications (1)

Publication Number Publication Date
BR8404846A true BR8404846A (pt) 1985-08-13

Family

ID=16036435

Family Applications (1)

Application Number Title Priority Date Filing Date
BR8404846A BR8404846A (pt) 1983-09-26 1984-09-26 Sistema vetorial de processamento de cados

Country Status (8)

Country Link
US (1) US4665479A (pt)
EP (1) EP0138451B1 (pt)
JP (1) JPS6069746A (pt)
AU (1) AU545944B2 (pt)
BR (1) BR8404846A (pt)
CA (1) CA1216369A (pt)
DE (1) DE3484292D1 (pt)
ES (1) ES8601514A1 (pt)

Families Citing this family (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6123275A (ja) * 1984-07-11 1986-01-31 Nec Corp ベクトル処理装置
EP0211613A3 (en) * 1985-07-31 1989-05-10 Sperry Corporation Scientific processor vector file organization
JPS62115571A (ja) 1985-11-15 1987-05-27 Fujitsu Ltd ベクトルアクセス制御方式
JPS62120574A (ja) * 1985-11-20 1987-06-01 Fujitsu Ltd ベクトル処理装置
JPS62180470A (ja) * 1986-02-04 1987-08-07 Hitachi Ltd ベクトル処理装置
JPH0731669B2 (ja) * 1986-04-04 1995-04-10 株式会社日立製作所 ベクトル・プロセツサ
US4974198A (en) * 1986-07-16 1990-11-27 Nec Corporation Vector processing system utilizing firm ware control to prevent delays during processing operations
JPH0648486B2 (ja) * 1986-10-08 1994-06-22 日本電気株式会社 ベクトルデ−タ処理装置
US4852040A (en) * 1987-03-04 1989-07-25 Nec Corporation Vector calculation circuit capable of rapidly carrying out vector calculation of three input vectors
JPS63225837A (ja) * 1987-03-13 1988-09-20 Fujitsu Ltd 距離付きベクトルアクセス方式
JPS63251835A (ja) * 1987-04-08 1988-10-19 Hitachi Ltd ベクトル処理装置
US4980817A (en) * 1987-08-31 1990-12-25 Digital Equipment Vector register system for executing plural read/write commands concurrently and independently routing data to plural read/write ports
US5168573A (en) * 1987-08-31 1992-12-01 Digital Equipment Corporation Memory device for storing vector registers
US5008812A (en) * 1988-03-18 1991-04-16 Digital Equipment Corporation Context switching method and apparatus for use in a vector processing system
US4949250A (en) * 1988-03-18 1990-08-14 Digital Equipment Corporation Method and apparatus for executing instructions for a vector processing system
US5113521A (en) * 1988-03-18 1992-05-12 Digital Equipment Corporation Method and apparatus for handling faults of vector instructions causing memory management exceptions
US5043867A (en) * 1988-03-18 1991-08-27 Digital Equipment Corporation Exception reporting mechanism for a vector processor
EP0340453B1 (en) * 1988-04-01 1997-06-11 Nec Corporation Instruction handling sequence control system
US5367654A (en) * 1988-04-13 1994-11-22 Hitachi Ltd. Method and apparatus for controlling storage in computer system utilizing forecasted access requests and priority decision circuitry
EP0346031B1 (en) * 1988-06-07 1997-12-29 Fujitsu Limited Vector data processing apparatus
JPH077388B2 (ja) * 1988-09-13 1995-01-30 富士通株式会社 ベクトル演算処理装置
GB2228116B (en) * 1989-02-10 1993-05-26 Intel Corp Pipelined floating-point load instruction for microprocessor
US5053987A (en) * 1989-11-02 1991-10-01 Zoran Corporation Arithmetic unit in a vector signal processor using pipelined computational blocks
US5261063A (en) * 1990-12-07 1993-11-09 Ibm Corp. Pipeline apparatus having pipeline mode eecuting instructions from plural programs and parallel mode executing instructions from one of the plural programs
JPH0645576U (ja) * 1991-01-14 1994-06-21 株式会社サンメック コースター
JPH0495777U (pt) * 1991-01-14 1992-08-19
JP2665111B2 (ja) * 1992-06-18 1997-10-22 日本電気株式会社 ベクトル処理装置
US6775752B1 (en) * 2000-02-21 2004-08-10 Hewlett-Packard Development Company, L.P. System and method for efficiently updating a fully associative array
US7577824B2 (en) * 2003-09-08 2009-08-18 Altera Corporation Methods and apparatus for storing expanded width instructions in a VLIW memory for deferred execution
US20070126225A1 (en) * 2005-12-05 2007-06-07 Busam Edward P Repositionable insert
US7600104B2 (en) * 2006-08-15 2009-10-06 Peter Neumann Method and system for parallel vector data processing of vector data having a number of data elements including a defined first bit-length

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3541516A (en) * 1965-06-30 1970-11-17 Ibm Vector arithmetic multiprocessor computing system
JPS572069A (en) * 1980-06-04 1982-01-07 Ricoh Co Ltd Fixing method
JPS5725069A (en) * 1980-07-21 1982-02-09 Hitachi Ltd Vector data processing equipment
KR860001434B1 (ko) * 1980-11-21 1986-09-24 후지쑤 가부시끼가이샤 데이타 처리시 스템
US4697235A (en) * 1983-03-22 1987-09-29 Fujitsu Limited List vector control apparatus

Also Published As

Publication number Publication date
CA1216369A (en) 1987-01-06
JPS6069746A (ja) 1985-04-20
DE3484292D1 (de) 1991-04-25
ES536210A0 (es) 1985-10-16
EP0138451B1 (en) 1991-03-20
US4665479A (en) 1987-05-12
EP0138451A2 (en) 1985-04-24
EP0138451A3 (en) 1988-08-10
AU545944B2 (en) 1985-08-08
AU3344984A (en) 1985-04-04
JPH0238975B2 (pt) 1990-09-03
ES8601514A1 (es) 1985-10-16

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Legal Events

Date Code Title Description
B21A Patent or certificate of addition expired [chapter 21.1 patent gazette]

Free format text: PATENTE EXTINTA EM 26/09/99

B15K Others concerning applications: alteration of classification

Ipc: G06F 15/80 (2006.01)