BR112017022547A2 - método para acessar memória estendida, dispositivo e sistema - Google Patents
método para acessar memória estendida, dispositivo e sistemaInfo
- Publication number
- BR112017022547A2 BR112017022547A2 BR112017022547-6A BR112017022547A BR112017022547A2 BR 112017022547 A2 BR112017022547 A2 BR 112017022547A2 BR 112017022547 A BR112017022547 A BR 112017022547A BR 112017022547 A2 BR112017022547 A2 BR 112017022547A2
- Authority
- BR
- Brazil
- Prior art keywords
- memory
- memory access
- accessed
- data
- extended memory
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
- G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0608—Saving storage space on storage systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/0292—User address space allocation, e.g. contiguous or non contiguous base addressing using tables or multilevel address translation means
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1668—Details of memory controller
- G06F13/1673—Details of memory controller using buffers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1668—Details of memory controller
- G06F13/1689—Synchronisation and timing concerns
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1668—Details of memory controller
- G06F13/1694—Configuration of memory controller to different memory types
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4234—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0614—Improving the reliability of storage systems
- G06F3/0619—Improving the reliability of storage systems in relation to data integrity, e.g. data losses, bit errors
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0646—Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems
- G06F3/065—Replication mechanisms
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0656—Data buffering arrangements
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0215—Addressing or allocation; Relocation with look ahead addressing means
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0615—Address space extension
- G06F12/0623—Address space extension for memory modules
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0844—Multiple simultaneous or quasi-simultaneous cache accessing
- G06F12/0855—Overlapped cache accessing, e.g. pipeline
- G06F12/0859—Overlapped cache accessing, e.g. pipeline with reload from main memory
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/10—Providing a specific technical effect
- G06F2212/1008—Correctness of operation, e.g. memory ordering
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/10—Providing a specific technical effect
- G06F2212/1016—Performance improvement
- G06F2212/1024—Latency reduction
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/72—Details relating to flash memory management
- G06F2212/7201—Logical to physical mapping or translation of blocks or pages
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/72—Details relating to flash memory management
- G06F2212/7203—Temporary buffering, e.g. using volatile buffer or dedicated buffer blocks
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0064—Latency reduction in handling transfers
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Human Computer Interaction (AREA)
- Computer Security & Cryptography (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Bus Control (AREA)
Abstract
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201510198452.X | 2015-04-23 | ||
CN201510198452.XA CN106155577B (zh) | 2015-04-23 | 2015-04-23 | 扩展内存的访问方法、设备以及*** |
PCT/CN2016/073304 WO2016169318A1 (zh) | 2015-04-23 | 2016-02-03 | 扩展内存的访问方法、设备以及*** |
Publications (2)
Publication Number | Publication Date |
---|---|
BR112017022547A2 true BR112017022547A2 (pt) | 2018-10-16 |
BR112017022547B1 BR112017022547B1 (pt) | 2023-10-10 |
Family
ID=57142912
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
BR112017022547-6A BR112017022547B1 (pt) | 2015-04-23 | 2016-02-03 | Método para acessar memória estendida, dispositivo e sistema |
Country Status (9)
Country | Link |
---|---|
US (2) | US10545672B2 (pt) |
EP (2) | EP3279788B1 (pt) |
JP (1) | JP6685323B2 (pt) |
KR (1) | KR102168017B1 (pt) |
CN (2) | CN106155577B (pt) |
BR (1) | BR112017022547B1 (pt) |
CA (1) | CA2983479C (pt) |
SG (1) | SG11201708477UA (pt) |
WO (1) | WO2016169318A1 (pt) |
Families Citing this family (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106155577B (zh) * | 2015-04-23 | 2019-03-26 | 华为技术有限公司 | 扩展内存的访问方法、设备以及*** |
CN108228076B (zh) | 2016-12-14 | 2020-10-16 | 华为技术有限公司 | 访问磁盘的方法和主机 |
US10733100B2 (en) * | 2017-06-12 | 2020-08-04 | Western Digital Technologies, Inc. | Method and apparatus for classifying and buffering write commands |
CN107590099B (zh) * | 2017-08-31 | 2021-04-20 | 深圳市共济科技股份有限公司 | 一种多主机访问从机的方法、扩展装置及存储介质 |
CN109783395B (zh) * | 2017-11-15 | 2023-03-31 | 阿里巴巴集团控股有限公司 | 内存访问方法、交换芯片、内存模组及电子设备 |
US10909046B2 (en) * | 2018-06-15 | 2021-02-02 | Micron Technology, Inc. | Memory access determination |
CN109308190B (zh) * | 2018-07-09 | 2023-03-14 | 北京中科睿芯科技集团有限公司 | 基于3d堆栈内存架构的共享行缓冲***及共享行缓冲器 |
WO2020014869A1 (zh) * | 2018-07-17 | 2020-01-23 | 华为技术有限公司 | 处理i/o请求的方法及设备 |
CN109284231B (zh) * | 2018-07-24 | 2023-05-23 | 江苏微锐超算科技有限公司 | 内存访问请求的处理方法、装置及内存控制器 |
CN109189700A (zh) * | 2018-10-19 | 2019-01-11 | 郑州云海信息技术有限公司 | 一种扩展内存装置、扩展内存***、扩展内存的访存方法 |
GB2578600B (en) * | 2018-10-31 | 2021-10-13 | Advanced Risc Mach Ltd | Memory transaction request management |
CN111405603B (zh) * | 2019-01-02 | 2023-05-09 | ***通信有限公司研究院 | 一种时延获取方法、测试装置以及计算机存储介质 |
CN112306918B (zh) * | 2019-07-31 | 2024-06-14 | 北京百度网讯科技有限公司 | 数据访问方法、装置、电子设备和计算机存储介质 |
CN113377704B (zh) * | 2021-06-11 | 2022-04-12 | 上海壁仞智能科技有限公司 | 人工智能芯片以及数据操作方法 |
EP4365748A1 (en) * | 2021-07-23 | 2024-05-08 | Huawei Technologies Co., Ltd. | Data access method and related device |
US11600312B1 (en) * | 2021-08-16 | 2023-03-07 | Micron Technology, Inc. | Activate commands for memory preparation |
CN113704143A (zh) * | 2021-08-27 | 2021-11-26 | 湖南国科微电子股份有限公司 | 数据读取方法、装置及计算机设备 |
CN114721726B (zh) * | 2022-06-10 | 2022-08-12 | 成都登临科技有限公司 | 一种多线程组并行获取指令的方法、处理器及电子设备 |
CN115757196B (zh) * | 2022-11-09 | 2023-09-01 | 超聚变数字技术有限公司 | 内存、访问内存方法及计算设备 |
CN115686153B (zh) * | 2022-12-29 | 2023-03-31 | 浪潮电子信息产业股份有限公司 | 一种内存模组及一种电子设备 |
CN115827504B (zh) * | 2023-01-31 | 2023-07-11 | 南京砺算科技有限公司 | 多核心图形处理器的数据存取方法、图形处理器及介质 |
CN117851291B (zh) * | 2024-03-07 | 2024-06-21 | 北京象帝先计算技术有限公司 | 内存访问***、电子组件及电子设备 |
Family Cites Families (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5042003A (en) * | 1988-07-06 | 1991-08-20 | Zenith Data Systems Corporation | Memory usage system |
JP2513024B2 (ja) * | 1989-03-16 | 1996-07-03 | 日本電気株式会社 | 拡張記憶アドレス制御方式 |
JPH05143438A (ja) * | 1991-11-19 | 1993-06-11 | Nec Software Kansai Ltd | 拡張メモリ管理方式 |
JP2002063069A (ja) * | 2000-08-21 | 2002-02-28 | Hitachi Ltd | メモリ制御装置、データ処理システム及び半導体装置 |
JP2003186740A (ja) * | 2001-12-19 | 2003-07-04 | Matsushita Electric Ind Co Ltd | メモリ制御装置、及びメモリ制御方法 |
JP3513147B2 (ja) * | 2002-05-29 | 2004-03-31 | 株式会社ハギワラシスコム | Usbストレージデバイス及びその制御装置 |
JP2004234461A (ja) * | 2003-01-31 | 2004-08-19 | Sony Corp | 情報処理装置および方法、並びにプログラム |
KR100420444B1 (ko) * | 2003-06-03 | 2004-02-26 | 주식회사 넥스트웨이 | 외장형 저장장치 |
US7673345B2 (en) * | 2005-03-31 | 2010-03-02 | Intel Corporation | Providing extended memory protection |
US8041881B2 (en) * | 2006-07-31 | 2011-10-18 | Google Inc. | Memory device with emulated characteristics |
CN100444133C (zh) * | 2006-06-13 | 2008-12-17 | 深圳市研祥智能科技股份有限公司 | 计算机访问扩充内存的方法 |
KR20090065504A (ko) * | 2006-12-25 | 2009-06-22 | 파나소닉 주식회사 | 메모리 제어 장치, 메모리 장치 및 메모리 제어 방법 |
WO2009125572A1 (ja) * | 2008-04-08 | 2009-10-15 | パナソニック株式会社 | メモリ制御回路及びメモリ制御方法 |
JP2010250727A (ja) * | 2009-04-20 | 2010-11-04 | Panasonic Corp | メモリ制御回路 |
JP2011118501A (ja) * | 2009-12-01 | 2011-06-16 | Yokogawa Electric Corp | データ転送システム |
JP2013069210A (ja) * | 2011-09-26 | 2013-04-18 | Toshiba Corp | メモリシステム |
CN102609378B (zh) * | 2012-01-18 | 2016-03-30 | 中国科学院计算技术研究所 | 一种消息式内存访问装置及其访问方法 |
US9281036B2 (en) * | 2013-01-08 | 2016-03-08 | Qualcomm Incorporated | Memory device having an adaptable number of open rows |
CN104216837A (zh) * | 2013-05-31 | 2014-12-17 | 华为技术有限公司 | 一种内存***、内存访问请求的处理方法和计算机*** |
CN104346293B (zh) * | 2013-07-25 | 2017-10-24 | 华为技术有限公司 | 混合内存的数据访问方法、模块、处理器及终端设备 |
CN104375946B (zh) * | 2013-08-16 | 2018-04-20 | 华为技术有限公司 | 一种数据处理的方法及装置 |
CN103488436B (zh) | 2013-09-25 | 2017-04-26 | 华为技术有限公司 | 内存扩展***及方法 |
CN104388436B (zh) | 2014-10-29 | 2016-08-24 | 中南民族大学 | 一种水稻诱导抗病基因OsAAA1及其应用 |
CN106155577B (zh) * | 2015-04-23 | 2019-03-26 | 华为技术有限公司 | 扩展内存的访问方法、设备以及*** |
-
2015
- 2015-04-23 CN CN201510198452.XA patent/CN106155577B/zh active Active
- 2015-04-23 CN CN201910200464.XA patent/CN110059020B/zh active Active
-
2016
- 2016-02-03 EP EP16782466.3A patent/EP3279788B1/en active Active
- 2016-02-03 WO PCT/CN2016/073304 patent/WO2016169318A1/zh active Application Filing
- 2016-02-03 KR KR1020177032218A patent/KR102168017B1/ko active IP Right Grant
- 2016-02-03 JP JP2017555264A patent/JP6685323B2/ja active Active
- 2016-02-03 EP EP19189059.9A patent/EP3674877B1/en active Active
- 2016-02-03 SG SG11201708477UA patent/SG11201708477UA/en unknown
- 2016-02-03 BR BR112017022547-6A patent/BR112017022547B1/pt active IP Right Grant
- 2016-02-03 CA CA2983479A patent/CA2983479C/en active Active
-
2017
- 2017-10-20 US US15/788,990 patent/US10545672B2/en active Active
-
2020
- 2020-01-16 US US16/744,795 patent/US11237728B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
JP2018517205A (ja) | 2018-06-28 |
CA2983479A1 (en) | 2016-10-27 |
KR20170134704A (ko) | 2017-12-06 |
US10545672B2 (en) | 2020-01-28 |
US20180039424A1 (en) | 2018-02-08 |
EP3674877A1 (en) | 2020-07-01 |
CN106155577A (zh) | 2016-11-23 |
EP3674877B1 (en) | 2021-12-29 |
CA2983479C (en) | 2020-12-22 |
KR102168017B1 (ko) | 2020-10-20 |
EP3279788A1 (en) | 2018-02-07 |
SG11201708477UA (en) | 2017-11-29 |
EP3279788A4 (en) | 2018-04-04 |
CN110059020B (zh) | 2024-01-30 |
WO2016169318A1 (zh) | 2016-10-27 |
US11237728B2 (en) | 2022-02-01 |
CN106155577B (zh) | 2019-03-26 |
JP6685323B2 (ja) | 2020-04-22 |
EP3279788B1 (en) | 2019-08-21 |
CN110059020A (zh) | 2019-07-26 |
BR112017022547B1 (pt) | 2023-10-10 |
US20200150872A1 (en) | 2020-05-14 |
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