AU1665299A - Nanostructures - Google Patents

Nanostructures

Info

Publication number
AU1665299A
AU1665299A AU16652/99A AU1665299A AU1665299A AU 1665299 A AU1665299 A AU 1665299A AU 16652/99 A AU16652/99 A AU 16652/99A AU 1665299 A AU1665299 A AU 1665299A AU 1665299 A AU1665299 A AU 1665299A
Authority
AU
Australia
Prior art keywords
relates
structures
substrates
substrate
structured
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU16652/99A
Inventor
Thomas Herzog
Martin Moller
Stefan Mossmer
Joachim Spatz
Paul Ziemann
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Universitaet Ulm
Original Assignee
Universitaet Ulm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE19747815A external-priority patent/DE19747815A1/en
Priority claimed from DE19747816A external-priority patent/DE19747816A1/en
Priority claimed from DE19843411A external-priority patent/DE19843411A1/en
Application filed by Universitaet Ulm filed Critical Universitaet Ulm
Publication of AU1665299A publication Critical patent/AU1665299A/en
Abandoned legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31144Etching the insulating layers by chemical or physical means using masks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B22CASTING; POWDER METALLURGY
    • B22FWORKING METALLIC POWDER; MANUFACTURE OF ARTICLES FROM METALLIC POWDER; MAKING METALLIC POWDER; APPARATUS OR DEVICES SPECIALLY ADAPTED FOR METALLIC POWDER
    • B22F2998/00Supplementary information concerning processes or compositions relating to powder metallurgy
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B22CASTING; POWDER METALLURGY
    • B22FWORKING METALLIC POWDER; MANUFACTURE OF ARTICLES FROM METALLIC POWDER; MAKING METALLIC POWDER; APPARATUS OR DEVICES SPECIALLY ADAPTED FOR METALLIC POWDER
    • B22F2999/00Aspects linked to processes or compositions used in powder metallurgy

Abstract

The invention relates to nanometric structuring and decorating of substrates. The invention especially relates to surface decorated substrates on which ordered nanometric surface structures are deposited, said structures being comprised of metal and/or metal oxide clusters and/or semiconductor clusters. The invention also relates to a method for producing and applying said surface decorated structures in order to epoxidize C3-C8-alkenes or to oxidize CO to CO2, and relates to surface structured substrates, especially Pt, Au, GaAs, InyGaAs, AlxGaAs, Si, SiO2, Ge, SixNy, SixGaAs, InP, InPSi, GaInAsP, glass, graphite, diamond, mica, SrTiO3 or the doped modifications thereof, which are nanometrically structured over macroscopic areas. In addition, the invention relates to a method for the production of said surface structured substrates. The invention is based on the film formation of core shell polymer systems whose core areas are selectively modified or charged with corresponding metal compounds in a solution and construct the structures which are orderly arranged in the thin films. These films which are deposited on the substrate surfaces are selectively etched in such a way that the organic polymer components are completely removed and, as a result, the substrate is decorated in an orderly arrangement by the inorganic residues. The structured films can further serve as masks which make it possible to selectively etch the substrate and to transfer such a structure, said structure given by the film, to the substrate.
AU16652/99A 1997-10-29 1998-10-29 Nanostructures Abandoned AU1665299A (en)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
DE19747815 1997-10-29
DE19747816 1997-10-29
DE19747815A DE19747815A1 (en) 1997-10-29 1997-10-29 Production of surface-structured substrates used in the manufacture of electronic components
DE19747816A DE19747816A1 (en) 1997-10-29 1997-10-29 Production of surface-structured substrates used in the manufacture of electronic components
DE19843411A DE19843411A1 (en) 1998-09-19 1998-09-19 Production of surface decorated substrates
DE19843411 1998-09-19
PCT/EP1998/006874 WO1999021652A2 (en) 1997-10-29 1998-10-29 Nanostructures

Publications (1)

Publication Number Publication Date
AU1665299A true AU1665299A (en) 1999-05-17

Family

ID=27217872

Family Applications (1)

Application Number Title Priority Date Filing Date
AU16652/99A Abandoned AU1665299A (en) 1997-10-29 1998-10-29 Nanostructures

Country Status (7)

Country Link
EP (1) EP1027157B1 (en)
JP (1) JP2004500226A (en)
AT (1) ATE246542T1 (en)
AU (1) AU1665299A (en)
CA (1) CA2308302A1 (en)
DE (1) DE59809228D1 (en)
WO (1) WO1999021652A2 (en)

Families Citing this family (38)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19952018C1 (en) * 1999-10-28 2001-08-23 Martin Moeller Process for the production of substrates decorated in the nanometer range
AU2001241186A1 (en) * 2000-03-16 2001-09-24 Matsushita Electric Industrial Co., Ltd. Method for precisely machining microstructure
JP4378513B2 (en) * 2003-05-29 2009-12-09 独立行政法人理化学研究所 Metal nanoparticles with support, metal nanoparticle continuum and methods for producing them
US9107452B2 (en) 2003-06-13 2015-08-18 Philip Morris Usa Inc. Catalyst to reduce carbon monoxide in the mainstream smoke of a cigarette
US7152609B2 (en) 2003-06-13 2006-12-26 Philip Morris Usa Inc. Catalyst to reduce carbon monoxide and nitric oxide from the mainstream smoke of a cigarette
US7243658B2 (en) 2003-06-13 2007-07-17 Philip Morris Usa Inc. Nanoscale composite catalyst to reduce carbon monoxide in the mainstream smoke of a cigarette
US7677254B2 (en) 2003-10-27 2010-03-16 Philip Morris Usa Inc. Reduction of carbon monoxide and nitric oxide in smoking articles using iron oxynitride
US7712471B2 (en) 2003-10-27 2010-05-11 Philip Morris Usa Inc. Methods for forming transition metal oxide clusters and smoking articles comprising transition metal oxide clusters
DE102004043908A1 (en) 2004-09-10 2006-03-30 GRÄTER, Stefan Surface-structured polymeric substrates and their preparation
EP1760527B1 (en) * 2005-09-05 2012-06-06 DWI an der RWTH Aachen e.V. Photochemical method for manufacturing nanometrically surface-decorated substrates
WO2007122998A1 (en) * 2006-04-19 2007-11-01 Japan Science And Technology Agency Substrate with microfine metallic lumps arranged on surface
US7582586B2 (en) * 2006-08-24 2009-09-01 Toyota Motor Corporation Supported catalysts with controlled metal cluster size
DE102007014538A1 (en) * 2007-03-27 2008-10-02 Carl Zeiss Ag Method for producing an anti-reflection surface on an optical element and optical elements with an anti-reflection surface
DE102007017032B4 (en) * 2007-04-11 2011-09-22 MAX-PLANCK-Gesellschaft zur Förderung der Wissenschaften e.V. Method for the production of surface size or distance variations in patterns of nanostructures on surfaces
GB0708695D0 (en) * 2007-05-04 2007-06-13 Univ Nottingham Fabrication of nanoparticles
JP5445991B2 (en) * 2007-08-09 2014-03-19 独立行政法人物質・材料研究機構 Nano-flaked metal composite material, method for producing the same, and surface-enhanced Raman scattering active substrate
DE102008002193A1 (en) 2007-08-29 2009-03-05 Carl Zeiss Smt Ag Optical element i.e. plane-convex lens, for use in projection exposure system for immersion lithography, has water-repellent surface formed in element body, where surface is formed by micro structuring uncoated regions of element body
JP2009138014A (en) * 2007-12-03 2009-06-25 Toyota Central R&D Labs Inc Method for producing nano structure material
US9637380B2 (en) 2008-03-31 2017-05-02 Pacific Biosciences Of California, Inc. Nanoscale apertures having islands of functionality
JP5396063B2 (en) * 2008-10-27 2014-01-22 独立行政法人物質・材料研究機構 Functional metal composite substrate and manufacturing method thereof
DE102008058400A1 (en) * 2008-11-21 2010-05-27 Istituto Italiano Di Tecnologia Nanowires on substrate surfaces, process for their preparation and their use
JP5620154B2 (en) * 2009-10-15 2014-11-05 公益財団法人神奈川科学技術アカデミー Hollow micro object and method for producing the same
DE102009053406A1 (en) 2009-11-16 2011-05-19 MAX-PLANCK-Gesellschaft zur Förderung der Wissenschaften e.V. Method for the spatially resolved enlargement of nanoparticles on a substrate surface
DE102009060223A1 (en) 2009-12-23 2011-06-30 Max-Planck-Gesellschaft zur Förderung der Wissenschaften e.V., 80539 Cone-shaped nanostructures on substrate surfaces, in particular optical elements, methods for their production and their use
WO2011115165A1 (en) * 2010-03-18 2011-09-22 株式会社豊田中央研究所 Nanoheterostructure and method for producing same
DE102010023490A1 (en) 2010-06-11 2011-12-15 MAX-PLANCK-Gesellschaft zur Förderung der Wissenschaften e.V. Three-dimensional metal-covered nanostructures on substrate surfaces, methods for their production and their use
WO2013007354A1 (en) 2011-07-08 2013-01-17 Max-Planck-Gesellschaft Zur Foerderung Der Wissenschaften E.V. A method for preventing or reducing the production of biofilms formed by microorganisms using nanostructured surfaces
JP2014529354A (en) * 2011-07-27 2014-11-06 マックス−プランク−ゲゼルシャフト ツール フェルデルング デア ヴィッセンシャフテン エー. ファオ.Max−Planck−Gesellschaft Zur Foerderung Derwissenschaften E.V. Substrate surface composed of refractory metal alloy nanoparticles, its preparation method, and its use as a catalyst in particular
WO2013170866A1 (en) 2012-05-15 2013-11-21 Max-Planck-Gesellschaft Zur Foerderung Der Wissenschaften E.V. Highly ordered arrays of micelles or nanoparticles on a substrate surface and methods for producing the same
WO2013181007A1 (en) 2012-05-29 2013-12-05 Corning Incorporated Method for texturing a glass surface
JP5943280B2 (en) * 2012-06-12 2016-07-05 公立大学法人首都大学東京 Gold cluster catalyst and method for producing the same
JP6363482B2 (en) * 2014-11-28 2018-07-25 トヨタ自動車株式会社 Exhaust gas purification catalyst and method for producing the same
EP3130559A1 (en) 2015-08-14 2017-02-15 Max-Planck-Gesellschaft zur Förderung der Wissenschaften e.V. Fabrication of nanostructured substrated comprising a plurality of nanostructure gradients on a single substrate
EP3415617A1 (en) 2017-06-16 2018-12-19 Max-Planck-Gesellschaft zur Förderung der Wissenschaften e.V. A method and a device for increasing ex vivo expansion of t cells by using adhesive nanostructured surfaces and costimulatory signals
JP7365069B2 (en) * 2018-08-16 2023-10-19 ノースウェスタン ユニバーシティ Multi-element heterostructure nanoparticles and their production method
EP3867193A4 (en) * 2018-10-18 2022-12-28 Georgia Tech Research Corporation Chemical etching methods for fabricating nanostructures
CN110756821B (en) * 2019-09-24 2020-12-01 厦门大学 Synthetic method for loading nanogold on silicon layer
DE102022203401A1 (en) 2022-04-06 2023-10-12 Robert Bosch Gesellschaft mit beschränkter Haftung Method for cleaning at least one upper side of a substrate

Also Published As

Publication number Publication date
EP1027157A2 (en) 2000-08-16
JP2004500226A (en) 2004-01-08
ATE246542T1 (en) 2003-08-15
CA2308302A1 (en) 1999-05-06
WO1999021652A3 (en) 1999-07-15
WO1999021652A2 (en) 1999-05-06
DE59809228D1 (en) 2003-09-11
EP1027157B1 (en) 2003-08-06

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase