ATE467858T1 - Methode zur reduzierung des optischen naheffekts in lithographischen verfahren - Google Patents

Methode zur reduzierung des optischen naheffekts in lithographischen verfahren

Info

Publication number
ATE467858T1
ATE467858T1 AT99950074T AT99950074T ATE467858T1 AT E467858 T1 ATE467858 T1 AT E467858T1 AT 99950074 T AT99950074 T AT 99950074T AT 99950074 T AT99950074 T AT 99950074T AT E467858 T1 ATE467858 T1 AT E467858T1
Authority
AT
Austria
Prior art keywords
feature
main feature
transferred
reducing
lithographic processes
Prior art date
Application number
AT99950074T
Other languages
English (en)
Inventor
Christophe Pierrat
James Burdorf
William Baggenstoss
William Stanton
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Application granted granted Critical
Publication of ATE467858T1 publication Critical patent/ATE467858T1/de

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/36Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/70425Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
    • G03F7/70433Layout for increasing efficiency or for compensating imaging errors, e.g. layout of exposure fields for reducing focus errors; Use of mask features for increasing efficiency or for compensating imaging errors
    • G03F7/70441Optical proximity correction [OPC]

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
AT99950074T 1998-10-01 1999-09-30 Methode zur reduzierung des optischen naheffekts in lithographischen verfahren ATE467858T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/164,786 US6120952A (en) 1998-10-01 1998-10-01 Methods of reducing proximity effects in lithographic processes
PCT/US1999/022815 WO2000019272A1 (en) 1998-10-01 1999-09-30 Methods of reducing proximity effects in lithographic processes

Publications (1)

Publication Number Publication Date
ATE467858T1 true ATE467858T1 (de) 2010-05-15

Family

ID=22596084

Family Applications (1)

Application Number Title Priority Date Filing Date
AT99950074T ATE467858T1 (de) 1998-10-01 1999-09-30 Methode zur reduzierung des optischen naheffekts in lithographischen verfahren

Country Status (8)

Country Link
US (3) US6120952A (de)
EP (1) EP1125167B1 (de)
JP (1) JP3461336B2 (de)
KR (1) KR20010075482A (de)
AT (1) ATE467858T1 (de)
AU (1) AU6280799A (de)
DE (1) DE69942370D1 (de)
WO (1) WO2000019272A1 (de)

Families Citing this family (71)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6499003B2 (en) * 1998-03-03 2002-12-24 Lsi Logic Corporation Method and apparatus for application of proximity correction with unitary segmentation
US6120952A (en) * 1998-10-01 2000-09-19 Micron Technology, Inc. Methods of reducing proximity effects in lithographic processes
JP2000235251A (ja) * 1999-02-16 2000-08-29 Sony Corp 露光パターンの補正方法、露光方法、露光装置、フォトマスクおよび半導体装置
US6467076B1 (en) * 1999-04-30 2002-10-15 Nicolas Bailey Cobb Method and apparatus for submicron IC design
US6301697B1 (en) 1999-04-30 2001-10-09 Nicolas B. Cobb Streamlined IC mask layout optical and process correction through correction reuse
US6335128B1 (en) 1999-09-28 2002-01-01 Nicolas Bailey Cobb Method and apparatus for determining phase shifts and trim masks for an integrated circuit
US6643616B1 (en) * 1999-12-07 2003-11-04 Yuri Granik Integrated device structure prediction based on model curvature
TW440903B (en) * 2000-02-15 2001-06-16 Winbond Electronics Corp Method to reduce the deviation of optical proximity effect in the photolithography process
US6361911B1 (en) * 2000-04-17 2002-03-26 Taiwan Semiconductor Manufacturing Company Using a dummy frame pattern to improve CD control of VSB E-beam exposure system and the proximity effect of laser beam exposure system and Gaussian E-beam exposure system
US7412676B2 (en) * 2000-06-13 2008-08-12 Nicolas B Cobb Integrated OPC verification tool
US6425113B1 (en) * 2000-06-13 2002-07-23 Leigh C. Anderson Integrated verification and manufacturability tool
US6541165B1 (en) 2000-07-05 2003-04-01 Numerical Technologies, Inc. Phase shift mask sub-resolution assist features
US6777141B2 (en) 2000-07-05 2004-08-17 Numerical Technologies, Inc. Phase shift mask including sub-resolution assist features for isolated spaces
US6516459B1 (en) 2000-07-10 2003-02-04 Mentor Graphics Corporation Integrated circuit design correction using fragment correspondence
US6430737B1 (en) 2000-07-10 2002-08-06 Mentor Graphics Corp. Convergence technique for model-based optical and process correction
DE10038928A1 (de) * 2000-08-09 2002-02-28 Infineon Technologies Ag Photolithographische Maske
US6519760B2 (en) * 2001-02-28 2003-02-11 Asml Masktools, B.V. Method and apparatus for minimizing optical proximity effects
US6574784B1 (en) * 2001-06-14 2003-06-03 George P. Lippincott Short edge management in rule based OPC
DE10143723B4 (de) 2001-08-31 2006-09-28 Infineon Technologies Ag Verfahren zur Optimierung eines Layouts für eine Maske zur Verwendung bei der Halbleiterherstellung
US7014956B2 (en) * 2002-01-04 2006-03-21 Intel Corporation Active secondary exposure mask to manufacture integrated circuits
US7293249B2 (en) * 2002-01-31 2007-11-06 Juan Andres Torres Robles Contrast based resolution enhancement for photolithographic processing
US7013439B2 (en) * 2002-01-31 2006-03-14 Juan Andres Torres Robles Contrast based resolution enhancing technology
US6803157B2 (en) * 2002-03-01 2004-10-12 Micron Technology, Inc. Pattern mask with features to minimize the effect of aberrations
US6783904B2 (en) * 2002-05-17 2004-08-31 Freescale Semiconductor, Inc. Lithography correction method and device
US6973633B2 (en) * 2002-07-24 2005-12-06 George Lippincott Caching of lithography and etch simulation results
US6934928B2 (en) * 2002-08-27 2005-08-23 Micron Technology, Inc. Method and apparatus for designing a pattern on a semiconductor surface
US6898779B2 (en) * 2002-08-28 2005-05-24 Micron Technology, Inc. Pattern generation on a semiconductor surface
US6857109B2 (en) * 2002-10-18 2005-02-15 George P. Lippincott Short edge smoothing for enhanced scatter bar placement
US6928634B2 (en) * 2003-01-02 2005-08-09 Yuri Granik Matrix optical process correction
US7147975B2 (en) 2003-02-17 2006-12-12 Matsushita Electric Industrial Co., Ltd. Photomask
US6777146B1 (en) 2003-02-21 2004-08-17 International Business Machines Corporation Method of optical proximity correction with sub-resolution assists
US7001693B2 (en) * 2003-02-28 2006-02-21 International Business Machines Corporation Binary OPC for assist feature layout optimization
US6964032B2 (en) * 2003-02-28 2005-11-08 International Business Machines Corporation Pitch-based subresolution assist feature design
US7205633B2 (en) * 2003-06-27 2007-04-17 Micron Technology, Inc. Capacitor layout orientation
US7558419B1 (en) 2003-08-14 2009-07-07 Brion Technologies, Inc. System and method for detecting integrated circuit pattern defects
US7003758B2 (en) * 2003-10-07 2006-02-21 Brion Technologies, Inc. System and method for lithography simulation
US7073162B2 (en) * 2003-10-31 2006-07-04 Mentor Graphics Corporation Site control for OPC
DE10356693A1 (de) * 2003-11-27 2005-07-14 Infineon Technologies Ag Verfahren zum Erzeugen eines Abbildungsfehler vermeidenden Maskenlayouts für eine Maske
US7536660B2 (en) * 2004-02-24 2009-05-19 Konstantinos Adam OPC simulation model using SOCS decomposition of edge fragments
US7539954B2 (en) * 2004-02-24 2009-05-26 Konstantinos Adam OPC simulation model using SOCS decomposition of edge fragments
US7861207B2 (en) 2004-02-25 2010-12-28 Mentor Graphics Corporation Fragmentation point and simulation site adjustment for resolution enhancement techniques
US7234130B2 (en) * 2004-02-25 2007-06-19 James Word Long range corrections in integrated circuit layout designs
EP1747520B1 (de) 2004-05-07 2018-10-24 Mentor Graphics Corporation Layoutentwurfsmethodologie für integrierte schaltungen mit prozessvariationsbändern
US7240305B2 (en) * 2004-06-02 2007-07-03 Lippincott George P OPC conflict identification and edge priority system
US7547945B2 (en) 2004-09-01 2009-06-16 Micron Technology, Inc. Transistor devices, transistor structures and semiconductor constructions
US7459248B2 (en) * 2005-02-24 2008-12-02 James Word Performing OPC on structures with virtual edges
US7493587B2 (en) * 2005-03-02 2009-02-17 James Word Chromeless phase shifting mask for integrated circuits using interior region
US8037429B2 (en) * 2005-03-02 2011-10-11 Mentor Graphics Corporation Model-based SRAF insertion
US7381654B2 (en) * 2005-05-31 2008-06-03 Taiwan Semiconductor Manufacturing Co. Method for fabricating right-angle holes in a substrate
US7282401B2 (en) 2005-07-08 2007-10-16 Micron Technology, Inc. Method and apparatus for a self-aligned recessed access device (RAD) transistor gate
US7867851B2 (en) 2005-08-30 2011-01-11 Micron Technology, Inc. Methods of forming field effect transistors on substrates
US7434199B2 (en) * 2005-09-27 2008-10-07 Nicolas Bailey Cobb Dense OPC
US7700441B2 (en) 2006-02-02 2010-04-20 Micron Technology, Inc. Methods of forming field effect transistors, methods of forming field effect transistor gates, methods of forming integrated circuitry comprising a transistor gate array and circuitry peripheral to the gate array, and methods of forming integrated circuitry comprising a transistor gate array including first gates and second grounded isolation gates
US7506285B2 (en) 2006-02-17 2009-03-17 Mohamed Al-Imam Multi-dimensional analysis for predicting RET model accuracy
US7712068B2 (en) * 2006-02-17 2010-05-04 Zhuoxiang Ren Computation of electrical properties of an IC layout
US7602001B2 (en) 2006-07-17 2009-10-13 Micron Technology, Inc. Capacitorless one transistor DRAM cell, integrated circuitry comprising an array of capacitorless one transistor DRAM cells, and method of forming lines of capacitorless one transistor DRAM cells
US7772632B2 (en) 2006-08-21 2010-08-10 Micron Technology, Inc. Memory arrays and methods of fabricating memory arrays
US7589995B2 (en) 2006-09-07 2009-09-15 Micron Technology, Inc. One-transistor memory cell with bias gate
US8056022B2 (en) * 2006-11-09 2011-11-08 Mentor Graphics Corporation Analysis optimizer
US7966585B2 (en) 2006-12-13 2011-06-21 Mentor Graphics Corporation Selective shielding for multiple exposure masks
US7802226B2 (en) * 2007-01-08 2010-09-21 Mentor Graphics Corporation Data preparation for multiple mask printing
US7739650B2 (en) * 2007-02-09 2010-06-15 Juan Andres Torres Robles Pre-bias optical proximity correction
US7799487B2 (en) * 2007-02-09 2010-09-21 Ayman Yehia Hamouda Dual metric OPC
JP4557994B2 (ja) * 2007-02-22 2010-10-06 株式会社日立製作所 磁気記録媒体の製造方法
US7923373B2 (en) 2007-06-04 2011-04-12 Micron Technology, Inc. Pitch multiplication using self-assembling materials
US8713483B2 (en) 2007-06-05 2014-04-29 Mentor Graphics Corporation IC layout parsing for multiple masks
CN101349861B (zh) * 2007-07-19 2010-09-08 上海华虹Nec电子有限公司 平滑规则式光学临近修正光掩膜图形的方法
US7647569B2 (en) * 2007-08-01 2010-01-12 Micron Technology, Inc. Systems, methods, and computer-readable media for adjusting layout database hierarchies for more efficient database processing and storage
US7805699B2 (en) * 2007-10-11 2010-09-28 Mentor Graphics Corporation Shape-based photolithographic model calibration
US8037446B2 (en) 2008-07-16 2011-10-11 Micron Technology, Inc. Methods for defining evaluation points for optical proximity correction and optical proximity correction methods including same
US8176446B2 (en) * 2008-09-11 2012-05-08 International Business Machines Corporation Method for compensating for variations in structures of an integrated circuit

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5242770A (en) * 1992-01-16 1993-09-07 Microunity Systems Engineering, Inc. Mask for photolithography
JP3194155B2 (ja) * 1992-01-31 2001-07-30 キヤノン株式会社 半導体デバイスの製造方法及びそれを用いた投影露光装置
WO1993020482A1 (en) * 1992-04-06 1993-10-14 Microunity Systems Engineering, Inc. Method for forming a lithographic pattern in a process for manufacturing semiconductor devices
US5256505A (en) * 1992-08-21 1993-10-26 Microunity Systems Engineering Lithographical mask for controlling the dimensions of resist patterns
US5447810A (en) * 1994-02-09 1995-09-05 Microunity Systems Engineering, Inc. Masks for improved lithographic patterning for off-axis illumination lithography
JPH08202020A (ja) * 1995-01-31 1996-08-09 Sony Corp フォトマスクにおけるパターン形状評価方法、フォトマスク、フォトマスクの作製方法、フォトマスクのパターン形成方法、並びに露光方法
US5663893A (en) * 1995-05-03 1997-09-02 Microunity Systems Engineering, Inc. Method for generating proximity correction features for a lithographic mask pattern
JPH0915833A (ja) * 1995-06-30 1997-01-17 Sony Corp 露光用マスク作製装置における走査用データ作成装置及び走査用データの作成方法
US5972541A (en) * 1996-02-27 1999-10-26 Lsi Logic Corporation Reticle and method of design to correct pattern for depth of focus problems
US5707765A (en) * 1996-05-28 1998-01-13 Microunity Systems Engineering, Inc. Photolithography mask using serifs and method thereof
US5795688A (en) * 1996-08-14 1998-08-18 Micron Technology, Inc. Process for detecting defects in photomasks through aerial image comparisons
US5821014A (en) * 1997-02-28 1998-10-13 Microunity Systems Engineering, Inc. Optical proximity correction method for intermediate-pitch features using sub-resolution scattering bars on a mask
US5958635A (en) * 1997-10-20 1999-09-28 Motorola, Inc. Lithographic proximity correction through subset feature modification
US5858591A (en) * 1998-02-02 1999-01-12 Taiwan Semiconductor Manufacturing Company Ltd. Optical proximity correction during wafer processing through subfile bias modification with subsequent subfile merging
US6120952A (en) * 1998-10-01 2000-09-19 Micron Technology, Inc. Methods of reducing proximity effects in lithographic processes

Also Published As

Publication number Publication date
US20010023045A1 (en) 2001-09-20
EP1125167B1 (de) 2010-05-12
WO2000019272B1 (en) 2000-05-25
US6319644B2 (en) 2001-11-20
WO2000019272A1 (en) 2000-04-06
EP1125167A1 (de) 2001-08-22
JP3461336B2 (ja) 2003-10-27
DE69942370D1 (de) 2010-06-24
US20010002304A1 (en) 2001-05-31
AU6280799A (en) 2000-04-17
JP2002526792A (ja) 2002-08-20
US6120952A (en) 2000-09-19
US6284419B2 (en) 2001-09-04
KR20010075482A (ko) 2001-08-09

Similar Documents

Publication Publication Date Title
ATE467858T1 (de) Methode zur reduzierung des optischen naheffekts in lithographischen verfahren
SE0104238D0 (sv) Method and apparatus for patterning a workpiece
TW200710604A (en) Photomask for double exposure process and double exposure method using the same
TW200518172A (en) Photomask, and method for forming pattern
TW200505617A (en) Method and apparatus for removing an edge region of a layer applied to a substrate and for coating a substrate and a substrate
TW200520053A (en) Immersion lithographic process using a conforming immersion medium
DE60209306D1 (de) Verfahren zur identifizierung von Regionen extremer Wechselwirkung, Verfahren zum Entwerfen von Maskenmustern und zur Herstellung von Masken, Verfahren zur Herstellung von Elementen und Computerprogramme
ATE488621T1 (de) Galvanisches verfahren zur herstellung einer mehrlagenstruktur
TW200511388A (en) Exposure method, substrate stage, exposure apparatus and method for manufacturing device
DE602005001994D1 (de) Verfahren zum Entwurf einer Beleuchtungsquelle, Verfahren zum Entwurf einer Maskenstruktur, Verfahren zur Herstellung einer Photomaske, Verfahren zur Herstellung eines Halbleiterbauelements und Computerprogrammprodukt
ATE274199T1 (de) Verfahren und vorrichtung zur herstellung eines schaltkreises mittels phasenverschiebung
WO2006065474A3 (en) Method for patterning by surface modification
WO2008033879A3 (en) Method for achieving compliant sub-resolution assist features
SG144749A1 (en) Method and apparatus for decomposing semiconductor device patterns into phase and chrome regions for chromeless phase lithography
EP1298489A3 (de) OPC-Verfahren mit nicht auflösenden Phasensprung-Hilfsstrukturen
DE60219844D1 (de) Verfahren zur Übernahme einer lithographischen Maske
DE60143987D1 (de) Verfahren zur behandlung eines halbleitenden wafers
GB2353105B (en) Lithographic method and mask for producing an exposure pattern on a substrate
KR970003408A (ko) 노광 마스크의 근접효과 억제방법
TW200517772A (en) Method of making photomask blank substrates
TW200632540A (en) Method for correcting mask pattern, photomask, method for fabricating photomask, electron beam writing method for fabricating photomask, exposure method, semiconductor device, and method for fabricating semiconductor device
TW200513629A (en) Reticle, inspection system for exposure equipment, inspection method for exposure equipment, and method for manufacturing reticle
DE60205464D1 (de) Herstellung eines metallischen musters
EP0986094A3 (de) Expositionsmethode und Verfahren zur Herstellung von Bauelementen, die sie benutzt
WO2005031460A3 (en) Lithograph method and system with selective illumination of mask features separated in the frequency domain using different illumination schemes

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties