ATE438895T1 - Auf dem speicher basierender kreuzvergleich für kreuzsicherungssysteme - Google Patents
Auf dem speicher basierender kreuzvergleich für kreuzsicherungssystemeInfo
- Publication number
- ATE438895T1 ATE438895T1 AT05024885T AT05024885T ATE438895T1 AT E438895 T1 ATE438895 T1 AT E438895T1 AT 05024885 T AT05024885 T AT 05024885T AT 05024885 T AT05024885 T AT 05024885T AT E438895 T1 ATE438895 T1 AT E438895T1
- Authority
- AT
- Austria
- Prior art keywords
- cross
- storage area
- buffers
- memory based
- safety systems
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/18—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
- G06F11/183—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits by voting, the voting not being performed by the redundant components
- G06F11/184—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits by voting, the voting not being performed by the redundant components where the redundant components implement processing functionality
- G06F11/185—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits by voting, the voting not being performed by the redundant components where the redundant components implement processing functionality and the voting is itself performed redundantly
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1629—Error detection by comparing the output of redundant processing systems
- G06F11/1633—Error detection by comparing the output of redundant processing systems using mutual exchange of the output between the redundant processing components
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1675—Temporal synchronisation or re-synchronisation of redundant processing components
- G06F11/1683—Temporal synchronisation or re-synchronisation of redundant processing components at instruction level
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Multi Processors (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Dram (AREA)
- Hardware Redundancy (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/002,237 US7350026B2 (en) | 2004-12-03 | 2004-12-03 | Memory based cross compare for cross checked systems |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE438895T1 true ATE438895T1 (de) | 2009-08-15 |
Family
ID=35929986
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT05024885T ATE438895T1 (de) | 2004-12-03 | 2005-11-15 | Auf dem speicher basierender kreuzvergleich für kreuzsicherungssysteme |
Country Status (6)
Country | Link |
---|---|
US (1) | US7350026B2 (de) |
EP (1) | EP1667024B1 (de) |
CN (1) | CN100361096C (de) |
AT (1) | ATE438895T1 (de) |
DE (1) | DE602005015811D1 (de) |
ES (1) | ES2331523T3 (de) |
Families Citing this family (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1812859B1 (de) * | 2004-10-25 | 2009-01-07 | Robert Bosch Gmbh | Verfahren und vorrichtung zur modusumschaltung und zum signalvergleich bei einem rechnersystem mit wenigstens zwei verarbeitungseinheiten |
GB0602641D0 (en) * | 2006-02-09 | 2006-03-22 | Eads Defence And Security Syst | High speed data processing system |
US7444544B2 (en) * | 2006-07-14 | 2008-10-28 | International Business Machines Corporation | Write filter cache method and apparatus for protecting the microprocessor core from soft errors |
CN101140558A (zh) * | 2006-09-05 | 2008-03-12 | 深圳迈瑞生物医疗电子股份有限公司 | 嵌入式***及其通信方法 |
US7644306B2 (en) * | 2006-12-15 | 2010-01-05 | Boeing Company | Method and system for synchronous operation of an application by a purality of processing units |
JP4521678B2 (ja) * | 2007-11-19 | 2010-08-11 | フェリカネットワークス株式会社 | 通信システム、情報処理方法、プログラム、及び情報処理装置 |
KR20100034415A (ko) * | 2008-09-24 | 2010-04-01 | 삼성전자주식회사 | 메모리 링크 아키텍쳐를 활용한 부팅기능을 갖는 멀티 프로세서 시스템 |
US8458581B2 (en) * | 2009-10-15 | 2013-06-04 | Ansaldo Sts Usa, Inc. | System and method to serially transmit vital data from two processors |
JP5829392B2 (ja) * | 2010-09-30 | 2015-12-09 | 三菱重工業株式会社 | 制御装置および原子力発電プラント制御システム |
JP2012079184A (ja) | 2010-10-04 | 2012-04-19 | Mitsubishi Heavy Ind Ltd | 制御装置および原子力発電プラント制御システム |
US8543774B2 (en) | 2011-04-05 | 2013-09-24 | Ansaldo Sts Usa, Inc. | Programmable logic apparatus employing shared memory, vital processor and non-vital communications processor, and system including the same |
CN105204774B (zh) * | 2014-06-23 | 2019-01-15 | 联想(北京)有限公司 | 一种数据处理方法及电子设备 |
FR3024869B1 (fr) * | 2014-08-14 | 2016-08-26 | Zodiac Aero Electric | Systeme de distribution electrique pour un aeronef et procede de commande correspondant |
JP5902778B1 (ja) * | 2014-09-03 | 2016-04-13 | ファナック株式会社 | 周辺機器を安全に制御する機能を有する工作機械 |
US9641287B2 (en) | 2015-01-13 | 2017-05-02 | Honeywell International Inc. | Methods and apparatus for high-integrity data transfer with preemptive blocking |
US11812312B2 (en) * | 2015-05-25 | 2023-11-07 | Apple Inc. | Link quality based single radio-voice call continuity and packet scheduling for voice over long term evolution communications |
RU183879U1 (ru) * | 2017-10-25 | 2018-10-08 | Публичное акционерное общество "Институт электронных управляющих машин им. И.С. Брука" | Процессорный модуль |
WO2021120132A1 (zh) * | 2019-12-19 | 2021-06-24 | 华为技术有限公司 | 一种存储***及数据交叉方法 |
RU208501U1 (ru) * | 2021-06-28 | 2021-12-22 | Общество с ограниченной ответственностью "Форк" | Системная плата |
Family Cites Families (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5295258A (en) * | 1989-12-22 | 1994-03-15 | Tandem Computers Incorporated | Fault-tolerant computer system with online recovery and reintegration of redundant components |
US5226152A (en) * | 1990-12-07 | 1993-07-06 | Motorola, Inc. | Functional lockstep arrangement for redundant processors |
US5479573A (en) * | 1992-11-24 | 1995-12-26 | Pavilion Technologies, Inc. | Predictive network with learned preprocessing parameters |
US5909541A (en) * | 1993-07-14 | 1999-06-01 | Honeywell Inc. | Error detection and correction for data stored across multiple byte-wide memory devices |
US5559450A (en) * | 1995-07-27 | 1996-09-24 | Lucent Technologies Inc. | Field programmable gate array with multi-port RAM |
GB2312134B (en) * | 1996-04-12 | 2000-10-04 | Sony Corp | Data transfer device |
US5715197A (en) * | 1996-07-29 | 1998-02-03 | Xilinx, Inc. | Multiport RAM with programmable data port configuration |
JP3429139B2 (ja) * | 1996-09-25 | 2003-07-22 | 株式会社デジタル | コンピュータ装置における書込み用バッファ装置のアドレス用比較器及び主記憶装置からのデータ読出し方法 |
US5970240A (en) * | 1997-06-25 | 1999-10-19 | Quickturn Design Systems, Inc. | Method and apparatus for configurable memory emulation |
US6052619A (en) * | 1997-08-07 | 2000-04-18 | New York University | Brain function scan system |
US5978889A (en) * | 1997-11-05 | 1999-11-02 | Timeplex, Inc. | Multiple device data transfer utilizing a multiport memory with opposite oriented memory page rotation for transmission and reception |
US6182196B1 (en) * | 1998-02-20 | 2001-01-30 | Ati International Srl | Method and apparatus for arbitrating access requests to a memory |
DE19809089A1 (de) * | 1998-02-25 | 1999-08-26 | Siemens Ag | Synchronisations- und/oder Datenaustauschverfahren für sichere, hochverfügbare Rechner und hierzu geeignete Einrichtung |
US6199171B1 (en) * | 1998-06-26 | 2001-03-06 | International Business Machines Corporation | Time-lag duplexing techniques |
US6181163B1 (en) * | 1999-01-21 | 2001-01-30 | Vantis Corporation | FPGA integrated circuit having embedded SRAM memory blocks and interconnect channel for broadcasting address and control signals |
US6463573B1 (en) * | 1999-06-03 | 2002-10-08 | International Business Machines Corporation | Data processor storage systems with dynamic resynchronization of mirrored logical data volumes subsequent to a storage system failure |
US6434642B1 (en) * | 1999-10-07 | 2002-08-13 | Xilinx, Inc. | FIFO memory system and method with improved determination of full and empty conditions and amount of data stored |
US6362650B1 (en) * | 2000-05-18 | 2002-03-26 | Xilinx, Inc. | Method and apparatus for incorporating a multiplier into an FPGA |
US6373779B1 (en) * | 2000-05-19 | 2002-04-16 | Xilinx, Inc. | Block RAM having multiple configurable write modes for use in a field programmable gate array |
US6535043B2 (en) * | 2000-05-26 | 2003-03-18 | Lattice Semiconductor Corp | Clock signal selection system, method of generating a clock signal and programmable clock manager including same |
US7908520B2 (en) * | 2000-06-23 | 2011-03-15 | A. Avizienis And Associates, Inc. | Self-testing and -repairing fault-tolerance infrastructure for computer systems |
US6516390B1 (en) * | 2000-10-26 | 2003-02-04 | Emc Corporation | Methods and apparatus for accessing data within a data storage system |
US7072345B2 (en) * | 2000-11-29 | 2006-07-04 | Raza Microelectronics, Inc | Programmable integrated circuit for use in a network switch |
JP3693013B2 (ja) * | 2001-12-26 | 2005-09-07 | 日本電気株式会社 | データ処理システム、アレイ型プロセッサ、データ処理装置、コンピュータプログラム、情報記憶媒体 |
US6948091B2 (en) * | 2002-05-02 | 2005-09-20 | Honeywell International Inc. | High integrity recovery from multi-bit data failures |
JP2004046455A (ja) * | 2002-07-10 | 2004-02-12 | Nec Corp | 情報処理装置 |
-
2004
- 2004-12-03 US US11/002,237 patent/US7350026B2/en active Active
-
2005
- 2005-11-15 DE DE602005015811T patent/DE602005015811D1/de active Active
- 2005-11-15 ES ES05024885T patent/ES2331523T3/es active Active
- 2005-11-15 AT AT05024885T patent/ATE438895T1/de not_active IP Right Cessation
- 2005-11-15 EP EP05024885A patent/EP1667024B1/de active Active
- 2005-11-28 CN CNB2005101243266A patent/CN100361096C/zh not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
EP1667024A3 (de) | 2007-02-21 |
EP1667024A2 (de) | 2006-06-07 |
US20060123202A1 (en) | 2006-06-08 |
ES2331523T3 (es) | 2010-01-07 |
US7350026B2 (en) | 2008-03-25 |
CN1783035A (zh) | 2006-06-07 |
EP1667024B1 (de) | 2009-08-05 |
DE602005015811D1 (de) | 2009-09-17 |
CN100361096C (zh) | 2008-01-09 |
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Legal Events
Date | Code | Title | Description |
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RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |