WO2024048765A1 - Crystal, multilayer structure, element, electronic device, electronic apparatus and system - Google Patents

Crystal, multilayer structure, element, electronic device, electronic apparatus and system Download PDF

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Publication number
WO2024048765A1
WO2024048765A1 PCT/JP2023/032024 JP2023032024W WO2024048765A1 WO 2024048765 A1 WO2024048765 A1 WO 2024048765A1 JP 2023032024 W JP2023032024 W JP 2023032024W WO 2024048765 A1 WO2024048765 A1 WO 2024048765A1
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Prior art keywords
crystal
film
laminated structure
compound
metal compound
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PCT/JP2023/032024
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French (fr)
Japanese (ja)
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健 木島
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株式会社Gaianixx
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Publication of WO2024048765A1 publication Critical patent/WO2024048765A1/en

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    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/08Oxides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00Piezoelectric or electrostrictive devices
    • H10N30/01Manufacture or treatment
    • H10N30/07Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base
    • H10N30/074Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base by depositing piezoelectric or electrostrictive layers, e.g. aerosol or screen printing
    • H10N30/076Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base by depositing piezoelectric or electrostrictive layers, e.g. aerosol or screen printing by vapour phase deposition
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00Piezoelectric or electrostrictive devices
    • H10N30/01Manufacture or treatment
    • H10N30/07Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base
    • H10N30/074Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base by depositing piezoelectric or electrostrictive layers, e.g. aerosol or screen printing
    • H10N30/079Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base by depositing piezoelectric or electrostrictive layers, e.g. aerosol or screen printing using intermediate layers, e.g. for growth control
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00Piezoelectric or electrostrictive devices
    • H10N30/80Constructional details
    • H10N30/85Piezoelectric or electrostrictive active materials
    • H10N30/853Ceramic compositions

Definitions

  • the present invention relates to crystals, laminated structures, elements, electronic devices, electronic equipment, and systems.
  • An object of the present invention is to provide a crystal having excellent crystallinity, a laminated structure, and an element, electronic device, electronic equipment, and system using the same.
  • the present inventors have found that at least a compound film is formed on a crystal substrate, and then a crystalline metal compound containing a metal compound containing a compound of Hf, Zr, and Ce as a main component is formed.
  • the stacking is performed by forming the crystalline film using a compound element in the compound film, thereby producing crystals and a stacked structure having excellent crystallinity. is easy to obtain, is particularly useful for crystal growth for producing soft crystal films, and when a conductive film, a semiconductor film, and a piezoelectric film are formed on the crystal, it has excellent crystallinity and improves electrode properties and functional films.
  • this material has very excellent properties, is particularly suitable as a buffer layer for thin film formation of functional films with a film thickness of less than 1 ⁇ m, and is useful for peeling and transfer.
  • crystals and laminated structures can solve the above-mentioned conventional problems all at once. Further, after obtaining the above knowledge, the present inventors conducted further studies and completed the present invention.
  • the present invention relates to the following inventions.
  • An electronic device comprising a crystal or a laminate structure, wherein the crystal is the crystal according to any one of [1] to [8], or the laminate structure is the crystal according to any one of [9] or [8] above. 10].
  • An electronic device characterized by being the laminated structure according to item 10.
  • a method for producing a laminated structure comprising forming at least an oxide film on a crystal substrate, and then laminating a crystal film containing a crystal made of a crystalline metal compound containing a metal compound as a main component, the method comprising: .
  • a method for manufacturing a laminated structure characterized in that the method is carried out by forming the crystal film using a compound element in the compound film.
  • the metal compound contains a compound of Hf, Zr, and Ce.
  • the laminated structure according to [19] above which has a buried layer comprising: [21] Between the crystal substrate and the crystal film, an amorphous thin film containing a constituent metal of the crystal film and/or the crystal substrate, and one or more of the amorphous thin films embedded in a part of the crystal substrate; The laminated structure according to [19], further comprising a buried layer containing a constituent metal. [22] The laminated structure according to any one of [19] to [21], wherein the constituent metal contains Hf. [23] The laminated structure according to any one of [19] to [22], wherein the amorphous thin film has a thickness of 1 nm to 10 nm.
  • the crystal and the laminated structure of the present invention have excellent crystallinity, and elements, electronic devices, electronic equipment, and systems using the crystal and the laminated structure have good characteristics of their respective functional films. It has the effect of becoming a thing.
  • FIG. 1 is a diagram schematically showing an example of a preferred embodiment of a laminated structure of the present invention.
  • FIG. 3 is a diagram schematically showing an SOI island forming step in peeling and transfer, which is an example of a preferred application of the laminated structure of the present invention.
  • FIG. 3 is a diagram schematically showing an HF etching step in peeling/transfer, which is an example of a preferred application of the laminated structure of the present invention.
  • FIG. 2 is a diagram schematically showing a step of attaching the laminated structure of the present invention to a flexible substrate in peeling and transfer, which is an example of a preferred application example.
  • FIG. 2 is a diagram schematically showing a peeling process in peeling/transfer, which is an example of a preferable application of the laminated structure of the present invention. It is a figure which shows typically an example of the oxide film formation process of the suitable manufacturing method of the laminated structure of this invention.
  • FIG. 3 is a diagram schematically showing an example of an insulating film forming step of a preferred method for manufacturing a laminated structure of the present invention. The XPS analysis results in Examples are shown.
  • 1 is a diagram schematically showing a preferred example of an insulated gate bipolar transistor (IGBT) obtained in the present invention.
  • 10 is a diagram schematically showing an example of a suitable manufacturing process for the insulated gate bipolar transistor (IGBT) shown in FIG. 9.
  • FIG. 9 is a diagram schematically showing a peeling process in peeling/transfer, which is an example of a preferable application of the laminated structure of the present invention. It is a figure which shows typically an example of the oxide film formation process of the suitable manufacturing
  • FIG. 1 is a diagram schematically showing a preferred example of a power supply system.
  • FIG. 2 is a diagram schematically showing a preferred example of a system device. It is a figure which shows typically a suitable example of the power supply circuit diagram of a power supply device.
  • 1 is a diagram schematically showing a film forming apparatus suitably used in Examples. A cross-sectional STEM image measured in an example is shown. A STEM image measured in an example is shown. A STEM image of a buried layer measured in an example is shown.
  • the crystal of the present invention is a crystal made of a crystalline metal compound containing a metal compound as a main component, and is characterized in that the metal compound contains compounds of Hf, Zr, and Ce. Further, the crystal of the present invention is a crystal made of a crystalline metal compound containing a metal compound as a main component, and it is also preferable that the metal compound contains Hf and/or Zr and Ce.
  • the crystal may be a single crystal or a polycrystal.
  • the metal compound may be a known metal compound, and the metal of the metal compound may also be a known metal. Examples of the metal include D block metals in the periodic table.
  • the compound of the metal compound may also be a known compound, and examples of the compound include oxide, nitride, oxynitride, sulfide, oxysulfide, boride, oxyboride, carbide, oxycarbide, Boron carbide, boron nitride, boron sulfide, carbonitride, carbon sulfide, or carboride, etc. may be mentioned, but in the present invention, oxides or nitrides are used for stress relaxation and It is preferable because it can better reduce warpage as a buffer layer, and can also improve electrical properties (particularly at the interface between the conductive layer and the insulating layer).
  • the crystalline compound is preferably a crystalline oxide, the compound film is preferably an oxide film, and the compound element is preferably oxygen. Further, in the present invention, the crystalline compound is preferably a crystalline nitride, the compound film is preferably a nitride film, and the compound element is preferably nitrogen.
  • the crystalline metal compound is a crystalline metal oxide.
  • the crystalline metal oxide is not particularly limited as long as it contains the metal oxide as a main component, and the metal oxide is not particularly limited as long as it contains oxides of Hf, Zr, and Ce.
  • the term "main component" may be used as long as the crystal contains compounds of Hf, Zr, and Ce in an atomic ratio of 0.5 or more.
  • the atomic ratio of Hf, Zr and Ce to all metal elements in the metal compound is preferably 0.7 or more, more preferably 0.8 or more.
  • the crystalline metal compound preferably has a cubic or hexagonal crystal structure, and is more preferably (111), (100), (010) or (0001) oriented. Further, in the present invention, it is preferable that the crystalline metal compound contains a compound of Ce at 5 atomic % or more based on the crystalline metal compound, and the crystalline metal compound preferably contains a compound of Hf and a compound of Zr. It is also preferable that the compound is contained in an amount of 50 atomic % or more based on the crystalline metal compound. According to such a preferable range, it can be used not only as an excellent buffer layer but also as an insulator.
  • the crystal is in the form of a film (hereinafter also referred to as "crystal film"), and when it is in the form of a film, it is preferable that the film thickness is 1 ⁇ m or more in order to improve the breakdown voltage, etc.
  • a preferable crystal is such that when at least a compound film is formed on a crystal substrate and then a crystal film containing crystals made of a crystalline metal compound containing a metal compound as a main component is laminated, the laminated layer is This can be easily obtained by forming the crystalline film using compound elements in the film.
  • the method for forming the crystal film is not particularly limited, and may be any known method (eg, MBE method, ion plating method, etc.), and the crystal growth conditions can be set as appropriate.
  • the present invention also includes a laminated structure obtained by the above method and a method for manufacturing the same.
  • FIG. 1 shows a preferred example of the laminated structure, in which the film-like crystal is laminated as a first epitaxial layer 3 on a crystal substrate 1 using an oxide film. Further, on the first epitaxial layer 3, a conductive film, a semiconductor film, or a piezoelectric film is laminated as a second epitaxial layer 4. Note that in this specification, the terms “film” and “layer” may be interchanged depending on the case or the situation. In addition, although oxides are cited as preferred examples of the laminated structure, the present invention is not limited to these preferred examples, and the present invention is also suitable for various compounds such as nitrides. can be applied.
  • the laminated structure is produced by forming an oxide film 2 of the crystal substrate 1 on a crystal substrate 1, for example, as shown in FIG. 6, and then using oxygen in the oxide film 2, as shown in FIG. can be easily manufactured by forming a crystal film (first epitaxial layer) 3 made of the crystalline metal oxide on a crystal substrate 1.
  • the laminated structure may have the oxide film 2 on the crystal substrate 1, but when the crystal film 3 is formed, all the oxygen in the oxide film 2 is taken in and the oxide film 2 is removed. The film 2 may also disappear.
  • preferred embodiments of the present invention will be described in more detail, but the present invention is not limited to these specific examples.
  • the crystal substrate (hereinafter also simply referred to as “substrate”) is not particularly limited, such as the substrate material, as long as it does not impede the purpose of the present invention, and may be any known crystal substrate. It may be an organic compound or an inorganic compound. In the present invention, it is preferable that the crystal substrate contains an inorganic compound. In the present invention, it is preferable that the substrate has crystals on part or all of its surface, and it is preferable that the substrate has crystals on all or part of its main surface on the crystal growth side. More preferably, a crystal substrate having crystals on the entire main surface on the crystal growth side is most preferable.
  • the crystal is not particularly limited as long as it does not impede the purpose of the present invention, and the crystal structure is also not particularly limited, but may be cubic, tetragonal, trigonal, hexagonal, orthorhombic, or monoclinic. It is preferable that it is a cubic crystal, more preferably a cubic or hexagonal crystal, and most preferably (111), (100) or (0001) oriented. Further, the crystal substrate may have an off-angle, and examples of the off-angle include an off-angle of 0.2° to 12.0°. Here, the "off angle” refers to the angle between the substrate surface and the crystal growth plane.
  • the shape of the substrate is not particularly limited as long as it is plate-like and serves as a support for the insulating film.
  • the substrate is preferably a Si substrate, more preferably a crystalline Si substrate, and (111) , (100) or (0001) oriented crystalline Si substrate.
  • the substrate material include, in addition to the Si substrate, one or more metals belonging to Groups 3 to 15 of the periodic table, or oxides of these metals.
  • the shape of the substrate is not particularly limited, and may be approximately circular (for example, circular, oval, etc.) or polygonal (for example, triangular, square, rectangular, pentagonal, hexagonal, heptagonal, etc.). , octagonal, nonagonal, etc.), and various shapes can be suitably used.
  • the crystal substrate has a flat surface, but it is also preferable that the crystal substrate has an uneven shape on a part or all of the surface, which improves the quality of crystal growth of the crystal film. This is preferable because it can provide better results.
  • the above-mentioned crystal substrate having an uneven shape may be used as long as an uneven part consisting of a recess or a convex part is formed on a part or all of the surface. It is not limited, and it may be an uneven part consisting of a convex part, an uneven part consisting of a concave part, or an uneven part consisting of a convex part and a concave part.
  • the uneven portions may be formed from regular protrusions or recesses, or may be formed from irregular protrusions or recesses.
  • the uneven portions are formed periodically, and more preferably that they are patterned periodically and regularly.
  • the shape of the uneven portion is not particularly limited, and examples thereof include a stripe shape, a dot shape, a mesh shape, or a random shape, but in the present invention, a dot shape or a stripe shape is preferable, and a dot shape is more preferable. .
  • the pattern shape of the uneven portions may be a polygonal shape such as a triangle, a quadrilateral (for example, a square, a rectangle, or a trapezoid), a pentagon, or a hexagon.
  • the shape is circular or elliptical.
  • the lattice shape of the dots is a lattice shape such as a square lattice, an orthorhombic lattice, a triangular lattice, a hexagonal lattice, etc., and a triangular lattice shape is used. is more preferable.
  • the cross-sectional shape of the concave portion or convex portion of the uneven portion is not particularly limited, and includes, for example, a U-shape, a U-shape, an inverted U-shape, a wave shape, a triangle, a quadrilateral (for example, a square, a rectangle, a trapezoid, etc.). ), polygons such as pentagons and hexagons.
  • the thickness of the crystal substrate is not particularly limited, but is preferably 50 to 2000 ⁇ m, more preferably 100 to 1000 ⁇ m.
  • the compound film is not particularly limited as long as it is a compound that can incorporate a compound element into the crystal film, and may be a known compound film.
  • the compound film is an oxide film.
  • the oxide film is not particularly limited as long as it is an oxide film that can incorporate oxygen atoms into the crystal film, and usually contains an oxide material.
  • the oxidizing material is not particularly limited as long as it does not impede the object of the present invention, and may be any known oxidizing material. Examples of the oxidizing material include metal or metalloid oxides.
  • the oxide film contains the oxidizing material of the crystal substrate, and examples of such an oxide film include a thermal oxide film, a natural oxide film, and the like of the crystal substrate.
  • the oxide film may be a sacrificial layer in which part or all of the film disappears or is destroyed when oxygen atoms are taken in;
  • the oxide layer is an oxygen supply sacrificial layer in which oxygen atoms are taken in and the oxide film itself disappears during crystal growth.
  • the oxide film may be patterned, for example, in a stripe shape, a dot shape, a mesh shape, or a random shape. Note that the thickness of the oxide film is not particularly limited, but is preferably greater than 1 nm and less than 100 nm.
  • the crystal film includes an epitaxial film in which a compound element in the compound film is incorporated.
  • an epitaxial film in which the compound element in the compound film is incorporated means that the compound element in the compound film is taken away by the epitaxial film during crystal growth of the epitaxial film.
  • the crystal film contains a neutron absorbing material.
  • the neutron absorbing material may be a known neutron absorbing material, and in the present invention, such a neutron absorbing material is used to improve adhesion and crystallinity, for example, by incorporating oxygen from the oxide film. The properties of the functional film can be improved.
  • a suitable example of the neutron absorbing material is hafnium (Hf).
  • a second epitaxial layer made of a conductive film, a semiconductor film, or a piezoelectric film is laminated on the crystal film, either directly or via another layer.
  • the first epitaxial layer is regularly formed at the interface between the first epitaxial layer and the second epitaxial layer so that the lattice constant is approximately the same as the lattice constant of the second epitaxial layer. It can be transformed into.
  • a suitable example of the above-mentioned regular transformation is a transformation in which the shape deforms into a peak-to-valley structure, and in the present invention, the angles formed by adjacent apexes and bottom points of the peak-to-valley structure are Preferably, they are different, and more preferably, the angles are each within a range of 30° to 45°.
  • the first epitaxial layer usually has a first crystal plane and a second crystal plane, but due to the transformation, the lattice constant of the first crystal plane and the second crystal plane becomes Since a difference may occur, it is preferable that the difference in lattice constant between the first crystal plane and the second crystal plane is within the range of 0.1% to 20%.
  • the difference in lattice constant between the first epitaxial layer and the second epitaxial layer is 0.0.
  • a range of 1% to 20% can be easily achieved.
  • the conductive film when a conductive film is laminated on the crystal film, and when the conductive film is made of a single crystal film of a conductive metal, it is possible to easily obtain a defect-free film with a large area. Therefore, not only the function as an electrode but also the characteristics of the device etc. can be improved.
  • the conductive metal is not particularly limited as long as it does not impede the purpose of the present invention, and examples thereof include gold, silver, platinum, palladium, silver palladium, copper, nickel, and alloys thereof. preferably contains platinum.
  • the present invention it is possible to obtain as an electrode a single crystal film that is defect-free in an area of preferably 100 nm 2 or more, and more preferably defect-free in an area of 1000 nm 2 or more.
  • a single crystal film can be easily obtained.
  • a single crystal film having a thickness of preferably 100 nm or more can be easily obtained as an electrode.
  • the laminated structure is preferably used as an electrode substrate in which a crystalline conductive film is laminated on the insulating film. It can be used for.
  • the semiconductor film is not particularly limited as long as it contains a semiconductor, and may be any known semiconductor film, but in the present invention it is preferable that it contains a cubic semiconductor.
  • the cubic semiconductor include c-BN, c-AlN, c-GaN, c-InN, c-SiC, GaAs, AlAs, InAs, GaP, AlP, InP, and mixed crystal semiconductors thereof. It will be done.
  • the piezoelectric film is not particularly limited as long as it is made of a piezoelectric material, and may be a film made of a known piezoelectric material, but in the present invention, a piezoelectric film having a trigonal or hexagonal crystal structure is used. Preferably, it is a material.
  • the piezoelectric material include lead zirconate titanate (PZT), other types of ceramic materials having a so-called perovskite structure represented by ABO 3 type, such as barium titanate, lead titanate, and potassium niobate.
  • each of the conductive film, the semiconductor film, and the piezoelectric film is not particularly limited, but is preferably 10 nm to 1000 ⁇ m, more preferably 10 nm to 100 ⁇ m.
  • the laminated structure is produced in a method for manufacturing a laminated structure in which an insulating film is laminated on a crystal substrate via at least a compound film, in which the lamination is performed at a temperature of 350° C. to 700° C. to remove compound elements in the compound film.
  • This can be easily obtained by forming a crystal film using the above method.
  • the temperature is in the range of 350° C. to 700° C., the compound element in the compound film can be easily incorporated into the crystal film to cause crystal growth.
  • the crystal film is formed using oxygen gas after the lamination is performed using the compound element in the compound film.
  • a film By forming a film in this manner, a layered structure in which the crystal film is stacked on the crystal substrate, wherein the crystal film and/or the crystal substrate is provided between the crystal substrate and the crystal film. It is possible to easily obtain a laminated structure having an amorphous thin film containing the constituent metals and/or one or more buried layers containing the constituent metals embedded in a part of the crystal substrate.
  • the laminated structure has both the amorphous layer and the buried layer because the functionality of the crystalline film can be further improved.
  • the amorphous layer and the buried layer each contain a constituent metal of the crystalline film, since this results in better crystallinity of the crystalline film and the like.
  • the constituent metal contains Hf, since this further promotes stress relaxation and further enables realization of stress relaxation in multiple stages.
  • the thickness of the amorphous thin film is 1 nm to 10 nm because it can further improve the crystallinity of the crystalline film, and the amorphous thin film having such a preferable thickness is preferably used in the present invention. can be easily obtained according to a preferred manufacturing method.
  • the buried layer has a substantially inverted triangular cross-sectional shape, since this can further improve the functionality of the crystalline film.
  • these preferable laminated structures can be easily obtained by appropriately adjusting the thickness of the oxide film, the timing of introducing the oxygen gas, and the like.
  • the means for forming the insulating film is usually suitably used, and the film forming means may be any known film forming means. In the present invention, it is preferable that the film forming means is vapor deposition or sputtering.
  • the laminated structure obtained as described above can be used as an element as it is or after being further processed, if desired, according to a conventional method.
  • the laminated structure when used in the element, it may be used as it is, or it may be used as it is, or it may be used with other layers (for example, an insulator layer, a semi-insulator layer, a conductor layer, a semiconductor layer, a buffer layer, or other intermediate layer, etc.). ) etc. may be formed before use.
  • a functional film for example, a semiconductor film, a piezoelectric film, etc.
  • the above-mentioned element is used, for example, in an electronic device (preferably a piezoelectric device), etc., in accordance with a conventional method. More specifically, for example, various electronic devices can be constructed by connecting the element as a piezoelectric element to a power source or an electric/electronic circuit, mounting it on a circuit board, or packaging it.
  • the electronic device is preferably a piezoelectric device, and more preferably a piezoelectric device in electronic equipment such as a gyroscope or a motion sensor.
  • an amplifier and a rectifier circuit are connected and packaged, it can be used for various sensors such as magnetic sensors.
  • the electronic device is suitably used in electronic equipment according to a conventional method.
  • the electronic device can be applied to various electronic devices other than those described above, and more specifically includes, for example, a liquid ejection head, a liquid ejection device, a vibration wave motor, an optical device, a vibration device, an imaging device, Suitable examples include piezoelectric acoustic components and audio playback devices, audio recording devices, mobile phones, and various information terminals that include the piezoelectric acoustic components.
  • the element is a semiconductor element
  • the electronic device is a semiconductor device.
  • the semiconductor element or the semiconductor device (hereinafter also collectively referred to as a "semiconductor device") is not particularly limited as long as it does not impede the object of the present invention, and may be a known semiconductor element or semiconductor device. It may be a vertical device or a horizontal device, but in the present invention, a horizontal device is preferred.
  • Examples of the semiconductor device include a diode or a transistor (for example, a MOSFET or a JFET), and an insulated gate semiconductor device (for example, a MOSFET or an IGBT) or a semiconductor device having a Schottky gate (for example, a MESFET). etc.) are preferred, MOSFETs and/or IGBTs are more preferred, and lateral MOSFETs and/or lateral IGBTs are most preferred.
  • a diode or a transistor for example, a MOSFET or a JFET
  • an insulated gate semiconductor device for example, a MOSFET or an IGBT
  • a semiconductor device having a Schottky gate for example, a MESFET
  • FIG. 9 shows a horizontal IGBT, a horizontal NMOS, and a horizontal PMOS suitable for the present invention.
  • an insulating film 26a as the crystal film is formed on a crystal substrate 29, and respective elements are provided on the insulating film 26a.
  • the lateral IGBT in FIG. 9 includes a gate electrode 21, an emitter electrode 22, a collector electrode 23, an insulating film 26 as the crystal film, a p-type semiconductor 27, an n-type semiconductor 28, and an n - type semiconductor 28a.
  • the PMOS shown in FIG. 9 includes a gate electrode 21, a drain electrode 24, a source electrode 25, an insulating film 26, a p-type semiconductor 27, an n-type semiconductor 28, and an n - type semiconductor 28a. Further, the PMOS shown in FIG. 9 includes a gate electrode 21, a drain electrode 24, a source electrode 25, an insulating film 26, a p-type semiconductor 27, and an n - type semiconductor 28a.
  • FIG. 10 shows a preferred manufacturing process for the insulated gate bipolar transistor (IGBT) shown in FIG. 9 and the like.
  • an insulating film 26a as the crystal film is formed on a crystal substrate 29, and an n - type semiconductor (for example, a Si semiconductor) 28a is further formed on the insulating film 26a.
  • a trench is provided in the laminated structure using a known method, and the surface side of an n - type semiconductor (for example, a Si semiconductor) 28a is further oxidized using a known method.
  • FIG. 10(b) the stacked structure shown in FIG.
  • FIG. 10(a) is treated with polysilicon 31 using known means to fill the trenches with polysilicon 31, and then a polysilicon layer is formed on the oxidized surface. do.
  • FIG. 10(c) the layered structure shown in FIG. 10(b) is polished using a known method to obtain the layered structure shown in FIG. 10(c). The obtained laminated structure is subjected to various device manufacturing steps using known means.
  • the lateral IGBT, lateral NMOS, and lateral PMOS obtained in this way have element isolation using a trench isolation structure, have a small isolation area, and can directly configure an inverter with a power source rectified and smoothed from a commercial power source. It is also possible. Furthermore, a high-voltage output section and a control circuit section can be configured on the same chip, making it possible to realize an excellent power IC. In particular, since each device inside the IC is completely isolated by a dielectric material, it is possible to eliminate the influence of parasitic elements, and a highly reliable system can be realized.
  • the semiconductor device can be suitably used as a semiconductor device such as a power module, an inverter or a converter by using known means, and furthermore, the semiconductor device can be used as a semiconductor device such as a semiconductor system using a power supply device, etc. It is suitably used for.
  • the power supply device can be manufactured by connecting the semiconductor device to a wiring pattern or the like using a known method.
  • FIG. 11 shows an example of a power supply system.
  • FIG. 11 shows a power supply system using a plurality of the power supply devices and control circuits.
  • the power supply system can be used in a system device in combination with an electronic circuit, as shown in FIG.
  • FIG. 13 shows an example of a power supply circuit diagram of the power supply device.
  • Figure 13 shows the power supply circuit of the power supply device, which consists of a power circuit and a control circuit.
  • a power supply device which consists of a power circuit and a control circuit.
  • insulation and transformation are performed using a transformer.
  • rectified by rectifier MOSFETs (A to B') smoothed by DCL (smoothing coils L1, L2) and a capacitor, and outputs a DC voltage.
  • a voltage comparator compares the output voltage with a reference voltage, and a PWM control circuit controls the inverter and rectifier MOSFET so that the desired output voltage is achieved.
  • Example 1 After treating the crystal growth side of the Si substrate (100) with RIE and heating it in the presence of oxygen to form a thermal oxide film, the metal of the evaporation source and the Si A single crystal of the crystalline metal oxide was formed on the Si substrate by causing a thermal reaction with oxygen in the oxide film on the substrate. Then, by flowing oxygen, lowering the temperature, and increasing the pressure, a single crystal film of a crystalline metal oxide was formed by a vapor deposition method. The conditions of the vapor deposition method during this film formation were as follows. Vapor deposition source: Hf, Zr, Ce Voltage: 3.5-4.75V Pressure: 3 ⁇ 10-2 to 6 ⁇ 10-2 Pa Substrate temperature: 350-700°C
  • the obtained laminated structure was a laminated structure containing a crystal film having good adhesion and crystallinity. Further, when the obtained crystal film was examined using an X-ray diffraction device, it was found to be (Hf, Zr, Ce)O 2 . In addition, the crystals of the crystal substrate of the laminated structure, the single crystal film of the crystalline metal oxide, and the conductive film were measured using an X-ray diffraction apparatus. FIG. 11 shows the XPS measurement results. As is clear from FIG. 11, a (Hf, Zr)O 2 film and a Pt single crystal film having good crystallinity were formed on the Si crystal substrate.
  • Example 2 A laminated structure was obtained in the same manner as in Example 1 except that a Si substrate was used instead of (111).
  • the obtained laminated structure was a laminated structure including a crystal film having good adhesion and crystallinity, as in Example 1, and the crystal film was an insulator.
  • Al 2 O 3 and AlN were formed on the crystal film and the obtained crystal film was examined using an X-ray diffraction device, it was found that Al 2 O 3 and AlN were formed on the (Hf, Zr, Ce) O 2 .
  • the O 3 and AlN films were each well formed.
  • the XPS analysis results are shown in FIG.
  • the vapor deposition film forming apparatus used in Example 1 is shown in FIG.
  • the film forming apparatus of FIG. 14 includes metal sources 101a to 101b, earths 102a to 102h, ICP electrodes 103a to 103b, cut filters 104a to 104b, DC power supplies 105a to 105b, RF power supplies 106a to 106b, lamps 107a to 107b, It includes at least an Ar source 108, a reactive gas source 109, a power source 110, a substrate holder 111, a substrate 112, a cut filter 113, an ICP ring 114, a vacuum chamber 115, and a rotating shaft 116.
  • the ICP electrodes 103a to 103b in FIG. 14 have a substantially concave curved shape or a parabolic shape curved toward the center of the substrate 112.
  • the substrate 112 is locked onto the substrate holder 111.
  • the rotating shaft 116 is rotated using the power source 110 and a rotating mechanism (not shown), and the substrate 112 is rotated.
  • the substrate 112 is heated by lamps 107a to 107b, and the inside of the vacuum chamber 115 is evacuated to a vacuum or reduced pressure by a vacuum pump (not shown).
  • Ar gas is introduced into the vacuum chamber 115 from the Ar source 108, and the substrate is The surface of the substrate 112 is cleaned by forming argon plasma on the substrate 112 .
  • Ar gas is introduced into the vacuum chamber 115, and a reactive gas is also introduced using the reactive gas source 109.
  • the lamps 107a to 107b which are lamp heaters, are alternately turned on and off to form a crystal growth film of better quality.
  • a STEM analysis was performed on the laminated structure obtained in the same manner as in Example 1.
  • a buried layer was formed between the crystal substrate and the crystal film, and an amorphous layer (two layers) was further formed. Further, both the first amorphous layer and the second amorphous layer on the crystal substrate contained Si of the crystal substrate and a constituent metal of the crystal film.
  • FIGS. 15 to 17 the results of STEM analysis of a laminated structure containing HfZrO mixed crystal produced in the same manner as in Example 1 are shown in FIGS. 15 to 17. It can be seen from FIG. 15 that a buried layer 1004 is formed between the crystal substrate 1011 and the epitaxial layer 1001, and furthermore, amorphous layers 1002 and 1003 are formed. Further, from FIG.
  • the first amorphous layer 1002 on the crystal substrate 1011 contains Si of the crystal substrate and Zr which is a constituent metal of the epitaxial layer 1001. It can also be seen that the second amorphous layer contains Si of the crystal substrate and Hf and Zr, which are the constituent metals of the epitaxial layer 1001. Further, from FIG. 17, it can be seen that the buried layer 1004 has a substantially inverted triangular cross-sectional shape and is an oxide containing Hf and Si.
  • FIG. 1 is a diagram showing a preferred example of the laminated structure of the present invention.
  • an insulating film 3 is formed on a crystal substrate 1, and a semiconductor layer is further formed as a second epitaxial layer 4 on the insulating film 3.
  • FIG. 2 shows a laminated structure obtained in the SOI island forming step in the peeling and transfer.
  • the SOI island forming step the stacked structure shown in FIG. 1 is used as an SOI substrate, and photolithography is performed to partially remove the semiconductor layer (second epitaxial layer) 4. By doing so, the laminated structure shown in FIG. 2 is obtained.
  • the second epitaxial layer is separated into two islands, and the first island 4a and the second island 4b of the second epitaxial layer are formed on the insulating film 3. There is.
  • FIG. 3 shows a laminated structure obtained in the HF etching process in the peeling/transferring process.
  • the BOX layer is etched using HF using the stacked structure shown in FIG. 2, and is left in a pillar shape.
  • the insulating film has a pillar shape, and the first pillar 3a and the second pillar 3b of the insulating film (first epitaxial layer) are formed on the crystal substrate 1, respectively. There is.
  • the adhesion between the crystal substrate and the insulating film is high, and stress relaxation such as normal transformation is observed at the interface between the insulating film and the second epitaxial layer, so it is easy to peel off, for example,
  • the HF etching process is not essential and can be omitted.
  • FIG. 4 shows a laminated structure obtained in the step of attaching to a flexible substrate in the peeling/transferring process.
  • the surface of the SOI layer and a flexible substrate 5 such as PE (polyethylene) are closely pasted using the laminated structure shown in FIG. 3 .
  • FIG. 5 shows a laminated structure obtained in the peeling step in peeling/transfer.
  • the SOI layer is peeled and transferred onto the flexible substrate.
  • the crystal and laminated structure of the present invention are useful for elements, electronic devices, electronic equipment, and systems, and are particularly suitable for use as SOI substrates.

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Abstract

[Problem] The present invention provides: a crystal which has excellent crystallinity; a multilayer structure; and an element, an electronic device, an electronic apparatus and a system, each of which uses the crystal and the multilayer structure. [Solution] When a multilayer structure is produced by forming at least a compound film on a crystal substrate and subsequently superposing a crystal film, which contains a crystal that is formed of a crystalline metal compound that contains, as a main component, a metal compound containing a compound of Hf, Zr and Ce, on the compound film, the superposition is carried out by forming the crystal film using the compound elements in the compound film.

Description

結晶、積層構造体、素子、電子デバイス、電子機器及びシステムCrystals, laminated structures, elements, electronic devices, electronic equipment and systems
 本発明は、結晶、積層構造体、素子、電子デバイス、電子機器及びシステムに関する。 The present invention relates to crystals, laminated structures, elements, electronic devices, electronic equipment, and systems.
 従来より、PN分離で発生していた横方向や縦方向の寄生素子によるICの誤動作や破壊を防止する目的で、それぞれの素子間の分離を、SiO膜を用いて行うSOI(Silicon On Insulator)技術が知られており、近年においては、耐圧の異なる複数の半導体素子を単一の半導体基板に形成するもの等も検討されており、特に、ワイドバンドギャップ半導体(例えばSiCやGaN等)への適用も検討されている(特許文献1)。 Conventionally, SOI (Silicon On Insulator), which uses a SiO 2 film to isolate each element, has been used to prevent IC malfunctions and destruction caused by parasitic elements in the horizontal and vertical directions that occur with PN isolation. ) technology is known, and in recent years, methods for forming multiple semiconductor elements with different breakdown voltages on a single semiconductor substrate are also being considered. The application of is also being considered (Patent Document 1).
 また、SOI技術を用いて、プラスチック等のフレキシブル基板上にデバイスを形成する試みがなされている。例えば、特許文献2に開示されているように、完成したSOI基板を用いてSOI層に部分的に窓開けを行い、BOX(Buried Oxide)層を露出させたのち、HFエッチングを行って、HFが横方向に染み込むことでBOXがエッチングされピラー(柱)を形成する方法がある。ピラー形成後に、SOI層をPET(ポリエチレンテレフタレート)などに貼り付け、ピラー部を境にして基板から剥離し、SOI層をPETなどの上に形成することでフレキシブル基板上にデバイスが作製されたSOI層を転写する方法がある。 Additionally, attempts have been made to form devices on flexible substrates such as plastic using SOI technology. For example, as disclosed in Patent Document 2, using a completed SOI substrate, a window is partially opened in the SOI layer to expose the BOX (Buried Oxide) layer, and then HF etching is performed to There is a method in which the BOX is etched by penetrating in the horizontal direction to form pillars. After pillar formation, the SOI layer is attached to PET (polyethylene terephthalate), etc., and the SOI layer is peeled from the substrate along the pillar, and the SOI layer is formed on the PET, etc. to fabricate a device on a flexible substrate.SOI There is a method of transferring layers.
 しかしながら、いずれのSOI技術も絶縁膜上に形成される半導体膜の結晶性や絶縁膜の結晶性や絶縁特性等にまだまだ満足のいくものではなく、さらなる結晶性の向上や半導体特性の向上が待ち望まれていた。また、バッファ層として、半導体だけでなく、圧電体等にも良好な結晶性をもたらすようなSOI技術も望まれてきており、さらには、SOI層を剥離転写する場合に、工程が煩雑になったり、剥離が困難であったりするので、容易に剥離したり、転写したりできるような新規SOI技術も待ち望まれていた。 However, none of the SOI technologies is still satisfactory in terms of the crystallinity of the semiconductor film formed on the insulating film, the crystallinity of the insulating film, the insulation properties, etc., and further improvements in crystallinity and semiconductor properties are awaited. It was. In addition, there is a growing demand for SOI technology that can provide good crystallinity not only for semiconductors but also for piezoelectric materials, etc. as a buffer layer, and furthermore, when peeling and transferring an SOI layer, the process becomes complicated. Therefore, there has been a long-awaited new SOI technology that can be easily peeled off or transferred.
特開2021-5718号公報JP 2021-5718 Publication 特開2014-179580号公報Japanese Patent Application Publication No. 2014-179580
 本発明は、優れた結晶性を有する結晶、積層構造体及びこれらを用いてなる素子、電子デバイス、電子機器及びシステムを提供することを目的とする。 An object of the present invention is to provide a crystal having excellent crystallinity, a laminated structure, and an element, electronic device, electronic equipment, and system using the same.
 本発明者らは、上記目的を達成すべく鋭意検討した結果、結晶基板上に少なくとも化合物膜を形成し、ついでHf、Zr及びCeの化合物を含む金属化合物を主成分として含む結晶性金属化合物からなる結晶を含む結晶膜を積層する際に、前記の積層を、前記化合物膜中の化合物元素を用いて前記結晶膜を形成することにより行うことで、優れた結晶性を有する結晶及び積層構造体が容易に得られること、柔らかい結晶膜作製のための結晶成長に特に有用であること、前記結晶上に導電膜や半導体膜、それに圧電体膜を形成すると結晶性に優れ、電極特性や機能膜の各種特性に非常に優れたものとなること、膜厚1μm未満の機能膜の薄膜形成用のバッファ層として特に適していること、剥離・転写にも有用であること等を種々知見し、このような結晶及び積層構造体が、上記した従来の問題を一挙に解決できるものであることを見出した。
 また、本発明者らは、上記知見を得た後、さらに検討を重ねて、本発明を完成させるに至った。
As a result of intensive studies to achieve the above object, the present inventors have found that at least a compound film is formed on a crystal substrate, and then a crystalline metal compound containing a metal compound containing a compound of Hf, Zr, and Ce as a main component is formed. When stacking a crystalline film including a crystal, the stacking is performed by forming the crystalline film using a compound element in the compound film, thereby producing crystals and a stacked structure having excellent crystallinity. is easy to obtain, is particularly useful for crystal growth for producing soft crystal films, and when a conductive film, a semiconductor film, and a piezoelectric film are formed on the crystal, it has excellent crystallinity and improves electrode properties and functional films. We have found that this material has very excellent properties, is particularly suitable as a buffer layer for thin film formation of functional films with a film thickness of less than 1 μm, and is useful for peeling and transfer. We have discovered that such crystals and laminated structures can solve the above-mentioned conventional problems all at once.
Further, after obtaining the above knowledge, the present inventors conducted further studies and completed the present invention.
 すなわち、本発明は、以下の発明に関する。
[1] 金属化合物を主成分として含む結晶性金属化合物からなる結晶であって、前記金属化合物がHf、Zr及びCeの化合物を含むことを特徴とする結晶。
[2] 前記結晶性金属化合物が立方晶又は六方晶の結晶構造を有する前記[1]記載の結晶。
 
[3] 前記結晶性金属化合物が(111)、(100)、(010)又は(0001)配向している前記[2]記載の結晶。
[4] 前記結晶性金属化合物が、Ceの化合物を前記結晶性金属化合物に対し、5原子%以上含む前記[1]~[3]のいずれかに記載の結晶。
[5] 前記結晶性金属化合物が、Hfの化合物及びZrの化合物を前記結晶性金属化合物に対し、50原子%以上含む前記[1]~[4]のいずれかに記載の結晶。
[6] 絶縁体である前記[1]~[5]のいずれかに記載の結晶。
[7] 膜状である前記[1]~[6]のいずれかに記載の結晶。
[8] 膜厚が1μm以上である前記[7]記載の結晶。
[9] 結晶基板上に直接又は他の層を介して、結晶膜が積層されている積層構造体であって、前記結晶膜が、前記[1]~[8]のいずれかに記載の結晶からなることを特徴とする積層構造体。
[10] 前記結晶膜がバッファ層の一部又は全部を構成しており、結晶成長用基板である前記[9]記載の積層構造体。
[11] 結晶又は積層構造体を含む素子であって、前記結晶が前記[1]~[8]のいずれかに記載の結晶であるか、又は前記積層構造体が前記[9]又は[10]に記載の積層構造体であることを特徴とする素子。
[12] 圧電素子又は半導体素子である前記[11]記載の素子。
[13] 結晶又は積層構造体を含む電子デバイスであって、前記結晶が前記[1]~[8]のいずれかに記載の結晶であるか、又は前記積層構造体が前記[9]又は[10]に記載の積層構造体であることを特徴とする電子デバイス。
[14] 圧電デバイス又は半導体デバイスである前記[13]記載の電子デバイス。
[15] 電子デバイスを含む電子機器であって、前記電子デバイスが、前記[13]又は[14]に記載の電子デバイスであることを特徴とする電子機器。
[16] 電子機器を含むシステムであって、前記電子機器が、前記[15]記載の電子機器であることを特徴とするシステム。
[17] 結晶基板上に少なくとも酸化膜を形成し、ついで金属化合物を主成分として含む結晶性金属化合物からなる結晶を含む結晶膜を積層する積層構造体の製造方法であって、前記の積層を、前記化合物膜中の化合物元素を用いて前記結晶膜を形成することにより行うことを特徴とする積層構造体の製造方法。
[18] 前記金属化合物がHf、Zr及びCeの化合物を含む前記[17]記載の製造方法。
[19] 前記結晶基板と前記結晶膜との間に、前記結晶膜及び/又は前記結晶基板の構成金属を含むアモルファス薄膜及び/又は前記結晶基板の一部に1又は2以上埋め込まれており且つ前記構成金属を含む埋込層を有している前記[9]記載の積層構造体。
[20] 前記結晶基板と前記結晶膜との間に、前記結晶膜の構成金属を含むアモルファス薄膜及び/又は前記結晶基板の一部に1又は2以上埋め込まれており且つ前記結晶膜の構成金属を含む埋込層を有している前記[19]記載の積層構造体。
[21] 前記結晶基板と前記結晶膜との間に、前記結晶膜及び/又は前記結晶基板の構成金属を含むアモルファス薄膜と、前記結晶基板の一部に1又は2以上埋め込まれており且つ前記構成金属を含む埋込層とを有している前記[19]記載の積層構造体。
[22] 前記構成金属がHfを含む前記[19]~[21]のいずれかに記載の積層構造体。
[23] 前記アモルファス薄膜の膜厚が1nm~10nmである前記[19]~[22]のいずれかに記載の積層構造体。
[24] 前記埋込層の形状が略逆三角形の断面形状を有する前記[19]~[23]のいずれかに記載の積層構造体。
[25] 積層構造体を含む電子デバイス、電子機器又はシステムであって、前記積層構造体が、前記[19]~[24]のいずれかに記載の積層構造体であることを特徴とする電子デバイス、電子機器又はシステム。
[26] 金属化合物を主成分として含む結晶性金属化合物からなる結晶であって、前記金属化合物がHf及び/又はZrとCeとを含むことを特徴とする結晶。
That is, the present invention relates to the following inventions.
[1] A crystal made of a crystalline metal compound containing a metal compound as a main component, wherein the metal compound contains a compound of Hf, Zr, and Ce.
[2] The crystal according to [1] above, wherein the crystalline metal compound has a cubic or hexagonal crystal structure.

[3] The crystal according to [2] above, wherein the crystalline metal compound has a (111), (100), (010) or (0001) orientation.
[4] The crystal according to any one of [1] to [3], wherein the crystalline metal compound contains a Ce compound in an amount of 5 atomic % or more based on the crystalline metal compound.
[5] The crystal according to any one of [1] to [4], wherein the crystalline metal compound contains an Hf compound and a Zr compound in an amount of 50 atomic % or more based on the crystalline metal compound.
[6] The crystal according to any one of [1] to [5] above, which is an insulator.
[7] The crystal according to any one of [1] to [6] above, which is in the form of a film.
[8] The crystal according to [7] above, which has a film thickness of 1 μm or more.
[9] A laminated structure in which a crystal film is laminated directly or through another layer on a crystal substrate, wherein the crystal film is made of the crystal according to any one of [1] to [8] above. A laminated structure characterized by comprising:
[10] The laminated structure according to [9], wherein the crystal film constitutes part or all of a buffer layer, and is a substrate for crystal growth.
[11] An element comprising a crystal or a laminated structure, wherein the crystal is the crystal according to any one of [1] to [8], or the laminated structure is the crystal according to any one of [9] or [10] above. ] An element characterized by being the laminated structure according to.
[12] The element according to [11], which is a piezoelectric element or a semiconductor element.
[13] An electronic device comprising a crystal or a laminate structure, wherein the crystal is the crystal according to any one of [1] to [8], or the laminate structure is the crystal according to any one of [9] or [8] above. 10]. An electronic device characterized by being the laminated structure according to item 10.
[14] The electronic device according to [13], which is a piezoelectric device or a semiconductor device.
[15] An electronic device including an electronic device, wherein the electronic device is the electronic device according to [13] or [14].
[16] A system including an electronic device, wherein the electronic device is the electronic device described in [15] above.
[17] A method for producing a laminated structure comprising forming at least an oxide film on a crystal substrate, and then laminating a crystal film containing a crystal made of a crystalline metal compound containing a metal compound as a main component, the method comprising: . A method for manufacturing a laminated structure, characterized in that the method is carried out by forming the crystal film using a compound element in the compound film.
[18] The manufacturing method according to [17], wherein the metal compound contains a compound of Hf, Zr, and Ce.
[19] Between the crystal substrate and the crystal film, one or more are embedded in a part of the crystal film and/or an amorphous thin film containing a constituent metal of the crystal substrate and/or a part of the crystal substrate, and The laminated structure according to [9] above, which has a buried layer containing the constituent metal.
[20] Between the crystal substrate and the crystal film, an amorphous thin film containing a constituent metal of the crystal film and/or one or more amorphous thin films embedded in a part of the crystal substrate and containing a constituent metal of the crystal film. The laminated structure according to [19] above, which has a buried layer comprising:
[21] Between the crystal substrate and the crystal film, an amorphous thin film containing a constituent metal of the crystal film and/or the crystal substrate, and one or more of the amorphous thin films embedded in a part of the crystal substrate; The laminated structure according to [19], further comprising a buried layer containing a constituent metal.
[22] The laminated structure according to any one of [19] to [21], wherein the constituent metal contains Hf.
[23] The laminated structure according to any one of [19] to [22], wherein the amorphous thin film has a thickness of 1 nm to 10 nm.
[24] The laminated structure according to any one of [19] to [23], wherein the embedded layer has a substantially inverted triangular cross-sectional shape.
[25] An electronic device, electronic device, or system including a laminated structure, wherein the laminated structure is the laminated structure according to any one of [19] to [24] above. device, electronic equipment or system.
[26] A crystal made of a crystalline metal compound containing a metal compound as a main component, characterized in that the metal compound contains Hf and/or Zr and Ce.
 本発明の結晶及び積層構造体は、優れた結晶性を有しており、前記結晶及び前記積層構造体を用いてなる素子、電子デバイス、電子機器及びシステムはそれぞれの機能膜の特性を良好なものとするという効果を奏する。 The crystal and the laminated structure of the present invention have excellent crystallinity, and elements, electronic devices, electronic equipment, and systems using the crystal and the laminated structure have good characteristics of their respective functional films. It has the effect of becoming a thing.
本発明の積層構造体の好適な実施態様の一例を模式的に示す図である。1 is a diagram schematically showing an example of a preferred embodiment of a laminated structure of the present invention. 本発明の積層構造体の好適な適用例の一例である剥離・転写におけるSOI島形成工程を模式的に示す図である。FIG. 3 is a diagram schematically showing an SOI island forming step in peeling and transfer, which is an example of a preferred application of the laminated structure of the present invention. 本発明の積層構造体の好適な適用例の一例である剥離・転写におけるHFエッチング工程を模式的に示す図である。FIG. 3 is a diagram schematically showing an HF etching step in peeling/transfer, which is an example of a preferred application of the laminated structure of the present invention. 本発明の積層構造体の好適な適用例の一例である剥離・転写におけるフレキシブル基板への貼付工程を模式的に示す図である。FIG. 2 is a diagram schematically showing a step of attaching the laminated structure of the present invention to a flexible substrate in peeling and transfer, which is an example of a preferred application example. 本発明の積層構造体の好適な適用例の一例である剥離・転写における剥離工程を模式的に示す図である。FIG. 2 is a diagram schematically showing a peeling process in peeling/transfer, which is an example of a preferable application of the laminated structure of the present invention. 本発明の積層構造体の好適な製造方法の酸化膜形成工程の一例を模式的に示す図である。It is a figure which shows typically an example of the oxide film formation process of the suitable manufacturing method of the laminated structure of this invention. 本発明の積層構造体の好適な製造方法の絶縁膜形成工程の一例を模式的に示す図である。FIG. 3 is a diagram schematically showing an example of an insulating film forming step of a preferred method for manufacturing a laminated structure of the present invention. 実施例におけるXPS分析結果を示す。The XPS analysis results in Examples are shown. 本発明において得られる絶縁ゲート型バイポーラトランジスタ(IGBT)の好適な一例を模式的に示す図である。1 is a diagram schematically showing a preferred example of an insulated gate bipolar transistor (IGBT) obtained in the present invention. 図9の絶縁ゲート型バイポーラトランジスタ(IGBT)の好適な製造工程の一例を模式的に示す図である。10 is a diagram schematically showing an example of a suitable manufacturing process for the insulated gate bipolar transistor (IGBT) shown in FIG. 9. FIG. 電源システムの好適な一例を模式的に示す図である。1 is a diagram schematically showing a preferred example of a power supply system. システム装置の好適な一例を模式的に示す図である。FIG. 2 is a diagram schematically showing a preferred example of a system device. 電源装置の電源回路図の好適な一例を模式的に示す図である。It is a figure which shows typically a suitable example of the power supply circuit diagram of a power supply device. 実施例において好適に用いられる成膜装置を模式的に示す図である。1 is a diagram schematically showing a film forming apparatus suitably used in Examples. 実施例で測定された断面STEM像を示す。A cross-sectional STEM image measured in an example is shown. 実施例で測定されたSTEM像を示す。A STEM image measured in an example is shown. 実施例で測定された埋込層のSTEM像を示す。A STEM image of a buried layer measured in an example is shown.
 本発明の結晶は、金属化合物を主成分として含む結晶性金属化合物からなる結晶であって、前記金属化合物がHf、Zr及びCeの化合物を含むことを特長とする。また、本発明の結晶は、金属化合物を主成分として含む結晶性金属化合物からなる結晶であって、前記金属化合物がHf及び/又はZrとCeとを含むのも好ましい。前記結晶は、単結晶であってもよいし、多結晶であってもよい。前記金属化合物は、公知の金属化合物であってよく、前記金属化合物の金属も公知の金属であってよい。前記金属としては、周期律表のDブロック金属などが挙げられる。前記金属化合物の化合物も、公知の化合物であってよく、前記化合物としては、例えば、酸化物、窒化物、酸窒化物、硫化物、オキシ硫化物、ホウ化物、オキシホウ化物、炭化物、オキシ炭化物、ホウ炭化物、ホウ窒化物、ホウ硫化物、炭窒化物、炭硫化物又は炭ホウ化物等が挙げられるが、本発明においては、酸化物又は窒化物であるのが、例えばヘテロエピタキシャル成長における応力緩和及び反り低減をバッファ層としてより優れたものとすることができ、さらに電気特性(特に導電体層と絶縁層との界面)をより優れたものとすることができるので好ましい。本発明においては、前記結晶性化合物が結晶性酸化物であるのが好ましく、前記化合物膜が酸化膜であるのが好ましく、前記化合物元素が酸素であるのが好ましい。また、本発明においては、前記結晶性化合物が結晶性窒化物であるのが好ましく、前記化合物膜が窒化膜であるのが好ましく、前記化合物元素が窒素であるのが好ましい。 The crystal of the present invention is a crystal made of a crystalline metal compound containing a metal compound as a main component, and is characterized in that the metal compound contains compounds of Hf, Zr, and Ce. Further, the crystal of the present invention is a crystal made of a crystalline metal compound containing a metal compound as a main component, and it is also preferable that the metal compound contains Hf and/or Zr and Ce. The crystal may be a single crystal or a polycrystal. The metal compound may be a known metal compound, and the metal of the metal compound may also be a known metal. Examples of the metal include D block metals in the periodic table. The compound of the metal compound may also be a known compound, and examples of the compound include oxide, nitride, oxynitride, sulfide, oxysulfide, boride, oxyboride, carbide, oxycarbide, Boron carbide, boron nitride, boron sulfide, carbonitride, carbon sulfide, or carboride, etc. may be mentioned, but in the present invention, oxides or nitrides are used for stress relaxation and It is preferable because it can better reduce warpage as a buffer layer, and can also improve electrical properties (particularly at the interface between the conductive layer and the insulating layer). In the present invention, the crystalline compound is preferably a crystalline oxide, the compound film is preferably an oxide film, and the compound element is preferably oxygen. Further, in the present invention, the crystalline compound is preferably a crystalline nitride, the compound film is preferably a nitride film, and the compound element is preferably nitrogen.
 本発明においては、前記結晶性金属化合物が結晶性金属酸化物であるのが好ましい。前記結晶性金属酸化物は、前記金属酸化物を主成分として含むものであれば特に限定されず、前記金属酸化物は、Hf、Zr及びCeの酸化物を含むものであれば特に限定されない。なお、「主成分」とは、前記結晶中の金属化合物の原子比が0.5以上の割合でHf、Zr及びCeの化合物が含まれていればそれでよい。本発明においては、前記金属化合物中の全ての金属元素に対するHf、Zr及びCeの原子比が0.7以上であることが好ましく、0.8以上であるのがより好ましい。 In the present invention, it is preferable that the crystalline metal compound is a crystalline metal oxide. The crystalline metal oxide is not particularly limited as long as it contains the metal oxide as a main component, and the metal oxide is not particularly limited as long as it contains oxides of Hf, Zr, and Ce. Note that the term "main component" may be used as long as the crystal contains compounds of Hf, Zr, and Ce in an atomic ratio of 0.5 or more. In the present invention, the atomic ratio of Hf, Zr and Ce to all metal elements in the metal compound is preferably 0.7 or more, more preferably 0.8 or more.
 本発明においては、前記結晶性金属化合物が立方晶又は六方晶の結晶構造を有するのが好ましく、(111)、(100)、(010)又は(0001)配向しているのがより好ましい。また、本発明においては、前記結晶性金属化合物が、Ceの化合物を前記結晶性金属化合物に対し、5原子%以上含むのが好ましく、また、前記結晶性金属化合物が、Hfの化合物及びZrの化合物を前記結晶性金属化合物に対し、50原子%以上含むのも好ましい。このような好ましい範囲によれば、優れたバッファ層として用いることができるのみならず、絶縁体として良好な特性をも発揮することができる。 In the present invention, the crystalline metal compound preferably has a cubic or hexagonal crystal structure, and is more preferably (111), (100), (010) or (0001) oriented. Further, in the present invention, it is preferable that the crystalline metal compound contains a compound of Ce at 5 atomic % or more based on the crystalline metal compound, and the crystalline metal compound preferably contains a compound of Hf and a compound of Zr. It is also preferable that the compound is contained in an amount of 50 atomic % or more based on the crystalline metal compound. According to such a preferable range, it can be used not only as an excellent buffer layer but also as an insulator.
 なお、本発明においては、前記結晶が膜状(以下、「結晶膜」ともいう。)であるのが好ましく、膜状である場合には、かかる膜厚が1μm以上であるのが耐圧等の観点から好ましい。このような好ましい結晶は、結晶基板上に少なくとも化合物膜を形成し、ついで金属化合物を主成分として含む結晶性金属化合物からなる結晶を含む結晶膜を積層する際に、前記の積層を、前記化合物膜中の化合物元素を用いて前記結晶膜を形成することにより行うことにより、容易に得ることができる。前記の結晶膜の形成手段等は、特に限定されず、公知の手段(例えばMBE法、イオンプレーティング法等)であってよく、結晶成長条件等も適宜設定することができる。なお、前記の方法により得られる積層構造体及びその製造方法も本発明に包含される。 In addition, in the present invention, it is preferable that the crystal is in the form of a film (hereinafter also referred to as "crystal film"), and when it is in the form of a film, it is preferable that the film thickness is 1 μm or more in order to improve the breakdown voltage, etc. Preferable from this point of view. Such a preferable crystal is such that when at least a compound film is formed on a crystal substrate and then a crystal film containing crystals made of a crystalline metal compound containing a metal compound as a main component is laminated, the laminated layer is This can be easily obtained by forming the crystalline film using compound elements in the film. The method for forming the crystal film is not particularly limited, and may be any known method (eg, MBE method, ion plating method, etc.), and the crystal growth conditions can be set as appropriate. Note that the present invention also includes a laminated structure obtained by the above method and a method for manufacturing the same.
 図1は、前記積層構造体の好適な例を示しており、図1の積層構造体は、結晶基板1上に酸化膜を用いて第1のエピタキシャル層3として膜状の前記結晶が積層されており、さらに第1のエピタキシャル層3の上に第2のエピタキシャル層4として導電膜、半導体膜又は圧電体膜が積層されている。なお、本明細書中、「膜」及び「層」の各用語は、それぞれ場合によって、又は状況に応じて、互いに入れ替えてもよい。また、前記積層構造体の好適な例として、酸化物の例を挙げているが、本発明は、これら好適な例に限定されるものではなく、窒化物等の各種化合物においても好適に本発明を適用することができる。 FIG. 1 shows a preferred example of the laminated structure, in which the film-like crystal is laminated as a first epitaxial layer 3 on a crystal substrate 1 using an oxide film. Further, on the first epitaxial layer 3, a conductive film, a semiconductor film, or a piezoelectric film is laminated as a second epitaxial layer 4. Note that in this specification, the terms "film" and "layer" may be interchanged depending on the case or the situation. In addition, although oxides are cited as preferred examples of the laminated structure, the present invention is not limited to these preferred examples, and the present invention is also suitable for various compounds such as nitrides. can be applied.
 前記積層構造体は、例えば図6に示すように、結晶基板1上に、前記結晶基板1の酸化膜2を形成し、ついで前記酸化膜2中の酸素を用いて、図7に示すように、結晶基板1上に前記結晶性金属酸化物からなる結晶膜(第1のエピタキシャル層)3を形成することにより容易に製造することができる。本発明においては、前記積層構造体が、前記結晶基板1上に前記酸化膜2を有していてもよいが、前記結晶膜3形成時に前記酸化膜2中の酸素が全て取り込まれて前記酸化膜2が消失していてもよい。以下、本発明の好適な実施態様について、より具体的に説明するが、本発明は、これら具体例に限定されるものではない。 The laminated structure is produced by forming an oxide film 2 of the crystal substrate 1 on a crystal substrate 1, for example, as shown in FIG. 6, and then using oxygen in the oxide film 2, as shown in FIG. can be easily manufactured by forming a crystal film (first epitaxial layer) 3 made of the crystalline metal oxide on a crystal substrate 1. In the present invention, the laminated structure may have the oxide film 2 on the crystal substrate 1, but when the crystal film 3 is formed, all the oxygen in the oxide film 2 is taken in and the oxide film 2 is removed. The film 2 may also disappear. Hereinafter, preferred embodiments of the present invention will be described in more detail, but the present invention is not limited to these specific examples.
 前記結晶基板(以下、単に「基板」ともいう)は、基板材料等、本発明の目的を阻害しない限り特に限定されず、公知の結晶基板であってよい。有機化合物であってもよいし、無機化合物であってもよい。本発明においては、前記結晶基板が無機化合物を含んでいるのが好ましい。本発明においては、前記基板が、表面の一部または全部に結晶を有するものであるのが好ましく、結晶成長側の主面の全部または一部に結晶を有している結晶基板であるのがより好ましく、結晶成長側の主面の全部に結晶を有している結晶基板であるのが最も好ましい。前記結晶は、本発明の目的を阻害しない限り特に限定されず、結晶構造等も特に限定されないが、立方晶系、正方晶系、三方晶系、六方晶系、斜方晶系又は単斜晶系の結晶であるのが好ましく、立方晶又は六方晶であるのがより好ましく、(111)、(100)又は(0001)配向しているのが最も好ましい。また、前記結晶基板は、オフ角を有していてもよく、前記オフ角としては、例えば、0.2°~12.0°のオフ角などが挙げられる。ここで、「オフ角」とは、基板表面と結晶成長面とのなす角度をいう。前記基板形状は、板状であって、前記絶縁膜の支持体となるものであれば特に限定されない。絶縁体基板であってもよいし、半導体基板であってもよいが、本発明においては、前記基板が、Si基板であるのが好ましく、結晶性Si基板であるのがより好ましく、(111)、(100)又は(0001)配向している結晶性Si基板であるのが最も好ましい。なお、前記基板材料としては、例えば、Si基板の他に周期律表第3族~第15族に属する1種若しくは2種以上の金属又はこれらの金属の酸化物等が挙げられる。前記基板の形状は、特に限定されず、略円形状(例えば、円形、楕円形など)であってもよいし、多角形状(例えば、3角形、正方形、長方形、5角形、6角形、7角形、8角形、9角形など)であってもよく、様々な形状を好適に用いることができる。 The crystal substrate (hereinafter also simply referred to as "substrate") is not particularly limited, such as the substrate material, as long as it does not impede the purpose of the present invention, and may be any known crystal substrate. It may be an organic compound or an inorganic compound. In the present invention, it is preferable that the crystal substrate contains an inorganic compound. In the present invention, it is preferable that the substrate has crystals on part or all of its surface, and it is preferable that the substrate has crystals on all or part of its main surface on the crystal growth side. More preferably, a crystal substrate having crystals on the entire main surface on the crystal growth side is most preferable. The crystal is not particularly limited as long as it does not impede the purpose of the present invention, and the crystal structure is also not particularly limited, but may be cubic, tetragonal, trigonal, hexagonal, orthorhombic, or monoclinic. It is preferable that it is a cubic crystal, more preferably a cubic or hexagonal crystal, and most preferably (111), (100) or (0001) oriented. Further, the crystal substrate may have an off-angle, and examples of the off-angle include an off-angle of 0.2° to 12.0°. Here, the "off angle" refers to the angle between the substrate surface and the crystal growth plane. The shape of the substrate is not particularly limited as long as it is plate-like and serves as a support for the insulating film. Although it may be an insulating substrate or a semiconductor substrate, in the present invention, the substrate is preferably a Si substrate, more preferably a crystalline Si substrate, and (111) , (100) or (0001) oriented crystalline Si substrate. In addition, examples of the substrate material include, in addition to the Si substrate, one or more metals belonging to Groups 3 to 15 of the periodic table, or oxides of these metals. The shape of the substrate is not particularly limited, and may be approximately circular (for example, circular, oval, etc.) or polygonal (for example, triangular, square, rectangular, pentagonal, hexagonal, heptagonal, etc.). , octagonal, nonagonal, etc.), and various shapes can be suitably used.
 また、本発明においては、前記結晶基板が平坦面を有するのが好ましいが、前記結晶基板が表面の一部または全部に凹凸形状を有しているのも、前記結晶膜の結晶成長の品質をより良好なものとし得るので、好ましい。前記の凹凸形状を有する結晶基板は、表面の一部または全部に凹部または凸部からなる凹凸部が形成されていればそれでよく、前記凹凸部は、凸部または凹部からなるものであれば特に限定されず、凸部からなる凹凸部であってもよいし、凹部からなる凹凸部であってもよいし、凸部および凹部からなる凹凸部であってもよい。また、前記凹凸部は、規則的な凸部または凹部から形成されていてもよいし、不規則な凸部または凹部から形成されていてもよい。本発明においては、前記凹凸部が周期的に形成されているのが好ましく、周期的かつ規則的にパターン化されているのがより好ましい。前記凹凸部の形状としては、特に限定されず、例えば、ストライプ状、ドット状、メッシュ状またはランダム状などが挙げられるが、本発明においては、ドット状またはストライプ状が好ましく、ドット状がより好ましい。また、凹凸部が周期的かつ規則的にパターン化されている場合には、前記凹凸部のパターン形状が、三角形、四角形(例えば正方形、長方形若しくは台形等)、五角形若しくは六角形等の多角形状、円状、楕円状などの形状であるのが好ましい。なお、ドット状に凹凸部を形成する場合には、ドットの格子形状を、例えば正方格子、斜方格子、三角格子、六角格子などの格子形状にするのが好ましく、三角格子の格子形状にするのがより好ましい。前記凹凸部の凹部または凸部の断面形状としては、特に限定されないが、例えば、コの字型、U字型、逆U字型、波型、または三角形、四角形(例えば正方形、長方形若しくは台形等)、五角形若しくは六角形等の多角形等が挙げられる。なお、前記結晶基板の厚さは、特に限定されないが、好ましくは、50~2000μmであり、より好ましくは100~1000μmである。 Further, in the present invention, it is preferable that the crystal substrate has a flat surface, but it is also preferable that the crystal substrate has an uneven shape on a part or all of the surface, which improves the quality of crystal growth of the crystal film. This is preferable because it can provide better results. The above-mentioned crystal substrate having an uneven shape may be used as long as an uneven part consisting of a recess or a convex part is formed on a part or all of the surface. It is not limited, and it may be an uneven part consisting of a convex part, an uneven part consisting of a concave part, or an uneven part consisting of a convex part and a concave part. Furthermore, the uneven portions may be formed from regular protrusions or recesses, or may be formed from irregular protrusions or recesses. In the present invention, it is preferable that the uneven portions are formed periodically, and more preferably that they are patterned periodically and regularly. The shape of the uneven portion is not particularly limited, and examples thereof include a stripe shape, a dot shape, a mesh shape, or a random shape, but in the present invention, a dot shape or a stripe shape is preferable, and a dot shape is more preferable. . Further, when the uneven portions are patterned periodically and regularly, the pattern shape of the uneven portions may be a polygonal shape such as a triangle, a quadrilateral (for example, a square, a rectangle, or a trapezoid), a pentagon, or a hexagon. Preferably, the shape is circular or elliptical. In addition, when forming uneven portions in the form of dots, it is preferable that the lattice shape of the dots is a lattice shape such as a square lattice, an orthorhombic lattice, a triangular lattice, a hexagonal lattice, etc., and a triangular lattice shape is used. is more preferable. The cross-sectional shape of the concave portion or convex portion of the uneven portion is not particularly limited, and includes, for example, a U-shape, a U-shape, an inverted U-shape, a wave shape, a triangle, a quadrilateral (for example, a square, a rectangle, a trapezoid, etc.). ), polygons such as pentagons and hexagons. The thickness of the crystal substrate is not particularly limited, but is preferably 50 to 2000 μm, more preferably 100 to 1000 μm.
 前記化合物膜は、前記結晶膜に化合物元素を組み込むことができる化合物であれば特に限定されず、公知の化合物膜であってよい。本発明においては前記化合物膜が酸化膜であるのが好ましい。前記酸化膜は、前記結晶膜に酸素原子を組み込むことができる酸化膜であれば特に限定されず、通常、酸化材料を含む。前記酸化材料は、本発明の目的を阻害しない限り特に限定されず、公知の酸化材料であってよい。前記酸化材料としては、金属又は半金属の酸化物等が挙げられる。本発明においては、前記酸化膜が、前記結晶基板の酸化材料を含むのが好ましく、このような酸化膜としては、例えば前記結晶基板の熱酸化膜、自然酸化膜等が挙げられる。また、本発明においては、前記酸化膜は、酸素原子が取り込まれると膜の一部若しくは全部が消失又は破壊される犠牲層であってよく、本発明においては、前記酸化膜が、前記エピタキシャル層の結晶成長の際に、酸素原子が取り込まれて酸化膜自体は消失する酸素供給犠牲層であるのが好ましい。また、前記酸化膜は、パターン化されていてもよく、例えば、ストライプ状、ドット状、メッシュ状またはランダム状にパターン化されていてもよい。なお、前記酸化膜の膜厚は、特に限定されないが、好ましくは、1nmを超え100nm未満である。 The compound film is not particularly limited as long as it is a compound that can incorporate a compound element into the crystal film, and may be a known compound film. In the present invention, it is preferable that the compound film is an oxide film. The oxide film is not particularly limited as long as it is an oxide film that can incorporate oxygen atoms into the crystal film, and usually contains an oxide material. The oxidizing material is not particularly limited as long as it does not impede the object of the present invention, and may be any known oxidizing material. Examples of the oxidizing material include metal or metalloid oxides. In the present invention, it is preferable that the oxide film contains the oxidizing material of the crystal substrate, and examples of such an oxide film include a thermal oxide film, a natural oxide film, and the like of the crystal substrate. Further, in the present invention, the oxide film may be a sacrificial layer in which part or all of the film disappears or is destroyed when oxygen atoms are taken in; Preferably, the oxide layer is an oxygen supply sacrificial layer in which oxygen atoms are taken in and the oxide film itself disappears during crystal growth. Further, the oxide film may be patterned, for example, in a stripe shape, a dot shape, a mesh shape, or a random shape. Note that the thickness of the oxide film is not particularly limited, but is preferably greater than 1 nm and less than 100 nm.
 前記結晶膜(第1のエピタキシャル層)は、前記化合物膜中の化合物元素が組み込まれているエピタキシャル膜を含んでいるのが好ましい。なお、「前記化合物膜中の化合物元素が組み込まれているエピタキシャル膜」は、前記エピタキシャル膜の結晶成長において、前記化合物膜中の化合物元素が前記エピタキシャル膜に奪われたことを意味する。また、本発明においては、前記結晶膜が中性子吸収材を含むのが好ましい。前記中性子吸収材は、公知の中性子吸収材であってよく、本発明においては、このような中性子吸収材を用いて、例えば、前記酸化膜の酸素を取り込むことにより、密着性及び結晶性、さらに機能性膜の特性等をより優れたものとすることができる。なお、前記中性子吸収材としては、例えば、ハフニウム(Hf)等が好適な例として挙げられる。 Preferably, the crystal film (first epitaxial layer) includes an epitaxial film in which a compound element in the compound film is incorporated. Note that "an epitaxial film in which the compound element in the compound film is incorporated" means that the compound element in the compound film is taken away by the epitaxial film during crystal growth of the epitaxial film. Further, in the present invention, it is preferable that the crystal film contains a neutron absorbing material. The neutron absorbing material may be a known neutron absorbing material, and in the present invention, such a neutron absorbing material is used to improve adhesion and crystallinity, for example, by incorporating oxygen from the oxide film. The properties of the functional film can be improved. Note that a suitable example of the neutron absorbing material is hafnium (Hf).
 本発明においては、前記結晶膜上に、直接又は他の層を介して、導電膜、半導体膜又は圧電体膜からなる第2のエピタキシャル層が積層されているのが好ましい。このように積層することにより、前記第1のエピタキシャル層と前記第2のエピタキシャル層との界面において、前記第2のエピタキシャル層の格子定数と略同一になるように第1のエピタキシャル層を規則的に変態させることができる。前記の規則的な変態の態様としては、例えば、山谷構造に形状が変形する変態等が好適な例として挙げられ、本発明においては、前記山谷構造の互いに隣り合う頂点及び底点のなす角がそれぞれ異なるのが好ましく、前記角がそれぞれ30°~45°の範囲内であるのがより好ましい。ここで、前記第1のエピタキシャル層は、通常第1の結晶面と第2の結晶面とを有するが、前記変態によって、前記第1の結晶面と、前記第2の結晶面との格子定数差が生じ得るので、前記第1の結晶面と、前記第2の結晶面との格子定数差が0.1%~20%の範囲内とするのが好ましい。本発明では、前記第1の結晶面が、前記第2のエピタキシャル層の格子定数と略同一とすることができるので、第1のエピタキシャル層と第2のエピタキシャル層との格子定数差を0.1%~20%の範囲内とすることを容易に実現できる。 In the present invention, it is preferable that a second epitaxial layer made of a conductive film, a semiconductor film, or a piezoelectric film is laminated on the crystal film, either directly or via another layer. By stacking the layers in this manner, the first epitaxial layer is regularly formed at the interface between the first epitaxial layer and the second epitaxial layer so that the lattice constant is approximately the same as the lattice constant of the second epitaxial layer. It can be transformed into. A suitable example of the above-mentioned regular transformation is a transformation in which the shape deforms into a peak-to-valley structure, and in the present invention, the angles formed by adjacent apexes and bottom points of the peak-to-valley structure are Preferably, they are different, and more preferably, the angles are each within a range of 30° to 45°. Here, the first epitaxial layer usually has a first crystal plane and a second crystal plane, but due to the transformation, the lattice constant of the first crystal plane and the second crystal plane becomes Since a difference may occur, it is preferable that the difference in lattice constant between the first crystal plane and the second crystal plane is within the range of 0.1% to 20%. In the present invention, since the first crystal plane can be made substantially the same as the lattice constant of the second epitaxial layer, the difference in lattice constant between the first epitaxial layer and the second epitaxial layer is 0.0. A range of 1% to 20% can be easily achieved.
 本発明においては、前記結晶膜上に導電膜が積層される場合であって、前記導電膜が導電性金属の単結晶膜からなる場合には、大面積の無欠陥膜を容易に得ることができ、電極としての機能のみならず、素子等の特性をもより優れたものとすることができる。前記導電性金属としては、本発明の目的を阻害しない限り特に限定されず、例えば、金、銀、白金、パラジウム、銀パラジウム、銅、ニッケル、又はこれらの合金等が挙げられるが、本発明においては、白金を含むのが好ましい。なお、本発明においては、前記の製造方法によれば、好適には100nm以上の面積において無欠陥の単結晶膜を電極として得ることができ、より好適には1000nm以上の面積において無欠陥の単結晶膜を容易に得ることができる。また、厚さも好適には100nm以上の単結晶膜を電極として容易に得ることができる。なお、前記結晶膜上に導電性金属の単結晶膜からなる前記導電膜が積層される場合には、前記絶縁膜上に結晶性導電膜が積層されている電極基板として前記積層構造体を好適に用いることができる。 In the present invention, when a conductive film is laminated on the crystal film, and when the conductive film is made of a single crystal film of a conductive metal, it is possible to easily obtain a defect-free film with a large area. Therefore, not only the function as an electrode but also the characteristics of the device etc. can be improved. The conductive metal is not particularly limited as long as it does not impede the purpose of the present invention, and examples thereof include gold, silver, platinum, palladium, silver palladium, copper, nickel, and alloys thereof. preferably contains platinum. In addition, in the present invention, according to the above-described manufacturing method, it is possible to obtain as an electrode a single crystal film that is defect-free in an area of preferably 100 nm 2 or more, and more preferably defect-free in an area of 1000 nm 2 or more. A single crystal film can be easily obtained. Furthermore, a single crystal film having a thickness of preferably 100 nm or more can be easily obtained as an electrode. Note that when the conductive film made of a single crystal film of a conductive metal is laminated on the crystalline film, the laminated structure is preferably used as an electrode substrate in which a crystalline conductive film is laminated on the insulating film. It can be used for.
 前記半導体膜としては、半導体を含んでいれば特に限定されず、公知の半導体膜であってよいが、本発明においては、立方晶半導体を含むのが好ましい。前記立方晶半導体としては、例えば、c-BN、c-AlN、c-GaN、c-InN、c-SiC、GaAs、AlAs、InAs、GaP、AlP、InP、又はこれらの混晶半導体などが挙げられる。 The semiconductor film is not particularly limited as long as it contains a semiconductor, and may be any known semiconductor film, but in the present invention it is preferable that it contains a cubic semiconductor. Examples of the cubic semiconductor include c-BN, c-AlN, c-GaN, c-InN, c-SiC, GaAs, AlAs, InAs, GaP, AlP, InP, and mixed crystal semiconductors thereof. It will be done.
 前記圧電体膜は、圧電性材料からなるものであれば特に限定されず、公知の圧電体からなる膜であってよいが、本発明においては、三方晶又は六方晶の結晶構造を有する圧電性材料であるのが好ましい。前記圧電性材料としては、例えば、チタン酸ジルコン酸鉛(PZT)、ABO型で表されるいわゆるペロブスカイト構造を有する他の種類のセラミックス材料、例えば、チタン酸バリウム、チタン酸鉛、ニオブ酸カリウム、ニオブ酸リチウム、タンタル酸リチウム、タングステン酸ナトリウム、酸化亜鉛、チタン酸バリウムストロンチウム(BST)、タンタル酸ストロンチウムビスマス(SBT)、メタニオブ酸鉛、亜鉛ニオブ酸鉛、スカンジウムニオブ酸鉛等、又はポリフッ化ビニリデン、水晶などが挙げられる。 The piezoelectric film is not particularly limited as long as it is made of a piezoelectric material, and may be a film made of a known piezoelectric material, but in the present invention, a piezoelectric film having a trigonal or hexagonal crystal structure is used. Preferably, it is a material. Examples of the piezoelectric material include lead zirconate titanate (PZT), other types of ceramic materials having a so-called perovskite structure represented by ABO 3 type, such as barium titanate, lead titanate, and potassium niobate. , lithium niobate, lithium tantalate, sodium tungstate, zinc oxide, barium strontium titanate (BST), strontium bismuth tantalate (SBT), lead metaniobate, lead zinc niobate, lead scandium niobate, etc., or polyfluoride Examples include vinylidene and crystal.
 前記導電膜、前記半導体膜及び前記圧電体膜のそれぞれの膜厚は、特に限定されないが、好ましくは、10nm~1000μmであり、より好ましくは10nm~100μmである。 The thickness of each of the conductive film, the semiconductor film, and the piezoelectric film is not particularly limited, but is preferably 10 nm to 1000 μm, more preferably 10 nm to 100 μm.
 前記積層構造体は、結晶基板上に少なくとも化合物膜を介して絶縁膜を積層する積層構造体の製造方法において、前記の積層を、350℃~700℃にて、前記化合物膜中の化合物元素を用いて結晶膜を形成することにより行うことで容易に得ることが可能である。350℃~700℃の範囲であると、容易に、前記化合物膜中の化合物元素を前記結晶膜に取り込んで結晶成長させることができる。 The laminated structure is produced in a method for manufacturing a laminated structure in which an insulating film is laminated on a crystal substrate via at least a compound film, in which the lamination is performed at a temperature of 350° C. to 700° C. to remove compound elements in the compound film. This can be easily obtained by forming a crystal film using the above method. When the temperature is in the range of 350° C. to 700° C., the compound element in the compound film can be easily incorporated into the crystal film to cause crystal growth.
 本発明においては、前記の積層を、前記化合物膜中の化合物元素を用いた後、酸素ガスを用いて前記結晶膜を成膜するのが好ましい。このように成膜することにより、前記結晶基板上に前記結晶膜が積層されている積層構造体であって、前記結晶基板と前記結晶膜との間に、前記結晶膜及び/又は前記結晶基板の構成金属を含むアモルファス薄膜及び/又は前記結晶基板の一部に1又は2以上埋め込まれており且つ前記構成金属を含む埋込層を有している積層構造体を容易に得ることができる。本発明においては、前記アモルファス層及び前記埋込層の両方を前記積層構造体が有しているのが前記結晶膜の機能性等をさらに優れたものとすることができるので好ましい。また、前記アモルファス層及び前記埋込層は、それぞれ前記結晶膜の構成金属を含むのが前記結晶膜等の結晶性がより優れたものとなるので好ましい。また、本発明においては、前記構成金属がHfを含むのが、より応力緩和等を促進し、さらには多段階での応力緩和等も実現可能とすることから好ましい。また、本発明においては、前記アモルファス薄膜の膜厚が1nm~10nmであるのが前記結晶膜の結晶性等をより向上させることができるので好ましく、このような好ましい膜厚のアモルファス薄膜を本発明の好ましい製造方法によれば容易に得ることができる。また、本発明においては、前記埋込層の形状が略逆三角形の断面形状を有するのが、前記結晶膜の機能性をより向上させることができるので好ましい。なお、これら好ましい積層構造体は、前記酸化膜の膜厚及び前記酸素ガスの導入時期等を適宜調整することによって、容易に得ることが可能である。 In the present invention, it is preferable that the crystal film is formed using oxygen gas after the lamination is performed using the compound element in the compound film. By forming a film in this manner, a layered structure in which the crystal film is stacked on the crystal substrate, wherein the crystal film and/or the crystal substrate is provided between the crystal substrate and the crystal film. It is possible to easily obtain a laminated structure having an amorphous thin film containing the constituent metals and/or one or more buried layers containing the constituent metals embedded in a part of the crystal substrate. In the present invention, it is preferable that the laminated structure has both the amorphous layer and the buried layer because the functionality of the crystalline film can be further improved. Further, it is preferable that the amorphous layer and the buried layer each contain a constituent metal of the crystalline film, since this results in better crystallinity of the crystalline film and the like. Further, in the present invention, it is preferable that the constituent metal contains Hf, since this further promotes stress relaxation and further enables realization of stress relaxation in multiple stages. Further, in the present invention, it is preferable that the thickness of the amorphous thin film is 1 nm to 10 nm because it can further improve the crystallinity of the crystalline film, and the amorphous thin film having such a preferable thickness is preferably used in the present invention. can be easily obtained according to a preferred manufacturing method. Further, in the present invention, it is preferable that the buried layer has a substantially inverted triangular cross-sectional shape, since this can further improve the functionality of the crystalline film. Note that these preferable laminated structures can be easily obtained by appropriately adjusting the thickness of the oxide film, the timing of introducing the oxygen gas, and the like.
 前記積層において用いられる積層手段としては、通常、前記絶縁膜の成膜手段が好適に用いられ、前記成膜手段は公知の成膜手段であってよい。本発明においては、前記成膜手段が、蒸着又はスパッタであるのが好ましい。 As the lamination means used in the lamination, the means for forming the insulating film is usually suitably used, and the film forming means may be any known film forming means. In the present invention, it is preferable that the film forming means is vapor deposition or sputtering.
 以上のようにして得られた積層構造体は、常法に従い、そのままで又は所望により更に加工等の処理を施して、素子に用いることができる。また、前記積層構造体を前記素子に用いる場合には、そのまま用いてもよいし、さらに他の層(例えば絶縁体層、半絶縁体層、導体層、半導体層、緩衝層またはその他中間層等)などを形成してから用いてもよい。本発明においては、前記結晶膜上に機能膜膜(例えば半導体膜、圧電膜等)が積層されるSOI基板として前記積層構造体を用いるのが好ましい。 The laminated structure obtained as described above can be used as an element as it is or after being further processed, if desired, according to a conventional method. In addition, when the laminated structure is used in the element, it may be used as it is, or it may be used as it is, or it may be used with other layers (for example, an insulator layer, a semi-insulator layer, a conductor layer, a semiconductor layer, a buffer layer, or other intermediate layer, etc.). ) etc. may be formed before use. In the present invention, it is preferable to use the laminated structure as an SOI substrate on which a functional film (for example, a semiconductor film, a piezoelectric film, etc.) is laminated on the crystal film.
 前記素子は、常法に従い、例えば電子デバイス(好ましくは圧電デバイス)等に用いられる。より具体的に例えば、前記素子を、圧電素子として、電源や電気/電子回路と接続し、回路基板に搭載したり、パッケージしたりすることにより様々な電子デバイスを構成することができる。本発明においては、前記電子デバイスが、圧電デバイスであるのが好ましく、例えば、ジャイロスコープ、モーションセンサ等の電子機器における圧電デバイスであるのがより好ましい。また、例えば、増幅器と整流回路を接続しパッケージすれば、磁気センサなどの各種センサに利用可能である。 The above-mentioned element is used, for example, in an electronic device (preferably a piezoelectric device), etc., in accordance with a conventional method. More specifically, for example, various electronic devices can be constructed by connecting the element as a piezoelectric element to a power source or an electric/electronic circuit, mounting it on a circuit board, or packaging it. In the present invention, the electronic device is preferably a piezoelectric device, and more preferably a piezoelectric device in electronic equipment such as a gyroscope or a motion sensor. Furthermore, for example, if an amplifier and a rectifier circuit are connected and packaged, it can be used for various sensors such as magnetic sensors.
 前記電子デバイスは、常法に従い電子機器に好適に用いられる。前記電子機器としては、上記した電子機器以外にも様々な電子機器に適用可能であり、より具体的に例えば、液体吐出ヘッド、液体吐出装置、振動波モータ、光学機器、振動装置、撮像装置、圧電音響部品や該圧電音響部品を有する音声再生機器、音声録音機器、携帯電話、各種情報端末等が好適な例として挙げられる。 The electronic device is suitably used in electronic equipment according to a conventional method. The electronic device can be applied to various electronic devices other than those described above, and more specifically includes, for example, a liquid ejection head, a liquid ejection device, a vibration wave motor, an optical device, a vibration device, an imaging device, Suitable examples include piezoelectric acoustic components and audio playback devices, audio recording devices, mobile phones, and various information terminals that include the piezoelectric acoustic components.
 また、本発明においては、前記素子が半導体素子であるのも好ましく、前記電子デバイスが半導体デバイスであるのも好ましい。前記半導体素子又は前記半導体デバイス(以下、まとめて「半導体装置」ともいう。)は、本発明の目的を阻害しない限り特に限定されず、公知の半導体素子又は半導体デバイスであってよい。縦型デバイスであってもよいし、横型デバイスであってもよいが、本発明においては、横型デバイスであるのが好ましい。前記半導体装置としては、例えば、ダイオード又はトランジスタ(例えば、MOSFET又はJFET等)などが挙げられるが、絶縁ゲート型半導体装置(例えば、MOSFET又はIGBTなど)又はショットキーゲートを有する半導体装置(例えば、MESFETなど)が好ましく、MOSFET及び/又はIGBTがより好ましく、横型MOSFET及び/又は横型IGBTが最も好ましい。 Furthermore, in the present invention, it is also preferable that the element is a semiconductor element, and it is also preferable that the electronic device is a semiconductor device. The semiconductor element or the semiconductor device (hereinafter also collectively referred to as a "semiconductor device") is not particularly limited as long as it does not impede the object of the present invention, and may be a known semiconductor element or semiconductor device. It may be a vertical device or a horizontal device, but in the present invention, a horizontal device is preferred. Examples of the semiconductor device include a diode or a transistor (for example, a MOSFET or a JFET), and an insulated gate semiconductor device (for example, a MOSFET or an IGBT) or a semiconductor device having a Schottky gate (for example, a MESFET). etc.) are preferred, MOSFETs and/or IGBTs are more preferred, and lateral MOSFETs and/or lateral IGBTs are most preferred.
 図9は、本発明において好適な横型IGBT、横型NMOS及び横型PMOSを示す。図1の横型IGBT、横型NMOS及び横型PMOSは、結晶基板29上に、前記結晶膜としての絶縁膜26aが形成されており、絶縁膜26a上にそれぞれの素子が設けられている。図9の横型IGBTは、ゲート電極21、エミッタ電極22、コレクタ電極23、前記結晶膜としての絶縁膜26、p型半導体27、n型半導体28及びn型半導体28aを備えている。また、図9のNMOSは、ゲート電極21、ドレイン電極24、ソース電極25、絶縁膜26、p型半導体27、n型半導体28及びn型半導体28aを備えている。また、図9のPMOSは、ゲート電極21、ドレイン電極24、ソース電極25、絶縁膜26、p型半導体27及びn型半導体28aを備えている。 FIG. 9 shows a horizontal IGBT, a horizontal NMOS, and a horizontal PMOS suitable for the present invention. In the lateral IGBT, lateral NMOS, and lateral PMOS shown in FIG. 1, an insulating film 26a as the crystal film is formed on a crystal substrate 29, and respective elements are provided on the insulating film 26a. The lateral IGBT in FIG. 9 includes a gate electrode 21, an emitter electrode 22, a collector electrode 23, an insulating film 26 as the crystal film, a p-type semiconductor 27, an n-type semiconductor 28, and an n - type semiconductor 28a. Further, the NMOS shown in FIG. 9 includes a gate electrode 21, a drain electrode 24, a source electrode 25, an insulating film 26, a p-type semiconductor 27, an n-type semiconductor 28, and an n - type semiconductor 28a. Further, the PMOS shown in FIG. 9 includes a gate electrode 21, a drain electrode 24, a source electrode 25, an insulating film 26, a p-type semiconductor 27, and an n - type semiconductor 28a.
 図10は、図9の絶縁ゲート型バイポーラトランジスタ(IGBT)等の好適な製造工程を示す。図10の製造工程では、結晶基板29上に前記結晶膜としての絶縁膜26aが形成されており、さらに、絶縁膜26a上にn型半導体(例えばSi半導体)28aが形成されている積層構造体を用いる。図10(a)では、前記積層構造体に公知の手段を用いてトレンチが設けられており、さらに、公知の手段を用いてn型半導体(例えばSi半導体)28aの表面側を酸化処理する。図10(b)では、図10(a)の積層構造体を、公知の手段を用いてポリシリコン31で処理してポリシリコン31でトレンチを埋め、さらに酸化処理面上にポリシリコン層を形成する。図10(c)では、図10(b)の積層構造体を公知の手段を用いて研磨して、図10(c)の積層構造体を得る。得られた積層構造体は、公知の手段を用いて各種素子の作製工程に付される。 FIG. 10 shows a preferred manufacturing process for the insulated gate bipolar transistor (IGBT) shown in FIG. 9 and the like. In the manufacturing process of FIG. 10, an insulating film 26a as the crystal film is formed on a crystal substrate 29, and an n - type semiconductor (for example, a Si semiconductor) 28a is further formed on the insulating film 26a. Use your body. In FIG. 10(a), a trench is provided in the laminated structure using a known method, and the surface side of an n - type semiconductor (for example, a Si semiconductor) 28a is further oxidized using a known method. . In FIG. 10(b), the stacked structure shown in FIG. 10(a) is treated with polysilicon 31 using known means to fill the trenches with polysilicon 31, and then a polysilicon layer is formed on the oxidized surface. do. In FIG. 10(c), the layered structure shown in FIG. 10(b) is polished using a known method to obtain the layered structure shown in FIG. 10(c). The obtained laminated structure is subjected to various device manufacturing steps using known means.
 このようにして得られた横型IGBT、横型NMOS及び横型PMOSは、トレンチアイソレーション構造による素子分離が適用されており、分離面積が小さく、また、商用電源から整流平滑した電源で直接インバータを構成することも可能である。そして、高耐圧の出力部と制御回路部を同一チップ上に構成することができ、優れたパワーICを実現可能とする。特に、IC内部の各デバイス間が誘電体で完全に分離されているため、寄生素子の影響を排除することが可能となり、信頼性の高いシステムを実現することができる。 The lateral IGBT, lateral NMOS, and lateral PMOS obtained in this way have element isolation using a trench isolation structure, have a small isolation area, and can directly configure an inverter with a power source rectified and smoothed from a commercial power source. It is also possible. Furthermore, a high-voltage output section and a control circuit section can be configured on the same chip, making it possible to realize an excellent power IC. In particular, since each device inside the IC is completely isolated by a dielectric material, it is possible to eliminate the influence of parasitic elements, and a highly reliable system can be realized.
 前記半導体装置は、上記した事項に加え、さらに公知の手段を用いて、パワーモジュール、インバータ又はコンバータ等の半導体デバイスとして好適に用いられ、さらには、半導体デバイスとして例えば電源装置を用いた半導体システム等に好適に用いられる。なお、前記電源装置は、公知の手段を用いて、前記半導体装置を配線パターン等に接続するなどして作製することができる。図11に電源システムの例を示す。図11は、複数の前記電源装置と制御回路を用いて電源システムを構成している。前記電源システムは、図12に示すように、電子回路と組み合わせてシステム装置に用いることができる。なお、電源装置の電源回路図の一例を図13に示す。図13は、パワー回路と制御回路からなる電源装置の電源回路を示しており、インバータ(MOSFETA~Dで構成)によりDC電圧を高周波でスイッチングしACへ変換後、トランスで絶縁及び変圧を実施し、整流MOSFET(A~B’)で整流後、DCL(平滑用コイルL1,L2)とコンデンサにて平滑し、直流電圧を出力する。この時に電圧比較器で出力電圧を基準電圧と比較し、所望の出力電圧となるようPWM制御回路でインバータ及び整流MOSFETを制御する。 In addition to the above-described matters, the semiconductor device can be suitably used as a semiconductor device such as a power module, an inverter or a converter by using known means, and furthermore, the semiconductor device can be used as a semiconductor device such as a semiconductor system using a power supply device, etc. It is suitably used for. Note that the power supply device can be manufactured by connecting the semiconductor device to a wiring pattern or the like using a known method. FIG. 11 shows an example of a power supply system. FIG. 11 shows a power supply system using a plurality of the power supply devices and control circuits. The power supply system can be used in a system device in combination with an electronic circuit, as shown in FIG. Note that FIG. 13 shows an example of a power supply circuit diagram of the power supply device. Figure 13 shows the power supply circuit of the power supply device, which consists of a power circuit and a control circuit. After converting DC voltage to AC by high-frequency switching using an inverter (consisting of MOSFETAs to D), insulation and transformation are performed using a transformer. , rectified by rectifier MOSFETs (A to B'), smoothed by DCL (smoothing coils L1, L2) and a capacitor, and outputs a DC voltage. At this time, a voltage comparator compares the output voltage with a reference voltage, and a PWM control circuit controls the inverter and rectifier MOSFET so that the desired output voltage is achieved.
(実施例1)
 Si基板(100)の結晶成長面側をRIEで処理し、酸素の存在下、加熱して熱酸化膜を形成した後、酸素を用いずに、蒸着法にて、蒸着源の金属と、Si基板上の酸化膜中の酸素とを熱反応させ、結晶性金属酸化物の単結晶をSi基板上に形成した。ついで、酸素を流し、温度を下げ、かつ圧力を上げて、蒸着法にて、結晶性金属酸化物の単結晶膜を成膜した。なお、この成膜時の蒸着法の各条件は次の通りであった。
 蒸着源 : Hf、Zr、Ce
 電圧 : 3.5~4.75V
 圧力 : 3×10-2~6×10-2Pa
 基板温度 : 350~700℃
(Example 1)
After treating the crystal growth side of the Si substrate (100) with RIE and heating it in the presence of oxygen to form a thermal oxide film, the metal of the evaporation source and the Si A single crystal of the crystalline metal oxide was formed on the Si substrate by causing a thermal reaction with oxygen in the oxide film on the substrate. Then, by flowing oxygen, lowering the temperature, and increasing the pressure, a single crystal film of a crystalline metal oxide was formed by a vapor deposition method. The conditions of the vapor deposition method during this film formation were as follows.
Vapor deposition source: Hf, Zr, Ce
Voltage: 3.5-4.75V
Pressure: 3× 10-2 to 6× 10-2 Pa
Substrate temperature: 350-700℃
 得られた積層構造体は、良好な密着性及び結晶性を有する結晶膜を含む積層構造体であった。また、X線回折装置を用いて、得られた結晶膜を調べたところ、(Hf、Zr、Ce)Oであった。また、積層構造体の結晶基板、結晶性金属酸化物の単結晶膜及び導電膜につき、X線回折装置を用いて、それぞれの結晶を測定した。図11に、XPS測定結果を示す。図11から明らかなように、Si結晶基板上に、良好な結晶性を有する(Hf、Zr)O膜及びPt単結晶膜が形成されていた。 The obtained laminated structure was a laminated structure containing a crystal film having good adhesion and crystallinity. Further, when the obtained crystal film was examined using an X-ray diffraction device, it was found to be (Hf, Zr, Ce)O 2 . In addition, the crystals of the crystal substrate of the laminated structure, the single crystal film of the crystalline metal oxide, and the conductive film were measured using an X-ray diffraction apparatus. FIG. 11 shows the XPS measurement results. As is clear from FIG. 11, a (Hf, Zr)O 2 film and a Pt single crystal film having good crystallinity were formed on the Si crystal substrate.
(実施例2)
 Si基板を(111)に代えて用いたこと以外、実施例1と同様にして積層構造体を得た。得られた積層構造体は、実施例1同様、良好な密着性及び結晶性を有する結晶膜を含む積層構造体であり、前記結晶膜は絶縁体であった。さらに、前記結晶膜上にAl及びAlNを成膜し、ついでX線回折装置を用いて、得られた結晶膜を調べたところ、(Hf、Zr、Ce)O上にAl及びAlN膜がそれぞれ良好に形成されていた。XPS分析結果を図8に示す。
(Example 2)
A laminated structure was obtained in the same manner as in Example 1 except that a Si substrate was used instead of (111). The obtained laminated structure was a laminated structure including a crystal film having good adhesion and crystallinity, as in Example 1, and the crystal film was an insulator. Furthermore, when Al 2 O 3 and AlN were formed on the crystal film and the obtained crystal film was examined using an X-ray diffraction device, it was found that Al 2 O 3 and AlN were formed on the (Hf, Zr, Ce) O 2 . The O 3 and AlN films were each well formed. The XPS analysis results are shown in FIG.
 実施例1において用いた蒸着成膜装置を図14に示す。図14の成膜装置は、ルツボに金属源101a~101b、アース102a~102h、ICP電極103a~103b、カットフィルター104a~104b、DC電源105a~105b、RF電源106a~106b、ランプ107a~107b、Ar源108、反応性ガス源109、電源110、基板ホルダー111、基板112、カットフィルター113、ICPリング114、真空槽115及び回転軸116を少なくとも備えている。なお、図14のICP電極103a~103bは基板112の中心側に湾曲した略凹曲面形状又はパラボラ形状を有している。 The vapor deposition film forming apparatus used in Example 1 is shown in FIG. The film forming apparatus of FIG. 14 includes metal sources 101a to 101b, earths 102a to 102h, ICP electrodes 103a to 103b, cut filters 104a to 104b, DC power supplies 105a to 105b, RF power supplies 106a to 106b, lamps 107a to 107b, It includes at least an Ar source 108, a reactive gas source 109, a power source 110, a substrate holder 111, a substrate 112, a cut filter 113, an ICP ring 114, a vacuum chamber 115, and a rotating shaft 116. Note that the ICP electrodes 103a to 103b in FIG. 14 have a substantially concave curved shape or a parabolic shape curved toward the center of the substrate 112.
 図14に示すように、基板112を基板ホルダー111上に係止する。ついで、電源110と回転機構(図示せず)とを用いて回転軸116を回転させ、基板112を回転させる。また、基板112をランプ107a~107bによって加熱し、真空ポンプ(図示せず)によって真空槽115内を排気により真空又は減圧下にする。その後、真空槽115内にAr源108からArガスを導入し、DC電源105a~105b、RF電源106a~106b、ICP電極103a~103b、カットフィルター104a~104b、及びアース102a~102hを用いて基板112上にアルゴンプラズマを形成することにより、基板112の表面の清浄化を行う。 As shown in FIG. 14, the substrate 112 is locked onto the substrate holder 111. Next, the rotating shaft 116 is rotated using the power source 110 and a rotating mechanism (not shown), and the substrate 112 is rotated. Further, the substrate 112 is heated by lamps 107a to 107b, and the inside of the vacuum chamber 115 is evacuated to a vacuum or reduced pressure by a vacuum pump (not shown). After that, Ar gas is introduced into the vacuum chamber 115 from the Ar source 108, and the substrate is The surface of the substrate 112 is cleaned by forming argon plasma on the substrate 112 .
 真空槽115内にArガスを導入するとともに反応性ガス源109を用いて反応性ガスを導入する。このとき、ランプヒーターであるランプ107a~107bのオンとオフとを交互に繰り返すことで、より良質な結晶成長膜を形成することができるように構成されている。 Ar gas is introduced into the vacuum chamber 115, and a reactive gas is also introduced using the reactive gas source 109. At this time, the lamps 107a to 107b, which are lamp heaters, are alternately turned on and off to form a crystal growth film of better quality.
 実施例1と同様にして得られた積層構造体につき、STEM解析を行った。結晶基板と結晶膜との間に、埋込層が形成され、さらに、アモルファス層(2層)が形成されていた。また、結晶基板上の第1のアモルファス層、第2のアモルファス層ともに、結晶基板のSiと、結晶膜の構成金属とが含まれていた。参考例として実施例1と同様にして作製したHfZrO混晶を含む積層構造体のSTEM解析結果を図15~17に示す。図15から、結晶基板1011とエピタキシャル層1001との間に、埋込層1004が形成され、さらに、アモルファス層1002、1003が形成されていることが分かる。また、図16から、結晶基板上1011の第1のアモルファス層1002には、結晶基板のSiと、エピタキシャル層1001の構成金属であるZrが含まれていることがわかる。また、第2のアモルファス層には、結晶基板のSiと、エピタキシャル層1001の構成金属であるHf及びZrとが含まれていることがわかる。また、図17から、埋込層1004が、略逆三角形の断面形状を有しており、Hf及びSiが含まれている酸化物であることがわかる。 A STEM analysis was performed on the laminated structure obtained in the same manner as in Example 1. A buried layer was formed between the crystal substrate and the crystal film, and an amorphous layer (two layers) was further formed. Further, both the first amorphous layer and the second amorphous layer on the crystal substrate contained Si of the crystal substrate and a constituent metal of the crystal film. As a reference example, the results of STEM analysis of a laminated structure containing HfZrO mixed crystal produced in the same manner as in Example 1 are shown in FIGS. 15 to 17. It can be seen from FIG. 15 that a buried layer 1004 is formed between the crystal substrate 1011 and the epitaxial layer 1001, and furthermore, amorphous layers 1002 and 1003 are formed. Further, from FIG. 16, it can be seen that the first amorphous layer 1002 on the crystal substrate 1011 contains Si of the crystal substrate and Zr which is a constituent metal of the epitaxial layer 1001. It can also be seen that the second amorphous layer contains Si of the crystal substrate and Hf and Zr, which are the constituent metals of the epitaxial layer 1001. Further, from FIG. 17, it can be seen that the buried layer 1004 has a substantially inverted triangular cross-sectional shape and is an oxide containing Hf and Si.
(適用例)
 得られた積層構造体の好適な適用例の一つである剥離・転写の例を、以下、図を用いてより具体的に説明するが、本発明は、これら適用例に限定されるものではない。なお、以下の適用例では、前記結晶膜を絶縁膜として用いている。本発明においては、特に断りがない限り、公知の手段を用いて、前記積層構造体からSOI基板又はSOI半導体デバイス等を製造することができる。
(Application example)
An example of peeling/transfer, which is one of the preferable application examples of the obtained laminated structure, will be explained in more detail below using figures, but the present invention is not limited to these application examples. do not have. Note that in the following application examples, the crystal film is used as an insulating film. In the present invention, unless otherwise specified, an SOI substrate, an SOI semiconductor device, or the like can be manufactured from the laminated structure using known means.
 図1は、本発明の積層構造体の好適な一例を示す図である。図1の積層構造体は、結晶基板1上に、絶縁膜3が形成されており、さらに、絶縁膜3上に第2のエピタキシャル層4として半導体層が形成されている。 FIG. 1 is a diagram showing a preferred example of the laminated structure of the present invention. In the stacked structure shown in FIG. 1, an insulating film 3 is formed on a crystal substrate 1, and a semiconductor layer is further formed as a second epitaxial layer 4 on the insulating film 3.
 図2は、前記剥離・転写におけるSOI島形成工程で得られる積層構造体を示す。前記SOI島形成工程では、図1の積層構造体をSOI基板として用い、フォトリソグラフィーを行い、部分的に半導体層(第2のエピタキシャル層)4を除去する。このようにすることで図2の積層構造体が得られる。なお、図2の積層構造体は、第2のエピタキシャル層が2つの島に分離し、第2のエピタキシャル層の第1の島4aと第2の島4bとが絶縁膜3上に形成されている。 FIG. 2 shows a laminated structure obtained in the SOI island forming step in the peeling and transfer. In the SOI island forming step, the stacked structure shown in FIG. 1 is used as an SOI substrate, and photolithography is performed to partially remove the semiconductor layer (second epitaxial layer) 4. By doing so, the laminated structure shown in FIG. 2 is obtained. In the stacked structure shown in FIG. 2, the second epitaxial layer is separated into two islands, and the first island 4a and the second island 4b of the second epitaxial layer are formed on the insulating film 3. There is.
 図3は、前記剥離・転写におけるHFエッチング工程で得られる積層構造体を示す。前記HFエッチング工程では、図2の積層構造体を用いて、HFにてBOX層をエッチングしてピラー状に残留させる。なお、図3の積層構造体は、絶縁膜がピラー状になり、絶縁膜(第1のエピタキシャル層)の第1のピラー3aと第2のピラー3bとが結晶基板1上にそれぞれ形成されている。また、本発明においては、結晶基板と絶縁膜との密着性が高く、絶縁膜と第2のエピタキシャル層との界面において通常変態等の応力緩和がみられるので、容易に剥離しやすく、例えば、前記HFエッチング工程が必須ではなく、省略することもできる。 FIG. 3 shows a laminated structure obtained in the HF etching process in the peeling/transferring process. In the HF etching step, the BOX layer is etched using HF using the stacked structure shown in FIG. 2, and is left in a pillar shape. In the laminated structure shown in FIG. 3, the insulating film has a pillar shape, and the first pillar 3a and the second pillar 3b of the insulating film (first epitaxial layer) are formed on the crystal substrate 1, respectively. There is. In addition, in the present invention, the adhesion between the crystal substrate and the insulating film is high, and stress relaxation such as normal transformation is observed at the interface between the insulating film and the second epitaxial layer, so it is easy to peel off, for example, The HF etching process is not essential and can be omitted.
 図4は、前記剥離・転写におけるフレキシブル基板への貼付工程で得られる積層構造体を示す。前記貼付工程では、図3の積層構造体を用いて、SOI層表面と例えばPE(ポリエチレン)等のフレキシブル基板5とを密着して貼り付ける。 FIG. 4 shows a laminated structure obtained in the step of attaching to a flexible substrate in the peeling/transferring process. In the pasting step, the surface of the SOI layer and a flexible substrate 5 such as PE (polyethylene) are closely pasted using the laminated structure shown in FIG. 3 .
 図5は、剥離・転写における剥離工程で得られる積層構造体を示す。前記剥離工程では、SOI層をフレキシブル基板へと剥離して転写する。このようにすることにより、転写成功率を優れたものとすることができ、デバイス製造において歩留まりを高くし、高品質化、低コスト化を実現することが可能となる。 FIG. 5 shows a laminated structure obtained in the peeling step in peeling/transfer. In the peeling step, the SOI layer is peeled and transferred onto the flexible substrate. By doing so, it is possible to improve the transfer success rate, increase the yield in device manufacturing, and achieve higher quality and lower costs.
 本発明の結晶及び積層構造体は、素子、電子デバイス、電子機器及びシステムに有用であり、特にSOI基板として好適に用いられる。 The crystal and laminated structure of the present invention are useful for elements, electronic devices, electronic equipment, and systems, and are particularly suitable for use as SOI substrates.
   1  結晶基板
   2  化合物膜
   3  絶縁膜(第1のエピタキシャル層)
   3a 第1のエピタキシャル層の第1のピラー
   3b 第1のエピタキシャル層の第2のピラー
   4  第2のエピタキシャル層
   4a 第2のエピタキシャル層の第1の島
   4b 第2のエピタキシャル層の第2の島
   5  フレキシブル基板
  13  絶縁膜
  14  導電膜
  21  ゲート電極
  22  エミッタ電極
  23  コレクタ電極
  24  ドレイン電極
  25  ソース電極
  26  絶縁膜
  26a 絶縁膜(エピタキシャル層)
  27  p型半導体
  28  n型半導体
  28a n型半導体
  29  結晶基板
  30  トレンチアイソレーション
  31  ポリシリコン
 101a~101b 金属源
 102a~102j アース
 103a~103b ICP電極
 104a~104b カットフィルター
 105a~105b DC電源
 106a~106b RF電源
 107a~107b ランプ
 108  Ar源
 109  反応性ガス源
 110  電源
 111  基板ホルダー
 112  基板
 113  カットフィルター
 114  ICPリング
 115  真空槽
 116  回転軸
1001  結晶膜
1002  第1のアモルファス層
1003  第2のアモルファス層
1004  埋込層
1011  基板
 
1 Crystal substrate 2 Compound film 3 Insulating film (first epitaxial layer)
3a first pillar of first epitaxial layer 3b second pillar of first epitaxial layer 4 second epitaxial layer 4a first island of second epitaxial layer 4b second island of second epitaxial layer 5 Flexible substrate 13 Insulating film 14 Conductive film 21 Gate electrode 22 Emitter electrode 23 Collector electrode 24 Drain electrode 25 Source electrode 26 Insulating film 26a Insulating film (epitaxial layer)
27 -P type semiconductor 28 N -type semiconductor 28A N -type semiconductor 29 crystal substrate 30 trench isolation 31 polygilicon 101a -101B metal source 102a -102J Earth 103a -103B ICP electrode 104a -104B cut filter 105A -105B DC power supply 106a ~ 106B RF power source 107a-107b Lamp 108 Ar source 109 Reactive gas source 110 Power source 111 Substrate holder 112 Substrate 113 Cut filter 114 ICP ring 115 Vacuum chamber 116 Rotating shaft 1001 Crystal film 1002 First amorphous layer 1003 Second amorphous layer 1004 Buried Including layer 1011 board

Claims (26)

  1.  金属化合物を主成分として含む結晶性金属化合物からなる結晶であって、前記金属化合物がHf、Zr及びCeの化合物を含むことを特徴とする結晶。 A crystal made of a crystalline metal compound containing a metal compound as a main component, wherein the metal compound contains a compound of Hf, Zr, and Ce.
  2.  前記結晶性金属化合物が立方晶又は六方晶の結晶構造を有する請求項1記載の結晶。 The crystal according to claim 1, wherein the crystalline metal compound has a cubic or hexagonal crystal structure.
  3.  前記結晶性金属化合物が(111)、(100)、(010)又は(0001)配向している請求項2記載の結晶。 The crystal according to claim 2, wherein the crystalline metal compound is (111), (100), (010), or (0001) oriented.
  4.  前記結晶性金属化合物が、Ceの化合物を前記結晶性金属化合物に対し、5原子%以上含む請求項1~3のいずれかに記載の結晶。 The crystal according to any one of claims 1 to 3, wherein the crystalline metal compound contains a Ce compound in an amount of 5 atomic % or more based on the crystalline metal compound.
  5.  前記結晶性金属化合物が、Hfの化合物及びZrの化合物を前記結晶性金属化合物に対し、50原子%以上含む請求項1~4のいずれかに記載の結晶。 The crystal according to any one of claims 1 to 4, wherein the crystalline metal compound contains an Hf compound and a Zr compound in an amount of 50 atomic % or more based on the crystalline metal compound.
  6.  絶縁体である請求項1~5のいずれかに記載の結晶。 The crystal according to any one of claims 1 to 5, which is an insulator.
  7.  膜状である請求項1~6のいずれかに記載の結晶。 The crystal according to any one of claims 1 to 6, which is in the form of a film.
  8.  膜厚が1μm以上である請求項7記載の結晶。 The crystal according to claim 7, having a film thickness of 1 μm or more.
  9.  結晶基板上に直接又は他の層を介して、結晶膜が積層されている積層構造体であって、前記結晶膜が、請求項1~8のいずれかに記載の結晶からなることを特徴とする積層構造体。 A laminated structure in which a crystal film is laminated directly or via another layer on a crystal substrate, characterized in that the crystal film is made of the crystal according to any one of claims 1 to 8. Laminated structure.
  10.  前記結晶膜がバッファ層の一部又は全部を構成しており、結晶成長用基板である請求項9記載の積層構造体。 The laminated structure according to claim 9, wherein the crystal film constitutes part or all of a buffer layer and is a substrate for crystal growth.
  11.  結晶又は積層構造体を含む素子であって、前記結晶が請求項1~8のいずれかに記載の結晶であるか、又は前記積層構造体が請求項9又は10に記載の積層構造体であることを特徴とする素子。 An element comprising a crystal or a laminated structure, wherein the crystal is the crystal according to any one of claims 1 to 8, or the laminated structure is the laminated structure according to claim 9 or 10. An element characterized by:
  12.  圧電素子又は半導体素子である請求項11記載の素子。 The element according to claim 11, which is a piezoelectric element or a semiconductor element.
  13.  結晶又は積層構造体を含む電子デバイスであって、前記結晶が請求項1~8のいずれかに記載の結晶であるか、又は前記積層構造体が請求項9又は10に記載の積層構造体であることを特徴とする電子デバイス。 An electronic device comprising a crystal or a laminated structure, wherein the crystal is the crystal according to any one of claims 1 to 8, or the laminated structure is the laminated structure according to claim 9 or 10. An electronic device characterized by:
  14.  圧電デバイス又は半導体デバイスである請求項13記載の電子デバイス。 The electronic device according to claim 13, which is a piezoelectric device or a semiconductor device.
  15.  電子デバイスを含む電子機器であって、前記電子デバイスが、請求項13又は14に記載の電子デバイスであることを特徴とする電子機器。 An electronic device including an electronic device, the electronic device being the electronic device according to claim 13 or 14.
  16.  電子機器を含むシステムであって、前記電子機器が、請求項15記載の電子機器であることを特徴とするシステム。 A system including an electronic device, wherein the electronic device is the electronic device according to claim 15.
  17.  結晶基板上に少なくとも化合物膜を形成し、ついで金属化合物を主成分として含む結晶性金属化合物からなる結晶を含む結晶膜を積層する積層構造体の製造方法であって、前記の積層を、前記化合物膜中の化合物元素を用いて前記結晶膜を形成することにより行うことを特徴とする積層構造体の製造方法。 A method for producing a laminated structure comprising forming at least a compound film on a crystal substrate, and then laminating a crystal film containing crystals made of a crystalline metal compound containing a metal compound as a main component, the laminated structure comprising: A method for manufacturing a laminated structure, characterized in that the method is carried out by forming the crystalline film using a compound element in the film.
  18.  前記金属化合物がHf、Zr及びCeの化合物を含む請求項17記載の製造方法。 The manufacturing method according to claim 17, wherein the metal compound includes a compound of Hf, Zr, and Ce.
  19.  前記結晶基板と前記結晶膜との間に、前記結晶膜及び/又は前記結晶基板の構成金属を含むアモルファス薄膜及び/又は前記結晶基板の一部に1又は2以上埋め込まれており且つ前記構成金属を含む埋込層を有している請求項9記載の積層構造体。 Between the crystal substrate and the crystal film, one or more amorphous thin films containing the crystal film and/or the constituent metals of the crystal substrate and/or one or more of the constituent metals are embedded in a part of the crystal substrate; The laminated structure according to claim 9, having a buried layer containing.
  20.  前記結晶基板と前記結晶膜との間に、前記結晶膜の構成金属を含むアモルファス薄膜及び/又は前記結晶基板の一部に1又は2以上埋め込まれており且つ前記結晶膜の構成金属を含む埋込層を有している請求項19記載の積層構造体。 Between the crystal substrate and the crystal film, an amorphous thin film containing a constituent metal of the crystal film and/or an amorphous thin film embedded in a part of the crystal substrate and containing a constituent metal of the crystal film. 20. The laminated structure according to claim 19, comprising a layer including a layer.
  21.  前記結晶基板と前記結晶膜との間に、前記結晶膜及び/又は前記結晶基板の構成金属を含むアモルファス薄膜と、前記結晶基板の一部に1又は2以上埋め込まれており且つ前記構成金属を含む埋込層とを有している請求項19記載の積層構造体。 between the crystal substrate and the crystal film, an amorphous thin film containing the crystal film and/or the constituent metal of the crystal substrate; and one or more amorphous thin films embedded in a part of the crystal substrate and containing the constituent metal 20. The laminated structure according to claim 19, further comprising a buried layer comprising:
  22.  前記構成金属がHfを含む請求項19~21のいずれかに記載の積層構造体。 The laminated structure according to any one of claims 19 to 21, wherein the constituent metal contains Hf.
  23.  前記アモルファス薄膜の膜厚が1nm~10nmである請求項19~22のいずれかに記載の積層構造体。 The laminated structure according to any one of claims 19 to 22, wherein the amorphous thin film has a thickness of 1 nm to 10 nm.
  24.  前記埋込層の形状が略逆三角形の断面形状を有する請求項19~23のいずれかに記載の積層構造体。 The laminated structure according to any one of claims 19 to 23, wherein the buried layer has a substantially inverted triangular cross-sectional shape.
  25.  積層構造体を含む電子デバイス、電子機器又はシステムであって、前記積層構造体が、請求項19~24のいずれかに記載の積層構造体であることを特徴とする電子デバイス、電子機器又はシステム。 An electronic device, electronic equipment or system comprising a laminated structure, wherein the laminated structure is the laminated structure according to any one of claims 19 to 24. .
  26.  金属化合物を主成分として含む結晶性金属化合物からなる結晶であって、前記金属化合物がHf及び/又はZrとCeとを含むことを特徴とする結晶。
     
     
    A crystal made of a crystalline metal compound containing a metal compound as a main component, characterized in that the metal compound contains Hf and/or Zr and Ce.

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JP2018070437A (en) * 2016-11-04 2018-05-10 株式会社Flosfia PRODUCTION METHOD OF CRYSTALLINE ZrO2 FILM, AND CRYSTALLINE ZrO2 FILM
JP2019216181A (en) * 2018-06-13 2019-12-19 アドバンストマテリアルテクノロジーズ株式会社 Film structure and manufacturing method of the same

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