WO2023193297A1 - 栅极驱动电路以及显示面板 - Google Patents

栅极驱动电路以及显示面板 Download PDF

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Publication number
WO2023193297A1
WO2023193297A1 PCT/CN2022/087802 CN2022087802W WO2023193297A1 WO 2023193297 A1 WO2023193297 A1 WO 2023193297A1 CN 2022087802 W CN2022087802 W CN 2022087802W WO 2023193297 A1 WO2023193297 A1 WO 2023193297A1
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WIPO (PCT)
Prior art keywords
pull
signal
down control
gate
switch unit
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PCT/CN2022/087802
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English (en)
French (fr)
Inventor
饶兵
Original Assignee
惠州华星光电显示有限公司
Tcl华星光电技术有限公司
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Application filed by 惠州华星光电显示有限公司, Tcl华星光电技术有限公司 filed Critical 惠州华星光电显示有限公司
Priority to US17/755,457 priority Critical patent/US20240153431A1/en
Publication of WO2023193297A1 publication Critical patent/WO2023193297A1/zh

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2092—Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3266—Details of drivers for scan electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0404—Matrix technologies
    • G09G2300/0408—Integration of the drivers onto the display substrate
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0267—Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0286—Details of a shift registers arranged for use in a driving circuit
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/028—Generation of voltages supplied to electrode drivers in a matrix display other than LCD

Definitions

  • the present application relates to the field of display driving technology, and in particular, to a gate driving circuit and a display panel.
  • GOA Gate On Array, gate matrix
  • a gate drive circuit characterized in that it includes an N-level GOA circuit and a signal conversion circuit connected in one-to-one correspondence with the GOA circuit;
  • the signal conversion circuit converts the input signal to be processed into a control signal, and transmits the control signal to the GOA circuit; the GOA circuit performs corresponding actions according to the control signal; the signal to be processed is the signal transmitted to the GOA circuit; the control signal is the gate Extremely high level signal or pull down control signal.
  • a display panel characterized by including a display layer and a gate drive circuit
  • the gate drive circuit is connected to the display layer
  • Gate drive circuit including N-level GOA circuit and signal conversion circuit connected in one-to-one correspondence with the GOA circuit;
  • the signal conversion circuit converts the input signal to be processed into a control signal, and transmits the control signal to the GOA circuit; the GOA circuit performs corresponding actions according to the control signal; the signal to be processed is the signal transmitted to the GOA circuit; the control signal is the gate Extremely high level signal or pull down control signal.
  • the gate drive circuit of this application includes an N-level GOA circuit and a signal conversion circuit.
  • the N-level GOA circuit is connected in sequence, and the signal conversion circuit and the GOA circuit are connected in a one-to-one correspondence.
  • the signal conversion circuit converts the input signal to be processed into a control signal, and then transmits the control signal to the GOA circuit, and the GOA circuit performs corresponding actions according to the control signal. Since the signal conversion circuit is introduced into the gate drive circuit of this application, the signal conversion circuit inputs the gate high-level signal or the pull-down control signal to the GOA circuit, thereby saving the signal line for transmitting the gate high-level signal or the pull-down control signal. Reduce the complexity of the GOA circuit area and reduce the area of the GOA circuit area.
  • Figure 1 is a schematic structural diagram of a gate driving circuit provided by the implementation of this application.
  • FIG. 2 is a schematic diagram of a signal line connection of the gate driving circuit provided by the implementation of this application.
  • Figure 3 is a schematic structural diagram of a signal conversion circuit provided by the implementation of this application.
  • Figure 4 is a waveform diagram of a signal provided by the implementation of this application.
  • FIG. 5 is another schematic diagram of signal line connection of the gate driving circuit provided by the implementation of this application.
  • Figure 6 is another structural schematic diagram of a signal conversion circuit provided by the implementation of this application.
  • Figure 7 is a waveform diagram of another signal provided by the implementation of this application.
  • GOA circuit area 1 or GOA driving layer, is used to drive the display layer in the display panel to emit light.
  • GOA circuit area 1 In traditional technology, in order to transmit signals, a variety of signal lines are provided in area 1 of the GOA circuit, such as gate control lines, pull-down control lines, data signal lines, etc. Setting up many signal lines will increase the complexity of the GOA circuit area 1, resulting in a large area of the GOA circuit area 1.
  • a gate driving circuit including an N-level GOA circuit 1 and a signal conversion circuit 2 connected to the GOA circuit 1 in one-to-one correspondence.
  • GOA circuit 1 drives the display layer of the display panel to emit light, and N-level GOA circuit 1 is connected hierarchically and connected to the scan lines in one-to-one correspondence.
  • the number of GOA circuits 1 is set according to the resolution of the display panel. For example, for a display panel with a resolution of 2048*1024, GOA circuit 1 has at least 1024 levels.
  • the signal conversion circuit 2 is used to input the required control signals to the GOA circuit 1 . Specifically, the signal conversion circuit 2 converts the input signal to be processed into a control signal, and transmits the control signal to the GOA circuit 1.
  • the GOA circuit 1 performs corresponding actions according to the control signal.
  • the control signal may be a waveform signal.
  • the control signal is a gate high level signal, where the gate high level signal is used to instruct the GOA circuit 1 to start working.
  • the control signal is a pull-down control signal, and the pull-down control signal is used to instruct the GOA circuit 1 to pull down the potential of the Q point.
  • the signal to be processed can be input by an external signal or a signal on the gate drive circuit. It should be noted that the signal to be processed is a signal transmitted to the GOA circuit 1, that is, it is directly transmitted to the GOA circuit 1 through the signal line of the gate drive circuit.
  • the following describes in detail the specific structure of the signal conversion circuit 2 and the connection relationship between related devices when the control signal is a gate high level signal or a pull-down control signal.
  • the signal to be processed when the control signal is a gate high level signal, includes a first pull-down control signal transmitted by the first pull-down control line, and a second pull-down control signal transmitted by the second pull-down control line.
  • the first pull-down control line and the second pull-down control line are signal lines arranged in the gate driving circuit.
  • the signal conversion circuit 2 is connected to the GOA circuit 1, the first pull-down control line and the second pull-down control line respectively; the GOA circuit 1 is connected to the first pull-down control line and the second pull-down control line respectively.
  • the first pull-down control line transmits the first pull-down control signal transmitted therein to the signal conversion circuit 2 and the GOA circuit 1 .
  • the second pull-down control line transmits the second pull-down control signal transmitted therein to the signal conversion circuit 2 and the GOA circuit 1 .
  • the signal conversion circuit 2 converts the first pull-down control signal and the second pull-down control signal into a gate high-level signal, and transmits the gate high-level signal to the GOA circuit 1 .
  • the signal conversion circuit 2 can be implemented in various ways.
  • the signal conversion circuit 2 includes a first switch unit 21 and a second switch unit 23; the first end of the first switch unit 21 is connected to the first switch unit 23.
  • the second end of the pull-down control line is connected to the first end of the second switch unit 23 and the GOA circuit 1 respectively; the second end of the second switch unit 23 is connected to the second pull-down control line.
  • the first switch unit 21 can be turned off and on driven by the corresponding start signal.
  • the first switch unit 21 can be implemented in various ways.
  • the first switch unit 21 includes a first thin film transistor T1; the gate and source of the first thin film transistor T1 are connected to the first pull-down
  • the control line and the drain are connected to the first end of the second switch unit 23 and the GOA circuit 1 respectively.
  • the second switch unit 23 can be turned off and on driven by the corresponding start signal.
  • the second switch unit 23 can be implemented in various ways.
  • the second switch unit 23 includes a second thin film transistor T2; the gate and source of the second thin film transistor T2 are connected to the second pull-down control.
  • the line and the drain are connected to the second end of the first switch unit 21 and the GOA circuit 1 respectively.
  • the gate high level signal first pulls down the control signal to a high level.
  • the second pull-down control signal is high level and the first pull-down control signal is low level
  • the second thin film transistor is closed, and the gate high-level signal corresponds to the high level of the second pull-down control signal.
  • the high level of the first pull-down control signal and the high level of the second pull-down control signal constitute the gate high level signal. Therefore, the gate drive circuit in this example can save gate control lines, thereby reducing the complexity of the gate drive circuit.
  • the control signal is a pull-down control signal
  • the signal to be processed includes the original pull-down control signal transmitted by the pull-down control line, and the gate high-level signal transmitted by the gate control line.
  • the pull-down control line and the gate control line are signal lines arranged in the gate driving circuit.
  • the signal conversion circuit 2 is connected to the GOA circuit 1, the pull-down control line and the gate control line respectively; the GOA circuit 1 is connected to the pull-down control line and the gate control line respectively.
  • the pull-down control line transmits the original pull-down control signal therein to the GOA circuit 1 and the signal conversion circuit 2 respectively.
  • the gate control line transmits the gate high-level signal therein to the GOA circuit 1 and the signal conversion circuit 2.
  • the signal conversion circuit 2 converts the original pull-down control signal and the gate high-level signal into a pull-down control signal, and transmits the pull-down control signal to the GOA circuit 1.
  • the signal conversion circuit 2 can be implemented in various ways.
  • the signal conversion circuit 2 includes a third switch unit 25 and a fourth switch unit 27; the first end of the third switch unit 25 is connected to the gate.
  • the second end of the fourth switch unit 27 is connected to the pull-down control line, and the third end is connected to the Vss signal.
  • the third switch unit 25 can be implemented in various ways.
  • the third switch unit 25 includes a third thin film transistor T3 and a resistor R; the gate and source of the third thin film transistor T3 are connected.
  • the gate control line and the drain are respectively connected to the first end of the fourth switching unit 27 and the GOA circuit 1 through the resistor R.
  • the fourth switch unit 27 can be implemented in various ways.
  • the fourth switch unit 27 includes a fourth thin film transistor T4; the drains of the fourth thin film transistor T4 are respectively connected to the third switch unit 25.
  • the second terminal is connected to GOA circuit 1, the gate is connected to the pull-down control line, and the source is connected to the Vss signal.
  • the gate drive circuit of this example can save one pull-down control line, thereby reducing the complexity of the gate drive circuit.
  • the gate drive circuit of this application includes an N-level GOA circuit 1 and a signal conversion circuit 2.
  • the N-level GOA circuit 1 is connected in sequence, and the signal conversion circuit 2 and the GOA circuit 1 are connected in a one-to-one correspondence.
  • the signal conversion circuit 2 converts the input signal to be processed into a control signal, and then transmits the control signal to the GOA circuit 1.
  • the GOA circuit 1 performs corresponding actions according to the control signal. Since the signal conversion circuit 2 is introduced into the gate drive circuit of this application, the signal conversion circuit 2 inputs the gate high-level signal or the pull-down control signal to the GOA circuit 1, thus saving the time of transmitting the gate high-level signal or the pull-down control signal.
  • Signal lines reduce the complexity of GOA circuit area 1 and reduce the area of GOA circuit area 1. At the same time, the production process can also be simplified.
  • Applying the gate driving circuit of the present application to a display panel provides a display panel, which includes a display layer and the gate driving circuit as described above; the gate driving circuit is connected to the display layer and used to drive the display layer to emit light.
  • the display layer emits light under the driving of the gate driving circuit to display content.
  • the gate driving circuit in this embodiment is the same as the gate driving circuit in the gate driving circuit of this application. Please refer to the foregoing embodiments for details, which will not be described again here.
  • the display panel of the present application has a simple gate drive circuit structure and a small area, making the display panel small in size, simplifying the production process and saving costs.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

本申请涉及一种栅极驱动电路以及显示面板，该栅极驱动电路包括信号转换电路；信号转换电路用于将输入的待处理信号转换成控制信号，并将控制信号传输给GOA电路；GOA电路根据控制信号执行对应的动作。本申请栅极驱动电路中引入了信号转换电路，从而节省传输栅极高电平信号或下拉控制信号的信号线，降低GOA电路区的复杂程度。

Description

栅极驱动电路以及显示面板 技术领域
本申请涉及显示驱动技术领域，特别是涉及一种栅极驱动电路以及显示面板。
 背景技术
随着显示技术的不断发展，人们对显示产品的性能要求也越来越高，例如，在高端的显示产品中，不断追求更高的刷新率和更佳的显示效果。为了提升刷新率和显示效果，传统技术会在GOA（Gate On Array，栅矩阵）电路区增加高电平信号。
 技术问题
增加高电平信号线，会增加GOA电路区的复杂度，导致GOA电路区的面积增加。
 技术解决方案
基于此，有必要针对上述技术问题，提供一种时钟信号调理电路、方法及显示面板。
一种栅极驱动电路，其特征在于，包括N级GOA电路以及与GOA电路一一对应连接的信号转换电路；
其中，信号转换电路将输入的待处理信号转换成控制信号，并将控制信号传输给GOA电路；GOA电路根据控制信号执行对应的动作；待处理信号为传输给GOA电路的信号；控制信号为栅极高电平信号或下拉控制信号。
一种显示面板，其特征在于，包括显示层以及栅极驱动电路；
栅极驱动电路连接显示层；
栅极驱动电路，包括N级GOA电路以及与GOA电路一一对应连接的信号转换电路；
其中，信号转换电路将输入的待处理信号转换成控制信号，并将控制信号传输给GOA电路；GOA电路根据控制信号执行对应的动作；待处理信号为传输给GOA电路的信号；控制信号为栅极高电平信号或下拉控制信号。
 有益效果
本申请栅极驱动电路包括N级GOA电路以及信号转换电路，N级GOA电路依次级传连接，信号转换电路与GOA电路一一对应连接。信号转换电路将输入的待处理信号转换成控制信号，然后将控制信号传输给GOA电路，GOA电路根据控制信号执行对应的动作。由于本申请栅极驱动电路中引入了信号转换电路，由信号转换电路向GOA电路输入栅极高电平信号或下拉控制信号，从而节省传输栅极高电平信号或下拉控制信号的信号线，降低GOA电路区的复杂程度，缩减GOA电路区的面积。
 附图说明
为了更清楚地说明本申请实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本申请实施提供的栅极驱动电路的结构示意图。
图2为本申请实施提供的栅极驱动电路的一种信号线连接示意图。
图3为本申请实施提供的信号转换电路的一种结构示意图。
图4为本申请实施提供的一种信号的波形图。
图5为本申请实施提供的栅极驱动电路的另一种信号线连接示意图。
图6为本申请实施提供的信号转换电路的另一种结构示意图。
图7为本申请实施提供的另一种信号的波形图。
 本发明的实施方式
为了便于理解本申请，下面将参照相关附图对本申请进行更全面的描述。附图中给出了本申请的首选实施例。但是，本申请可以以许多不同的形式来实现，并不限于本文所描述的实施例。相反地，提供这些实施例的目的是使对本申请的公开内容更加透彻全面。
需要说明的是，当一个元件被认为是“连接”另一个元件，它可以是直接连接到另一个元件并与之结合为一体，或者可能同时存在居中元件。本文所使用的术语“安装”、“一端”、“另一端”以及类似的表述只是为了说明的目的。
除非另有定义，本文所使用的所有的技术和科学术语与属于本申请的技术领域的技术人员通常理解的含义相同。本文中在本申请的说明书中所使用的术语只是为了描述具体的实施例的目的，不是旨在于限制本申请。本文所使用的术语“及／或”包括一个或多个相关的所列项目的任意的和所有的组合。
GOA电路1区，或者称之为GOA驱动层，用于驱动显示面板中的显示层发光。在传统技术中，为了传输信号，GOA电路1区内设置了多种信号线，例如，栅极控制线、下拉控制线、数据信号线等等。设置诸多的信号线，会增加GOA电路1区的复杂程度，导致GOA电路1区的面积大。
为了解决上述问题，如图1所示，提供了一种栅极驱动电路，包括N级GOA电路1以及与GOA电路1一一对应连接的信号转换电路2。
GOA电路1驱动显示面板的显示层发光，N级GOA电路1层级连接，与扫描线一一对应连接。GOA电路1的数量根据显示面板的分辨率设置，例如，分辨率为2048*1024的显示面板，GOA电路1至少有1024级。
GOA电路1在工作过程中，需要获取外界输入的信号。信号转换电路2用于向GOA电路1输入其所需要的控制信号。具体的，信号转换电路2将输入的待处理信号转换成控制信号，并将控制信号传输给GOA电路1，GOA电路1根据控制信号执行对应的动作。控制信号可以是波形信号。在一个示例中，控制信号为栅极高电平信号其中，栅极高电平信号用于指示GOA电路1启动工作。在另一个示例中，控制信号为下拉控制信号，下拉控制信号用于指示GOA电路1下拉Q点电位。需要说明的是，待处理信号可以由外界信号输入，也可以栅极驱动电路上的信号输入。需要说明的是，待处理信号为传输给GOA电路1的信号，即通过栅极驱动电路的信号线直接传输给GOA电路1。
以下详细介绍当控制信号为栅极高电平信号或下拉控制信号时，信号转换电路2的具体结构与相关器件的连接关系。
在一个示例中，当控制信号为栅极高电平信号时，待处理信号包括由第一下拉控制线传输的第一下拉控制信号，和由第二下拉控制线传输的第二下拉控制信号。其中，第一下拉控制线和第二下拉控制线为布置在栅极驱动电路的信号线。
如图2所示，信号转换电路2分别连接GOA电路1、第一下拉控制线和第二下拉控制线；GOA电路1分别连接第一下拉控制线和第二下拉控制线。第一下拉控制线将其内传输的第一下拉控制信号传输给信号转换电路2和GOA电路1。第二下拉控制线将其内传输的第二下拉控制信号传输给信号转换电路2和GOA电路1。信号转换电路2将第一下拉控制信号和第二下拉控制信号转换成栅极高电平信号，并将栅极高电平信号传输给GOA电路1。
信号转换电路2实现方式多种多样，在一个示例中，如图3所示，信号转换电路2包括第一开关单元21和第二开关单元23；第一开关单元21的第一端连接第一下拉控制线，第二端分别连接第二开关单元23的第一端和GOA电路1；第二开关单元23的第二端连接第二下拉控制线。
需要说明的是，第一开关单元21在对应的启动信号驱动下可关闭和开启。第一开关单元21实现方式多种多样，在一个示例中，如图3所示，第一开关单元21包括第一薄膜晶体管T1；第一薄膜晶体管T1的栅极和源极连接第一下拉控制线，漏极分别连接第二开关单元23的第一端和GOA电路1。
第二开关单元23在对应的启动信号驱动下可关闭和开启。第二开关单元23实现方式多种多样，在一个示例中，如图3所示，第二开关单元23包括第二薄膜晶体管T2；第二薄膜晶体管T2的栅极和源极连接第二下拉控制线，漏极分别连接第一开关单元21的第二端和GOA电路1。
以如图4所示的第一下拉控制信号和第二下拉控制信号为例进行说明，当第一下拉控制信号为高电平，第二拉控制信号为低电平时，第一薄膜晶体管闭合，栅极高电平信号的第一下拉控制信号的高电平。当第二下拉控制信号为高电平，第一拉控制信号为低电平时，第二薄膜晶体管闭合，栅极高电平信号的第二下拉控制信号的高电平。由第一下拉控制信号的高电平和第二下拉控制信号的高电平组成栅极高电平信号。由此，该示例中的栅极驱动电路，可以节省栅极控制线，从而降低栅极驱动电路的复杂程度。
在另一个示例中，当控制信号为下拉控制信号；待处理信号包括由下拉控制线传输的原始下拉控制信号，和由栅极控制线传输的栅极高电平信号。其中，下拉控制线和栅极控制线传为布置在栅极驱动电路的信号线。
如图5所示，信号转换电路2分别连接GOA电路1、下拉控制线和栅极控制线；GOA电路1分别连接下拉控制线和栅极控制线。需要说明的是，下拉控制线将其内的原始下拉控制信号分别传输给GOA电路1和信号转换电路2。栅极控制线将其内的栅极高电平信号传输给GOA电路1和信号转换电路2。信号转换电路2将原始下拉控制信号和栅极高电平信号转换成下拉控制信号，并将下拉控制信号传输给GOA电路1。
信号转换电路2实现的方式多种多样，在一个示例中，如图6所示，信号转换电路2包括第三开关单元25和第四开关单元27；第三开关单元25的第一端连接栅极控制线，第二端分别连接第四开关单元27的第一端和GOA电路1；第四开关单元27的第二端连接下拉控制线，第三端连接Vss信号。
第三开关单元25实现的方式多种多样，在一个示例中，如图6所示，第三开关单元25包括第三薄膜晶体管T3和电阻R；第三薄膜晶体管T3的栅极和源极连接栅极控制线，漏极通过电阻R分别连接第四开关单元27的第一端和GOA电路1。
第四开关单元27实现的方式多种多样，在一个示例中，如图6所示，第四开关单元27包括第四薄膜晶体管T4；第四薄膜晶体管T4的漏极分别连接第三开关单元25的第二端和GOA电路1，栅极连接下拉控制线，源极连接Vss信号。
以如图7所示的原始下拉控制信号和栅极高电平信号为例进行说明，在原始下拉控制信号为高电平时，第四薄膜晶体管T4闭合，下拉控制信号为Vss信号，即下拉控制信号为低电平。在原始下拉控制信号为低电平时，第四薄膜晶体管T4断开，下拉控制信号为栅极高电平信号，即下拉控制信号为高电平。因此，该示例的栅极驱动电路，可以节省一根下拉控制线，从而降低栅极驱动电路的复杂程度。
本申请栅极驱动电路包括N级GOA电路1以及信号转换电路2，N级GOA电路1依次级传连接，信号转换电路2与GOA电路1一一对应连接。信号转换电路2将输入的待处理信号转换成控制信号，然后将控制信号传输给GOA电路1，GOA电路1根据控制信号执行对应的动作。由于本申请栅极驱动电路中引入了信号转换电路2，由信号转换电路2向GOA电路1输入栅极高电平信号或下拉控制信号，从而节省传输栅极高电平信号或下拉控制信号的信号线，降低GOA电路1区的复杂程度，缩减GOA电路1区的面积。同时也可以简化生产工艺。
将本申请栅极驱动电路应用到显示面板上，提供了一种显示面板，包括显示层以及如上述的栅极驱动电路；栅极驱动电路连接显示层，用于驱动显示层发光。
需要说明的是，显示层在栅极驱动电路的驱动下发光，以显示内容。本实施例中的栅极驱动电路与本申请栅极驱动电路中的栅极驱动电路相同，详情请参照前述实施例，此处不再赘述。
本申请显示面板，由于栅极驱动电路结构简单，面积小，使得显示面板体积小，简化生产工艺，节省成本。
以上所述实施例的各技术特征可以进行任意的组合，为使描述简洁，未对上述实施例中的各个技术特征所有可能的组合都进行描述，然而，只要这些技术特征的组合不存在矛盾，都应当认为是本说明书记载的范围。
以上所述实施例仅表达了本申请的几种实施方式，其描述较为具体和详细，但并不能因此而理解为对申请专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本申请构思的前提下，还可以做出若干变形和改进，这些都属于本申请的保护范围。因此，本申请专利的保护范围应以所附权利要求为准。

Claims (18)

  1. 一种栅极驱动电路，其特征在于，包括N级GOA电路以及与所述GOA电路一一对应连接的信号转换电路；
    其中，所述信号转换电路将输入的待处理信号转换成控制信号，并将所述控制信号传输给所述GOA电路；所述GOA电路根据所述控制信号执行对应的动作；所述待处理信号为传输给所述GOA电路的信号；所述控制信号为栅极高电平信号或下拉控制信号。
  2. 根据权利要求1所述的栅极驱动电路，其特征在于，当所述控制信号为栅极高电平信号时，所述待处理信号包括由第一下拉控制线传输的第一下拉控制信号，和由第二下拉控制线传输的第二下拉控制信号；
    所述信号转换电路分别连接所述GOA电路、所述第一下拉控制线和所述第二下拉控制线；所述GOA电路分别连接所述第一下拉控制线和所述第二下拉控制线；
    其中，所述信号转换电路将所述第一下拉控制信号和所述第二下拉控制信号转换成所述栅极高电平信号，并将所述栅极高电平信号传输给所述GOA电路。
  3. 根据权利要求2所述的栅极驱动电路，其特征在于，所述信号转换电路包括第一开关单元和第二开关单元；
    所述第一开关单元的第一端连接所述第一下拉控制线，第二端分别连接所述第二开关单元的第一端和所述GOA电路；
    所述第二开关单元的第二端连接所述第二下拉控制线。
  4. 根据权利要求3所述的栅极驱动电路，其特征在于，所述第一开关单元包括第一薄膜晶体管；
    所述第一薄膜晶体管的栅极和源极连接所述第一下拉控制线，漏极分别连接所述第二开关单元的第一端和所述GOA电路。
  5. 根据权利要求3所述的栅极驱动电路，其特征在于，所述第二开关单元包括第二薄膜晶体管；
    所述第二薄膜晶体管的栅极和源极连接所述第二下拉控制线，漏极分别连接所述第一开关单元的第二端和所述GOA电路。
  6. 根据权利要求1所述的栅极驱动电路，其特征在于，当所述控制信号为下拉控制信号；所述待处理信号包括由下拉控制线传输的原始下拉控制信号，和由栅极控制线传输的栅极高电平信号；
    所述信号转换电路分别连接所述GOA电路、所述下拉控制线和所述栅极控制线；所述GOA电路分别连接所述下拉控制线和所述栅极控制线；
    其中，所述信号转换电路将所述原始下拉控制信号和所述栅极高电平信号转换成所述下拉控制信号，并将所述下拉控制信号传输给所述GOA电路。
  7. 根据权利要求6所述的栅极驱动电路，其特征在于，所述信号转换电路包括第三开关单元和第四开关单元；
    所述第三开关单元的第一端连接所述栅极控制线，第二端分别连接所述第四开关单元的第一端和所述GOA电路；
    所述第四开关单元的第二端连接所述下拉控制线，第三端连接Vss信号。
  8. 根据权利要求7所述的栅极驱动电路，其特征在于，所述第三开关单元包括第三薄膜晶体管和电阻；
    所述第三薄膜晶体管的栅极和源极连接所述栅极控制线，漏极通过所述电阻分别连接所述第四开关单元的第一端和所述GOA电路。
  9. 根据权利要求7所述的栅极驱动电路，其特征在于，所述第四开关单元包括第四薄膜晶体管；
    所述第四薄膜晶体管的漏极分别连接所述第三开关单元的第二端和所述GOA电路，栅极连接所述下拉控制线，源极连接所述Vss信号。
  10. 一种显示面板，其特征在于，包括显示层以及栅极驱动电路；
    所述栅极驱动电路连接所述显示层；
    所述栅极驱动电路，包括N级GOA电路以及与所述GOA电路一一对应连接的信号转换电路；
    其中，所述信号转换电路将输入的待处理信号转换成控制信号，并将所述控制信号传输给所述GOA电路；所述GOA电路根据所述控制信号执行对应的动作；所述待处理信号为传输给所述GOA电路的信号；所述控制信号为栅极高电平信号或下拉控制信号。
  11. 根据权利要求10所述的显示面板，其特征在于，当所述控制信号为栅极高电平信号时，所述待处理信号包括由第一下拉控制线传输的第一下拉控制信号，和由第二下拉控制线传输的第二下拉控制信号；
    所述信号转换电路分别连接所述GOA电路、所述第一下拉控制线和所述第二下拉控制线；所述GOA电路分别连接所述第一下拉控制线和所述第二下拉控制线；
    其中，所述信号转换电路将所述第一下拉控制信号和所述第二下拉控制信号转换成所述栅极高电平信号，并将所述栅极高电平信号传输给所述GOA电路。
  12. 根据权利要求11所述的显示面板，其特征在于，所述信号转换电路包括第一开关单元和第二开关单元；
    所述第一开关单元的第一端连接所述第一下拉控制线，第二端分别连接所述第二开关单元的第一端和所述GOA电路；
    所述第二开关单元的第二端连接所述第二下拉控制线。
  13. 根据权利要求12所述的显示面板，其特征在于，所述第一开关单元包括第一薄膜晶体管；
    所述第一薄膜晶体管的栅极和源极连接所述第一下拉控制线，漏极分别连接所述第二开关单元的第一端和所述GOA电路。
  14. 根据权利要求12所述的显示面板，其特征在于，所述第二开关单元包括第二薄膜晶体管；
    所述第二薄膜晶体管的栅极和源极连接所述第二下拉控制线，漏极分别连接所述第一开关单元的第二端和所述GOA电路。
  15. 根据权利要求10所述的栅极驱动电路，其特征在于，当所述控制信号为下拉控制信号；所述待处理信号包括由下拉控制线传输的原始下拉控制信号，和由栅极控制线传输的栅极高电平信号；
    所述信号转换电路分别连接所述GOA电路、所述下拉控制线和所述栅极控制线；所述GOA电路分别连接所述下拉控制线和所述栅极控制线；
    其中，所述信号转换电路将所述原始下拉控制信号和所述栅极高电平信号转换成所述下拉控制信号，并将所述下拉控制信号传输给所述GOA电路。
  16. 根据权利要求15所述的栅极驱动电路，其特征在于，所述信号转换电路包括第三开关单元和第四开关单元；
    所述第三开关单元的第一端连接所述栅极控制线，第二端分别连接所述第四开关单元的第一端和所述GOA电路；
    所述第四开关单元的第二端连接所述下拉控制线，第三端连接Vss信号。
  17. 根据权利要求16所述的栅极驱动电路，其特征在于，所述第三开关单元包括第三薄膜晶体管和电阻；
    所述第三薄膜晶体管的栅极和源极连接所述栅极控制线，漏极通过所述电阻分别连接所述第四开关单元的第一端和所述GOA电路。
  18. 根据权利要求16所述的栅极驱动电路，其特征在于，所述第四开关单元包括第四薄膜晶体管；
    所述第四薄膜晶体管的漏极分别连接所述第三开关单元的第二端和所述GOA电路，栅极连接所述下拉控制线，源极连接所述Vss信号。
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