WO2023185070A1 - 一种射频电路单元的射频域校准***及方法 - Google Patents

一种射频电路单元的射频域校准***及方法 Download PDF

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Publication number
WO2023185070A1
WO2023185070A1 PCT/CN2022/136570 CN2022136570W WO2023185070A1 WO 2023185070 A1 WO2023185070 A1 WO 2023185070A1 CN 2022136570 W CN2022136570 W CN 2022136570W WO 2023185070 A1 WO2023185070 A1 WO 2023185070A1
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calibration
circuit
unit
radio frequency
adjustment
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PCT/CN2022/136570
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English (en)
French (fr)
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黄风义
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东南大学
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Priority to US18/565,533 priority Critical patent/US12003281B1/en
Publication of WO2023185070A1 publication Critical patent/WO2023185070A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B17/00—Monitoring; Testing
    • H04B17/20—Monitoring; Testing of receivers
    • H04B17/21—Monitoring; Testing of receivers for calibration; for correcting measurements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02—Transmitters
    • H04B1/04—Circuits
    • H04B1/0475—Circuits with means for limiting noise, interference or distortion
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B17/00—Monitoring; Testing
    • H04B17/10—Monitoring; Testing of transmitters
    • H04B17/11—Monitoring; Testing of transmitters for calibration
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B17/00—Monitoring; Testing
    • H04B17/10—Monitoring; Testing of transmitters
    • H04B17/11—Monitoring; Testing of transmitters for calibration
    • H04B17/14—Monitoring; Testing of transmitters for calibration of the whole transmission and reception path, e.g. self-test loop-back

Definitions

  • the invention belongs to the field of electronic science and technology, and relates to a radio frequency domain calibration system and method for radio frequency integrated circuit devices and transceivers.
  • radio frequency transceiver circuit system (or radio frequency transceiver) needs to switch in real time between different functions, different modes, different protocols, a wide range of different frequency bands and channel bandwidths.
  • Radio frequency devices, radio frequency modules, and radio frequency circuit systems composed of circuit components are called radio frequency circuit units or circuit units for short. Due to deviations in device models, design simulations and manufacturing processes, differences in working conditions, and aging of devices and circuits caused by long-term use, circuit units will not work in the expected optimal state, resulting in distortion and mismatch.
  • the calibration circuit unit that controls and calibrates the functional working circuit unit is referred to as the calibration unit.
  • the integrated digital calibration algorithm is mainly suitable for wireless mobile communication transceiver circuits, and may not be applicable to other circuit systems with different functions or structures. Due to the integration of a large number of algorithms, the digital logic circuit layout area is close to two times the single-channel transceiver chip layout area. One percent, increasing the cost of the chip.
  • the invention patent "Amplifier calibration” (CN201710859254.2, 2017.09.21, reference patent 1) discloses a calibration technology for operational amplifiers. In view of the deterioration of common mode rejection ratio, gain and other parameters faced by processed operational amplifiers, according to the amplifier Based on the test results, configure the component parameters (such as resistor network) at the input end of the operational amplifier to achieve calibration of the operational amplifier.
  • This calibration technology requires manual configuration of component parameters of the operational amplifier circuit and does not have a software-controlled automatic calibration function. In addition, this technique is only applicable to operational amplifiers and cannot perform RF domain calibration of other circuit units.
  • the invention patent "Digital pre-distortion (DPD) in a wireless transmitter” discloses a digital domain pre-distortion calibration technology for wireless transmitters (or transmission links) by detecting output power. (referred to as digital predistortion).
  • This technology needs to first convert the received transmission signal into a digital signal through an ADC, and use the digital predistortion calibration (or correction) algorithm of the digital logic circuit. This technology does not have RF domain predistortion capabilities.
  • the invention patent "A low-power radio frequency transceiver device for wireless sensor network applications” (CN201210548579.6, 2012.12.17, refer to patent 4), in which the automatic frequency tuning circuit is used to control the frequency characteristics of the filter and reduce the process Effect of error on center frequency and bandwidth.
  • This technology can only improve the consistency and reliability of filters with a single, fixed center frequency and bandwidth.
  • the transceiver circuit system Once the transceiver circuit system is solidified, it cannot adjust the circuit structure and working parameters of the filter in real time and adaptively according to different working conditions. and calibration, it is also impossible to achieve real-time optimization of the filter's comprehensive performance (such as frequency, bandwidth, etc.).
  • the invention patent "Programmable Radio Transceiver” (200680037710, 2006.08.11, refer to Patent 5) discloses a programmable transceiver using a transmission line inductor to achieve switching between different frequency bands and different protocols.
  • the transceiver Circuit unit performance parameters (such as bandwidth, gain, noise figure, output power, efficiency, linearity, vector error magnitude EVM, adjacent channel suppression, interference suppression, attenuation) cannot be achieved by adjusting the circuit structure, geometric scale and circuit operating parameters. accuracy, phase shift accuracy, matching, etc.).
  • digital calibration methods are usually only applicable to specific modes or structural types of transceiver circuit systems or circuit modules, and have poor flexibility and universality for different applications.
  • the received signal needs to be converted into a digital signal through the analog-to-digital signal converter ADC, and then calibrated in the digital domain, which reduces the cost of different circuits of the transceiver.
  • Module configuration flexibility The traditional calibration method for some RF circuit devices (such as frequency synthesizers and filters) relies on special circuit structures. Once the circuit is solidified, it is impossible to perform software-controlled automatic and real-time adjustment of the circuit structure and operating parameters.
  • the traditional calibration method of operational amplifiers Calibration methods require manual configuration.
  • the present invention provides a radio frequency domain calibration system and method, which does not require the use of an analog-to-digital signal converter ADC to convert analog signals into digital signals, but configures corresponding calibration for circuit elements, devices, modules, and transceivers in the radio frequency domain.
  • Unit by adjusting the circuit structure, geometric scale, working parameters of the circuit unit and the working parameters of the input and output nodes, the radio frequency of circuit units of different types (communications, radar, navigation, electronic countermeasures, etc.), different modes or protocols can be realized.
  • the domain is programmable, configurable, adaptive, real-time regulated and calibrated to make it work in the expected state and achieve performance optimization.
  • the purpose of the present invention is to provide a radio frequency domain (also called analog domain in a broad sense) calibration system and method of a radio frequency circuit unit.
  • the radio frequency domain also called analog domain in a broad sense
  • the circuit structure and geometric scale of the circuit unit are calibrated through the calibration unit.
  • working parameters, and working parameters of input and output nodes are adjusted to achieve programmable, configurable, adaptive, real-time control and calibration of radio frequency circuit units of different types, different working conditions, different structures or modes in the radio frequency domain, so that they can work In the expected state and achieve performance optimization.
  • the radio frequency circuit (Agile Programmable Calibrated RFIC, APCR) implemented based on the radio frequency domain (or analog domain) real-time, adaptive programmable calibration technology (RF-domain Agile Programmable Calibration, RAPC) of the present invention
  • Or analog circuit is suitable for different types of communication, radar, navigation, tracking, etc., and is suitable for radio frequency integrated circuits (RFIC, including system structures such as frequency conversion type or phase shifting type, as well as time division duplex TDD, frequency division duplex FDD , full-duplex FD and other modes), optoelectronic integrated circuits (OEIC), and digital radio (digital RF) and other integrated circuits.
  • RFIC radio frequency integrated circuits
  • OEIC optoelectronic integrated circuits
  • digital radio digital radio
  • a radio frequency domain calibration system for a radio frequency circuit unit including a calibration unit and a radio frequency circuit unit;
  • the radio frequency circuit unit includes one or more of radio frequency circuit devices, circuit modules, and transceiver circuit systems composed of circuit elements;
  • the calibration unit includes a calibration control unit and a calibration adjustment unit;
  • the calibration control unit includes memory, arithmetic unit, logic control unit and bus;
  • the memory is used to store calibration instructions
  • the operation unit is used for data operation in the calibration control unit;
  • the logic control unit is used to retrieve instructions from the memory, decode them and send out corresponding control signals;
  • the bus is used to connect the computing unit, memory and logic control unit, and realize the information transfer and interaction between the computing unit, memory and logic control unit;
  • the calibration control unit generates a calibration control signal to drive and regulate the calibration adjustment unit
  • the calibration adjustment unit includes a switch or switch array network, and one or more combinations of a tuning network, a resistor network, a transmission line network, and a transformer network;
  • the component parameters of the inductance, capacitance, resistance, transmission line, and transformer of the calibration adjustment unit adopt discrete values or continuously variable values
  • the calibration adjustment unit regulates the structure, geometric scale, working parameters of the radio frequency circuit unit and the working parameters of the input and output nodes through the switch or switch array network;
  • the calibration control unit is implemented through silicon-based semiconductor technology, and the radio frequency circuit unit and calibration adjustment unit are implemented through silicon-based semiconductor technology or compound semiconductor technology; circuits of the same process are integrated through monolithic integration, and circuits of different processes are integrated through system-level packaging.
  • the calibration system also includes a microprocessor (MCU) for radio frequency domain calibration; the calibration control unit of some or all circuit units is integrated into the microprocessor (MCU) for radio frequency domain calibration, using Programmable, real-time control and calibration of circuit units.
  • MCU microprocessor
  • the radio frequency transceiver circuit system (transceiver for short) or circuit module that is controlled and calibrated through the calibration unit is composed of a single channel or multiple channels, and has a frequency conversion structure, a phase control structure, or a combination of the two. , and works in one or more combinations of communication, radar, navigation, tracking, imaging, measurement, electronic countermeasures and other modes.
  • the operating frequency covers the radio frequency band, or microwave, millimeter wave band, or terahertz frequency band, or different from the above combination of frequency bands.
  • circuit devices and circuit modules that regulate and calibrate a variable frequency transceiver referred to as a variable frequency transceiver
  • the receiving link (receiver) of the frequency conversion transceiver after the antenna receives the signal, before the analog-to-digital signal converter (ADC), the circuit components include but are not limited to low-noise amplifier (LNA), down-conversion in order of connection.
  • LNA low-noise amplifier
  • the transmission link (transmitter) of the variable frequency transceiver after the digital-to-analog signal converter (DAC) and before the antenna transmits the signal
  • the circuit components include but are not limited to the transmitter filter (Tx Filter), transmitter, etc. in order of connection.
  • the frequency synthesizer is connected to the upconversion mixer to provide the local oscillator signal for the transmit link;
  • the calibration adjustment unit of the low-noise amplifier, mixer (including down-conversion mixer, up-conversion mixer), power amplifier or drive amplifier each includes a bias adjustment sub-unit, an amplitude adjustment sub-unit, and a phase adjustment sub-unit. ;
  • the calibration adjustment units of programmable gain amplifiers, filters (including receiver filters, transmitter filters), and operational amplifiers each include an offset adjustment subunit, an amplitude adjustment subunit, a phase adjustment subunit, and a DC offset elimination subunit;
  • the calibration adjustment unit of the frequency synthesizer includes an amplitude adjustment subunit and a phase adjustment subunit;
  • the receiver frequency synthesizer and transmitter frequency synthesizer can be shared with time division duplex (TDD) and full duplex (FD) transceivers;
  • TDD time division duplex
  • FD full duplex
  • the frequency conversion transceiver includes one or more channels
  • the calibration unit controls the calibration adjustment unit of the circuit unit in each channel to achieve circuit unit performance parameters (such as carrier frequency, bandwidth, gain, noise figure, output power, efficiency, linearity, vector error magnitude EVM, adjacent channel suppression , interference suppression, matching, etc.) adjustment, calibration and optimization.
  • circuit unit performance parameters such as carrier frequency, bandwidth, gain, noise figure, output power, efficiency, linearity, vector error magnitude EVM, adjacent channel suppression , interference suppression, matching, etc.
  • phase-controlled transceivers circuit devices and circuit modules that regulate and calibrate phase-controlled transceivers (referred to as phase-controlled transceivers) or circuit modules in the radio frequency domain through calibration units in the radio frequency domain include:
  • the circuit components that are controlled and calibrated through the calibration unit include but are not limited to low-noise amplifier, receiver phase shifter, receiver attenuator, power synthesizer;
  • the circuit components that are regulated and calibrated through the calibration unit include but are not limited to the transmitter attenuator, Transmitter phase shifters, power amplifiers or driver amplifiers;
  • the calibration adjustment unit of the phase shifter includes a bias adjustment subunit and a phase adjustment subunit;
  • the calibration adjustment unit of the attenuator includes a bias adjustment subunit and an amplitude adjustment subunit;
  • the calibration adjustment unit of the power combiner and power divider includes a transmission line adjustment subunit
  • the phased transceiver includes one or more channels
  • the calibration unit controls the calibration adjustment unit of the circuit unit in each channel to achieve circuit unit performance parameters (such as phase shift accuracy, attenuation accuracy, gain, linearity, noise figure, operating frequency range, input matching, output matching, insertion loss, isolation, etc.).
  • circuit unit performance parameters such as phase shift accuracy, attenuation accuracy, gain, linearity, noise figure, operating frequency range, input matching, output matching, insertion loss, isolation, etc.
  • the calibration system includes a reconfigurable transceiver or circuit module, a reconfigurable adjustment circuit, and a calibration unit;
  • reconfigurable adjustment circuits and reconfigurable circuit devices or modules such as frequency synthesizers, low noise amplifiers, power amplifiers, mixers, filters, etc.
  • the reconfigurable regulation circuit includes a switch or switch array network, and one or more combinations of a tuning network, a resistor network, a transmission line network, and a transformer network;
  • the tuning network and resistor network of the reconfigurable adjustment circuit in which the component parameters of inductors, capacitors, resistors, transmission lines, and transformers adopt discrete values or continuously variable values to achieve discrete and adjustable performance parameters such as carrier frequency range and channel bandwidth. or continuously adjustable;
  • the calibration control unit controls the calibration adjustment unit so that the reconfigurable transceiver or circuit module works in the expected state (such as mode, frequency band, channel bandwidth, protocol, etc.), and performs real-time switching and performance optimization.
  • the expected state such as mode, frequency band, channel bandwidth, protocol, etc.
  • the radio frequency domain calibration system also includes a feedback circuit unit
  • the feedback circuit unit includes a calibration observation receiver, a signal detection unit and a signal transmission unit;
  • Calibrate the observation receiver including but not limited to one of a low noise amplifier, a down-conversion mixer, a receiver frequency synthesizer, a receiver programmable gain amplifier, a receiver filter, or Multiple circuit devices, or receive links that multiplex the transceiver circuit system;
  • the calibration observation receiver is used to receive the signal output from the radio frequency circuit unit
  • the signal detection unit is used to classify, extract, amplify and quantify the signals received by the calibration observation receiver, and detect useful signals;
  • the signal transmission unit is used to transmit useful signals detected by the signal detection unit to the calibration control unit.
  • the feedback circuit unit is used for radio frequency domain predistortion calibration of the transmit link in the transceiver circuit system.
  • the radio frequency domain calibration system also includes a joint calibration circuit of the radio frequency domain and the digital domain;
  • the joint calibration circuit of the radio frequency domain and the digital domain includes a calibration unit and a circuit unit of the radio frequency domain, a microprocessor MCU for digital domain calibration, an analog-to-digital signal converter ADC/digital-to-analog signal converter DAC, and a digital calibration algorithm circuit. , data interface circuit, baseband circuit;
  • the digital calibration algorithm circuit is used to implement the digital calibration algorithm program
  • the digital calibration algorithm program includes quadrature error correction (or calibration) algorithm, DC offset correction algorithm, IQ path mismatch correction algorithm, local oscillator leakage correction algorithm, image suppression correction algorithm, and digital predistortion correction algorithm;
  • the microprocessor MCU for digital domain calibration runs the digital calibration control program and controls the digital calibration algorithm circuit, data interface circuit and baseband circuit;
  • Data interface circuits (such as high-speed Serdes interface) are used for information exchange between digital calibration algorithm circuits and baseband circuits;
  • Baseband circuits are used to process digital baseband signals.
  • a calibration method for the radio frequency domain calibration system of the above-mentioned radio frequency circuit unit In the radio frequency domain, the circuit structure, geometric scale, and working parameters of the radio frequency circuit unit are controlled and calibrated in real time through the calibration unit, including the following steps:
  • Step 1 External input or internal generation of calibration instructions
  • Step 2 The memory in the calibration control unit receives and stores the calibration instructions
  • Step 3-1 The logic control unit in the calibration control unit retrieves the calibration instructions from the memory
  • Step 3-2 The operation unit in the calibration control unit performs data operations according to the calibration instructions
  • Step 3-3 The data generated by the operation unit is transmitted to the logic control unit through the bus for decoding;
  • Step 3-4 The logic control unit outputs the calibration control signal to drive and regulate the calibration adjustment unit;
  • Step 4 The calibration and adjustment unit controls the structure, geometric scale, working parameters of the radio frequency circuit unit and the working parameters of the input and output nodes through the switch or switch array network;
  • the calibration control unit controls the radio frequency circuit unit through the calibration adjustment unit to make it work in the expected state, and adjusts the circuit unit performance parameters (such as carrier frequency, bandwidth, gain, noise figure, output power, efficiency, linearity , vector error amplitude EVM, adjacent channel suppression, interference suppression, attenuation accuracy, phase shift accuracy, matching, etc.) are adjusted to achieve programmable, configurable, adaptive, real-time calibration and performance optimization of the RF circuit unit;
  • the circuit unit performance parameters such as carrier frequency, bandwidth, gain, noise figure, output power, efficiency, linearity , vector error amplitude EVM, adjacent channel suppression, interference suppression, attenuation accuracy, phase shift accuracy, matching, etc.
  • the calibration adjustment unit regulates the structure, geometric scale, working parameters (such as voltage, gain, amplitude, phase, matching, etc.) of the circuit unit and the working parameters of the input and output nodes through the switch or switch array network;
  • the component parameters of the calibration adjustment unit such as inductors, capacitors, resistors, transmission lines, and transformers adopt discrete values or continuously variable values, thereby achieving discrete or continuously adjustable performance parameters such as carrier frequency and channel bandwidth;
  • the inductor is adjusted through parameters such as the number of turns, radius, and line width.
  • the capacitor is adjusted through parameters such as plate length and width.
  • the resistance and transmission line are adjusted through geometric or electrical scales such as length and width.
  • the transformer is adjusted through the parameters of the coupled inductor. ;
  • the circuit structure, geometric scale, and working parameters of the circuit unit are selected through switches or switch array networks.
  • step 4 the method for calibrating the frequency conversion transceiver in the radio frequency domain includes the following steps:
  • Step 4-A1 Calibrate the circuit device by adjusting the calibration adjustment unit corresponding to the circuit device through the calibration control unit, including:
  • the calibration control unit controls the calibration adjustment unit of the low-noise amplifier to achieve calibration of the low-noise amplifier performance parameters (such as noise coefficient, gain, linearity, etc.);
  • the calibration control unit regulates the calibration adjustment unit of the mixer (including down-conversion mixer and up-conversion mixer) to achieve the calibration of mixer performance parameters (such as noise figure, gain, linearity, etc.);
  • the calibration control unit controls the calibration adjustment unit of the power amplifier or drive amplifier to achieve calibration of the power amplifier or drive amplifier performance parameters (such as gain, output power, efficiency, linearity, etc.);
  • the calibration control unit controls the calibration adjustment unit of the programmable gain amplifier (including receiver PGA and transmitter PGA) to achieve DC offset calibration of the programmable gain amplifier and other performance parameters (such as gain, flatness, total harmonic distortion, Calibration of IQ two-way mismatch, etc.);
  • the calibration control unit controls the calibration adjustment unit of the filter (including receiver filter, transmitter filter) to achieve calibration of the filter's DC offset and other performance parameters (such as center frequency, bandwidth, gain, flatness, and total harmonic distortion). , roll-off speed, IQ two-way mismatch, etc.) calibration;
  • the center frequency of the RF filter By adjusting the center frequency of the RF filter, the center frequency of the transceiver is adjusted and calibrated; by adjusting the bandwidth of the IF filter, the channel bandwidth of the transceiver is adjusted and calibrated;
  • the calibration control unit controls the calibration adjustment unit of the operational amplifier to realize the DC offset calibration of the operational amplifier and other performance parameters (such as gain, phase margin, gain bandwidth product, slew rate, power supply rejection ratio, common mode rejection ratio, etc.) calibration;
  • the calibration control unit regulates the calibration adjustment unit of the frequency synthesizer (including the receiver FS and the transmitter FS) to realize the performance parameters of the frequency synthesizer (such as the frequency, amplitude, phase noise, jitter, and quadrature mismatch of the local oscillator signal, etc.);
  • Step 4-A2 Calibrate the circuit module through the calibration adjustment unit corresponding to the calibration control unit, including:
  • the calibration adjustment unit of the receiver RF front-end circuit module including the low-noise amplifier and down-conversion mixer is controlled to realize the performance parameters of the receiver RF front-end circuit module (such as input matching, output matching, operating frequency range, noise coefficients, gains, etc.);
  • the calibration adjustment unit of the transmitter RF front-end circuit module including the power amplifier and upconversion mixer is controlled to realize the performance parameters of the transmitter RF front-end circuit module (such as input matching, output matching, operating frequency range, output power , gain, etc.) calibration;
  • the calibration control unit controls the calibration adjustment unit of the analog baseband circuit module including the programmable gain amplifier and filter to achieve calibration of the analog baseband circuit module performance parameters (such as bandwidth, gain, stability, etc.);
  • Step 4-A3 Calibrate the receiving link and transmitting link in the frequency conversion transceiver through the calibration control unit and the corresponding calibration adjustment unit, including:
  • the calibration control unit controls the calibration adjustment unit of the receiving link in the variable frequency transceiver to realize the control of the receiving link performance parameters (such as input matching, output matching, operating frequency range, noise figure, gain, etc.) in the variable frequency transceiver. calibration;
  • the calibration control unit controls the calibration adjustment unit of the transmission link in the frequency conversion transceiver to realize the control of the transmission link performance parameters (such as input matching, output matching, operating frequency range, output power, gain, etc.) in the frequency conversion transceiver. calibration;
  • the calibration control unit regulates the structure, geometric scale, working parameters of the circuit devices or circuit modules of each channel receiving link and transmitting link in the frequency conversion transceiver, as well as the working parameters of the input and output nodes by regulating the calibration adjustment unit. , to achieve real-time calibration and performance optimization of the frequency conversion transceiver.
  • the phase-controlled transceiver is regulated and calibrated, including:
  • Step 4-B1 Calibrate the circuit device by adjusting the calibration adjustment unit corresponding to the circuit device through the calibration control unit, including:
  • the calibration control unit controls the bias adjustment subunit, amplitude adjustment subunit, and phase adjustment subunit of the low-noise amplifier to calibrate the performance parameters (such as noise figure, gain, linearity, etc.) of the low-noise amplifier;
  • the calibration control unit controls the bias adjustment subunit, amplitude adjustment subunit, and phase adjustment subunit of the power amplifier or drive amplifier, and performs performance parameters (such as gain, output power, efficiency, linearity, etc.) of the power amplifier or drive amplifier. calibration;
  • the calibration control unit regulates the bias adjustment sub-unit and phase adjustment sub-unit of the phase shifter (including receiver phase shifter and transmitter phase shifter) to realize the control of phase shifter performance parameters (such as phase shift accuracy, gain, linearity calibration, noise figure, etc.);
  • the attenuator performance parameters (such as attenuation accuracy, gain, linearity, noise coefficient, etc.) can be adjusted. etc.);
  • the calibration control unit regulates the transmission line structure and geometric scale of the transmission line adjustment subunit in the power combiner and power divider to achieve calibration of the performance parameters (such as matching, insertion loss, isolation, etc.) of the power combiner and power divider;
  • Step 4-B2 Calibrate the circuit module through the calibration adjustment unit corresponding to the calibration control unit, including:
  • the input matching adjustment subunit and the output matching adjustment subunit of the amplitude and phase control circuit module including the receiver phase shifter and receiver attenuator are controlled to realize the performance parameters of the receiver amplitude and phase control circuit module (such as input matching , output matching, operating frequency range, noise figure, gain, etc.) calibration;
  • the input matching adjustment sub-unit and the output matching adjustment sub-unit of the amplitude and phase control circuit module including the transmitter phase shifter and transmitter attenuator are controlled to realize the performance parameters of the transmitter amplitude and phase control circuit module (such as input matching , output matching, operating frequency range, output power, gain, etc.) calibration;
  • Step 4-B3 Use the calibration control unit to control the receiving link and transmitting link in the phase-controlled transceiver. Calibrate the receiving link and transmitting link in the phase-controlled transceiver through the corresponding calibration adjustment unit, including:
  • the performance parameters of the receiving link in the phase-controlled transceiver such as input matching, output matching , operating frequency range, noise figure, gain, etc.
  • calibration of transmit link performance parameters such as input matching, output matching, operating frequency range, output power, gain, etc.
  • the calibration control unit regulates the structure, geometric scale, working parameters of the circuit devices or circuit modules of each channel receiving link and transmitting link in the phase-controlled transceiver, as well as the working parameters of the input and output nodes by regulating the calibration adjustment unit. Control and control to achieve real-time calibration and performance optimization of phase-controlled transceivers.
  • the calibration method of the radio frequency domain calibration system controls the calibration adjustment unit through the calibration control unit.
  • the reconfigurable transceiver or circuit module is controlled, including:
  • Step 4-C1 The calibration control unit controls the calibration adjustment unit to control the circuit structure, geometric scale, working parameters of the reconfigurable adjustment circuit and the reconfigurable circuit device, the working parameters of the input and output nodes, as well as the frequency and bandwidth;
  • Step 4-C2 The calibration control unit controls the calibration adjustment unit to control the working parameters of the reconfigurable adjustment circuit, the reconfigurable circuit module, the working parameters of the input and output nodes, as well as the frequency and bandwidth;
  • Step 4-C3 The calibration control unit controls the calibration adjustment unit to control the working parameters of the reconfigurable adjustment circuit, the reconfigurable transceiver, the working parameters of the input and output nodes, as well as the frequency and bandwidth;
  • the calibration control unit is used to control the calibration adjustment unit, so that the reconfigurable transceiver or circuit module works in the expected mode, frequency band, bandwidth, and protocol, and realizes real-time switching and performance optimization;
  • the circuit structure, geometric scale, and working parameters of the circuit unit are selected through a switch or switch array network;
  • the response time for real-time switching and calibration between different frequency bands and bandwidths is mainly determined by the locking time of the transceiver phase-locked loop.
  • the calibration method for the radio frequency domain calibration system with feedback circuit unit also includes the following steps:
  • Step 5-R1 Calibrate the observation receiver to sample one or more input and output node signals of the radio frequency circuit unit;
  • Step 5-R2 The signal detection unit detects and quantifies the signal received by the calibration observation receiver
  • Step 5-R3 The calibration control unit controls the calibration adjustment unit to perform real-time control and calibration of the radio frequency circuit unit based on the detection and quantification results.
  • radio frequency domain predistortion calibration includes the following steps:
  • Step 5-S1 Calibrate the observation receiver to sample the following circuit units or nodes, including:
  • Step 5-S2 The signal detection unit detects and quantifies the signal received by the calibration observation receiver
  • Step 5-S3 Based on the detection and quantification results, the calibration control unit controls the calibration adjustment unit to perform radio frequency domain predistortion calibration on the circuit devices or modules of the transmission link.
  • joint calibration of the radio frequency domain and digital domain on the transceiver circuit system or circuit module also includes the following steps:
  • Step 5-T1 The signal calibrated in the radio frequency domain is converted into a digital signal through the analog-to-digital signal converter ADC;
  • Step 5-T2 The digital calibration control program in the microprocessor MCU that is calibrated in the digital domain drives the digital calibration algorithm program of the digital calibration algorithm circuit to calibrate the output signal of the analog-to-digital signal converter ADC;
  • Step 5-P1 The digital calibration control program in the microprocessor MCU calibrated in the digital domain drives the digital calibration algorithm program of the digital calibration algorithm circuit to calibrate the input digital signal of the digital-to-analog signal converter DAC;
  • Step 5-P2 The calibrated digital signal in the digital domain is converted into an analog signal through the digital-to-analog signal converter DAC;
  • Step 6 Perform iterative calibration of the receiving link and transmitting link.
  • the present invention provides a radio frequency domain (or analog domain) calibration system for radio frequency circuit units, which performs calibration of circuit devices and circuit modules or circuit systems (or circuit systems) composed of circuit device connections in the radio frequency domain.
  • Such as transceivers use the calibration unit to perform programmable, adaptive real-time control and calibration of the circuit structure, geometric scale, and operating parameters (such as voltage, gain, amplitude, phase, matching, etc.), so that the circuit unit works in the expected state, and Realize circuit unit performance parameters (such as carrier frequency, bandwidth, gain, noise figure, output power, efficiency, linearity, vector error magnitude EVM, adjacent channel suppression, interference suppression, attenuation accuracy, phase shift accuracy, matching) according to the corresponding working status , etc.) real-time adjustment and optimization.
  • operating parameters such as voltage, gain, amplitude, phase, matching, etc.
  • circuit unit performance parameters such as carrier frequency, bandwidth, gain, noise figure, output power, efficiency, linearity, vector error magnitude EVM, adjacent channel suppression, interference suppression, attenuation accuracy, phase shift accuracy, matching
  • the traditional digital domain calibration system needs to first convert the RF signal into a digital signal through an analog-to-digital signal converter ADC, and then use a dedicated calibration algorithm program to calibrate the signal for specific functions (such as wireless communications); as
  • the radio frequency domain calibration system and method of the present invention do not require the use of an ADC to convert analog signals into digital signals, nor do they rely on calibration algorithms for specific types of applications, but are suitable for various functions and types (communications, radar , navigation, electronic countermeasures, etc.) and different structures (frequency conversion or phase-shifting structure, etc.), and can work in different protocols or modes (such as TDD/FDD, etc.) to achieve programmable, adaptive, real-time high-precision calibration
  • the calibration system has smaller chip area, lower cost, and higher flexibility in module configuration (such as ADC).
  • Figure 1 is a block diagram of a radio frequency domain calibration system of a circuit unit of the present invention.
  • the circuit devices and circuit modules of the frequency conversion transceiver are calibrated in the radio frequency domain through the calibration unit.
  • Figure 2 is a structural block diagram of a calibration control unit in a radio frequency domain calibration system of a circuit unit of the present invention.
  • Figure 3 is a system block diagram of an exemplary embodiment of a radio frequency domain calibration system of a circuit unit of the present invention, in which the calibration control unit is integrated in a microprocessor MCU for radio frequency domain calibration.
  • FIG. 4 is a block diagram of a radio frequency domain calibration system of a circuit unit of the present invention.
  • the circuit devices and circuit modules of the frequency conversion transceiver receiving link are calibrated in the radio frequency domain through the calibration unit.
  • FIG. 5 is a block diagram of a radio frequency domain calibration system of a circuit unit of the present invention.
  • the circuit devices and circuit modules of the frequency conversion transceiver transmission link are calibrated in the radio frequency domain through the calibration unit.
  • FIG. 6 is a block diagram of a radio frequency domain calibration system of a circuit unit of the present invention.
  • the circuit devices and circuit modules of the phase-controlled transceiver receiving link and transmitting link are calibrated in the radio frequency domain through the calibration unit.
  • Figure 7 is a structural block diagram of a reconfigurable transceiver, a reconfigurable adjustment circuit, and a calibration unit in a radio frequency domain calibration system of a circuit unit of the present invention.
  • Figure 8 is a structural block diagram of a radio frequency domain calibration system of a circuit unit of the present invention, including a circuit unit, a calibration unit, and a feedback circuit unit.
  • Figure 9 is a system block diagram of an exemplary embodiment of radio frequency domain predistortion calibration of the transmit link in a radio frequency domain calibration system of a circuit unit of the present invention.
  • FIG. 10 is a system block diagram of an exemplary embodiment of joint calibration of the radio frequency domain and the digital domain in a radio frequency domain calibration system of a circuit unit of the present invention.
  • the present invention proposes a radio frequency domain calibration system and method for radio frequency circuit units.
  • the radio frequency circuit unit (including circuit devices, modules, and transceiver circuit systems) is programmable, configurable, adaptive, real-time controlled and regulated through the calibration unit. Calibration to make the circuit unit work in the expected state and achieve performance optimization.
  • the radio frequency domain calibration system of the present invention has a smaller chip area, lower cost, higher mode control flexibility and module configuration flexibility.
  • Embodiment 1 A radio frequency domain calibration system for a radio frequency circuit unit, including a calibration unit and a circuit unit;
  • the circuit unit includes circuit elements and one or more of radio frequency circuit devices, circuit modules, and transceiver circuit systems composed of circuit elements;
  • the calibration unit includes a calibration control unit and a calibration adjustment unit;
  • the calibration control unit includes memory, arithmetic unit, logic control unit and bus;
  • the memory is used to store calibration instructions
  • the operation unit is used for data operation in the calibration control unit;
  • the logic control unit is used to retrieve instructions from the memory, decode them and send out corresponding control signals;
  • the bus is used to connect the computing unit, memory and logic control unit, and realize the information transfer and interaction between the computing unit, memory and logic control unit;
  • the calibration control unit generates a calibration control signal to drive and regulate the calibration adjustment unit
  • the calibration adjustment unit includes a switch or switch array network, and one or more combinations of a tuning network (such as an inductor, capacitor tuning network), a resistor network, a transmission line network, a transformer network, a transistor, a diode, etc.;
  • the component parameters of the calibration adjustment unit such as inductors, capacitors, resistors, transmission lines, and transformers adopt discrete values or continuously variable values, thereby achieving discrete or continuously adjustable performance parameters such as carrier frequency and channel bandwidth;
  • the calibration adjustment unit regulates the structure, geometric scale, working parameters (such as voltage, gain, amplitude, phase, matching, etc.) of the circuit unit and the working parameters of the input and output nodes through the switch or switch array network;
  • the calibration control unit is implemented through a silicon-based semiconductor process, and the circuit unit and calibration adjustment unit are implemented through a silicon-based semiconductor process or a compound semiconductor process; circuits of the same process are integrated through monolithic integration, and circuits of different processes are integrated through system-level packaging.
  • a calibration method for the radio frequency domain calibration system of the above radio frequency circuit unit in which the circuit structure, geometric scale, and working parameters of the radio frequency circuit unit are regulated and calibrated in real time through the calibration unit in the radio frequency domain;
  • Step 1 External input or internal generation of calibration instructions
  • Step 2 The memory in the calibration control unit receives and stores the calibration instructions
  • Step 3-1 The logic control unit in the calibration control unit retrieves the calibration instructions from the memory
  • Step 3-2 The operation unit in the calibration control unit performs data operations according to the calibration instructions
  • Step 3-3 The data generated by the operation unit is transmitted to the logic control unit through the bus for decoding;
  • Step 3-4 The logic control unit outputs the calibration control signal to drive and regulate the calibration adjustment unit;
  • Step 4 The calibration and adjustment unit controls the structure, geometric scale, working parameters of the radio frequency circuit unit and the working parameters of the input and output nodes through the switch or switch array network;
  • the calibration control unit controls the radio frequency circuit unit through the calibration adjustment unit to make it work in the expected state, and adjusts the circuit unit performance parameters (such as carrier frequency, bandwidth, gain, noise figure, output power, efficiency, linearity , vector error amplitude EVM, adjacent channel suppression, interference suppression, attenuation accuracy, phase shift accuracy, matching, etc.) are adjusted to achieve programmable, configurable, adaptive, real-time calibration and performance optimization of the RF circuit unit;
  • the circuit unit performance parameters such as carrier frequency, bandwidth, gain, noise figure, output power, efficiency, linearity , vector error amplitude EVM, adjacent channel suppression, interference suppression, attenuation accuracy, phase shift accuracy, matching, etc.
  • the calibration adjustment unit regulates the structure, geometric scale, working parameters (such as voltage, gain, amplitude, phase, matching, etc.) of the circuit unit and the working parameters of the input and output nodes through the switch or switch array network;
  • the component parameters of the calibration adjustment unit such as inductors, capacitors, resistors, transmission lines, and transformers adopt discrete values or continuously variable values, thereby achieving discrete or continuously adjustable performance parameters such as carrier frequency and channel bandwidth;
  • the inductor is adjusted through parameters such as the number of turns, radius, and line width.
  • the capacitor is adjusted through parameters such as plate length and width.
  • the resistance and transmission line are adjusted through geometric or electrical scales such as length and width.
  • the transformer is adjusted through the parameters of the coupled inductor. ;
  • the circuit structure, geometric scale, and working parameters of the circuit unit are selected through switches or switch array networks.
  • Embodiment 2 As an improvement of the present invention, the calibration system also includes a microprocessor (MCU) for radio frequency domain calibration; the calibration control unit of some or all circuit units is integrated into the microprocessor (MCU) for radio frequency domain calibration. ), used to control the corresponding calibration adjustment unit to achieve programmable, real-time control and calibration of the circuit unit.
  • MCU microprocessor
  • Embodiment 2 As an improvement of the present invention, the calibration system also includes a microprocessor (MCU) for radio frequency domain calibration; the calibration control unit of some or all circuit units is integrated into the microprocessor (MCU) for radio frequency domain calibration. ), used to control the corresponding calibration adjustment unit to achieve programmable, real-time control and calibration of the circuit unit.
  • MCU microprocessor
  • the radio frequency transceiver circuit system (transceiver) or circuit module in the calibration system is composed of single channel or multi-channel, and has a variable frequency structure, a phase-controlled structure or a combination of the two, etc. structure, and works in one or more combinations of communication, radar, navigation, tracking, imaging, measurement, electronic countermeasures and other modes.
  • the operating frequency covers the radio frequency band, or microwave, millimeter wave band, or terahertz frequency band, or above A combination of different frequency bands.
  • Embodiment 4 As a preferred solution of the present invention, circuit devices and circuit modules that control and calibrate a variable frequency transceiver (referred to as a variable frequency transceiver) or circuit module through a calibration unit in the radio frequency domain include:
  • the receiving link (receiver) of the frequency conversion transceiver after the antenna receives the signal, before the analog-to-digital signal converter (ADC), the circuit components include but are not limited to low-noise amplifier (LNA), down-conversion in order of connection.
  • LNA low-noise amplifier
  • the transmission link (transmitter) of the variable frequency transceiver after the digital-to-analog signal converter (DAC) and before the antenna transmits the signal
  • the circuit components include but are not limited to the transmitter filter (Tx Filter), transmitter, etc. in order of connection.
  • the frequency synthesizer is connected to the upconversion mixer to provide the local oscillator signal for the transmit link;
  • the calibration adjustment unit of the low-noise amplifier, mixer, power amplifier or drive amplifier each includes a bias adjustment sub-unit, an amplitude adjustment sub-unit, and a phase adjustment sub-unit;
  • the calibration adjustment units of programmable gain amplifiers, filters, and operational amplifiers each include an offset adjustment subunit, an amplitude adjustment subunit, a phase adjustment subunit, and a DC offset elimination subunit;
  • the calibration adjustment unit of the frequency synthesizer includes an amplitude adjustment subunit and a phase adjustment subunit;
  • the receiver frequency synthesizer and transmitter frequency synthesizer can be shared with time division duplex (TDD) and full duplex (FD) transceivers;
  • TDD time division duplex
  • FD full duplex
  • variable frequency transceiver contains one or more channels.
  • the remaining structures and advantages are exactly the same as those in Embodiment 1.
  • the calibration unit controls the calibration adjustment unit of the circuit unit in each channel to achieve circuit unit performance parameters (such as carrier frequency, bandwidth, gain, noise figure, output power, efficiency, linearity, vector error magnitude EVM, adjacent channel suppression , interference suppression, matching, etc.) adjustment, calibration and optimization.
  • circuit unit performance parameters such as carrier frequency, bandwidth, gain, noise figure, output power, efficiency, linearity, vector error magnitude EVM, adjacent channel suppression , interference suppression, matching, etc.
  • the method of calibrating the frequency conversion transceiver in the radio frequency domain includes the following steps:
  • Step 4-A1 Calibrate the circuit device by adjusting the calibration adjustment unit corresponding to the circuit device through the calibration control unit, including:
  • the calibration control unit controls the calibration adjustment unit of the low-noise amplifier to achieve calibration of the low-noise amplifier performance parameters (such as noise coefficient, gain, linearity, etc.);
  • the calibration control unit regulates the calibration adjustment unit of the mixer (including down-conversion mixer and up-conversion mixer) to achieve the calibration of mixer performance parameters (such as noise figure, gain, linearity, etc.);
  • the calibration control unit controls the calibration adjustment unit of the power amplifier or drive amplifier to achieve calibration of the power amplifier or drive amplifier performance parameters (such as gain, output power, efficiency, linearity, etc.);
  • the calibration control unit controls the calibration adjustment unit of the programmable gain amplifier (including receiver PGA and transmitter PGA) to achieve DC offset calibration of the programmable gain amplifier and other performance parameters (such as gain, flatness, total harmonic distortion, Calibration of IQ two-way mismatch, etc.);
  • the calibration control unit controls the calibration adjustment unit of the filter (including receiver filter, transmitter filter) to achieve calibration of the filter's DC offset and other performance parameters (such as center frequency, bandwidth, gain, flatness, and total harmonic distortion). , roll-off speed, IQ two-way mismatch, etc.) calibration;
  • the center frequency of the RF filter By adjusting the center frequency of the RF filter, the center frequency of the transceiver is adjusted and calibrated; by adjusting the bandwidth of the IF filter, the channel bandwidth of the transceiver is adjusted and calibrated;
  • the calibration control unit controls the calibration adjustment unit of the operational amplifier to realize the DC offset calibration of the operational amplifier and other performance parameters (such as gain, phase margin, gain bandwidth product, slew rate, power supply rejection ratio, common mode rejection ratio, etc.) calibration;
  • the calibration control unit regulates the calibration adjustment unit of the frequency synthesizer (including the receiver FS and the transmitter FS) to realize the performance parameters of the frequency synthesizer (such as the frequency, amplitude, phase noise, jitter, and quadrature mismatch of the local oscillator signal, etc.);
  • Step 4-A2 Calibrate the circuit module through the calibration adjustment unit corresponding to the calibration control unit, including:
  • the calibration adjustment unit of the receiver RF front-end circuit module including the low-noise amplifier and down-conversion mixer is controlled to realize the performance parameters of the receiver RF front-end circuit module (such as input matching, output matching, operating frequency range, noise coefficients, gains, etc.);
  • the calibration adjustment unit of the transmitter RF front-end circuit module including the power amplifier or drive amplifier and the upconversion mixer is controlled to realize the performance parameters of the transmitter RF front-end circuit module (such as input matching, output matching, operating frequency range , output power, gain, etc.) calibration;
  • the calibration control unit controls the calibration adjustment unit of the analog baseband circuit module including the programmable gain amplifier and filter to achieve calibration of the analog baseband circuit module performance parameters (such as bandwidth, gain, stability, etc.);
  • Step 4-A3 Calibrate the receiving link and transmitting link in the frequency conversion transceiver through the calibration control unit and the corresponding calibration adjustment unit, including:
  • the calibration control unit controls the calibration adjustment unit of the receiving link in the variable frequency transceiver to realize the control of the receiving link performance parameters (such as input matching, output matching, operating frequency range, noise figure, gain, etc.) in the variable frequency transceiver. calibration;
  • the calibration control unit controls the calibration adjustment unit of the transmission link in the frequency conversion transceiver to realize the control of the transmission link performance parameters (such as input matching, output matching, operating frequency range, output power, gain, etc.) in the frequency conversion transceiver. calibration;
  • the calibration control unit regulates the structure, geometric scale, working parameters of the circuit devices or circuit modules of each channel receiving link and transmitting link in the frequency conversion transceiver, as well as the working parameters of the input and output nodes by regulating the calibration adjustment unit. , to achieve real-time calibration and performance optimization of the frequency conversion transceiver.
  • Embodiment 5 As another preferred solution of the present invention, the phase-shifting transceiver (or phase-controlled transceiver, referred to as phase-controlled transceiver) or circuit module is controlled and calibrated through the calibration unit in the radio frequency domain.
  • Circuit devices and circuit modules include:
  • the circuit components that are controlled and calibrated through the calibration unit include but are not limited to low-noise amplifier, receiver phase shifter, receiver attenuator, power synthesizer;
  • the circuit components that are regulated and calibrated through the calibration unit include but are not limited to the transmitter attenuator, Transmitter phase shifters, power amplifiers or driver amplifiers;
  • the calibration adjustment unit of the phase shifter includes a bias adjustment subunit and a phase adjustment subunit;
  • the calibration adjustment unit of the attenuator includes a bias adjustment subunit and an amplitude adjustment subunit;
  • the calibration adjustment unit of the power combiner and power divider includes a transmission line adjustment subunit
  • the phased transceiver contains one or more channels.
  • the remaining structures and advantages are exactly the same as those in Embodiment 1.
  • the calibration unit controls the calibration adjustment unit of the circuit unit in each channel to achieve circuit unit performance parameters (such as phase shift accuracy, attenuation accuracy, gain, linearity, noise figure, operating frequency range, input matching, output matching, insertion loss, isolation, etc.).
  • circuit unit performance parameters such as phase shift accuracy, attenuation accuracy, gain, linearity, noise figure, operating frequency range, input matching, output matching, insertion loss, isolation, etc.
  • step 4 the phase-controlled transceiver is regulated and calibrated, including:
  • Step 4-B1 Calibrate the circuit device by adjusting the calibration adjustment unit corresponding to the circuit device through the calibration control unit, including:
  • the calibration control unit controls the bias adjustment subunit, amplitude adjustment subunit, and phase adjustment subunit of the low-noise amplifier to calibrate the performance parameters (such as noise figure, gain, linearity, etc.) of the low-noise amplifier;
  • the calibration control unit controls the bias adjustment subunit, amplitude adjustment subunit, and phase adjustment subunit of the power amplifier or drive amplifier, and performs performance parameters (such as gain, output power, efficiency, linearity, etc.) of the power amplifier or drive amplifier. calibration;
  • the calibration control unit regulates the bias adjustment sub-unit and phase adjustment sub-unit of the phase shifter (including receiver phase shifter and transmitter phase shifter) to realize the control of phase shifter performance parameters (such as phase shift accuracy, gain, linearity calibration, noise figure, etc.);
  • the attenuator performance parameters (such as attenuation accuracy, gain, linearity, noise coefficient, etc.) can be adjusted. etc.);
  • the calibration control unit regulates the transmission line structure and geometric scale of the transmission line adjustment subunit in the power combiner and power divider to achieve calibration of the performance parameters (such as matching, insertion loss, isolation, etc.) of the power combiner and power divider;
  • Step 4-B2 Calibrate the circuit module through the calibration adjustment unit corresponding to the calibration control unit, including:
  • the input matching adjustment subunit and the output matching adjustment subunit of the amplitude and phase control circuit module including the receiver phase shifter and receiver attenuator are controlled to realize the performance parameters of the amplitude and phase control circuit module (such as input matching, output Calibration of matching, operating frequency range, noise figure, gain, etc.);
  • the input matching adjustment subunit and the output matching adjustment subunit of the amplitude and phase control circuit module including the transmitter phase shifter and transmitter attenuator are controlled to realize the performance parameters of the amplitude and phase control circuit module (such as input matching, output Calibration of matching, operating frequency range, output power, gain, etc.);
  • Step 4-B3 Use the calibration control unit to control the receiving link and transmitting link in the phase-controlled transceiver. Calibrate the receiving link and transmitting link in the phase-controlled transceiver through the corresponding calibration adjustment unit, including:
  • the performance parameters of the receiving link in the phase-controlled transceiver such as input matching, output matching , operating frequency range, noise figure, gain, etc.
  • calibration of transmit link performance parameters such as input matching, output matching, operating frequency range, output power, gain, etc.
  • the calibration control unit regulates the structure, geometric scale, working parameters of the circuit devices or circuit modules of each channel receiving link and transmitting link in the phase-controlled transceiver, as well as the working parameters of the input and output nodes by regulating the calibration adjustment unit. Control and control to achieve real-time calibration and performance optimization of phase-controlled transceivers.
  • the calibration system includes a reconfigurable transceiver or circuit module, a reconfigurable adjustment circuit, and a calibration unit;
  • reconfigurable adjustment circuits and reconfigurable circuit devices or modules such as frequency synthesizers, low noise amplifiers, power amplifiers, mixers, filters, etc.
  • the reconfigurable regulation circuit includes a switch or switch array network, and one or more combinations of a tuning network, a resistor network, a transmission line network, and a transformer network;
  • the tuning network and resistor network of the reconfigurable adjustment circuit in which the component parameters of inductors, capacitors, resistors, transmission lines, and transformers adopt discrete values or continuously variable values to achieve discrete and adjustable performance parameters such as carrier frequency range and channel bandwidth. Or continuously adjustable; the reconfigurable transceiver contains one or more channels.
  • the remaining structures and advantages are exactly the same as those in Embodiment 1.
  • the calibration control unit controls the calibration adjustment unit so that the reconfigurable transceiver or circuit module works in the expected state (such as mode, frequency band, channel bandwidth, protocol, etc.), and performs real-time switching and performance optimization.
  • the expected state such as mode, frequency band, channel bandwidth, protocol, etc.
  • the reconfigurable transceiver or circuit module is regulated, including:
  • Step 4-C1 The calibration control unit controls the calibration adjustment unit to control the circuit structure, geometric scale, working parameters of the reconfigurable adjustment circuit and the reconfigurable circuit device, the working parameters of the input and output nodes, as well as the frequency and bandwidth;
  • Step 4-C2 The calibration control unit controls the calibration adjustment unit to control the working parameters of the reconfigurable adjustment circuit, the reconfigurable circuit module, the working parameters of the input and output nodes, as well as the frequency and bandwidth;
  • Step 4-C3 The calibration control unit controls the calibration adjustment unit to control the working parameters of the reconfigurable adjustment circuit, the reconfigurable transceiver, the working parameters of the input and output nodes, as well as the frequency and bandwidth;
  • the calibration control unit is used to control the calibration adjustment unit, so that the reconfigurable transceiver or circuit module works in the expected mode, frequency band, bandwidth, and protocol, and realizes real-time switching and performance optimization;
  • the circuit structure, geometric scale, and working parameters of the circuit unit are selected through a switch or switch array network;
  • the response time for real-time switching and calibration between different frequency bands and bandwidths is mainly determined by the locking time of the transceiver phase-locked loop.
  • the radio frequency domain calibration system also includes a feedback circuit unit
  • the feedback circuit unit includes a calibration observation receiver, a signal detection unit and a signal transmission unit;
  • Calibrate the observation receiver including but not limited to one of a low-noise amplifier, a down-conversion mixer, a receiver frequency synthesizer, a receiver programmable gain amplifier, a receiver filter, or Multiple circuit devices, or receive links that multiplex the transceiver circuit system;
  • the calibration observation receiver is used to receive the signal output from the radio frequency circuit unit
  • the signal detection unit is used to classify, extract, amplify and quantify the signals received by the calibration observation receiver, and detect useful signals;
  • the signal transmission unit is used to transmit useful signals detected by the signal detection unit to the calibration control unit;
  • the calibration method for a radio frequency domain calibration system with a feedback circuit unit also includes the following steps:
  • Step 5-R1 Calibrate the observation receiver to sample one or more input and output node signals of the radio frequency circuit unit;
  • Step 5-R2 The signal detection unit detects and quantifies the signal received by the calibration observation receiver
  • Step 5-R3 The calibration control unit controls the calibration adjustment unit to perform real-time control and calibration of the radio frequency circuit unit based on the detection and quantification results;
  • Embodiment 8 As an improvement of the present invention, the feedback circuit unit is used for radio frequency domain predistortion calibration of the transmit link in the transceiver circuit system.
  • the remaining structures and advantages are exactly the same as those in Embodiment 7.
  • radio frequency domain predistortion calibration includes the following steps:
  • Step 5-S1 Calibrate the observation receiver to sample the following circuit units or nodes, including:
  • Step 5-S2 The signal detection unit detects and quantifies the signal received by the calibration observation receiver
  • Step 5-S3 Based on the detection and quantification results, the calibration control unit controls the calibration adjustment unit to perform radio frequency domain predistortion calibration on the circuit devices or modules of the transmission link.
  • the radio frequency domain calibration system also includes a joint calibration circuit of the radio frequency domain and the digital domain;
  • the joint calibration circuit of the radio frequency domain and the digital domain includes a calibration unit and a circuit unit of the radio frequency domain, a microprocessor MCU for digital domain calibration, an analog-to-digital signal converter ADC/digital-to-analog signal converter DAC, and a digital calibration algorithm circuit. , data interface circuit, baseband circuit;
  • the digital calibration algorithm circuit is used to implement the digital calibration algorithm program
  • the digital calibration algorithm program includes quadrature error correction (or calibration) algorithm, DC offset correction algorithm, IQ path mismatch correction algorithm, local oscillator leakage correction algorithm, image suppression correction algorithm, and digital predistortion correction algorithm;
  • the microprocessor MCU for digital domain calibration runs the digital calibration control program and controls the digital calibration algorithm circuit, data interface circuit and baseband circuit;
  • Data interface circuits (such as high-speed Serdes interface) are used for information exchange between digital calibration algorithm circuits and baseband circuits;
  • Baseband circuits are used to process digital baseband signals.
  • joint calibration of the radio frequency domain and digital domain on the transceiver circuit system or circuit module also includes the following steps:
  • Step 5-T1 The signal calibrated in the radio frequency domain is converted into a digital signal through the analog-to-digital signal converter ADC;
  • Step 5-T2 The digital calibration control program in the microprocessor MCU that is calibrated in the digital domain drives the digital calibration algorithm program of the digital calibration algorithm circuit to calibrate the output signal of the analog-to-digital signal converter ADC;
  • Step 5-P1 The digital calibration control program in the microprocessor MCU calibrated in the digital domain drives the digital calibration algorithm program of the digital calibration algorithm circuit to calibrate the input digital signal of the digital-to-analog signal converter DAC;
  • Step 5-P2 The calibrated digital signal in the digital domain is converted into an analog signal through the digital-to-analog signal converter DAC;
  • Step 6 Perform iterative calibration of the receiving link and transmitting link.
  • Embodiment 2 to Embodiment 9 can also be combined with another one or more embodiments to form a new implementation.
  • Figure 1 is a block diagram of a radio frequency domain calibration system of a circuit unit of the present invention.
  • the circuit devices and circuit modules of the frequency conversion transceiver are calibrated in the radio frequency domain through the calibration unit.
  • the frequency conversion transceiver includes a receiving link and a transmitting link
  • the low noise amplifier LNA, receiver mixer Mixer, receiver frequency synthesizer FS, receiver programmable gain amplifier PGA, and receiver filter are each connected to the corresponding calibration unit (including calibration adjustment unit, calibration control unit), the receiver frequency synthesizer is connected to the receiver mixer;
  • the power amplifier PA or drive amplifier DA, transmitter mixer Mixer, transmitter frequency synthesizer FS, transmitter programmable gain amplifier PGA, and transmitter filter filter each have their corresponding calibration unit (including calibration adjustment unit, calibration control unit), and the transmitter frequency synthesizer is connected to the transmitter mixer.
  • Figure 2 is a structural block diagram of a calibration control unit in a radio frequency domain calibration system of a circuit unit of the present invention.
  • the calibration control unit includes an arithmetic unit F01, a bus F02, a memory F03 and a logic control unit F04;
  • the operation unit F01 is used for data operation in the calibration control unit;
  • Memory F03 is used to store calibration instructions
  • Logic control unit F04 is used to retrieve instructions from the memory, decode them and send out corresponding control signals;
  • Bus F02 is used to connect the computing unit, memory and logic control unit to realize information transmission and interaction between the computing unit, memory and logic control unit;
  • Figure 3 is a system block diagram of an exemplary embodiment of a radio frequency domain calibration system of a circuit unit of the present invention.
  • the calibration control unit of some or all circuit units is integrated into the microprocessor (MCU) E01 for radio frequency domain calibration to improve the automation, programmability, and scalability of the calibration system.
  • MCU microprocessor
  • FIG. 4 is a block diagram of a radio frequency domain calibration system of a circuit unit of the present invention.
  • the circuit devices and circuit modules of the frequency conversion transceiver receiving link are calibrated through the calibration unit to make them work in the expected state and achieve performance optimization.
  • the circuit components calibrated through the calibration unit include the low-noise amplifier LNA, the receiver mixer Mixer, and the receiver frequency synthesizer FS in order of connection. , receiver programmable gain amplifier PGA, receiver filter, in which the receiver frequency synthesizer is connected to the receiver mixer to provide the local oscillator signal for the receiving link;
  • the calibration adjustment unit B01 of the low-noise amplifier includes a bias adjustment sub-unit B011, an amplitude adjustment sub-unit B012, and a phase adjustment sub-unit B013 (B012 and B013 are omitted in the figure).
  • the bias is controlled by the calibration control unit A01 of the low-noise amplifier.
  • Adjustment sub-unit B011, amplitude adjustment sub-unit B012, and phase adjustment sub-unit B013 realize the calibration and optimization of low-noise amplifier performance parameters (such as noise figure, gain, linearity, etc.);
  • the calibration adjustment unit B02 of the receiver mixer includes an offset adjustment subunit B021, an amplitude adjustment subunit B022, and a phase adjustment subunit B023.
  • the offset adjustment subunit B021 and the amplitude adjustment subunit B022 are controlled through the calibration control unit A02. , Phase adjustment subunit B023, which realizes the calibration and optimization of the receiver mixer performance parameters (such as noise figure, gain, linearity, etc.);
  • the calibration adjustment unit B03 of the receiver programmable gain amplifier includes a DC offset cancellation sub-unit B031, an amplitude adjustment sub-unit B032 and a phase adjustment sub-unit B033.
  • the DC offset cancellation sub-unit B031 is controlled by the calibration control unit A03 to realize the control of the receiver. Calibration of the DC offset of the programmable gain amplifier; controlling the amplitude adjustment subunit B032 and phase adjustment subunit B033 through the calibration control unit A03 to achieve other performance parameters of the receiver programmable gain amplifier (such as gain, flatness, total harmonics Calibration and optimization of distortion, IQ two-way mismatch, etc.);
  • the calibration adjustment unit B04 of the receiver filter includes a DC offset elimination sub-unit B041, an amplitude adjustment sub-unit B042 and a phase adjustment sub-unit B043.
  • the DC offset elimination sub-unit B041 is controlled by the calibration control unit A04 to realize the adjustment of the receiver filter.
  • Calibration of C04 DC offset; through the calibration control unit A04, the amplitude adjustment sub-unit B042 and the phase adjustment sub-unit B043 are controlled to realize other performance parameters of the receiver filter (such as bandwidth, gain, flatness, total harmonic distortion, roll Calibration and optimization of speed reduction, IQ two-way mismatch, etc.); adjustment and calibration of the receiver channel bandwidth is achieved by regulating the bandwidth of the receiver filter;
  • the calibration adjustment unit B05 of the receiver frequency synthesizer includes an amplitude adjustment subunit B052 and a phase adjustment subunit B051.
  • the amplitude adjustment subunit B052 and the phase adjustment subunit B051 are controlled by the calibration control unit A05 to realize the control of the receiver frequency synthesizer. Calibration and optimization of performance parameters (such as frequency, amplitude, phase noise, jitter, quadrature mismatch, etc.).
  • FIG. 5 is a block diagram of a radio frequency domain calibration system of a circuit unit of the present invention.
  • the circuit devices and circuit modules of the frequency conversion transceiver transmission link are calibrated in the radio frequency domain through the calibration unit to make them work in the expected state and achieve performance optimization.
  • the circuit components calibrated through the calibration unit include the power amplifier PA or drive amplifier, and the transmitter mixer in order of connection. , transmitter frequency synthesizer FS, transmitter programmable gain amplifier PGA, transmitter filter, where the transmitter frequency synthesizer is connected to the transmitter mixer to provide a local oscillator signal for the transmit link;
  • the calibration adjustment unit B06 of the power amplifier or drive amplifier includes a bias adjustment subunit B061, an amplitude adjustment subunit B062, and a phase adjustment subunit B063 (B062 and B063 are omitted in the figure), which are controlled by the calibration control unit A06 of the power amplifier or drive amplifier.
  • the bias adjustment subunit B061, amplitude adjustment subunit B062, and phase adjustment subunit B063 realize the calibration and optimization of the power amplifier or drive amplifier performance parameters (such as gain, output power, efficiency, linearity, etc.);
  • the calibration adjustment unit B07 of the transmitter mixer includes an offset adjustment subunit B071, an amplitude adjustment subunit B072, and a phase adjustment subunit B073.
  • the offset adjustment subunit B071 and the amplitude adjustment subunit B072 are controlled by the calibration control unit A07.
  • Phase adjustment subunit B073 which realizes the calibration and optimization of the transmitter mixer performance parameters (such as noise figure, gain, linearity, etc.);
  • the calibration adjustment unit B08 of the transmitter programmable gain amplifier includes a DC offset elimination sub-unit B081, an amplitude adjustment sub-unit B082 and a phase adjustment sub-unit B083.
  • the DC offset elimination sub-unit B081 is controlled by the calibration control unit A08 to realize the control of the transmitter.
  • the calibration adjustment unit B09 of the transmitter filter includes a DC offset elimination sub-unit B091, an amplitude adjustment sub-unit B092 and a phase adjustment sub-unit B093.
  • the DC offset elimination sub-unit B091 is controlled by the calibration control unit A09 to realize the adjustment of the transmitter filter.
  • Calibration of D04 DC offset; the amplitude adjustment subunit B092 and phase adjustment subunit B093 are controlled by the calibration control unit A09 to realize other performance parameters of the transmitter filter (such as bandwidth, gain, flatness, total harmonic distortion, roll Calibration and optimization of speed reduction, IQ two-way mismatch, etc.); adjustment and calibration of the transmitter channel bandwidth is achieved by regulating the bandwidth of the transmitter filter;
  • the calibration adjustment unit B10 of the transmitter frequency synthesizer includes an amplitude adjustment subunit B102 and a phase adjustment subunit B101.
  • the amplitude adjustment subunit B102 and the phase adjustment subunit B101 are controlled by the calibration control unit A10 to realize the control of the transmitter frequency synthesizer. Calibration and optimization of performance parameters (such as frequency, amplitude, phase noise, jitter, quadrature mismatch, etc.) of the local oscillator signal;
  • the receiver frequency synthesizer and transmitter frequency synthesizer can be shared with time division duplex (TDD), full duplex (FD) and other types of transceivers.
  • TDD time division duplex
  • FD full duplex
  • FIG. 6 is a block diagram of a radio frequency domain calibration system of a circuit unit of the present invention.
  • the circuit devices and circuit modules of the phase-controlled transceiver receiving link and transmitting link are controlled and calibrated through the calibration unit to make them work as expected. status and achieve performance optimization.
  • the circuit components calibrated through the calibration unit include, in order of connection, the low-noise amplifier LNA, the receiver phase shifter PS, the receiver attenuator ATT, power synthesizer;
  • the circuit components calibrated by the calibration unit include the power amplifier PA or drive amplifier, the transmitter phase shifter PS, and the transmitter attenuator ATT in order of connection. , power divider;
  • the calibration adjustment unit B11 of the low-noise amplifier includes a bias adjustment subunit B111, an amplitude adjustment subunit B112, and a phase adjustment subunit B113 (B112 and B113 are omitted in the figure).
  • the offset adjustment subunit B111 is controlled by the calibration control unit A11. , amplitude adjustment sub-unit B112, phase adjustment sub-unit B113, to achieve calibration and optimization of low-noise amplifier performance parameters (such as noise coefficient, gain, linearity, etc.);
  • the calibration adjustment unit B12 of the receiver phase shifter includes an offset adjustment subunit B121 and a phase adjustment subunit B122.
  • the offset adjustment subunit B121 and the phase adjustment subunit B122 are controlled by the calibration control unit A12 to realize the shift of the receiver. Calibration and optimization of phase device performance parameters (such as phase shift accuracy, gain, linearity, noise figure, etc.);
  • the calibration adjustment unit B13 of the receiver attenuator includes an offset adjustment subunit B131 and an amplitude adjustment subunit B132.
  • the offset adjustment subunit B131 and the amplitude adjustment subunit B132 are controlled by the calibration control unit A13 to realize the adjustment of the receiver attenuator. Calibration and optimization of performance parameters (such as attenuation accuracy, gain, linearity, noise figure, etc.);
  • the calibration adjustment unit B14 of the power amplifier or drive amplifier includes a bias adjustment subunit B141, an amplitude adjustment subunit B142, and a phase adjustment subunit B143 (B142 and B143 are omitted in the figure), which are controlled by the calibration control unit A14 Unit B141, amplitude adjustment subunit B142, and phase adjustment subunit B143 realize the calibration and optimization of power amplifier or drive amplifier performance parameters (such as gain, output power, efficiency, linearity, etc.);
  • the calibration adjustment unit B15 of the transmitter phase shifter includes a bias adjustment sub-unit B151 and a phase adjustment sub-unit B152.
  • the bias adjustment sub-unit B151 and the phase adjustment sub-unit B152 are controlled by the calibration control unit A15 to realize the shift of the transmitter. Calibration and optimization of phase device performance parameters (such as phase shift accuracy, gain, linearity, noise figure, etc.);
  • the calibration adjustment unit B16 of the transmitter attenuator includes an offset adjustment subunit B161 and an amplitude adjustment subunit B162.
  • the offset adjustment subunit B161 and the amplitude adjustment subunit B162 are controlled by the calibration control unit A16 to realize the adjustment of the transmitter attenuator. Calibration and optimization of performance parameters (such as attenuation accuracy, gain, linearity, noise figure, etc.);
  • the calibration adjustment unit of the power combiner and power divider includes a transmission line adjustment subunit.
  • the structure and geometric scale of the transmission line adjustment subunit are controlled by the calibration control unit to realize the performance parameters of the power combiner and power divider (such as matching, insertion loss, port isolation, etc.).
  • Figure 7 is a structural block diagram of a reconfigurable transceiver, a reconfigurable adjustment circuit, and a calibration unit in a radio frequency domain calibration system of a circuit unit of the present invention.
  • the calibration unit is used to perform calibration on the reconfigurable adjustment circuit, the reconfigurable transceiver, and Control and calibrate the circuit devices and circuit modules of the machine to make them work in the expected state and achieve performance optimization.
  • the reconfigurable transceiver includes a reconfigurable receiver C10, a reconfigurable transmitter D10, a receiver calibration unit J17, a receiver reconfigurable adjustment circuit K17, a transmitter calibration unit J18, and a transmitter reconfigurable adjustment circuit. Circuit K18;
  • the receiver reconfigurable adjustment circuit K17 includes a receiver tuning network K171 and a receiver switch array network K172;
  • the transmitter reconfigurable adjustment circuit K18 includes the transmitter tuning network K181 and the transmitter switch array network K182;
  • the receiver calibration unit J17 regulates and calibrates the receiver reconfigurable adjustment circuit K17 and the reconfigurable receiver C10;
  • the transmitter calibration unit J18 regulates and calibrates the transmitter reconfigurable adjustment circuit K18 and the reconfigurable transmitter D10.
  • Figure 8 is a structural block diagram of a radio frequency domain calibration system of a circuit unit of the present invention.
  • Calibration unit J01 includes calibration control unit X01 and calibration adjustment unit Y01;
  • the calibration control unit X01 controls the calibration adjustment unit Y01 to perform radio frequency domain calibration on the circuit unit Z01;
  • the calibration system also includes a feedback circuit unit J02;
  • the feedback circuit unit J02 includes a calibration observation receiver R01, a signal detection unit S01 and a signal transmission unit;
  • the calibration observation receiver R01 first samples one or more input and output node signals of the circuit unit, and then the signal detection unit S01 detects and quantifies the signal received by the calibration observation receiver.
  • the signal transmission unit detects the signal detected by the signal detection unit.
  • the useful signal is transmitted to the calibration control unit; then the calibration control unit X01 controls the calibration adjustment unit Y01 to perform radio frequency domain calibration and performance optimization of the circuit unit based on the detection and quantification results.
  • Figure 9 is a system block diagram of an exemplary embodiment of radio frequency domain predistortion calibration of the transmit link in a radio frequency domain calibration system of a circuit unit of the present invention.
  • the radio frequency domain predistortion calibration circuit includes a calibration observation receiver R06, a signal detection unit E06, a calibration control unit and a calibration adjustment unit;
  • the calibration observation receiver R06 includes one or more circuit components in a low noise amplifier, a receiver mixer, a receiver frequency synthesizer, a receiver programmable gain amplifier, and a receiver filter in order of connection, or multiplexing transceivers The receiving link of the machine;
  • the calibration observation receiver R06 samples one or more input and output node signals of the transmitting link circuit device, and then the signal detection unit E06 detects and quantifies the signal received by the calibration observation receiver R06, and then the calibration control unit The detection and quantification results are used to control the calibration adjustment unit to perform radio frequency domain predistortion calibration on the transmission link or circuit module.
  • FIG 10 is a system block diagram of an exemplary embodiment of joint calibration of the radio frequency domain and the digital domain of the present invention.
  • the radio frequency transceiver circuit system (transceiver) or circuit module is jointly calibrated in the radio frequency domain and the digital domain.
  • the receiving link of the transceiver is first calibrated in the radio frequency domain.
  • the calibrated signal in the radio frequency domain is converted into a digital signal through the analog-to-digital signal converter ADC, and then calibrated in the digital domain by a microprocessor (MCU).
  • MCU microprocessor
  • the digital calibration control program in E05 drives the digital calibration algorithm program of the digital calibration algorithm circuit (E02) to calibrate the output signal of the analog-to-digital signal converter ADC;
  • the transmitting link of the transceiver is first calibrated in the radio frequency domain, and then the digital calibration control program in the microprocessor E05 calibrated in the digital domain drives the digital calibration algorithm program of the digital calibration algorithm circuit E02, and the digital-analog
  • the input digital signal of the signal converter DAC is calibrated; the calibrated digital signal in the digital domain is converted into an analog signal by the digital-to-analog signal converter DAC;
  • the microprocessor E05 for digital domain calibration runs the digital calibration control program and regulates the digital calibration algorithm circuit E02, the data interface circuit E03 and the baseband circuit E04;
  • Digital calibration algorithm circuit E02 is used to implement the digital calibration algorithm program
  • Data interface circuit E03 is used for information exchange between digital calibration algorithm circuit E02 and baseband circuit E04;
  • Baseband circuit E04 is used to process digital baseband signals.

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Abstract

本发明公开了一种射频电路单元的射频域校准***及方法，该***在射频域对电路元件组成的射频电路器件、电路模块及收发电路***通过校准单元进行调控与校准。所述校准单元包括校准控制单元和校准调节单元，其中，校准控制单元生成校准控制信号，驱动校准调节单元对射频电路单元进行电路结构、几何尺度及工作参数的可编程、自适应、实时调节，使射频电路单元工作在预期状态并实现性能优化。与现有技术的数字域校准***相比，本发明的射频域校准***具有更小的芯片面积、更低成本、更高的模式调控灵活性及配置灵活性。

Description

一种射频电路单元的射频域校准***及方法 技术领域
本发明属于电子科学与技术领域，涉及一种射频集成电路器件及收发机的射频域校准***与方法。
背景技术
随着集成的功能越来越复杂，射频收发电路***(或称为射频收发机)需要在不同功能、不同模式、不同协议、宽范围的不同频带以及信道带宽之间进行实时切换。由电路元件组成的射频器件、射频模块、射频电路***称为射频电路单元或简称电路单元。因为器件模型、设计仿真以及制作工艺的偏差、工作条件差异以及长时间使用引起的器件和电路老化，会导致电路单元无法工作在预期的最佳状态，从而产生失真失配现象。为保证不同模式、不同条件下工作在预期状态并具有更好性能，如何对射频电路单元的结构、参数进行实时调控和校准以及性能优化，成为射频集成电路芯片设计领域的一项关键技术。对功能性工作电路单元进行调控、校准的校准电路单元简称校准单元。
文献“D.J.McLaurin et al.A highly reconfigurable 65nm CMOS RF-to-bits transceiver for full-band multicarrier TDD/FDD 2G/3G/4G/5G macro basestation”，2018 IEEE International Solid-State Circuits Conference(ISSCC),2018,pp.162-164(doi:10.1109/ISSCC.2018.8310234，参考文献1)采用数字域校准方法，在数字校准算法电路中集成正交误差校正(QEC)、直流失调校正、数字预失真校正等校准算法，在数字域实现接收信号/发射信号的校准。所集成的数字校准算法主要适用于无线移动通信的收发 电路，对其他不同功能或结构的电路***未必适用，且由于大量算法的集成，数字逻辑电路版图面积接近单通道收发机芯片版图面积的二分之一，增加了芯片成本。
发明专利“Amplifier calibration”(CN201710859254.2，2017.09.21，参考专利1)公开了一种运算放大器的校准技术，针对加工后的运算放大器面临的共模抑制比、增益等参数恶化问题，根据放大器测试结果，配置运算放大器输入端的元件参数(如电阻网络)从而实现对运算放大器的校准。该校准技术需要对运算放大器电路的元件参数进行手动配置，不具备软件控制的自动校准功能。此外，该技术仅适用于运算放大器，无法对其他电路单元进行射频域校准。
发明专利“Digital pre-distortion(DPD)in a wireless transmitter”(US201916578085，2019.09.20，参考专利2)公开了一种通过检测输出功率实现无线发射机(或发射链路)数字域预失真校准技术(简称数字预失真)。该技术需要把接收到的发射信号首先通过ADC转换为数字信号，并借助数字逻辑电路的数字预失真校准(或校正)算法。该技术不具有射频域预失真功能。
发明专利“Phase or delay control in multi-channel RF applications”(CN201811030821.4，2018.09.05，参考专利3)披露了一种多路不同相位或延时的本振信号的产生方法，该技术无法实现对本振信号幅度、相位、噪声(phase noise)、抖动(jitter)、延时的实时校准。
发明专利“一种面向无线传感网应用的低功耗射频收发装置”(CN201210548579.6，2012.12.17，参考专利4)，其中，自动频率调谐电路用于控制滤波器的频率特性，降低工艺误差对中心频率和带宽的影响。该技术只能提高具有单一、固定中心频率和带宽的滤波器 的一致性及可靠性，收发电路***一经固化就无法针对不同工作条件对滤波器的电路结构以及工作参数进行实时、自适应的调节和校准，也无法实现滤波器综合性能(如频率、带宽等)的实时优化。
发明专利“可编程的无线电收发机”(200680037710，2006.08.11，参考专利5)公开了一种采用传输线电感器的可编程收发机，实现不同频带、不同协议之间的切换，但该收发机无法通过电路结构、几何尺度及电路工作参数的调节，来实现电路单元性能参数(如带宽、增益、噪声系数、输出功率、效率、线性度、矢量误差幅度EVM、邻道抑制、干扰抑制、衰减精度、移相精度、匹配，等)的实时校准和优化。
综上所述，迄今尚缺少一种可行技术对射频电路单元的结构、几何尺度、工作参数进行自适应实时调控和校准，使其在不同模式、不同条件下工作在预期状态并实现性能优化。现有技术无法对射频电路单元进行射频域可编程、可配置的实时自动校准及性能优化。对射频收发电路***(包括接收链路、发射链路)的传统数字校准方法是在数字逻辑电路中，利用数字校准算法程序实现对收发机的校准(简称数字校准)，这种校准方法需要依赖具有复杂运算能力的数字逻辑电路，例如基带电路、微处理器Micro-Control Unit(MCU)或特殊应用的ASIC电路，增加了芯片面积和成本。而且，数字校准方法通常仅适用于特定模式或结构类型的收发电路***或电路模块，对不同应用的灵活性及普适性较差。另外，对于接收链路(或接收机)，在进行数字校准之前，需要对接收到的信号经过模拟-数字信号转换器ADC转换为数字信号，然后在数字域进行校准，降低了收发机不同电路模 块配置的灵活性。对部分射频电路器件(如频率综合器、滤波器)的传统校准方法依赖于特殊的电路结构，电路一经固化就无法对电路结构以及工作参数进行软件控制的自动、实时调节，对运算放大器的传统校准方法则需要手动配置。本发明提供一种射频域校准***及方法，不需要借助于模拟-数字信号转换器ADC对模拟信号进行数字信号转换，而是在射频域为电路元件、器件、模块、收发机配置相应的校准单元，通过对电路单元的电路结构、几何尺度、工作参数以及输入输出节点的工作参数进行调节，实现对不同类型(通信、雷达、导航、电子对抗等)、不同模式或协议的电路单元的射频域可编程、可配置、自适应、实时调控和校准，使其工作在预期状态并实现性能优化。
发明内容
针对现有技术之不足，本发明目的在于提供一种射频电路单元的射频域(广义上也可称为模拟域)校准***与方法，在射频域通过校准单元对电路单元的电路结构、几何尺度、工作参数以及输入输出节点的工作参数进行调节，实现对不同类型、不同工作条件、不同结构或模式的射频电路单元的射频域可编程、可配置、自适应、实时调控和校准，使其工作在预期状态并实现性能优化。和传统数字域校准方法相比，基于本发明的射频域(或模拟域)实时、自适应可编程校准技术(RF-domain Agile Programmable Calibration，RAPC)实现的射频电路(Agile Programmable Calibrated RFIC，APCR)或模拟电路(APCA)适用于通信、雷达、导航、跟踪等不同类型，并适用于射频集成电路(RFIC，包括变频式或移相式等***结构，以及时分双工 TDD、频分双工FDD、全双工FD等模式)，光电集成电路(OEIC)，以及数字无线电(digital RF)等集成电路。
为了实现上述目的，本发明的技术方案如下：一种射频电路单元的射频域校准***，包括校准单元和射频电路单元；
所述射频电路单元包括由电路元件组成的射频电路器件、电路模块、收发电路***的一种或多种；
所述校准单元包括校准控制单元和校准调节单元；
校准控制单元包括存储器、运算单元、逻辑控制单元以及总线；
其中，存储器用于存储校准的指令；
运算单元用于校准控制单元中的数据运算；
逻辑控制单元，用于把指令从存储器中取出，译码后发出相应的控制信号；
总线，用于连接运算单元、存储器以及逻辑控制单元，实现运算单元、存储器、逻辑控制单元之间的信息传递和交互；
所述校准控制单元，生成校准控制信号，驱动和调控所述校准调节单元；
将部分或所有射频电路单元的校准控制单元集成在一起；
校准调节单元包括开关或开关阵列网络，以及调谐网络、电阻网络、传输线网络、变压器网络的一种或多种组合；
校准调节单元的电感、电容、电阻、传输线、变压器的元件参数采用分立值或连续可变值；
所述校准调节单元，通过开关或开关阵列网络，调控射频电路单元的结构、几何尺度、工作参数以及输入输出节点的工作参数；
校准控制单元通过硅基半导体工艺实现，射频电路单元、校准调节单元通过硅基半导体工艺或化合物半导体工艺实现；相同工艺的电 路通过单片集成，不同工艺的电路通过***级封装集成。
作为本发明的一种改进，所述校准***还包括射频域校准的微处理器(MCU)；将部分或所有电路单元的校准控制单元集成在射频域校准的微处理器(MCU)中，用于电路单元的可编程、实时调控和校准。
作为本发明的一种优选方案，通过校准单元进行调控和校准的射频收发电路***(简称收发机)或电路模块由单通道或多通道组成，具有变频结构或相控结构或二者组合等结构，并工作在通信、雷达、导航、跟踪、成像、测量、电子对抗等模式中的一种或多种组合，工作频率覆盖射频频段，或微波、毫米波频段，或太赫兹频段，或以上不同频段的组合。
作为本发明的一种优选方案，在射频域对变频式收发机(简称变频收发机)或电路模块在射频域通过校准单元进行调控和校准的电路器件、电路模块包括：
变频收发机的接收链路(接收机)，在天线接收到信号以后，在模拟-数字信号转换器(ADC)之前，电路器件按照连接顺序依次包括但不限于低噪声放大器(LNA)、下变频混频器(Down-Mixer)、接收机(Rx)频率综合器(FS)、接收机(Rx)可编程增益放大器(PGA)、接收机滤波器(Rx Filter)，其中接收机频率综合器与下变频混频器相连，为接收链路提供本振信号；
变频收发机的发射链路(发射机)，在数字-模拟信号转换器(DAC)之后，在天线发射信号之前，电路器件按照连接顺序依次包括但不限于发射机滤波器(Tx Filter)、发射机(Tx)可编程增益放大器(PGA)、发射机(Tx)频率综合器(FS)、上变频混频器(Up-Mixer)、功率放大器(PA)或驱动放大器(DA)，其中发射机频率综合器与上变频 混频器相连，为发射链路提供本振信号；
其中，低噪声放大器、混频器(包括下变频混频器、上变频混频器)、功率放大器或驱动放大器的校准调节单元各自包括偏置调节子单元、幅度调节子单元、相位调节子单元；
可编程增益放大器、滤波器(包括接收机滤波器、发射机滤波器)、运算放大器的校准调节单元各自包括偏置调节子单元、幅度调节子单元、相位调节子单元、直流失调消除子单元；
频率综合器的校准调节单元包括幅度调节子单元、相位调节子单元；
接收机频率综合器和发射机频率综合器对于时分双工(TDD)及全双工(FD)等类型的收发机可共用；
所述变频收发机包含一个或多个通道；
通过校准单元对每个通道中电路单元的校准调节单元进行调控，实现电路单元性能参数(如载波频率、带宽、增益、噪声系数、输出功率、效率、线性度、矢量误差幅度EVM、邻道抑制、干扰抑制、匹配，等)的调节、校准和优化。
作为本发明的一种优选方案，在射频域对相控式收发机(简称相控收发机)或电路模块在射频域通过校准单元进行调控和校准的电路器件、电路模块包括：
相控收发机的接收链路，在天线接收到信号之后，通过校准单元进行调控和校准的电路器件按照连接顺序依次包括但不限于低噪声放大器、接收机移相器、接收机衰减器、功率合成器；
相控收发机的发射链路，通过功率分配器把输入信号进行功分之后，在天线发射信号之前，通过校准单元进行调控和校准的电路器件按照连接顺序依次包括但不限于发射机衰减器、发射机移相器、功率 放大器或驱动放大器；
其中，移相器的校准调节单元包括偏置调节子单元、相位调节子单元；
衰减器的校准调节单元包括偏置调节子单元、幅度调节子单元；
功率合成器、功率分配器的校准调节单元包括传输线调节子单元；
所述相控收发机包含一个或多个通道；
通过校准单元对每个通道中电路单元的校准调节单元进行调控，实现电路单元性能参数(如移相精度、衰减精度、增益、线性度、噪声系数、工作频率范围、输入匹配、输出匹配、***损耗、隔离度，等)的调节、校准和优化。
作为本发明的一种优选方案，所述校准***包括可重构收发机或电路模块、可重构调节电路、校准单元；
可重构调节电路和可重构电路器件或模块(如频率综合器、低噪声放大器、功率放大器、混频器、滤波器，等)连接；
其中，可重构调节电路包括开关或开关阵列网络，以及调谐网络、电阻网络、传输线网络、变压器网络的一种或多种组合；
所述可重构调节电路的调谐网络及电阻网络，其中电感、电容、电阻、传输线、变压器的元件参数采用分立值或连续可变值，实现载波频率范围、信道带宽等性能参数的分立可调或连续可调；
通过校准控制单元调控校准调节单元，使可重构收发机或电路模块工作在预期状态(如模式、频段、信道带宽、协议，等)，并进行实时切换及性能优化。
作为本发明的一种改进，射频域校准***还包括反馈电路单元；
所述反馈电路单元包括校准观测接收机、信号检测单元和信号传 输单元；
校准观测接收机，从接收到输入信号开始按照连接顺序依次包括但不限于低噪声放大器、下变频混频器、接收机频率综合器、接收机可编程增益放大器、接收机滤波器中的一个或多个电路器件，或者复用收发电路***的接收链路；
校准观测接收机用于接收从射频电路单元输出的信号；
信号检测单元用于将校准观测接收机接收到的信号进行分类、提取、放大、量化，检测出有用信号；
信号传输单元用于将信号检测单元检测出的有用信号传输至校准控制单元。
作为本发明的一种改进，所述反馈电路单元用于收发电路***中发射链路的射频域预失真校准。
作为本发明的一种改进，射频域校准***还包括射频域和数字域的联合校准电路；
所述射频域和数字域的联合校准电路包括射频域的校准单元、电路单元，数字域校准的微处理器MCU，模拟-数字信号转换器ADC/数字-模拟信号转换器DAC，数字校准算法电路、数据接口电路、基带电路；
数字校准算法电路用于实现数字校准算法程序；
数字校准算法程序包括正交误差校正(或校准)算法、直流失调校正算法、IQ路失配校正算法、本振泄露校正算法、镜像抑制校正算法、数字预失真校正算法；
数字域校准的微处理器MCU运行数字校准控制程序，调控数字校准算法电路、数据接口电路和基带电路；
数据接口电路(如高速Serdes接口)用于数字校准算法电路、 基带电路之间的信息交互；
基带电路用于处理数字基带信号。
一种用于上述射频电路单元的射频域校准***的校准方法，在射频域通过校准单元对射频电路单元的电路结构、几何尺度、工作参数进行实时调控和校准，包括如下步骤：
步骤1：外部输入或内部产生校准指令；
步骤2：校准控制单元中的存储器接收并存储校准指令；
步骤3-1：校准控制单元中的逻辑控制单元把校准指令从存储器中取出；
步骤3-2：校准控制单元中的运算单元根据校准指令进行数据运算；
步骤3-3：运算单元经过运算后产生的数据，通过总线传递到逻辑控制单元进行译码；
步骤3-4：逻辑控制单元输出校准控制信号，驱动和调控所述校准调节单元；
步骤4：校准调节单元通过开关或开关阵列网络，调控射频电路单元的结构、几何尺度、工作参数以及输入输出节点的工作参数；
经过以上步骤，校准控制单元通过校准调节单元对射频电路单元进行调控，使其工作在预期状态，并对电路单元性能参数(如载波频率、带宽、增益、噪声系数、输出功率、效率、线性度、矢量误差幅度EVM、邻道抑制、干扰抑制、衰减精度、移相精度、匹配，等)进行调节，实现对射频电路单元的可编程、可配置、自适应、实时校准及性能优化；
其中，所述校准调节单元，通过开关或开关阵列网络，调控电路单元的结构、几何尺度、工作参数(如电压、增益、幅度、相位、匹 配，等)以及输入输出节点的工作参数；
校准调节单元的电感、电容、电阻、传输线、变压器等元件参数采用分立值或连续可变值，从而实现载波频率、信道带宽等性能参数的分立可调或连续可调；
电感通过匝数、半径、线宽等参数进行调节，电容通过极板长度、宽度等参数进行调节，电阻、传输线通过长度、宽度等几何尺度或电尺度进行调节，变压器通过耦合电感的参数进行调节；
所述电路单元的电路结构、几何尺度、工作参数通过开关或开关阵列网络进行选择。
作为本发明的一种优选方案，步骤4中，对变频收发机在射频域进行校准的方法，包括如下步骤：
步骤4-A1：通过校准控制单元调控电路器件对应的校准调节单元对电路器件进行校准，包括：
通过校准控制单元调控低噪声放大器的校准调节单元，实现对低噪声放大器性能参数(如噪声系数、增益、线性度，等)的校准；
通过校准控制单元调控混频器(包括下变频混频器、上变频混频器)的校准调节单元，实现对混频器性能参数(如噪声系数、增益、线性度，等)的校准；
通过校准控制单元调控功率放大器或驱动放大器的校准调节单元，实现对功率放大器或驱动放大器性能参数(如增益、输出功率、效率、线性度，等)的校准；
通过校准控制单元调控可编程增益放大器(包括接收机PGA、发射机PGA)的校准调节单元，实现对可编程增益放大器的直流失调校准以及其他性能参数(如增益、平坦度、总谐波失真、IQ两路失配，等)的校准；
通过校准控制单元调控滤波器(包括接收机filter，发射机filter)的校准调节单元，实现对滤波器直流失调的校准以及其他性能参数(如中心频率、带宽、增益、平坦度、总谐波失真、滚降速度、IQ两路失配，等)的校准；
通过调控射频滤波器的中心频率，实现对收发机中心频率的调节和校准；通过调控中频滤波器的带宽，实现对收发机信道带宽的调节和校准；
通过校准控制单元调控运算放大器的校准调节单元，实现对运算放大器的直流失调校准以及其他性能参数(如增益、相位裕度、增益带宽积、摆率、电源抑制比、共模抑制比，等)的校准；
通过校准控制单元调控频率综合器(包括接收机FS、发射机FS)的校准调节单元，实现对频率综合器性能参数(如本振信号的频率、幅度、相位噪声、抖动、正交失配，等)的校准；
步骤4-A2：通过校准控制单元调控电路模块对应的校准调节单元对电路模块进行校准，包括：
通过校准控制单元调控包括低噪声放大器、下变频混频器的接收机射频前端电路模块的校准调节单元，实现对接收机射频前端电路模块性能参数(如输入匹配、输出匹配、工作频率范围、噪声系数、增益，等)的校准；
通过校准控制单元调控包括功率放大器、上变频混频器的发射机射频前端电路模块的校准调节单元，实现对发射机射频前端电路模块性能参数(如输入匹配、输出匹配、工作频率范围、输出功率、增益，等)的校准；
通过校准控制单元调控包括可编程增益放大器、滤波器的模拟基带电路模块的校准调节单元，实现对模拟基带电路模块性能参数(如 带宽、增益、稳定度，等)的校准；
步骤4-A3：通过校准控制单元调控变频收发机中的接收链路、发射链路对应的校准调节单元对变频收发机中的接收链路、发射链路进行校准，包括：
通过校准控制单元调控变频收发机中的接收链路的校准调节单元，实现对变频收发机中的接收链路性能参数(如输入匹配、输出匹配、工作频率范围、噪声系数、增益，等)的校准；
通过校准控制单元调控变频收发机中的发射链路的校准调节单元，实现对变频收发机中的发射链路性能参数(如输入匹配、输出匹配、工作频率范围、输出功率、增益，等)的校准；
经过以上步骤，校准控制单元通过调控校准调节单元，对变频收发机中各通道接收链路、发射链路的电路器件或电路模块的结构、几何尺度、工作参数以及输入输出节点的工作参数进行调控，实现对变频收发机的实时校准及性能优化。
作为本发明的一种优选方案，所述射频域校准***的校准方法，步骤4中，对相控收发机进行调控和校准，包括：
步骤4-B1：通过校准控制单元调控电路器件对应的校准调节单元对电路器件进行校准，包括：
通过校准控制单元调控低噪声放大器的偏置调节子单元、幅度调节子单元、相位调节子单元，对低噪声放大器进行性能参数(如噪声系数、增益、线性度，等)的校准；
通过校准控制单元调控功率放大器或驱动放大器的偏置调节子单元、幅度调节子单元、相位调节子单元，对功率放大器或驱动放大器进行性能参数(如增益、输出功率、效率、线性度，等)的校准；
通过校准控制单元调控移相器(包括接收机移相器、发射机移相 器)的偏置调节子单元、相位调节子单元，实现对移相器性能参数(如移相精度、增益、线性度、噪声系数，等)的校准；
通过校准控制单元调控衰减器(包括接收机衰减器、发射机衰减器)的偏置调节子单元、幅度调节子单元，实现对衰减器性能参数(如衰减精度、增益、线性度、噪声系数，等)的校准；
通过校准控制单元调控功率合成器、功率分配器中传输线调节子单元的传输线结构及几何尺度，实现对功率合成器、功率分配器性能参数(如匹配、***损耗、隔离度，等)的校准；
步骤4-B2：通过校准控制单元调控电路模块对应的校准调节单元对电路模块进行校准，包括：
通过校准控制单元调控包括接收机移相器、接收机衰减器的幅相控制电路模块的输入匹配调节子单元、输出匹配调节子单元，实现对接收机幅相控制电路模块性能参数(如输入匹配、输出匹配、工作频率范围、噪声系数、增益，等)的校准；
通过校准控制单元调控包括发射机移相器、发射机衰减器的幅相控制电路模块的输入匹配调节子单元、输出匹配调节子单元，实现对发射机幅相控制电路模块性能参数(如输入匹配、输出匹配、工作频率范围、输出功率、增益，等)的校准；
步骤4-B3：通过校准控制单元调控相控收发机中接收链路、发射链路对应的校准调节单元对相控收发机中的接收链路、发射链路进行校准，包括：
通过校准控制单元调相控收发机中接收链路、发射链路的输入匹配调节子单元、输出匹配调节子单元，实现对相控收发机中的接收链路性能参数(如输入匹配、输出匹配、工作频率范围、噪声系数、增益，等)、发射链路性能参数(如输入匹配、输出匹配、工作频率范 围、输出功率、增益，等)的校准；
经过以上步骤，校准控制单元通过调控校准调节单元，对相控收发机中各通道接收链路、发射链路的电路器件或电路模块的结构、几何尺度、工作参数以及输入输出节点的工作参数进行调控，实现对相控收发机的实时校准及性能优化。
作为本发明的一种优选方案，所述射频域校准***的校准方法，通过校准控制单元调控校准调节单元，步骤4中，对可重构收发机或电路模块进行调控，包括：
步骤4-C1：校准控制单元调控校准调节单元，对可重构调节电路、可重构电路器件的电路结构、几何尺度、工作参数，输入输出节点的工作参数，以及频率、带宽进行调控；
步骤4-C2：校准控制单元调控校准调节单元，对可重构调节电路、可重构电路模块的工作参数，输入输出节点的工作参数，以及频率、带宽进行调控；
步骤4-C3：校准控制单元调控校准调节单元，对可重构调节电路、可重构收发机的工作参数，输入输出节点的工作参数，以及频率、带宽进行调控；
经过以上步骤，通过校准控制单元调控校准调节单元，使可重构收发机或电路模块在预期的模式、频段、带宽、协议下工作，并实现实时切换及性能优化；
其中，电路单元的电路结构、几何尺度、工作参数通过开关或开关阵列网络进行选择；
不同频段、带宽之间进行实时切换、校准的响应时间主要由收发机锁相环锁定时间决定。
作为本发明的一种改进，针对带有反馈电路单元的射频域校准系 统的校准方法，还包括如下步骤：
步骤5-R1：校准观测接收机对射频电路单元的一个或多个输入输出节点信号进行采样；
步骤5-R2：信号检测单元对校准观测接收机接收到的信号进行检测并量化；
步骤5-R3：校准控制单元根据检测、量化结果，调控校准调节单元对射频电路单元进行实时调控和校准。
作为本发明的一种改进，针对射频域预失真校准，包括以下步骤：
步骤5-S1：校准观测接收机对如下电路单元或节点进行采样，包括：
对发射链路中一个或多个电路器件的输入输出节点信号进行采样；
对发射链路中发射前端电路模块、模拟基带电路模块的输入输出节点信号进行采样；
对发射天线的输入节点信号进行采样；
步骤5-S2：信号检测单元对校准观测接收机接收到的信号进行检测并量化；
步骤5-S3：校准控制单元根据检测、量化结果，调控校准调节单元对发射链路的电路器件或模块进行射频域预失真校准。
作为本发明的一种改进，在射频域校准后，对收发电路***或电路模块进行射频域和数字域的联合校准，还包括以下步骤：
对于收发电路***的接收链路：
步骤5-T1：经过射频域校准后的信号通过模拟-数字信号转换器ADC转换为数字信号；
步骤5-T2：由数字域校准的微处理器MCU中数字校准控制程序 驱动数字校准算法电路的数字校准算法程序，对模拟-数字信号转换器ADC的输出信号进行校准；
对于收发电路***的发射链路：
步骤5-P1：由数字域校准的微处理器MCU中数字校准控制程序驱动数字校准算法电路的数字校准算法程序，对数字-模拟信号转换器DAC的输入数字信号进行校准；
步骤5-P2：数字域校准后的数字信号通过数字-模拟信号转换器DAC转换为模拟信号；
步骤6：接收链路、发射链路进行叠代校准。
相对于现有技术，本发明的优点如下：本发明提供一种射频电路单元的射频域(或模拟域)校准***，在射频域对电路器件以及由电路器件连接组成的电路模块或电路***(如收发机)通过校准单元进行电路结构、几何尺度、工作参数(如电压、增益、幅度、相位、匹配，等)的可编程、自适应实时调控和校准，使电路单元工作在预期状态，并根据对应的工作状态实现电路单元性能参数(如载波频率、带宽、增益、噪声系数、输出功率、效率、线性度、矢量误差幅度EVM、邻道抑制、干扰抑制、衰减精度、移相精度、匹配，等)的实时调节和优化。为实现类似校准性能，传统的数字域校准***需要首先把射频信号通过模拟-数字信号转换器ADC转化为数字信号，然后针对特定功能(如无线通信)利用专用校准算法程序对信号进行校准；作为对比，本发明的射频域校准***与方法不需要借助于ADC对模拟信号进行数字信号转化，也不依赖于特定类型应用的校准算法，而是适用于各种不同功能、不同类型(通信、雷达、导航、电子对抗等) 以及不同结构(变频式或移相式结构等)，并可工作在不同协议或模式下(如TDD/FDD等)，在实现可编程、自适应、实时高精度校准的同时，校准***并具有更小的芯片面积、更低成本，更高的模块配置(如ADC)灵活性。
附图说明
图1是本发明一种电路单元的射频域校准***框图，在射频域对变频收发机的电路器件、电路模块通过校准单元进行校准。
图2是本发明一种电路单元的射频域校准***中校准控制单元的结构框图。
图3是本发明一种电路单元的射频域校准***的示例性实施例***框图，其中校准控制单元集成在射频域校准的微处理器MCU。
图4是本发明一种电路单元的射频域校准***框图，在射频域对变频收发机接收链路的电路器件、电路模块通过校准单元进行校准。
图5是本发明一种电路单元的射频域校准***框图，在射频域对变频收发机发射链路的电路器件、电路模块通过校准单元进行校准。
图6是本发明一种电路单元的射频域校准***框图，在射频域对相控式收发机接收链路、发射链路的电路器件、电路模块通过校准单元进行校准。
图7是本发明一种电路单元的射频域校准***中可重构收发机、可重构调节电路、校准单元的结构框图。
图8是本发明一种电路单元的射频域校准***结构框图，包括电路单元、校准单元、反馈电路单元。
图9是本发明一种电路单元的射频域校准***中发射链路射频域预失真校准的示例性实施例***框图。
图10是本发明一种电路单元的的射频域校准***中射频域与数字域联合校准的示例性实施例***框图。
具体实施方式
下面详细描述本发明的实施方式，所述实施方式的示例在附图中示出。以下通过参考附图描述的实施方式是示例性的，仅用于解释本发明，而不能理解为对本发明的限制。
本发明提出一种射频电路单元的射频域校准***及方法，在射频域通过校准单元对射频电路单元(包括电路器件、模块、收发电路***)进行可编程、可配置、自适应、实时调控和校准，使电路单元工作在预期状态并实现性能优化。与现有技术的数字域校准***与方法相比，本发明的射频域校准***具有更小的芯片面积、更低成本、更高的模式调控灵活性及模块配置灵活性。
实施例1：一种射频电路单元的射频域校准***，包括校准单元和电路单元；
所述电路单元包括电路元件以及由电路元件组成的射频电路器件、电路模块、收发电路***的一种或多种；
所述校准单元包括校准控制单元和校准调节单元；
校准控制单元包括存储器、运算单元、逻辑控制单元以及总线；
其中，存储器用于存储校准的指令；
运算单元用于校准控制单元中的数据运算；
逻辑控制单元，用于把指令从存储器中取出，译码后发出相应的控制信号；
总线，用于连接运算单元、存储器以及逻辑控制单元，实现运算单元、存储器、逻辑控制单元之间的信息传递和交互；
所述校准控制单元，生成校准控制信号，驱动和调控所述校准调节单元；
将部分或所有电路单元的校准控制单元集成在一起；
校准调节单元包括开关或开关阵列网络，以及调谐网络(如电感、电容调谐网络)、电阻网络、传输线网络、变压器网络、晶体管、二极管等的一种或多种组合；
校准调节单元的电感、电容、电阻、传输线、变压器等元件参数采用分立值或连续可变值，从而实现载波频率、信道带宽等性能参数的分立可调或连续可调；
所述校准调节单元，通过开关或开关阵列网络，调控电路单元的结构、几何尺度、工作参数(如电压、增益、幅度、相位、匹配，等)以及输入输出节点的工作参数；
校准控制单元通过硅基半导体工艺实现，电路单元、校准调节单元通过硅基半导体工艺或化合物半导体工艺实现；相同工艺的电路通过单片集成，不同工艺的电路通过***级封装集成。
一种用于上述射频电路单元的射频域校准***的校准方法，在射频域通过校准单元对射频电路单元的电路结构、几何尺度、工作参数进行实时调控和校准；
包括如下步骤：
步骤1：外部输入或内部产生校准指令；
步骤2：校准控制单元中的存储器接收并存储校准指令；
步骤3-1：校准控制单元中的逻辑控制单元把校准指令从存储器中取出；
步骤3-2：校准控制单元中的运算单元根据校准指令进行数据运算；
步骤3-3：运算单元经过运算后产生的数据，通过总线传递到逻辑控制单元进行译码；
步骤3-4：逻辑控制单元输出校准控制信号，驱动和调控所述校准调节单元；
步骤4：校准调节单元通过开关或开关阵列网络，调控射频电路单元的结构、几何尺度、工作参数以及输入输出节点的工作参数；
经过以上步骤，校准控制单元通过校准调节单元对射频电路单元进行调控，使其工作在预期状态，并对电路单元性能参数(如载波频率、带宽、增益、噪声系数、输出功率、效率、线性度、矢量误差幅度EVM、邻道抑制、干扰抑制、衰减精度、移相精度、匹配，等)进行调节，实现对射频电路单元的可编程、可配置、自适应、实时校准及性能优化；
其中，所述校准调节单元，通过开关或开关阵列网络，调控电路单元的结构、几何尺度、工作参数(如电压、增益、幅度、相位、匹配，等)以及输入输出节点的工作参数；
校准调节单元的电感、电容、电阻、传输线、变压器等元件参数采用分立值或连续可变值，从而实现载波频率、信道带宽等性能参数的分立可调或连续可调；
电感通过匝数、半径、线宽等参数进行调节，电容通过极板长度、宽度等参数进行调节，电阻、传输线通过长度、宽度等几何尺度或电尺度进行调节，变压器通过耦合电感的参数进行调节；
所述电路单元的电路结构、几何尺度、工作参数通过开关或开关阵列网络进行选择。
实施例2：作为本发明的一种改进，所述校准***还包括射频域校准的微处理器(MCU)；将部分或所有电路单元的校准控制单元集 成在射频域校准的微处理器(MCU)中，用于调控相应的校准调节单元，实现电路单元的可编程、实时调控和校准。其余结构和优点与实施例1完全相同。
实施例3：作为本发明的一种改进，所述校准***中射频收发电路***(收发机)或电路模块由单通道或多通道组成，具有变频式结构、相控式结构或二者组合等结构，并工作在通信、雷达、导航、跟踪、成像、测量、电子对抗等模式中的一种或多种组合，工作频率覆盖射频频段，或微波、毫米波频段，或太赫兹频段，或以上不同频段的组合。
实施例4：作为本发明的一种优选方案，在射频域对变频式收发机(简称变频收发机)或电路模块通过校准单元进行调控和校准的电路器件、电路模块包括：
变频收发机的接收链路(接收机)，在天线接收到信号以后，在模拟-数字信号转换器(ADC)之前，电路器件按照连接顺序依次包括但不限于低噪声放大器(LNA)、下变频混频器(Down-Mixer)、接收机(Rx)频率综合器(FS)、接收机(Rx)可编程增益放大器(PGA)、接收机滤波器(Rx Filter)，其中接收机频率综合器与下变频混频器相连，为接收链路提供本振信号；
变频收发机的发射链路(发射机)，在数字-模拟信号转换器(DAC)之后，在天线发射信号之前，电路器件按照连接顺序依次包括但不限于发射机滤波器(Tx Filter)、发射机(Tx)可编程增益放大器(PGA)、发射机(Tx)频率综合器(FS)、上变频混频器(Up-Mixer)、功率放大器(PA)或驱动放大器(DA)，其中发射机频率综合器与上变频混频器相连，为发射链路提供本振信号；
其中，低噪声放大器、混频器、功率放大器或驱动放大器的校准 调节单元各自包括偏置调节子单元、幅度调节子单元、相位调节子单元；
可编程增益放大器、滤波器、运算放大器的校准调节单元各自包括偏置调节子单元、幅度调节子单元、相位调节子单元、直流失调消除子单元；
频率综合器的校准调节单元包括幅度调节子单元、相位调节子单元；
接收机频率综合器和发射机频率综合器对于时分双工(TDD)及全双工(FD)等类型的收发机可共用；
所述变频收发机包含一个或多个通道。其余结构和优点与实施例1完全相同。
通过校准单元对每个通道中电路单元的校准调节单元进行调控，实现电路单元性能参数(如载波频率、带宽、增益、噪声系数、输出功率、效率、线性度、矢量误差幅度EVM、邻道抑制、干扰抑制、匹配，等)的调节、校准和优化。
作为本发明的一种优选方案，实施例1中所述的射频域校准***的校准方法，步骤4中，对变频收发机在射频域进行校准的方法，包括如下步骤：
步骤4-A1：通过校准控制单元调控电路器件对应的校准调节单元对电路器件进行校准，包括：
通过校准控制单元调控低噪声放大器的校准调节单元，实现对低噪声放大器性能参数(如噪声系数、增益、线性度，等)的校准；
通过校准控制单元调控混频器(包括下变频混频器、上变频混频器)的校准调节单元，实现对混频器性能参数(如噪声系数、增益、线性度，等)的校准；
通过校准控制单元调控功率放大器或驱动放大器的校准调节单元，实现对功率放大器或驱动放大器性能参数(如增益、输出功率、效率、线性度，等)的校准；
通过校准控制单元调控可编程增益放大器(包括接收机PGA、发射机PGA)的校准调节单元，实现对可编程增益放大器的直流失调校准以及其他性能参数(如增益、平坦度、总谐波失真、IQ两路失配，等)的校准；
通过校准控制单元调控滤波器(包括接收机filter，发射机filter)的校准调节单元，实现对滤波器直流失调的校准以及其他性能参数(如中心频率、带宽、增益、平坦度、总谐波失真、滚降速度、IQ两路失配，等)的校准；
通过调控射频滤波器的中心频率，实现对收发机中心频率的调节和校准；通过调控中频滤波器的带宽，实现对收发机信道带宽的调节和校准；
通过校准控制单元调控运算放大器的校准调节单元，实现对运算放大器的直流失调校准以及其他性能参数(如增益、相位裕度、增益带宽积、摆率、电源抑制比、共模抑制比，等)的校准；
通过校准控制单元调控频率综合器(包括接收机FS、发射机FS)的校准调节单元，实现对频率综合器性能参数(如本振信号的频率、幅度、相位噪声、抖动、正交失配，等)的校准；
步骤4-A2：通过校准控制单元调控电路模块对应的校准调节单元对电路模块进行校准，包括：
通过校准控制单元调控包括低噪声放大器、下变频混频器的接收机射频前端电路模块的校准调节单元，实现对接收机射频前端电路模块性能参数(如输入匹配、输出匹配、工作频率范围、噪声系数、增 益，等)的校准；
通过校准控制单元调控包括功率放大器或驱动放大器、上变频混频器的发射机射频前端电路模块的校准调节单元，实现对发射机射频前端电路模块性能参数(如输入匹配、输出匹配、工作频率范围、输出功率、增益，等)的校准；
通过校准控制单元调控包括可编程增益放大器、滤波器的模拟基带电路模块的校准调节单元，实现对模拟基带电路模块性能参数(如带宽、增益、稳定度，等)的校准；
步骤4-A3：通过校准控制单元调控变频收发机中的接收链路、发射链路对应的校准调节单元对变频收发机中的接收链路、发射链路进行校准，包括：
通过校准控制单元调控变频收发机中的接收链路的校准调节单元，实现对变频收发机中的接收链路性能参数(如输入匹配、输出匹配、工作频率范围、噪声系数、增益，等)的校准；
通过校准控制单元调控变频收发机中的发射链路的校准调节单元，实现对变频收发机中的发射链路性能参数(如输入匹配、输出匹配、工作频率范围、输出功率、增益，等)的校准；
经过以上步骤，校准控制单元通过调控校准调节单元，对变频收发机中各通道接收链路、发射链路的电路器件或电路模块的结构、几何尺度、工作参数以及输入输出节点的工作参数进行调控，实现对变频收发机的实时校准及性能优化。
实施例5：作为本发明的另一种优选方案，在射频域对移相式收发机(或称为相控式收发机，简称相控收发机)或电路模块通过校准单元进行调控和校准的电路器件、电路模块包括：
相控收发机的接收链路，在天线接收到信号之后，通过校准单元 进行调控和校准的电路器件按照连接顺序依次包括但不限于低噪声放大器、接收机移相器、接收机衰减器、功率合成器；
相控收发机的发射链路，通过功率分配器把输入信号进行功分之后，在天线发射信号之前，通过校准单元进行调控和校准的电路器件按照连接顺序依次包括但不限于发射机衰减器、发射机移相器、功率放大器或驱动放大器；
其中，移相器的校准调节单元包括偏置调节子单元、相位调节子单元；
衰减器的校准调节单元包括偏置调节子单元、幅度调节子单元；
功率合成器、功率分配器的校准调节单元包括传输线调节子单元；
所述相控收发机包含一个或多个通道。其余结构和优点与实施例1完全相同。
通过校准单元对每个通道中电路单元的校准调节单元进行调控，实现电路单元性能参数(如移相精度、衰减精度、增益、线性度、噪声系数、工作频率范围、输入匹配、输出匹配、***损耗、隔离度，等)的调节、校准和优化。
作为本发明的一种优选方案，实施例1中所述的射频域校准***的校准方法，步骤4中，对相控收发机进行调控和校准，包括：
步骤4-B1：通过校准控制单元调控电路器件对应的校准调节单元对电路器件进行校准，包括：
通过校准控制单元调控低噪声放大器的偏置调节子单元、幅度调节子单元、相位调节子单元，对低噪声放大器进行性能参数(如噪声系数、增益、线性度，等)的校准；
通过校准控制单元调控功率放大器或驱动放大器的偏置调节子 单元、幅度调节子单元、相位调节子单元，对功率放大器或驱动放大器进行性能参数(如增益、输出功率、效率、线性度，等)的校准；
通过校准控制单元调控移相器(包括接收机移相器、发射机移相器)的偏置调节子单元、相位调节子单元，实现对移相器性能参数(如移相精度、增益、线性度、噪声系数，等)的校准；
通过校准控制单元调控衰减器(包括接收机衰减器、发射机衰减器)的偏置调节子单元、幅度调节子单元，实现对衰减器性能参数(如衰减精度、增益、线性度、噪声系数，等)的校准；
通过校准控制单元调控功率合成器、功率分配器中传输线调节子单元的传输线结构及几何尺度，实现对功率合成器、功率分配器性能参数(如匹配、***损耗、隔离度，等)的校准；
步骤4-B2：通过校准控制单元调控电路模块对应的校准调节单元对电路模块进行校准，包括：
通过校准控制单元调控包括接收机移相器、接收机衰减器的幅相控制电路模块的输入匹配调节子单元、输出匹配调节子单元，实现对幅相控制电路模块性能参数(如输入匹配、输出匹配、工作频率范围、噪声系数、增益，等)的校准；
通过校准控制单元调控包括发射机移相器、发射机衰减器的幅相控制电路模块的输入匹配调节子单元、输出匹配调节子单元，实现对幅相控制电路模块性能参数(如输入匹配、输出匹配、工作频率范围、输出功率、增益，等)的校准；
步骤4-B3：通过校准控制单元调控相控收发机中接收链路、发射链路对应的校准调节单元对相控收发机中的接收链路、发射链路进行校准，包括：
通过校准控制单元调相控收发机中接收链路、发射链路的输入匹 配调节子单元、输出匹配调节子单元，实现对相控收发机中的接收链路性能参数(如输入匹配、输出匹配、工作频率范围、噪声系数、增益，等)、发射链路性能参数(如输入匹配、输出匹配、工作频率范围、输出功率、增益，等)的校准；
经过以上步骤，校准控制单元通过调控校准调节单元，对相控收发机中各通道接收链路、发射链路的电路器件或电路模块的结构、几何尺度、工作参数以及输入输出节点的工作参数进行调控，实现对相控收发机的实时校准及性能优化。
实施例6：作为本发明的另一种优选方案，所述校准***包括可重构收发机或电路模块、可重构调节电路、校准单元；
可重构调节电路和可重构电路器件或模块(如频率综合器、低噪声放大器、功率放大器、混频器、滤波器，等)连接；
其中，可重构调节电路包括开关或开关阵列网络，以及调谐网络、电阻网络、传输线网络、变压器网络的一种或多种组合；
所述可重构调节电路的调谐网络及电阻网络，其中电感、电容、电阻、传输线、变压器的元件参数采用分立值或连续可变值，实现载波频率范围、信道带宽等性能参数的分立可调或连续可调；所述可重构收发机包含一个或多个通道。其余结构和优点与实施例1完全相同。
通过校准控制单元调控校准调节单元，使可重构收发机或电路模块工作在预期状态(如模式、频段、信道带宽、协议，等)，并进行实时切换及性能优化。
作为本发明的一种优选方案，实施例1中所述的射频域校准***的校准方法，步骤4中，对可重构收发机或电路模块进行调控，包括：
步骤4-C1：校准控制单元调控校准调节单元，对可重构调节电路、 可重构电路器件的电路结构、几何尺度、工作参数，输入输出节点的工作参数，以及频率、带宽进行调控；
步骤4-C2：校准控制单元调控校准调节单元，对可重构调节电路、可重构电路模块的工作参数，输入输出节点的工作参数，以及频率、带宽进行调控；
步骤4-C3：校准控制单元调控校准调节单元，对可重构调节电路、可重构收发机的工作参数，输入输出节点的工作参数，以及频率、带宽进行调控；
经过以上步骤，通过校准控制单元调控校准调节单元，使可重构收发机或电路模块在预期的模式、频段、带宽、协议下工作，并实现实时切换及性能优化；
其中，电路单元的电路结构、几何尺度、工作参数通过开关或开关阵列网络进行选择；
不同频段、带宽之间进行实时切换、校准的响应时间主要由收发机锁相环锁定时间决定。
实施例7：作为本发明的一种改进，射频域校准***还包括反馈电路单元；
所述反馈电路单元包括校准观测接收机、信号检测单元和信号传输单元；
校准观测接收机，从接收到输入信号开始按照连接顺序依次包括但不限于低噪声放大器、下变频混频器、接收机频率综合器、接收机可编程增益放大器、接收机滤波器中的一个或多个电路器件，或者复用收发电路***的接收链路；
校准观测接收机用于接收从射频电路单元输出的信号；
信号检测单元用于将校准观测接收机接收到的信号进行分类、提 取、放大、量化，检测出有用信号；
信号传输单元用于将信号检测单元检测出的有用信号传输至校准控制单元；
其余结构和优点与实施例1完全相同。
作为本发明的一种改进，针对带有反馈电路单元的射频域校准***的校准方法，还包括如下步骤：
步骤5-R1：校准观测接收机对射频电路单元的一个或多个输入输出节点信号进行采样；
步骤5-R2：信号检测单元对校准观测接收机接收到的信号进行检测并量化；
步骤5-R3：校准控制单元根据检测、量化结果，调控校准调节单元对射频电路单元进行实时调控和校准；
其余步骤和优点与实施例1中的校准方法相同。
实施例8：作为本发明的一种改进，所述反馈电路单元用于收发电路***中发射链路的射频域预失真校准。其余结构和优点与实施例7完全相同。
作为本发明的一种改进，针对射频域预失真校准，包括以下步骤：
步骤5-S1：校准观测接收机对如下电路单元或节点进行采样，包括：
对发射链路中一个或多个电路器件的输入输出节点信号进行采样；
对发射链路中发射前端电路模块、模拟基带电路模块的输入输出节点信号进行采样；
对发射天线的输入节点信号进行采样；
步骤5-S2：信号检测单元对校准观测接收机接收到的信号进行 检测并量化；
步骤5-S3：校准控制单元根据检测、量化结果，调控校准调节单元对发射链路的电路器件或模块进行射频域预失真校准。
其余步骤和优点与实施例7中的校准方法相同。
实施例9：作为本发明的一种改进，射频域校准***还包括射频域和数字域的联合校准电路；
所述射频域和数字域的联合校准电路包括射频域的校准单元、电路单元，数字域校准的微处理器MCU，模拟-数字信号转换器ADC/数字-模拟信号转换器DAC，数字校准算法电路、数据接口电路、基带电路；
数字校准算法电路用于实现数字校准算法程序；
数字校准算法程序包括正交误差校正(或校准)算法、直流失调校正算法、IQ路失配校正算法、本振泄露校正算法、镜像抑制校正算法、数字预失真校正算法；
数字域校准的微处理器MCU运行数字校准控制程序，调控数字校准算法电路、数据接口电路和基带电路；
数据接口电路(如高速Serdes接口)用于数字校准算法电路、基带电路之间的信息交互；
基带电路用于处理数字基带信号。
作为本发明的一种改进，在射频域校准后，对收发电路***或电路模块进行射频域和数字域的联合校准，还包括以下步骤：
对于收发电路***的接收链路：
步骤5-T1：经过射频域校准后的信号通过模拟-数字信号转换器ADC转换为数字信号；
步骤5-T2：由数字域校准的微处理器MCU中数字校准控制程序 驱动数字校准算法电路的数字校准算法程序，对模拟-数字信号转换器ADC的输出信号进行校准；
对于收发电路***的发射链路：
步骤5-P1：由数字域校准的微处理器MCU中数字校准控制程序驱动数字校准算法电路的数字校准算法程序，对数字-模拟信号转换器DAC的输入数字信号进行校准；
步骤5-P2：数字域校准后的数字信号通过数字-模拟信号转换器DAC转换为模拟信号；
步骤6：接收链路、发射链路进行叠代校准。
其余步骤和优点与实施例1中的校准方法相同。
实施例10：
作为本发明的另一种优选方案，根据实际需要，还可以将实施例2—实施例9中的至少一个技术特征与另外一个或以上实施例进行组合，并形成新的实施方式。
结合附图具体介绍如下：
图1是本发明一种电路单元的射频域校准***框图，在射频域对变频收发机的电路器件、电路模块通过校准单元进行校准。
所述变频收发机包括接收链路、发射链路；
接收链路中，低噪声放大器LNA、接收机混频器Mixer、接收机频率综合器FS、接收机可编程增益放大器PGA、接收机滤波器Filter各自与对应的校准单元(包括校准调节单元、校准控制单元)相连，接收机频率综合器与接收机混频器相连；
发射链路中，功率放大器PA或驱动放大器DA、发射机混频器Mixer、发射机频率综合器FS、发射机可编程增益放大器PGA、发射机滤波器Filter各自与对应的校准单元(包括校准调节单元、校准 控制单元)相连，发射机频率综合器与发射机混频器相连。
图2是本发明一种电路单元的射频域校准***中校准控制单元的结构框图。
校准控制单元包括运算单元F01、总线F02、存储器F03以及逻辑控制单元F04；
其中，运算单元F01用于校准控制单元中的数据运算；
存储器F03用于存储校准的指令；
逻辑控制单元F04用于把指令从存储器中取出，译码后发出相应的控制信号；
总线F02用于连接运算单元、存储器以及逻辑控制单元，实现运算单元、存储器、逻辑控制单元之间的信息传递和交互；
存储器F03和逻辑控制单元F04之间可直接进行信息交互。
图3是本发明一种电路单元的射频域校准***的示例性实施例***框图。
将部分或所有电路单元的校准控制单元集成在射频域校准的微处理器(MCU)E01，提高校准***的自动化程度及可编程性、可拓展性。
图4是本发明一种电路单元的射频域校准***框图，在射频域对变频收发机接收链路的电路器件、电路模块通过校准单元进行校准，使其工作在预期状态并实现性能优化。
在天线接收到信号以后，在模拟-数字信号转换器(ADC)之前，通过校准单元进行校准的电路器件按照连接顺序依次包括低噪声放大器LNA、接收机混频器Mixer、接收机频率综合器FS、接收机可编程增益放大器PGA、接收机滤波器Filter，其中接收机频率综合器与接收机混频器相连，为接收链路提供本振信号；
低噪声放大器的校准调节单元B01包含偏置调节子单元B011以及幅度调节子单元B012、相位调节子单元B013(图中B012、B013省略)，通过低噪声放大器的校准控制单元A01调控所述偏置调节子单元B011、幅度调节子单元B012、相位调节子单元B013，实现对低噪声放大器性能参数(如噪声系数、增益、线性度，等)的校准和优化；
接收机混频器的校准调节单元B02包括偏置调节子单元B021、幅度调节子单元B022、相位调节子单元B023，通过校准控制单元A02调控所述偏置调节子单元B021、幅度调节子单元B022、相位调节子单元B023，实现对接收机混频器性能参数(如噪声系数、增益、线性度，等)的校准和优化；
接收机可编程增益放大器的校准调节单元B03包括直流失调消除子单元B031、幅度调节子单元B032和相位调节子单元B033，通过校准控制单元A03调控所述直流失调消除子单元B031，实现对接收机可编程增益放大器直流失调的校准；通过校准控制单元A03调控所述幅度调节子单元B032和相位调节子单元B033，实现对接收机可编程增益放大器其他性能参数(如增益、平坦度、总谐波失真、IQ两路失配，等)的校准和优化；
接收机滤波器的校准调节单元B04包括直流失调消除子单元B041、幅度调节子单元B042和相位调节子单元B043，通过校准控制单元A04调控所述直流失调消除子单元B041，实现对接收机滤波器C04直流失调的校准；通过校准控制单元A04调控所述幅度调节子单元B042和相位调节子单元B043，实现对接收机滤波器其他性能参数(如带宽、增益、平坦度、总谐波失真、滚降速度、IQ两路失配，等)的校准和优化；通过调控所述接收机滤波器的带宽实现对接收机信道带宽的调节和校准；
接收机频率综合器的校准调节单元B05包括幅度调节子单元B052、相位调节子单元B051，通过校准控制单元A05调控所述幅度调节子单元B052和相位调节子单元B051，实现对接收机频率综合器性能参数(如频率、幅度、相位噪声、抖动、正交失配，等)的校准和优化。
图5是本发明一种电路单元的射频域校准***框图，在射频域对变频收发机发射链路的电路器件、电路模块通过校准单元进行校准，使其工作在预期状态并实现性能优化。
在基带发出的数字信号经过数字-模拟信号转换器(DAC)之后，在天线发射信号之前，通过校准单元进行校准的电路器件按照连接顺序依次包括功率放大器PA或驱动放大器、发射机混频器Mixer、发射机频率综合器FS、发射机可编程增益放大器PGA、发射机滤波器Filter，其中发射机频率综合器与发射机混频器相连，为发射链路提供本振信号；
功率放大器或驱动放大器的校准调节单元B06包含偏置调节子单元B061以及幅度调节子单元B062、相位调节子单元B063(图中B062、B063省略)，通过功率放大器或驱动放大器的校准控制单元A06调控所述偏置调节子单元B061、幅度调节子单元B062、相位调节子单元B063，实现对功率放大器或驱动放大器性能参数(如增益、输出功率、效率、线性度，等)的校准和优化；
发射机混频器的校准调节单元B07包括偏置调节子单元B071、幅度调节子单元B072、相位调节子单元B073，通过校准控制单元A07调控所述偏置调节子单元B071、幅度调节子单元B072、相位调节子单元B073，实现对发射机混频器性能参数(如噪声系数、增益、线性度，等)的校准和优化；
发射机可编程增益放大器的校准调节单元B08包括直流失调消除子单元B081、幅度调节子单元B082和相位调节子单元B083，通过校准控制单元A08调控所述直流失调消除子单元B081，实现对发射机可编程增益放大器D03的直流失调校准；通过校准控制单元A08调控所述幅度调节子单元B082和相位调节子单元B083，实现对可编程增益放大器其他性能参数(如增益、平坦度、总谐波失真、IQ两路失配，等)的校准和优化；
发射机滤波器的校准调节单元B09包括直流失调消除子单元B091、幅度调节子单元B092和相位调节子单元B093，通过校准控制单元A09调控所述直流失调消除子单元B091，实现对发射机滤波器D04直流失调的校准；通过校准控制单元A09调控所述幅度调节子单元B092和相位调节子单元B093，实现对发射机滤波器其他性能参数(如带宽、增益、平坦度、总谐波失真、滚降速度、IQ两路失配，等)的校准和优化；通过调控所述发射机滤波器的带宽实现对发射机信道带宽的调节和校准；
发射机频率综合器的校准调节单元B10包括幅度调节子单元B102、相位调节子单元B101，通过校准控制单元A10调控所述幅度调节子单元B102和相位调节子单元B101，实现对发射机频率综合器性能参数(如本振信号的频率、幅度、相位噪声、抖动、正交失配，等)的校准和优化；
接收机频率综合器和发射机频率综合器对于时分双工(TDD)、全双工(FD)等类型的收发机可共用。
图6是本发明一种电路单元的射频域校准***框图，在射频域对相控收发机接收链路、发射链路的电路器件、电路模块通过校准单元进行调控和校准，使其工作在预期状态并实现性能优化。
相控收发机每个通道的接收链路，从天线接收到信号以后，通过校准单元进行校准的电路器件按照连接顺序依次包括低噪声放大器LNA、接收机移相器PS、接收机衰减器ATT、功率合成器；
相控收发机每个通道的发射链路，在天线发射信号之前，通过校准单元进行校准的电路器件按照连接顺序依次包括功率放大器PA或驱动放大器、发射机移相器PS、发射机衰减器ATT、功率分配器；
低噪声放大器的校准调节单元B11包含偏置调节子单元B111以及幅度调节子单元B112、相位调节子单元B113(图中B112、B113省略)，通过校准控制单元A11调控所述偏置调节子单元B111、幅度调节子单元B112、相位调节子单元B113，实现对低噪声放大器性能参数(如噪声系数、增益、线性度，等)的校准和优化；
接收机移相器的校准调节单元B12包括偏置调节子单元B121、相位调节子单元B122，通过校准控制单元A12调控所述偏置调节子单元B121、相位调节子单元B122，实现对接收机移相器性能参数(如移相精度、增益、线性度、噪声系数，等)的校准和优化；
接收机衰减器的校准调节单元B13包括偏置调节子单元B131、幅度调节子单元B132，通过校准控制单元A13调控所述偏置调节子单元B131、幅度调节子单元B132，实现对接收机衰减器性能参数(如衰减精度、增益、线性度、噪声系数，等)的校准和优化；
功率放大器或驱动放大器的校准调节单元B14包含偏置调节子单元B141以及幅度调节子单元B142、相位调节子单元B143(图中B142、B143省略)，通过校准控制单元A14控制所述偏置调节子单元B141、幅度调节子单元B142、相位调节子单元B143，实现对功率放大器或驱动放大器性能参数(如增益、输出功率、效率、线性度，等)的校准和优化；
发射机移相器的校准调节单元B15包括偏置调节子单元B151、相位调节子单元B152，通过校准控制单元A15调控所述偏置调节子单元B151、相位调节子单元B152，实现对发射机移相器性能参数(如移相精度、增益、线性度、噪声系数，等)的校准和优化；
发射机衰减器的校准调节单元B16包括偏置调节子单元B161、幅度调节子单元B162，通过校准控制单元A16调控所述偏置调节子单元B161、幅度调节子单元B162，实现对发射机衰减器性能参数(如衰减精度、增益、线性度、噪声系数，等)的校准和优化；
功率合成器、功率分配器的校准调节单元包括传输线调节子单元，通过校准控制单元调控所述传输线调节子单元的结构及几何尺度，实现对功率合成器、功率分配器性能参数(如匹配、***损耗、端口隔离度，等)的校准和优化。
图7是本发明一种电路单元的射频域校准***中可重构收发机、可重构调节电路、校准单元的结构框图，通过校准单元在射频域对可重构调节电路、可重构收发机的电路器件、电路模块进行调控和校准，使其工作在预期状态并实现性能优化。
所述可重构收发机包括可重构接收机C10、可重构发射机D10，以及接收机校准单元J17、接收机可重构调节电路K17，发射机校准单元J18、发射机可重构调节电路K18；
接收机可重构调节电路K17包括接收机调谐网络K171、接收机开关阵列网络K172；
发射机可重构调节电路K18包括发射机调谐网络K181、发射机开关阵列网络K182；
接收机校准单元J17对接收机可重构调节电路K17、可重构接收机C10进行调控和校准；
发射机校准单元J18对发射机可重构调节电路K18、可重构发射机D10进行调控和校准。
图8是本发明一种电路单元的射频域校准***结构框图。
校准单元J01包括校准控制单元X01和校准调节单元Y01；
通过校准控制单元X01调控校准调节单元Y01，对电路单元Z01进行射频域校准；
所述校准***还包括反馈电路单元J02；
反馈电路单元J02包括校准观测接收机R01、信号检测单元S01及信号传输单元；
校准观测接收机R01首先对电路单元的一个或多个输入输出节点信号进行采样，然后由信号检测单元S01对校准观测接收机接收到的信号进行检测并量化，信号传输单元将信号检测单元检测出的有用信号传输至校准控制单元；再由校准控制单元X01根据检测、量化结果，调控校准调节单元Y01对电路单元进行射频域校准及性能优化。
图9是本发明一种电路单元的射频域校准***中发射链路射频域预失真校准的示例性实施例***框图。
所述射频域预失真校准电路包括校准观测接收机R06、信号检测单元E06、校准控制单元以及校准调节单元；
校准观测接收机R06按照连接顺序依次包括低噪声放大器、接收机混频器、接收机频率综合器、接收机可编程增益放大器、接收机滤波器中的一个或多个电路器件，或者复用收发机的接收链路；
校准观测接收机R06对发射链路电路器件的一个或多个输入输出节点信号进行采样，然后由信号检测单元E06对校准观测接收机R06接收到的信号进行检测并量化，再由校准控制单元根据检测、量化的结果，调控所述校准调节单元对发射链路或电路模块进行射频域 预失真校准。
图10是本发明一种射频域与数字域联合校准的示例性实施例***框图，对射频收发电路***(收发机)或电路模块进行射频域与数字域的联合校准。
对于收发机的接收链路，首先在射频域对接收链路进行校准，经过射频域校准后的信号通过模拟-数字信号转换器ADC转换为数字信号，再由数字域校准的微处理器(MCU)E05中数字校准控制程序驱动数字校准算法电路(E02)的数字校准算法程序，对模拟-数字信号转换器ADC的输出信号进行校准；
对于收发机的发射链路，首先在射频域对发射链路进行校准，然后由数字域校准的微处理器E05中数字校准控制程序驱动数字校准算法电路E02的数字校准算法程序，对数字-模拟信号转换器DAC的输入数字信号进行校准；数字域校准后的数字信号通过数字-模拟信号转换器DAC转换为模拟信号；
数字域校准的微处理器E05运行数字校准控制程序，调控数字校准算法电路E02、数据接口电路E03和基带电路E04；
数字校准算法电路E02用于实现所述数字校准算法程序；
数据接口电路E03用于数字校准算法电路E02和基带电路E04之间的信息交互；
基带电路E04用于处理数字基带信号。
以上实施例仅为说明本发明的技术思想，不能以此限定本发明的保护范围，凡是按照本发明提出的技术思想，在技术方案基础上所做的任何等价替换、组合或修改，而不脱离本发明技术方案的精神和范围，均应涵盖在本发明的权利要求和保护范围之内。

Claims (16)

  1. 一种射频电路单元的射频域校准***，其特征在于：包括校准单元和射频电路单元；
    所述校准单元包括校准控制单元和校准调节单元；
    校准控制单元包括存储器、运算单元、逻辑控制单元以及总线；
    其中，存储器用于存储校准的指令；
    运算单元用于校准控制单元中的数据运算；
    逻辑控制单元，用于把指令从存储器中取出，译码后发出相应的控制信号；
    总线，用于连接运算单元、存储器以及逻辑控制单元，实现运算单元、存储器、逻辑控制单元之间的信息传递和交互；
    所述校准控制单元，生成校准控制信号，驱动和调控所述校准调节单元；
    将射频电路单元的校准控制单元集成在一起；
    校准调节单元包括开关或开关阵列网络，以及调谐网络、电阻网络、传输线网络、变压器网络的一种或多种组合；
    校准调节单元的电感、电容、电阻、传输线、变压器的元件参数采用分立值或连续可变值；
    所述校准调节单元，通过开关或开关阵列网络，调控射频电路单元的结构、几何尺度、工作参数以及输入输出节点的工作参数；
    校准控制单元通过硅基半导体工艺实现，射频电路单元、校准调节单元通过硅基半导体工艺或化合物半导体工艺实现；相同工艺的电路通过单片集成，不同工艺的电路通过***级封装集成。
  2. 根据权利要求1所述的一种射频电路单元的射频域校准***，其特征在于：还包括射频域校准的微处理器；
    将射频电路单元的校准控制单元集成在射频域校准的微处理器中。
  3. 根据权利要求1所述的一种射频电路单元的射频域校准***，其特征在于：通过校准单元进行调控和校准的射频收发电路***或电路模块由单通道或多通道组成，具有变频结构或相控结构或二者组合结构，工作在通信、雷达、导航、跟踪、成像、测量、电子对抗模式中的一种或多种组合，工作频率覆盖射频频段，或微波、毫米波频段，或太赫兹频段，或以上不同频段的组合。
  4. 根据权利要求3所述的一种射频电路单元的射频域校准***，其特征在于：对变频收发机或电路模块在射频域通过校准单元进行调控和校准的电路器件、电路模块包括：
    变频收发机的接收链路，在天线接收到信号以后，电路器件按照连接顺序依次包括低噪声放大器、下变频混频器、接收机频率综合器、接收机可编程增益放大器、接收机滤波器；其中，接收机频率综合器与下变频混频器相连，为接收链路提供本振信号；
    变频收发机的发射链路，在天线发射信号之前，电路器件按照连接顺序依次包括发射机滤波器、发射机可编程增益放大器、发射机频率综合器、上变频混频器、功率放大器或驱动放大器；其中，发射机频率综合器与上变频混频器相连，为发射链路提供本振信号；
    其中，低噪声放大器、混频器、功率放大器或驱动放大器的校准调节单元各自包括偏置调节子单元、幅度调节子单元、相位调节子单元；
    可编程增益放大器、滤波器、运算放大器的校准调节单元各自包括偏置调节子单元、幅度调节子单元、相位调节子单元、直流失调消除子单元；
    频率综合器的校准调节单元包括幅度调节子单元、相位调节子单元。
  5. 根据权利要求3所述的一种射频电路单元的射频域校准***，其特征在于：对相控收发机或电路模块在射频域通过校准单元进行调控和校准的电路器件、电路模块包括：
    相控收发机的接收链路，在天线接收到信号之后，通过校准单元进行调控和校准的电路器件按照连接顺序依次包括低噪声放大器、接收机移相器、接收机衰减器、功率合成器；
    相控收发机的发射链路，通过功率分配器把输入信号进行功分之后，在天线发射信号之前，通过校准单元进行调控和校准的电路器件按照连接顺序依次包括发射机衰减器、发射机移相器、功率放大器或驱动放大器；
    其中，移相器的校准调节单元包括偏置调节子单元、相位调节子单元；
    衰减器的校准调节单元包括偏置调节子单元、幅度调节子单元；功率合成器、功率分配器的校准调节单元包括传输线调节子单元。
  6. 根据权利要求3所述的一种射频电路单元的射频域校准***，其特征在于：所述校准***包括可重构收发机或电路模块、可重构调节电路、校准单元；
    其中，可重构调节电路包括开关或开关阵列网络，以及调谐网络、电阻网络、传输线网络、变压器网络的一种或多种组合；
    所述可重构调节电路的调谐网络及电阻网络，其中电感、电容、电阻、传输线、变压器的元件参数采用分立值或连续可变值；
    可重构调节电路和可重构收发机中的可重构电路器件或模块连 接。
  7. 根据权利要求1所述的一种射频电路单元的射频域校准***，其特征在于：还包括反馈电路单元；
    所述反馈电路单元包括校准观测接收机、信号检测单元和信号传输单元；
    校准观测接收机，从接收到输入信号开始按照连接顺序依次包括低噪声放大器、下变频混频器、接收机频率综合器、接收机可编程增益放大器、接收机滤波器中的一个或多个电路器件，或者复用收发电路***的接收链路；
    校准观测接收机用于接收从射频电路单元输出的信号；
    信号检测单元用于将校准观测接收机接收到的信号进行分类、提取、放大、量化，并检测出有用信号；
    信号传输单元用于将信号检测单元检测出的有用信号传输至校准控制单元。
  8. 根据权利要求7所述的一种射频电路单元的射频域校准***，其特征在于：所述反馈电路单元用于收发电路***中发射链路的射频域预失真校准。
  9. 根据权利要求1所述的一种射频电路单元的射频域校准***，其特征在于：所述射频域校准***还包括射频域和数字域的联合校准电路；
    射频域和数字域的联合校准电路包括射频域的校准单元、电路单元，数字域校准的微处理器MCU，模拟-数字信号转换器ADC/数字-模拟信号转换器DAC，数字校准算法电路、数据接口电路、基带电路；
    数字校准算法电路用于实现数字校准算法程序；
    数字校准算法程序包括正交误差校正算法、直流失调校正算法、IQ路失配校正算法、本振泄露校正算法、镜像抑制校正算法、数字预失真校正算法；
    数字域校准的微处理器MCU运行数字校准控制程序，调控数字校准算法电路、数据接口电路和基带电路；
    数据接口电路用于数字校准算法电路、基带电路之间的信息交互；
    基带电路用于处理数字基带信号。
  10. 一种用于权利要求1-9任意一项所述的射频电路单元的射频域校准***的校准方法，其特征在于：包括如下步骤，
    步骤1：外部输入或内部产生校准指令；
    步骤2：校准控制单元中的存储器接收并存储校准指令；
    步骤3-1：校准控制单元中的逻辑控制单元把校准指令从存储器中取出；
    步骤3-2：校准控制单元中的运算单元根据校准指令进行数据运算；
    步骤3-3：运算单元经过运算后产生的数据，通过总线传递到逻辑控制单元进行译码；
    步骤3-4：逻辑控制单元输出校准控制信号，驱动和调控所述校准调节单元；
    步骤4：校准调节单元通过开关或开关阵列网络，调控射频电路单元的结构、几何尺度、工作参数以及输入输出节点的工作参数；
    校准控制单元通过校准调节单元对射频电路单元进行调控，使其工作在预期状态，实现对射频电路单元的可编程、可配置、自适应、 实时校准及性能优化。
  11. 根据权利要求10所述的射频电路单元的射频域校准***的校准方法，其特征在于：步骤4中，对变频收发机进行调控和校准，包括：
    步骤4-A1：通过校准控制单元调控电路器件对应的校准调节单元对电路器件进行校准，包括：
    通过校准控制单元调控低噪声放大器、混频器的偏置调节子单元、幅度调节子单元、相位调节子单元，对低噪声放大器、混频器进行性能参数的校准；
    通过校准控制单元调控功率放大器或驱动放大器的偏置调节子单元、幅度调节子单元、相位调节子单元，对功率放大器或驱动放大器进行性能参数的校准；
    通过校准控制单元调控可编程增益放大器、滤波器、运算放大器的直流失调消除子单元，对可编程增益放大器、滤波器、运算放大器进行直流失调校准；通过校准控制单元调控可编程增益放大器、滤波器、运算放大器的偏置调节子单元、幅度调节子单元、相位调节子单元，对可编程增益放大器、滤波器、运算放大器进行性能参数的校准；
    通过校准控制单元调控射频滤波器的中心频率，对收发机中心频率进行调节和校准；通过校准控制单元调控中频滤波器的带宽，对收发机信道带宽进行调节和校准；
    通过校准控制单元调控频率综合器的幅度调节子单元和相位调节子单元，对频率综合器进行性能参数的校准；
    步骤4-A2：通过校准控制单元调控电路模块对应的校准调节单元对电路模块进行校准，包括：
    通过校准控制单元调控包括低噪声放大器、下变频混频器的接收机射频前端电路模块的射频输入匹配调节子单元、本振输入匹配调节 子单元、中频输出阻抗调节子单元，对接收机射频前端电路模块进行性能参数的校准；
    通过校准控制单元调控包括功率放大器、上变频混频器的发射机射频前端电路模块的射频输出匹配调节子单元、本振输入匹配调节子单元、中频输入阻抗调节子单元，对发射机射频前端电路模块进行性能参数的校准；
    通过校准控制单元调控包括可编程增益放大器、滤波器的模拟基带电路模块的输入阻抗调节子单元、输出阻抗调节子单元，对模拟基带电路模块进行性能参数的校准；
    步骤4-A3：通过校准控制单元调控变频收发机中的接收链路、发射链路对应的校准调节单元对变频收发机中的接收链路、发射链路进行校准，包括：
    通过校准控制单元调控变频收发机中的接收链路的输入匹配调节子单元、本振输入匹配调节子单元、中频输出阻抗调节子单元，对变频收发机中的接收链路进行性能参数的校准；
    通过校准控制单元调控变频收发机中的发射链路的输出匹配调节子单元、本振输入匹配调节子单元、中频输入阻抗调节子单元，对变频收发机中的发射链路进行性能参数的校准；
    校准控制单元通过调控校准调节单元，对变频收发机中各通道接收链路、发射链路的电路器件或电路模块的结构、几何尺度、工作参数以及输入输出节点的工作参数进行调控，实现对变频收发机的实时校准及性能优化。
  12. 根据权利要求10所述的射频电路单元的射频域校准***的校准方法，其特征在于：步骤4中，对相控收发机进行调控和校准，包括：
    步骤4-B1：通过校准控制单元调控电路器件对应的校准调节单元 对电路器件进行校准，包括：
    通过校准控制单元调控低噪声放大器的偏置调节子单元、幅度调节子单元、相位调节子单元，对低噪声放大器进行性能参数的校准；
    通过校准控制单元调控功率放大器或驱动放大器的偏置调节子单元、幅度调节子单元、相位调节子单元，对功率放大器或驱动放大器进行性能参数的校准；
    通过校准控制单元调控移相器的偏置调节子单元、相位调节子单元，对移相器进行性能参数的校准；
    通过校准控制单元调控衰减器的偏置调节子单元、幅度调节子单元，对衰减器进行性能参数的校准；
    通过校准控制单元调控功率合成器、功率分配器中传输线调节子单元的传输线结构及几何尺度，对功率合成器、功率分配器进行性能参数的校准；
    步骤4-B2：通过校准控制单元调控电路模块对应的校准调节单元对电路模块进行校准，包括：
    通过校准控制单元调控包括接收机移相器、接收机衰减器的幅相控制电路模块的输入匹配调节子单元、输出匹配调节子单元，对接收机幅相控制电路模块进行性能参数的校准；
    通过校准控制单元调控包括发射机移相器、发射机衰减器的幅相控制电路模块的输入匹配调节子单元、输出匹配调节子单元，对发射机幅相控制电路模块进行性能参数的校准；
    步骤4-B3：通过校准控制单元调控相控收发机中接收链路、发射链路对应的校准调节单元对相控收发机中的接收链路、发射链路进行校准，包括：
    通过校准控制单元调相控收发机中接收链路、发射链路的输入匹 配调节子单元、输出匹配调节子单元，对相控收发机中的接收链路、发射链路进行性能参数的校准；
    校准控制单元通过调控校准调节单元，对相控收发机中各通道接收链路、发射链路的电路器件或电路模块的结构、几何尺度、工作参数以及输入输出节点的工作参数进行调控，实现对相控收发机的实时校准及性能优化。
  13. 根据权利要求10所述的射频电路单元的射频域校准***的校准方法，其特征在于：步骤4中，对可重构收发机或电路模块进行调控，包括：
    步骤4-C1：校准控制单元调控校准调节单元，对可重构调节电路、可重构电路器件的电路结构、几何尺度、工作参数，输入输出节点的工作参数，以及频率、带宽进行调控；
    步骤4-C2：校准控制单元调控校准调节单元，对可重构调节电路、可重构电路模块的工作参数，输入输出节点的工作参数，以及频率、带宽进行调控；
    步骤4-C3：校准控制单元调控校准调节单元，对可重构调节电路、可重构收发机的工作参数，输入输出节点的工作参数，以及频率、带宽进行调控；
    通过校准控制单元调控校准调节单元，使可重构收发机或电路模块在预期的模式、频段、带宽、协议下工作，并实现实时切换及性能优化。
  14. 根据权利要求10所述的射频电路单元的射频域校准***的校准方法，其特征在于：针对带有反馈电路单元的射频域校准***，还包 括如下步骤，
    步骤5-R1：校准观测接收机对射频电路单元的一个或多个输入输出节点信号进行采样；
    步骤5-R2：信号检测单元对校准观测接收机接收到的信号进行检测并量化；
    步骤5-R3：校准控制单元根据检测、量化结果，调控校准调节单元对射频电路单元进行实时调控和校准。
  15. 根据权利要求14所述的射频电路单元的射频域校准***的校准方法，其特征在于：针对射频域预失真校准，包括以下步骤：
    步骤5-S1：校准观测接收机对如下电路单元或节点进行采样，包括：
    对发射链路中一个或多个电路器件的输入输出节点信号进行采样；
    对发射链路中发射前端电路模块、模拟基带电路模块的输入输出节点信号进行采样；
    对发射天线的输入节点信号进行采样；
    步骤5-S2：信号检测单元对校准观测接收机接收到的信号进行检测并量化；
    步骤5-S3：校准控制单元根据检测、量化结果，调控校准调节单元对发射链路的电路器件或模块进行射频域预失真校准。
  16. 根据权利要求15所述的射频电路单元的射频域校准***的校准方法，其特征在于：在射频域校准后，对收发电路***或电路模块进行射频域和数字域的联合校准，还包括以下步骤：
    对于收发电路***的接收链路：
    步骤5-T1：经过射频域校准后的信号通过模拟-数字信号转换器ADC转换为数字信号；
    步骤5-T2：由数字域校准的微处理器MCU中数字校准控制程序驱动数字校准算法电路的数字校准算法程序，对模拟-数字信号转换器ADC的输出信号进行校准；
    对于收发电路***的发射链路：
    步骤5-P1：由数字域校准的微处理器MCU中数字校准控制程序驱动数字校准算法电路的数字校准算法程序，对数字-模拟信号转换器DAC的输入数字信号进行校准；
    步骤5-P2：数字域校准后的数字信号通过数字-模拟信号转换器DAC转换为模拟信号；
    步骤6：接收链路、发射链路进行叠代校准。
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