WO2023030451A1 - 显示芯片及电子设备 - Google Patents

显示芯片及电子设备 Download PDF

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Publication number
WO2023030451A1
WO2023030451A1 PCT/CN2022/116521 CN2022116521W WO2023030451A1 WO 2023030451 A1 WO2023030451 A1 WO 2023030451A1 CN 2022116521 W CN2022116521 W CN 2022116521W WO 2023030451 A1 WO2023030451 A1 WO 2023030451A1
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Prior art keywords
signal
unit
image processing
state
display chip
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PCT/CN2022/116521
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English (en)
French (fr)
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文亮
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维沃移动通信有限公司
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Publication of WO2023030451A1 publication Critical patent/WO2023030451A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters

Definitions

  • the present application relates to the technical field of electronic products, in particular to a display chip and electronic equipment.
  • electronic devices such as mobile phones are equipped with display chips, which can perform image processing on input image signals (that is, electrical signals), and output them to screen driver chips for image display on the screen.
  • display chips can be divided into an integrated display chip and an independent display chip.
  • the use of an independent display chip can improve the fluency of the display and enhance the display color.
  • Switches and other devices can be installed in the circuit of the display chip, and the display chip can be in different working states (that is, perform different image processing on electrical signals) by switching the on/off state of the switch.
  • the electrical signal may be attenuated, which will reduce the intensity of the electrical signal output by the display chip, and may even cause the screen to The driver chip cannot be recognized and affects the image display effect.
  • Embodiments of the present application provide a display chip and electronic equipment to solve the problem that the current display chip has low output electrical signal strength, which may cause the screen driver chip to fail to recognize and affect the image display effect.
  • the embodiment of the present application provides a display chip, including:
  • a direct unit the direct unit is connected between the signal input terminal and the signal output terminal of the display chip, and the direct unit has an on state and an off state; wherein, when the direct unit is in the on state, use for transmitting the electrical signal at the signal input terminal to the signal output terminal;
  • An image processing unit the image processing unit is connected between the signal input end and the signal output end, and the image processing unit has an on state and an off state; wherein, the image processing unit is in an on state , for transmitting the electrical signal at the signal input terminal to the signal output terminal after image processing;
  • a signal enhancement unit the signal enhancement unit is disposed on the electrical signal transmission path of the through unit, and/or, the signal enhancement unit is disposed on the electrical signal transmission path of the image processing unit.
  • the embodiment of the present application further provides an electronic device, including the display chip as described in the first aspect.
  • the processing process by setting the signal enhancement unit in the electrical signal transmission path of the through unit in the display chip and/or in the electrical signal transmission path of the image processing unit, the electrical signal to be processed, the processing process
  • the electrical signal in or the electrical signal strength to be output plays a reinforcing role, so as to avoid the attenuation of the electrical signal due to the possible parasitic capacitance/parasitic resistance/parasitic inductance of the switch and other devices in the display chip, so that the display chip output
  • the strength of the electrical signal decreases, which may even cause the problem that the screen driver chip cannot be recognized and affect the image display effect.
  • Fig. 1 shows one of the schematic diagrams of the display chip of the embodiment of the present application
  • FIG. 2 shows the second schematic diagram of the display chip of the embodiment of the present application
  • FIG. 3 shows the third schematic diagram of the display chip of the embodiment of the present application
  • Fig. 4 represents the circuit diagram of the inverter of the embodiment of the present application.
  • FIG. 5 shows a schematic diagram of electrical signal waveforms of different nodes in a display chip according to an embodiment of the present application
  • Fig. 6 shows the circuit diagram of the second inverter of the embodiment of the present application
  • FIG. 7 shows a fourth schematic diagram of a display chip according to an embodiment of the present application.
  • the embodiment of the present application provides a display chip 10 , including: a pass-through unit 11 , an image processing unit 12 and a signal enhancement unit 13 .
  • the direct-through unit 11 is connected between the signal input end and the signal output end of the display chip 10, and the direct-through unit 11 has an on state and an off state; wherein, the direct-through unit 11 is in the on-state , for transmitting the electrical signal at the signal input end to the signal output end.
  • the image processing unit 12 is connected between the signal input terminal and the signal output terminal, and the image processing unit 12 has an on state and an off state; wherein, when the image processing unit 12 is in the on state , for transmitting the electrical signal at the signal input terminal to the signal output terminal after image processing.
  • the signal enhancement unit 13 is disposed on the electrical signal transmission path of the direct-through unit 11 , and/or, the signal enhancement unit 13 is disposed on the electrical signal transmission path of the image processing unit 12 .
  • the display chip can obtain the image content (that is, the electrical signal of the image) of the main control chip 20, such as an application processor (Application Processor, AP).
  • the image content can be transmitted to the screen 30 (or called the display screen) for display through the pass-through unit 11 (or called the bypass channel), for example, the mobile industry processor interface (Mobile Industry Processor Interface, MIPI) protocol can be used for transmission.
  • the image content may also be processed by the frame complementing circuit and the color processing circuit of the image processing unit 12, and then transmitted to the screen 30 (or called a display screen) for display.
  • the electrical signal transmission path that the signal enhancement unit 13 is arranged on the direct unit 11 may include but not limited to: the input terminal of the signal enhancement unit 13 is connected to the signal input terminal, the signal enhancement unit 13 The output ends are respectively connected to the input ends of the direct unit 11 and the input end of the image processing unit 12; or, the input ends of the signal enhancement unit 13 are respectively connected to the output ends of the direct unit 11, the image processing unit The output end of unit 12 is connected, and the output end of described signal enhancement unit 13 is connected with described signal output end; Or, the input end of described signal enhancement unit 13 is connected with described signal input end, the input end of image processing unit 12 respectively connected, the output end of the signal enhancement unit 13 is connected to the input end of the direct unit 11; or, the input end of the signal enhancement unit 13 is connected to the output end of the direct unit 11, and the signal enhancement unit 13 The output terminal is connected to the signal output terminal, the output terminal of the image processing unit 12 and so on.
  • the electrical signal transmission path that the signal enhancement unit 13 is arranged on the image processing unit 12 may include but not limited to: the input terminal of the signal enhancement unit 13 is connected to the signal input terminal, and the signal enhancement unit 13
  • the output terminals of the said direct unit 11 and the input terminals of the image processing unit 12 are respectively connected;
  • the output end of processing unit 12 is connected, and the output end of described signal enhancement unit 13 is connected with described signal output end;
  • the input end of described signal enhancement unit 13 is connected with described signal input end, the input end of pass-through unit 11 respectively connected, the output of the signal enhancement unit 13 is connected to the input of the image processing unit 12; or, the input of the signal enhancement unit 13 is connected to the output of the image processing unit 12, the signal enhancement
  • the output end of the unit 13 is respectively connected to the output end of the direct-through unit 11 and the signal output end; or the signal enhancement unit 13 can also be arranged in other positions in the image processing unit 12, etc., the embodiment of the present application does not take this as a limit.
  • the signal enhancement unit 13 in the electrical signal transmission path of the direct unit 11 in the display chip 10 and/or the electrical signal transmission path of the image processing unit 12, the electrical signal to be processed, the processing process
  • the electrical signal or the electrical signal strength to be output plays a reinforcing role, thereby avoiding the attenuation of the electrical signal due to the possible parasitic capacitance/parasitic resistance/parasitic inductance of the switches and other devices in the display chip 10, so that the display chip outputs
  • the strength of the electrical signal decreases, which may even cause the problem that the screen driver chip cannot be recognized and affect the image display effect.
  • the pass-through unit 11 includes: a first switch 111; the first switch 111 is connected between the signal input end and the signal output end.
  • the through unit 11 when the first switch 111 is in the on state, the through unit 11 is in the on state; when the first switch 111 is in the off state, the through unit 11 is in the off state.
  • the signal input terminal of the display chip 10 is connected to the signal output terminal through the first switch 111, that is, the first switch 111 connected between the signal input terminal and the signal output terminal is formed as a through connection of the display chip 10. path.
  • the image processing unit 12 can be turned off, and the through unit 11 can be turned on, so that the slave signal can be passed through the through path.
  • the electrical signal input from the input terminal is transmitted to the screen 30 through the signal output terminal for display after being processed by the signal enhancement unit 13 .
  • the image processing unit 12 includes: a second switch 121, a first image processing circuit 122, and a third switch 123; the second switch 121, the first image processing circuit 122, and the third switch 123 are sequentially connected in series between the signal input end and the signal output end.
  • the image processing unit 12 when the second switch 121 and the third switch 123 are both in the on state, the image processing unit 12 is in the on state; the second switch 121 and the third switch 123 are in the off state In the state, the image processing unit 12 is in the disconnected state.
  • the signal input terminal of the display chip 10 is connected to the signal output terminal sequentially through the second switch 121, the first image processing circuit 122 and the third switch 123, that is, it is sequentially connected to the signal input terminal and the signal output terminal.
  • the second switch 121 between the output terminals, the first image processing circuit 122 and the third switch 123 form an image processing path of the display chip 10 .
  • the image processing unit 12 can be turned on, and the pass-through unit 11 can be turned off, so that the slave signal can be passed through the image processing path.
  • the electrical signal input from the input terminal is image-processed by the first image processing circuit 122 and signal enhanced by the signal enhancement unit 13 , and then transmitted to the screen 30 through the signal output terminal for display.
  • the first switch 111 is used to prevent electrical signals from entering the first image processing circuit 122 when the pass-through unit 11 is turned on; the second switch 121 is used to prevent electrical signals from being transmitted to the signal transmission end. The signal flows back to the first image processing circuit 122 .
  • the first image processing circuit 122 may include: a MIPI receiving circuit 1221, a frame complementing circuit 1222, a color processing circuit 1223, and a MIPI receiving circuit 1221 sequentially connected between the second switch 121 and the third switch 123.
  • the MIPI receiving circuit 1221 receives the image content obtained from the main control chip 20 and transmits it to the supplementary frame circuit 1222 for supplementary frame processing, and the electrical signal after the supplementary frame processing by the supplementary frame circuit 1222 is transmitted to the color processing circuit 1223 performs color processing, and the electrical signal after the color processing by the color processing circuit 1223 is transmitted to the signal enhancement unit 13 through the MIPI transmission circuit 1224, and the electrical signal after the signal enhancement processing by the signal enhancement unit 13 is output to the screen through the output signal output terminal 30 for display.
  • the input end of the signal enhancement unit 13 is respectively connected to the output end of the pass-through unit 11 and the output end of the image processing unit 12, and the output end of the signal enhancement unit 13 is connected to the signal output end connect.
  • the switch K1 can be controlled.
  • the switches K2 and K3 are closed, the image content can be transmitted to the screen 30 for display via the pass-through unit 11 and the signal enhancement unit 13 .
  • the switch K1 can be controlled to be disconnected, and the switches K2 and K3 to be closed, so that the image content can be processed through the image processing unit 12 for frame complement processing, color processing, etc. , and then transmitted to the screen 30 through the signal enhancement unit 13 for display.
  • the electrical signal input to the display chip 10 can be transmitted to the screen 30 for display after the signal enhancement processing of the signal enhancement unit 13, so that Ensure the signal strength of the electrical signal output to the screen 30 via the display chip 10, and avoid attenuation of the electrical signal due to possible parasitic capacitance/parasitic resistance/parasitic inductance in the switches and other devices in the display chip 10, so that the electrical signal output by the display chip The signal intensity is reduced, thereby improving the output signal quality of the display chip 10 and helping to improve the image display effect.
  • the signal enhancement unit 13 may use an amplifier or an inverter to increase signal strength.
  • the signal enhancement unit 13 includes: an amplifier; optionally, the amplifier can amplify the attenuated signal by 1.1 times or 1.2 times.
  • the amplifier may be disposed on the electrical signal transmission path of the direct unit 11 , and/or, the amplifier may also be disposed on the electrical signal transmission path of the image processing unit 12 .
  • the number of the amplifiers may be one or more.
  • the multiple amplifiers may be serially connected to the electrical signal transmission path of the direct unit 11, and/or, the electrical signal transmission path of the image processing unit 12; of course, multiple Two amplifiers may be connected in series at intervals to the electrical signal transmission path of the direct unit 11, and/or, the electrical signal transmission path of the image processing unit 12, such as one amplifier connected in series at the signal input end, another amplifier connected in series at the signal output end, etc.
  • the embodiments of the present application are not limited thereto.
  • the input end of the amplifier is respectively connected to the output end of the pass-through unit 11 and the output end of the image processing unit 12, and the output end of the amplifier is connected to the signal output end to ensure that the displayed
  • the electrical signal of the chip 10 is processed by the signal enhancement unit 13 before being transmitted to the screen 30 for display, so as to better ensure the signal strength of the electrical signal output to the screen 30 via the display chip 10 .
  • the signal enhancement unit 13 includes: a first inverter 131 and a second inverter 132; the first inverter 131 and the second inverter 132 are serially connected in series The electrical signal transmission path of the pass-through unit 11 , and/or, the first inverter 131 and the second inverter 132 are sequentially connected in series with the electrical signal transmission path of the image processing unit 12 .
  • the input end of the signal enhancement unit 13 is respectively connected to the output end of the direct unit 11 and the output end of the image processing unit 12, and the output end of the signal enhancement unit 13 is connected to the signal output end
  • the input end of the first inverter 131 is respectively connected to the output end of the pass-through unit 11 and the output end of the image processing unit 12, and the output end of the first inverter 131 is connected to the output end of the
  • the input end of the second inverter 132 is connected, and the output end of the second inverter 132 is connected to the signal output end.
  • a circuit diagram of an inverter is given.
  • the turn-on voltage VGS ⁇ 0 of the P-channel MOS (Positive channel Metal Oxide Semiconductor, PMOS) transistor and the turn-on voltage VGS>0 of the N-channel MOS (N-Metal-Oxide-Semiconductor, NMOS) transistor.
  • the input terminal VI is at a low level (such as 0V)
  • the load transistor that is, the PMOS transistor
  • the input transistor that is, the NMOS transistor
  • the output voltage VO is close to VDD.
  • the input VI is high level (such as 5V)
  • the input tube is turned on, the load tube is cut off, and the output voltage VO is close to 0V.
  • the power supply voltage of the inverter for example, the power supply voltage of the inverter can be set according to the electrical signal strength input by the signal input terminal
  • the inverter can restore the signal that has been deformed to a certain degree to the original signal , to ensure that the signal strength of the output signal is increased when the signal may be attenuated by a long transmission distance.
  • the first inverter 131 can invert the electrical signal output from the direct path or the image processing path to obtain an electrical signal whose phase is reversed by 180 degrees, and then the electrical signal passes through the second inverter Step 132 performs inversion processing again to obtain an electrical signal with enhanced signal strength and the same phase as the original signal (that is, the electrical signal output from the direct channel or the image processing channel).
  • A is the original high-quality signal (that is, the electrical signal input to the display chip 10)
  • B is the signal that is severely attenuated after passing through the parasitic resistance/parasitic capacitance/parasitic inductance in the display chip 10
  • C is the signal that has passed through the display chip 10.
  • the signal modified by the first inverter 131, D is the high-quality signal modified by the second inverter 132, and it can be seen from Fig.
  • the display chip 10 of the enhancement unit 13 can have higher signal output quality.
  • the display chip 10 further includes: a first power supply circuit 14 and a second power supply circuit 15 .
  • the first power supply circuit 14 is connected to the first power supply terminal of the second inverter 132, and the output voltage of the first power supply circuit 14 is adjustable;
  • the second power supply terminal of the inverter 132 is connected, and the output voltage of the second power supply circuit 15 is adjustable.
  • the first power supply terminal of the second inverter 132 may be the source of the PMOS transistor in the second inverter 132; the second power supply terminal of the second inverter 132 may be the second inverter The source of the NMOS transistor in the phase switch 132.
  • the voltage regulation of the first power supply circuit 14 and the second power supply circuit 15 may be: by adjusting the control signals of the switches in the first power supply circuit 14 and the second power supply circuit 15, to adjust
  • the output voltages of the first power supply circuit 14 and the second power supply circuit 15 are not specifically limited in this embodiment of the present application.
  • a first power supply terminal of the first inverter 131 is connected to the first power supply circuit 14
  • a second power supply terminal of the first inverter 131 is connected to the second power supply circuit 15 .
  • the first power supply terminal of the first inverter 131 may be the source of the PMOS transistor in the first inverter 131; the second power supply terminal of the first inverter 131 may be the first power supply terminal of the first inverter 131.
  • the output voltages of the first power supply circuit 14 and the second power supply circuit 15 can be adjusted based on the voltage of the electrical signal input by the signal input terminal of the display chip 10, so that the display chip 10 can be adapted to different driving voltages.
  • the electrical signal is corrected so as to output a signal corresponding to the voltage.
  • the first power supply circuit 14 and the second power supply circuit 15 can be based on the existing power supply circuits in the display chip 10, so as to save development costs and avoid excessive use of new power supply circuits on the internal space of the chip. occupy.
  • a power supply circuit outside the display chip 10 is used to supply power to the first inverter 131 and the second inverter 132 in the display chip 10 , and the embodiment of the present application is not limited thereto.
  • the pass-through unit 11 includes: a first switch 111; the first switch 111 is connected between the signal input end and the signal output end.
  • the through unit 11 when the first switch 111 is in the on state, the through unit 11 is in the on state; when the first switch 111 is in the off state, the through unit 11 is in the off state.
  • the signal input terminal of the display chip 10 is connected to the signal output terminal through the first switch 111, that is, the first switch 111 connected between the signal input terminal and the signal output terminal is formed as a through connection of the display chip 10. path.
  • the image processing unit 12 can be turned off, and the through unit 11 can be turned on, so that the slave signal can be passed through the through path.
  • the electrical signal input from the input terminal is transmitted to the screen 30 through the signal output terminal for display after being processed by the signal enhancement unit 13 .
  • the image processing unit 12 includes: a fourth switch 124 and a second image processing circuit 125; the fourth switch 124 and the second image processing circuit 125 are sequentially connected in series with the signal input terminal and the between the signal outputs.
  • the image processing unit 12 when the fourth switch 124 is in the on state, the image processing unit 12 is in the on state; when the fourth switch 124 is in the off state, the image processing unit 12 is in the off state.
  • the input terminal of the signal enhancement unit 13 is connected to the output terminal of the image processing unit 12, and the output terminal of the signal enhancement unit 13 is respectively connected to the output terminal of the direct unit 11 and the signal output terminal. connect.
  • the input terminal of the signal enhancement unit 13 is connected to the output terminal of the second image processing circuit 125, and the output terminal of the signal enhancement unit 13 is respectively connected to the output terminal of the direct unit 11 and the signal output terminal. connect.
  • the parasitic capacitance/ The influence of parasitic resistance/parasitic inductance leads to the attenuation of the electrical signal passing through the through path before it is transmitted to the signal output terminal, that is, this solution not only reduces the circuit parasitic parameters of the display chip to reduce the attenuation of the signal, but also further passes the signal enhancement unit 13 Improved signal output quality.
  • the signal enhancement unit 13 includes: a first inverter 131 and a second inverter 132; the first inverter 131 and the second inverter 132 are sequentially connected in series with the pass-through unit 11, and/or, the first inverter 131 and the second inverter 132 are sequentially connected in series with the electrical signal transmission path of the image processing unit 12.
  • the input end of the signal enhancement unit 13 is connected to the output end of the image processing unit 12, and the output end of the signal enhancement unit 13 is respectively connected to the output end of the direct unit 11 and the signal output end.
  • the input end of the first inverter 131 is connected to the output end of the image processing unit 12, and the output end of the first inverter 131 is connected to the input end of the second inverter 132.
  • the output end of the second inverter 132 is respectively connected to the output end of the pass-through unit 11 and the signal output end.
  • the electrical signal output from the image processing channel can be inverted by the first inverter 131 to obtain an electrical signal whose phase is reversed by 180 degrees, and the electrical signal is processed again by the second inverter 132 Phase inversion processing to obtain an electrical signal with enhanced signal strength and the same phase as the original signal (that is, the electrical signal output from the through channel or the image processing channel).
  • the signal enhancement unit 13 can better correct the signal to be output, so as to ensure that the display chip 10 having the signal enhancement unit 13 can have higher signal output quality.
  • the fourth switch 124 is used to prevent electrical signals from entering the second image processing circuit 125 when the pass-through unit 11 is turned on; the first inverter 131 and the first inverter 131 in the signal enhancement unit 13
  • the second inverter 132 can also be used to prevent the electrical signal transmitted to the signal transmission end from flowing back to the second image processing circuit 125 .
  • the second image processing circuit 125 may include: a MIPI receiving circuit 1251, a frame complementing circuit 1252, a color processing circuit 1253, and a MIPI Transmitting circuit 1254; wherein, the MIPI receiving circuit 1251 receives the image content obtained from the main control chip 20 and transmits it to the supplementary frame circuit 1252 for supplementary frame processing, and the electrical signal after the supplementary frame processing by the supplementary frame circuit 1252 is transmitted to the color processing circuit 1253 performs color processing, and the electrical signal after the color processing by the color processing circuit 1253 is transmitted to the signal enhancement unit 13 through the MIPI transmission circuit 1254, and the electrical signal after the signal enhancement processing by the signal enhancement unit 13 is output to the screen through the output signal output terminal 30 for display.
  • the MIPI receiving circuit 1251 receives the image content obtained from the main control chip 20 and transmits it to the supplementary frame circuit 1252 for supplementary frame processing, and the electrical signal after the supplementary frame processing by the supplementary frame circuit 1252 is transmitted to the color processing circuit 1253 performs color processing, and
  • the signal is modified and reinforced by the signal enhancement unit 13 including the first inverter 131 and the second inverter 132, and can Isolate the influence of the MIPI sending circuit 1254 circuit, reduce the parasitic parameters of the circuit, and ensure that the display chip 10 with the signal enhancement unit 13 can have a higher signal output quality.
  • the switch K1 can be controlled to close 1.
  • the image content can be transmitted to the screen 30 for display through the through unit 11. Since there is no switch at the output end of the image processing channel, the influence of parasitic parameters on signal attenuation can be reduced, thereby ensuring the quality of the output signal.
  • the switch K1 can be controlled to be disconnected and the switch K4 to be closed, and then the image content can be processed by the image processing unit 12 for supplementary frame processing, color processing, etc.
  • the signal is transmitted to the screen 30 through the signal enhancement unit 13 for display.
  • the signal strength of the electrical signal output to the screen 30 through the display chip 10 can be guaranteed, and the parasitic capacitance that may exist due to switches and other devices in the display chip 10 can be avoided.
  • The/parasitic resistance/parasitic inductance and the like attenuate the electrical signal, reducing the intensity of the electrical signal output by the display chip, thereby improving the quality of the output signal of the display chip 10 and helping to improve the image display effect.
  • the display chip 10 further includes: a first power supply circuit 14 and a second power supply circuit 15 .
  • the first power supply circuit 14 is connected to the first power supply terminal of the second inverter 132, and the output voltage of the first power supply circuit 14 is adjustable;
  • the second power supply terminal of the inverter 132 is connected, and the output voltage of the second power supply circuit 15 is adjustable.
  • the first power supply terminal of the second inverter 132 may be the source of the PMOS transistor in the second inverter 132; the second power supply terminal of the second inverter 132 may be the second inverter The source of the NMOS transistor in the phase switch 132.
  • the voltage regulation of the first power supply circuit 14 and the second power supply circuit 15 may be: by adjusting the control signals of the switches in the first power supply circuit 14 and the second power supply circuit 15, to adjust
  • the output voltages of the first power supply circuit 14 and the second power supply circuit 15 are not specifically limited in this embodiment of the present application.
  • a first power supply terminal of the first inverter 131 is connected to the first power supply circuit 14
  • a second power supply terminal of the first inverter 131 is connected to the second power supply circuit 15 .
  • the first power supply terminal of the first inverter 131 may be the source of the PMOS transistor in the first inverter 131; the second power supply terminal of the first inverter 131 may be the first power supply terminal of the first inverter 131.
  • the output voltages of the first power supply circuit 14 and the second power supply circuit 15 can be adjusted based on the voltage of the electrical signal input by the signal input terminal of the display chip 10, so that the display chip 10 can be adapted to different driving voltages.
  • the electrical signal is corrected so as to output a signal corresponding to the voltage.
  • the first power supply circuit 14 and the second power supply circuit 15 can be based on the existing power supply circuits in the display chip 10, so as to save development costs and avoid excessive use of new power supply circuits on the internal space of the chip. occupy.
  • a power supply circuit outside the display chip 10 is used to supply power to the first inverter 131 and the second inverter 132 in the display chip 10 , and the embodiment of the present application is not limited thereto.
  • the embodiment of the present application also provides an electronic device, including the above-mentioned display chip 10 .
  • the electronic device further includes: a mainboard and a display screen (or called a screen); the display chip 10 is arranged on the mainboard, and the signal input terminal of the display chip 10 is connected to the The main control chip is connected, and the signal output terminal of the display chip is connected with the display screen.
  • the display chip can be used as an independent display chip of electronic devices such as mobile phones to improve display fluency, enhance display color, and ensure better signal output quality.

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Abstract

本申请公开了一种显示芯片及电子设备，该显示芯片包括：直通单元、图像处理单元和信号增强单元；直通单元连接于显示芯片的信号输入端与信号输出端之间，直通单元具有导通状态和断开状态；其中，直通单元处于导通状态时，用于将信号输入端的电信号传输至信号输出端；图像处理单元连接于信号输入端与信号输出端之间，图像处理单元具有导通状态和断开状态；其中，图像处理单元处于导通状态时，用于将信号输入端的电信号经图像处理后传输至信号输出端；信号增强单元设置于直通单元的电信号传输路径，和/或，信号增强单元设置于图像处理单元的电信号传输路径。

Description

显示芯片及电子设备
相关申请的交叉引用
本申请主张在2021年09月06日在中国提交的中国专利申请No.202111039679.1的优先权，其全部内容通过引用包含于此。
技术领域
本申请涉及电子产品技术领域，尤其涉及一种显示芯片及电子设备。
背景技术
目前，手机等电子设备配置显示芯片，显示芯片可以对输入的图像信号(即电信号)进行图像处理后，输出给屏幕驱动芯片并通过屏幕进行图像显示。其具体可以分为集成显示芯片和独立显示芯片，采用独立显示芯片可以提升显示的流畅度、增强显示色彩。显示芯片的电路中可以设置开关等器件，通过开关导通/关断状态的切换，使得显示芯片处于不同的工作状态(即对电信号执行不同的图像处理)。但是，在显示芯片工作过程中，由于开关等器件可能存在的寄生电容/寄生电阻/寄生电感等的影响，可能会对电信号造成衰减，使得显示芯片输出的电信号强度降低，甚至可能导致屏幕驱动芯片无法识别而影响图像显示效果。
发明内容
本申请实施例提供了一种显示芯片及电子设备，以解决目前的显示芯片存在输出的电信号强度低，可能导致屏幕驱动芯片无法识别而影响图像显示效果的问题。
为了解决上述技术问题，本申请是这样实现的：
第一方面，本申请实施例提供了一种显示芯片，包括：
直通单元，所述直通单元连接于所述显示芯片的信号输入端与信号输出端之间，所述直通单元具有导通状态和断开状态；其中，所述直通单元处于导通状态时，用于将所述信号输入端的电信号传输至所述信号输出端；
图像处理单元，所述图像处理单元连接于所述信号输入端与所述信号输 出端之间，所述图像处理单元具有导通状态和断开状态；其中，所述图像处理单元处于导通状态时，用于将所述信号输入端的电信号经图像处理后传输至所述信号输出端；
信号增强单元，所述信号增强单元设置于所述直通单元的电信号传输路径，和/或，所述信号增强单元设置于所述图像处理单元的电信号传输路径。
第二方面，本申请实施例还提供了一种电子设备，包括如上第一方面所述的显示芯片。
这样，本申请的上述方案中，通过在显示芯片中的直通单元的电信号传输路径和/或所述图像处理单元的电信号传输路径中设置信号增强单元，以对待处理的电信号、处理过程中的电信号或者待输出的电信号强度起到补强的作用，从而避免由于显示芯片中的开关等器件可能存在的寄生电容/寄生电阻/寄生电感等对电信号造成衰减，使得显示芯片输出的电信号强度降低，甚至可能导致屏幕驱动芯片无法识别而影响图像显示效果的问题。
附图说明
图1表示本申请实施例的显示芯片的示意图之一；
图2表示本申请实施例的显示芯片的示意图之二；
图3表示本申请实施例的显示芯片的示意图之三；
图4表示本申请实施例的反相器的电路图；
图5表示本申请实施例的显示芯片内不同节点的电信号波形示意图；
图6表示本申请实施例的第二反相器的电路图；
图7表示本申请实施例的显示芯片的示意图之四。
具体实施方式
下面将参照附图更详细地描述本申请的示例性实施例。虽然附图中显示了本申请的示例性实施例，然而应当理解，可以以各种形式实现本申请而不应被这里阐述的实施例所限制。相反，提供这些实施例是为了能够更透彻地理解本申请，并且能够将本申请的范围完整的传达给本领域的技术人员。
如图1所示，本申请实施例提供了一种显示芯片10，包括：直通单元11、 图像处理单元12和信号增强单元13。
其中，所述直通单元11连接于所述显示芯片10的信号输入端与信号输出端之间，所述直通单元11具有导通状态和断开状态；其中，所述直通单元11处于导通状态时，用于将所述信号输入端的电信号传输至所述信号输出端。
所述图像处理单元12连接于所述信号输入端与所述信号输出端之间，所述图像处理单元12具有导通状态和断开状态；其中，所述图像处理单元12处于导通状态时，用于将所述信号输入端的电信号经图像处理后传输至所述信号输出端。
所述信号增强单元13设置于所述直通单元11的电信号传输路径，和/或，所述信号增强单元13设置于所述图像处理单元12的电信号传输路径。
例如：显示芯片可以获取主控芯片20，如应用处理器(Application Processor，AP)的图像内容(即图像的电信号)。其中，图像内容可以经直通单元11(或称为bypass通路)，传输至屏幕30(或称为显示屏)进行显示，如可以使用移动产业处理器接口(Mobile Industry Processor Interface，MIPI)协议传输。或者，图像内容还可以经过图像处理单元12的补帧电路、色彩处理电路等处理后，传输至屏幕30(或称为显示屏)进行显示。
其中，所述信号增强单元13设置于所述直通单元11的电信号传输路径可以包括但不限于：所述信号增强单元13的输入端与所述信号输入端连接，所述信号增强单元13的输出端分别与所述直通单元11的输入端、所述图像处理单元12的输入端连接；或者，所述信号增强单元13的输入端分别与所述直通单元11的输出端、所述图像处理单元12的输出端连接，所述信号增强单元13的输出端与所述信号输出端连接；或者，所述信号增强单元13的输入端分别与所述信号输入端、图像处理单元12的输入端连接，所述信号增强单元13的输出端与所述直通单元11的输入端连接；或者，所述信号增强单元13的输入端与所述直通单元11的输出端连接，所述信号增强单元13的输出端与所述信号输出端、所述图像处理单元12的输出端连接等。
其中，所述信号增强单元13设置于所述图像处理单元12的电信号传输路径可以包括但不限于：所述信号增强单元13的输入端与所述信号输入端连接，所述信号增强单元13的输出端分别与所述直通单元11的输入端、所述 图像处理单元12的输入端连接；或者，所述信号增强单元13的输入端分别与所述直通单元11的输出端、所述图像处理单元12的输出端连接，所述信号增强单元13的输出端与所述信号输出端连接；或者，所述信号增强单元13的输入端分别与所述信号输入端、直通单元11的输入端连接，所述信号增强单元13的输出端与所述图像处理单元12的输入端连接；或者，所述信号增强单元13的输入端与所述图像处理单元12的输出端连接，所述信号增强单元13的输出端分别与所述直通单元11的输出端、所述信号输出端连接；或者信号增强单元13还可以设置在图像处理单元12内的其他位置等，本申请实施例不以此为限。
上述方案中，通过在显示芯片10中的直通单元11的电信号传输路径和/或所述图像处理单元12的电信号传输路径中设置信号增强单元13，以对待处理的电信号、处理过程中的电信号或者待输出的电信号强度起到补强的作用，从而避免由于显示芯片10中的开关等器件可能存在的寄生电容/寄生电阻/寄生电感等对电信号造成衰减，使得显示芯片输出的电信号强度降低，甚至可能导致屏幕驱动芯片无法识别而影响图像显示效果的问题。
作为一种实现方式：如图2所示，所述直通单元11包括：第一开关111；所述第一开关111连接于所述信号输入端与所述信号输出端之间。
其中，所述第一开关111处于导通状态时，所述直通单元11处于导通状态；所述第一开关111处于断开状态时，所述直通单元11处于断开状态。
换言之，所述显示芯片10的信号输入端通过所述第一开关111与信号输出端连接，即连接于信号输入端与信号输出端之间的第一开关111形成为所述显示芯片10的直通通路。例如：在不需要对从主控芯片20获取的图像内容进行处理的情况下，可以将图像处理单元12处于断开状态，以及将直通单元11处于导通状态，从而通过该直通通路将从信号输入端所输入的电信号，经信号增强单元13进行信号增强处理后，通过信号输出端传输至屏幕30进行显示。
所述图像处理单元12包括：第二开关121、第一图像处理电路122和第三开关123；所述第二开关121、所述第一图像处理电路122和所述第三开关123依次串联于所述信号输入端与所述信号输出端之间。
其中，所述第二开关121和所述第三开关123均处于导通状态时，所述图像处理单元12处于导通状态；所述第二开关121和所述第三开关123均处于断开状态时，所述图像处理单元12处于断开状态。
换言之，所述显示芯片10的信号输入端依次通过所述第二开关121、所述第一图像处理电路122和所述第三开关123与信号输出端连接，即依次连接于信号输入端与信号输出端之间的第二开关121、所述第一图像处理电路122和所述第三开关123形成为所述显示芯片10的图像处理通路。例如：在需要对从主控芯片20获取的图像内容进行处理的情况下，可以将图像处理单元12处于导通状态，以及将直通单元11处于断开状态，从而通过该图像处理通路将从信号输入端所输入的电信号，经第一图像处理电路122进行图像处理以及经信号增强单元13进行信号增强处理后，再通过信号输出端传输至屏幕30进行显示。
其中，所述第一开关111用于在所述直通单元11导通时，防止电信号进入所述第一图像处理电路122；所述第二开关121用于防止传输至所述信号传输端的电信号回流至所述第一图像处理电路122。
可选地，所述第一图像处理电路122可以包括：依次连接于所述第二开关121和所述第三开关123之间的MIPI接收电路1221、补帧电路1222、色彩处理电路1223和MIPI发送电路1224；其中，MIPI接收电路1221接收从主控芯片20获取的图像内容并传输至补帧电路1222进行补帧处理，经补帧电路1222进行补帧处理后的电信号传输至色彩处理电路1223进行色彩处理，经色彩处理电路1223进行色彩处理后的电信号经MIPI发送电路1224传输至信号增强单元13，经信号增强单元13进行信号增强处理后的电信号经输出信号输出端输出至屏幕30进行显示。
可选地，所述信号增强单元13的输入端分别与所述直通单元11的输出端、所述图像处理单元12的输出端连接，所述信号增强单元13的输出端与所述信号输出端连接。
该实施例中，通过将所述信号增强单元13可以设置在所述显示芯片10的信号输出端的位置，当不需要对从主控芯片20获取的图像内容进行处理的情况下，可以控制开关K1闭合、开关K2、K3断开，则图像内容可以经直通 单元11和信号增强单元13传输至屏幕30进行显示。或者，在需要对从主控芯片20获取的图像内容进行处理的情况下，可以控制开关K1断开、开关K2、K3闭合，则图像内容可以经过图像处理单元12进行补帧处理、色彩处理等，再经过信号增强单元13传输至屏幕30进行显示。
这样，该显示芯片10无论在直通通路或是图像处理通路下，均可以使得输入至显示芯片10的电信号可以经过所述信号增强单元13的信号增强处理后，传输至屏幕30进行显示，以保证经显示芯片10输出至屏幕30的电信号的信号强度，避免由于显示芯片10中的开关等器件可能存在的寄生电容/寄生电阻/寄生电感等对电信号造成衰减，使得显示芯片输出的电信号强度降低，从而提高了显示芯片10的输出信号质量，并有利于提高图像显示效果。
可选地，所述信号增强单元13可以采用放大器或者反相器，以提高信号强度。
例如：所述信号增强单元13包括：放大器；可选地，所述放大器可以对衰减信号进行1.1倍、1.2倍放大。所述放大器可以设置于所述直通单元11的电信号传输路径，和/或，所述放大器还可以设置于所述图像处理单元12的电信号传输路径。其中，所述放大器的数量可以是一个或多个。当所述放大器的数量为多个时，所述多个放大器可以依次串联于所述直通单元11的电信号传输路径，和/或，所述图像处理单元12的电信号传输路径；当然，多个放大器可以间隔串联在直通单元11的电信号传输路径，和/或，所述图像处理单元12的电信号传输路径，如一个放大器串联在信号输入端，另一个放大器串联在信号输出端等，本申请实施例不以此为限。
可选地，所述放大器的输入端分别与所述直通单元11的输出端、所述图像处理单元12的输出端连接，所述放大器的输出端与所述信号输出端连接，以保证经显示芯片10的电信号经过所述信号增强单元13的信号增强处理后再传输至屏幕30进行显示，从而更好地保证经显示芯片10输出至屏幕30的电信号的信号强度。
又例如：如图3所示，所述信号增强单元13包括：第一反相器131和第二反相器132；所述第一反相器131和所述第二反相器132依次串联于所述直通单元11的电信号传输路径，和/或，所述第一反相器131和所述第二反 相器132依次串联于所述图像处理单元12的电信号传输路径。
例如：在所述信号增强单元13的输入端分别与所述直通单元11的输出端、所述图像处理单元12的输出端连接，所述信号增强单元13的输出端与所述信号输出端连接的情况下，所述第一反相器131的输入端分别与所述直通单元11的输出端、所述图像处理单元12的输出端连接，所述第一反相器131的输出端与所述第二反相器132的输入端连接，所述第二反相器132的输出端与所述信号输出端连接。
如图4所示，给出了一种反相器的电路图。其中，P沟道MOS(Positive channel Metal Oxide Semiconductor，PMOS)管的开启电压VGS<0，N沟道MOS(N-Metal-Oxide-Semiconductor，NMOS)管的开启电压VGS>0。若输入端VI为低电平(如0V)，则负载管(即PMOS管)导通，输入管(即NMOS管)截止，输出电压VO接近VDD。若输入VI为高电平(如5V)，则输入管导通，负载管截止，输出电压VO接近0V。这样通过设置反相器的供电电压(如可以根据信号输入端所输入的电信号强度设置所述反相器的供电电压)，反相器可以将变形一定程度的信号，重新修复为原来的信号，保证信号在较长的传输距离可能造成衰减的情况下，提升输出信号的信号强度。
该实施例中，通过第一反相器131可以对从直通通路或图像处理通路输出的电信号进行反相处理，得到相位反转180度的电信号，该电信号再经过第二反相器132再次进行反相处理，得到信号强度增强、相位与原始信号(即从直通通路或图像处理通路输出的电信号)相同的电信号。如图5所示，A为原始高质量的信号(即输入至显示芯片10的电信号)，B为经过显示芯片10内的寄生电阻/寄生电容/寄生电感后严重衰减的信号，C为经过第一反相器131修正后的信号，D为经过第二反相器132修正后的高质量信号，结合图5可以看出该信号增强单元13具有较好的信号修正作用，保证具有该信号增强单元13的显示芯片10能够具有较高的信号输出质量。
可选地，如图6所示，所述显示芯片10还包括：第一供电电路14和第二供电电路15。
其中，所述第一供电电路14与所述第二反相器132的第一供电端连接，所述第一供电电路14的输出电压可调；所述第二供电电路15与所述第二反 相器132的第二供电端连接，所述第二供电电路15的输出电压可调。
可选地，所述第二反相器132的第一供电端可以是第二反相器132中PMOS管的源极；所述第二反相器132的第二供电端可以是第二反相器132中NMOS管的源极。
可选地，对所述第一供电电路14和所述第二供电电路15的电压调节可以是：通过对第一供电电路14和第二供电电路15中开关管的控制信号的调整，来调节第一供电电路14和第二供电电路15的输出电压等，本申请实施例对此不做具体限定。
可选地，所述第一反相器131的第一供电端与所述第一供电电路14连接，所述第一反相器131的第二供电端与所述第二供电电路15连接。
可选地，所述第一反相器131的第一供电端可以是所述第一反相器131中PMOS管的源极；所述第一反相器131的第二供电端可以是第一反相器131中NMOS管的源极。
该实施例中，第一供电电路14和第二供电电路15的输出电压可以基于显示芯片10的信号输入端所输入的电信号的电压进行调整，这样该显示芯片10可以适用于不同驱动电压的电信号进行修正处理，以便输出对应电压的信号。
可选地，所述第一供电电路14和所述第二供电电路15可以是基于显示芯片10内的现有供电电路，以节省开发成本，并避免新增供电电路对芯片内部空间的过多占用。或者，采用显示芯片10外部的供电电路对显示芯片10内第一反相器131和第二反相器132进行供电等，本申请实施例不以此为限。
作为又一种实现方式：如图7所示，所述直通单元11包括：第一开关111；所述第一开关111连接于所述信号输入端与所述信号输出端之间。
其中，所述第一开关111处于导通状态时，所述直通单元11处于导通状态；所述第一开关111处于断开状态时，所述直通单元11处于断开状态。
换言之，所述显示芯片10的信号输入端通过所述第一开关111与信号输出端连接，即连接于信号输入端与信号输出端之间的第一开关111形成为所述显示芯片10的直通通路。例如：在不需要对从主控芯片20获取的图像内容进行处理的情况下，可以将图像处理单元12处于断开状态，以及将直通单 元11处于导通状态，从而通过该直通通路将从信号输入端所输入的电信号，经信号增强单元13进行信号增强处理后，通过信号输出端传输至屏幕30进行显示。
可选地，所述图像处理单元12包括：第四开关124和第二图像处理电路125；所述第四开关124和所述第二图像处理电路125依次串联于所述信号输入端与所述信号输出端之间。
其中，所述第四开关124处于导通状态时，所述图像处理单元12处于导通状态；所述第四开关124处于断开状态时，所述图像处理单元12处于断开状态。
可选地，所述信号增强单元13的输入端与所述图像处理单元12的输出端连接，所述信号增强单元13的输出端分别与所述直通单元11的输出端、所述信号输出端连接。例如：所述信号增强单元13的输入端与所述第二图像处理电路125的输出端连接，所述信号增强单元13的输出端分别与所述直通单元11的输出端、所述信号输出端连接。
该实施例中，通过将信号增强单元13设置在第二图像处理电路125的输出端的位置，并取消所述第二图像处理电路125输出端的开关的设计，从而可以降低由于该开关的寄生电容/寄生电阻/寄生电感的影响，导致经过直通通路的电信号传输至信号输出端前的衰减，即该方案既降低了显示芯片的电路寄生参数，以降低信号受到的衰减，还进一步通过信号增强单元13提高了信号输出质量。
可选地，所述信号增强单元13包括：第一反相器131和第二反相器132；所述第一反相器131和所述第二反相器132依次串联于所述直通单元11的电信号传输路径，和/或，所述第一反相器131和所述第二反相器132依次串联于所述图像处理单元12的电信号传输路径。
例如：所述信号增强单元13的输入端与所述图像处理单元12的输出端连接，所述信号增强单元13的输出端分别与所述直通单元11的输出端、所述信号输出端连接的情况下，所述第一反相器131的输入端与所述图像处理单元12的输出端连接，所述第一反相器131的输出端与所述第二反相器132的输入端连接，所述第二反相器132的输出端分别与所述直通单元11的输出 端、所述信号输出端连接。
该实施例中，通过第一反相器131可以对从图像处理通路输出的电信号进行反相处理，得到相位反转180度的电信号，该电信号再经过第二反相器132再次进行反相处理，得到信号强度增强、相位与原始信号(即从直通通路或图像处理通路输出的电信号)相同的电信号。该信号增强单元13可以对待输出的信号起到较好的信号修正作用，保证具有该信号增强单元13的显示芯片10能够具有较高的信号输出质量。
其中，所述第四开关124用于在所述直通单元11导通时，防止电信号进入所述第二图像处理电路125；所述信号增强单元13中的所述第一反相器131和所述第二反相器132还可以用于防止传输至所述信号传输端的电信号回流至所述第二图像处理电路125。
可选地，所述第二图像处理电路125可以包括：依次连接于所述第四开关124和所述信号增强单元13之间的MIPI接收电路1251、补帧电路1252、色彩处理电路1253和MIPI发送电路1254；其中，MIPI接收电路1251接收从主控芯片20获取的图像内容并传输至补帧电路1252进行补帧处理，经补帧电路1252进行补帧处理后的电信号传输至色彩处理电路1253进行色彩处理，经色彩处理电路1253进行色彩处理后的电信号经MIPI发送电路1254传输至信号增强单元13，经信号增强单元13进行信号增强处理后的电信号经输出信号输出端输出至屏幕30进行显示。这样，在经过图像处理通路的电信号由MIPI发送电路1254发出至信号输出端之前，通过包括第一反相器131和第二反相器132的信号增强单元13进行信号修正补强，并可以隔离MIPI发送电路1254电路的影响，降低电路的寄生参数，并保证具有该信号增强单元13的显示芯片10能够具有较高的信号输出质量。
该实施例中，通过将所述信号增强单元13可以设置在所述图像处理通路的输出端的位置，当不需要对从主控芯片20获取的图像内容进行处理的情况下，可以控制开关K1闭合、开关K4断开，则图像内容可以经直通单元11传输至屏幕30进行显示，由于图像处理通路输出端位置未设置开关，从而可以减少寄生参数对信号衰减的影响，进而保证输出信号的质量。或者，在需要对从主控芯片20获取的图像内容进行处理的情况下，可以控制开关K1断 开、开关K4闭合，则图像内容可以经过图像处理单元12进行补帧处理、色彩处理等，在经过信号增强单元13传输至屏幕30进行显示。这样，该显示芯片10无论在直通通路或是图像处理通路下，均可以保证经显示芯片10输出至屏幕30的电信号的信号强度，避免由于显示芯片10中的开关等器件可能存在的寄生电容/寄生电阻/寄生电感等对电信号造成衰减，使得显示芯片输出的电信号强度降低，从而提高了显示芯片10的输出信号质量，并有利于提高图像显示效果。
可选地，所述显示芯片10还包括：第一供电电路14和第二供电电路15。
其中，所述第一供电电路14与所述第二反相器132的第一供电端连接，所述第一供电电路14的输出电压可调；所述第二供电电路15与所述第二反相器132的第二供电端连接，所述第二供电电路15的输出电压可调。
可选地，所述第二反相器132的第一供电端可以是第二反相器132中PMOS管的源极；所述第二反相器132的第二供电端可以是第二反相器132中NMOS管的源极。
可选地，对所述第一供电电路14和所述第二供电电路15的电压调节可以是：通过对第一供电电路14和第二供电电路15中开关管的控制信号的调整，来调节第一供电电路14和第二供电电路15的输出电压等，本申请实施例对此不做具体限定。
可选地，所述第一反相器131的第一供电端与所述第一供电电路14连接，所述第一反相器131的第二供电端与所述第二供电电路15连接。
可选地，所述第一反相器131的第一供电端可以是所述第一反相器131中PMOS管的源极；所述第一反相器131的第二供电端可以是第一反相器131中NMOS管的源极。
该实施例中，第一供电电路14和第二供电电路15的输出电压可以基于显示芯片10的信号输入端所输入的电信号的电压进行调整，这样该显示芯片10可以适用于不同驱动电压的电信号进行修正处理，以便输出对应电压的信号。
可选地，所述第一供电电路14和所述第二供电电路15可以是基于显示芯片10内的现有供电电路，以节省开发成本，并避免新增供电电路对芯片内 部空间的过多占用。或者，采用显示芯片10外部的供电电路对显示芯片10内第一反相器131和第二反相器132进行供电等，本申请实施例不以此为限。
本申请实施例还提供一种电子设备，包括如上所述的显示芯片10。
可选地，所述电子设备还包括：主板和显示屏(或称为屏幕)；所述显示芯片10设置于所述主板上，且所述显示芯片10的信号输入端与所述主板上的主控芯片连接，所述显示芯片的信号输出端与所述显示屏连接。也即是所述显示芯片可以作为手机等电子设备的独立显示芯片使用，以提升显示的流畅度、增强显示色彩，并且还可以保证具有较好的信号输出质量。
本说明书中的各个实施例均采用递进的方式描述，每个实施例重点说明的都是与其他实施例的不同之处，各个实施例之间相同相似的部分互相参见即可。
尽管已描述了本申请实施例的可选实施例，但本领域内的技术人员一旦得知了基本创造性概念，则可对这些实施例做出另外的变更和修改。所以，所附权利要求意欲解释为包括可选实施例以及落入本申请实施例范围的所有变更和修改。
最后，还需要说明的是，在本文中，诸如第一和第二等之类的关系术语仅仅用来将一个实体或者操作与另一个实体或操作区分开来，而不一定要求或者暗示这些实体或操作之间存在任何这种实际的关系或者顺序。而且，术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含，从而使得包括一系列要素的过程、方法、物品或者终端设备不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、物品或者终端设备所固有的要素。在没有更多限制的情况下，由语句“包括一个……”限定的要素，并不排除在包括所述要素的过程、方法、物品或者终端设备中还存在另外的相同要素。
以上所述的是本申请的可选实施方式，应当指出对于本技术领域的普通人员来说，在不脱离本申请所述的原理前提下还可以作出若干改进和润饰，这些改进和润饰也在本申请的保护范围内。

Claims (12)

  1. 一种显示芯片，包括：
    直通单元，所述直通单元连接于所述显示芯片的信号输入端与信号输出端之间，所述直通单元具有导通状态和断开状态；其中，所述直通单元处于导通状态时，用于将所述信号输入端的电信号传输至所述信号输出端；
    图像处理单元，所述图像处理单元连接于所述信号输入端与所述信号输出端之间，所述图像处理单元具有导通状态和断开状态；其中，所述图像处理单元处于导通状态时，用于将所述信号输入端的电信号经图像处理后传输至所述信号输出端；
    信号增强单元，所述信号增强单元设置于所述直通单元的电信号传输路径，和/或，所述信号增强单元设置于所述图像处理单元的电信号传输路径。
  2. 根据权利要求1所述的显示芯片，其中，所述直通单元包括：第一开关；
    所述第一开关连接于所述信号输入端与所述信号输出端之间；其中，所述第一开关处于导通状态时，所述直通单元处于导通状态；所述第一开关处于断开状态时，所述直通单元处于断开状态。
  3. 根据权利要求1所述的显示芯片，其中，所述图像处理单元包括：第二开关、第一图像处理电路和第三开关；
    所述第二开关、所述第一图像处理电路和所述第三开关依次串联于所述信号输入端与所述信号输出端之间；其中，所述第二开关和所述第三开关均处于导通状态时，所述图像处理单元处于导通状态；所述第二开关和所述第三开关均处于断开状态时，所述图像处理单元处于断开状态。
  4. 根据权利要求1所述的显示芯片，其中，所述图像处理单元包括：第四开关和第二图像处理电路；
    所述第四开关和所述第二图像处理电路依次串联于所述信号输入端与所述信号输出端之间；其中，所述第四开关处于导通状态时，所述图像处理单元处于导通状态；所述第四开关处于断开状态时，所述图像处理单元处于断开状态。
  5. 根据权利要求4所述的显示芯片，其中，所述信号增强单元的输入端与所述图像处理单元的输出端连接，所述信号增强单元的输出端分别与所述直通单元的输出端、所述信号输出端连接。
  6. 根据权利要求1至3中任一项所述的显示芯片，其中，所述信号增强单元的输入端分别与所述直通单元的输出端、所述图像处理单元的输出端连接，所述信号增强单元的输出端与所述信号输出端连接。
  7. 根据权利要求1至3中任一项所述的显示芯片，其中，所述信号增强单元包括：放大器。
  8. 根据权利要求1至5中任一项所述的显示芯片，其中，所述信号增强单元包括：第一反相器和第二反相器；
    所述第一反相器和所述第二反相器依次串联于所述直通单元的电信号传输路径，和/或，所述第一反相器和所述第二反相器依次串联于所述图像处理单元的电信号传输路径。
  9. 根据权利要求8所述的显示芯片，其中，还包括：
    第一供电电路，所述第一供电电路与所述第二反相器的第一供电端连接，所述第一供电电路的输出电压可调；
    第二供电电路，所述第二供电电路与所述第二反相器的第二供电端连接，所述第二供电电路的输出电压可调。
  10. 根据权利要求9所述的显示芯片，其中，所述第一反相器的第一供电端与所述第一供电电路连接，所述第一反相器的第二供电端与所述第二供电电路连接。
  11. 一种电子设备，包括如权利要求1至10中任一项所述的显示芯片。
  12. 根据权利要求11所述的电子设备，其中，还包括：主板和显示屏；
    所述显示芯片设置于所述主板上，且所述显示芯片的信号输入端与所述主板上的主控芯片连接，所述显示芯片的信号输出端与所述显示屏连接。
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