WO2023024169A1 - 显示面板、显示面板的驱动方法及电子装置 - Google Patents
显示面板、显示面板的驱动方法及电子装置 Download PDFInfo
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- WO2023024169A1 WO2023024169A1 PCT/CN2021/117360 CN2021117360W WO2023024169A1 WO 2023024169 A1 WO2023024169 A1 WO 2023024169A1 CN 2021117360 W CN2021117360 W CN 2021117360W WO 2023024169 A1 WO2023024169 A1 WO 2023024169A1
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- 238000000034 method Methods 0.000 title claims abstract description 30
- 230000000875 corresponding effect Effects 0.000 claims description 73
- 239000010409 thin film Substances 0.000 claims description 41
- 238000001514 detection method Methods 0.000 claims description 20
- 230000002596 correlated effect Effects 0.000 claims description 14
- 238000010586 diagram Methods 0.000 description 10
- 239000004973 liquid crystal related substance Substances 0.000 description 6
- 230000009286 beneficial effect Effects 0.000 description 3
- 230000001276 controlling effect Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000003190 augmentative effect Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000004984 smart glass Substances 0.000 description 1
Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3685—Details of drivers for data electrodes
- G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0233—Improving the luminance or brightness uniformity across the screen
Definitions
- the present invention relates to the field of display technology, in particular to a display panel, a method for driving the display panel, and an electronic device.
- the capacitance and resistance delay of the scanning line will make the voltage of the scanning signal near the end of the gate driving circuit and the voltage of the scanning signal far away from the end of the gate driving circuit big different.
- the charging time of the sub-pixels close to the gate driving circuit is longer than the charging time of the sub-pixels far away from the gate driving circuit, so that the voltage of the sub-pixels close to the gate driving circuit is the same as the voltage of the sub-pixels far away from the gate driving circuit after the charging is completed.
- There are differences in the voltages of the sub-pixels of the electrode driving circuit resulting in the problem of uneven brightness and darkness in the lateral direction of the display panel.
- the existing display panel has the problem of uneven brightness and darkness due to the capacitance and resistance delay of the scanning lines. Therefore, it is necessary to provide a display panel, a method for driving the display panel, and an electronic device to improve this defect.
- Embodiments of the present application provide a display panel, a driving method for the display panel, and an electronic device, which are used to solve the problem of uneven brightness and darkness of the display panel due to capacitance and resistance delay of scanning lines in the existing display panel.
- An embodiment of the present application provides a display panel, including:
- a display area including sub-pixels distributed in multiple rows and columns;
- a gate drive circuit connected to the display area, for outputting scan signals to the corresponding rows of sub-pixels
- the source drive circuit includes a time control unit, the time control unit is used to control the output duration of the data signal output by the source drive circuit to the sub-pixel within one frame time, and the sub-pixel The distance from the gate drive circuit is positively correlated with the output duration.
- the time control unit includes:
- a storage register used to store the set value of the output duration
- the clock generator connected to the storage register, the clock generator is used to generate a clock signal with a corresponding pulse width according to the set value of the output duration;
- a shift register is connected to the clock generator, and the shift register is used to output the data signal with a corresponding pulse width according to the clock signal.
- the time control unit further includes:
- a detection module configured to obtain the turn-on duration of the switching thin film transistors corresponding to the multiple columns of sub-pixels connected to the same source driving circuit in one frame time, and obtain an average open time
- the gear setting module is respectively connected to the detection module and the storage register, and the gear setting module is used to set and select the required Output adjustment gear.
- the average turn-on duration of the switching thin film transistors corresponding to the multiple columns of the sub-pixels within a frame time is obtained.
- the output duration is obtained according to the initial output duration, the effective charging duration, and the average turn-on duration of the source driving circuit outputting the data signal to the sub-pixel within one frame time;
- the output duration adjustment value is the difference between the average turn-on duration and the effective charging duration
- the output duration is the difference between the initial output duration and the output compensation duration
- the output durations of the data signals received by multiple columns of the sub-pixels connected to the same source driving circuit are equal.
- Input registers for receiving and storing display data
- the output buffer circuit is connected to the digital-to-analog converter, and is used to output the data signal converted by the digital-to-analog converter to the sub-pixel.
- the embodiment of the present application also provides an electronic device, including a display panel, and the display panel includes:
- a display area including sub-pixels distributed in multiple rows and columns;
- a gate drive circuit connected to the display area, for outputting scan signals to the corresponding rows of sub-pixels
- the source drive circuit includes a time control unit, the time control unit is used to control the output duration of the data signal output by the source drive circuit to the sub-pixel within one frame time, and the sub-pixel The distance from the gate drive circuit is positively correlated with the output duration.
- the time control unit includes:
- a storage register used to store the set value of the output duration
- the clock generator connected to the storage register, the clock generator is used to generate a clock signal with a corresponding pulse width according to the set value of the output duration;
- a shift register is connected to the clock generator, and the shift register is used to output the data signal with a corresponding pulse width according to the clock signal.
- the time control unit further includes:
- a detection module configured to obtain the turn-on duration of the switching thin film transistors corresponding to the multiple columns of sub-pixels connected to the same source driving circuit within a frame time, and obtain average open time;
- the gear setting module is respectively connected to the detection module and the storage register, and the gear setting module is used to set and select the required Output adjustment gear.
- the detection module obtains an average turn-on duration according to the turn-on duration of each of the switching thin film transistors, specifically including:
- the average turn-on duration of the switching thin film transistors corresponding to the multiple columns of sub-pixels connected to the same source driving circuit within a frame time is obtained.
- the gear position setting module sets and selects the required output adjustment gear according to the number of the source drive circuits and the average turn-on time, which specifically includes:
- the output duration adjustment value is the difference between the average turn-on duration and the effective charging duration
- the output duration is the difference between the initial output duration and the output compensation duration
- the embodiment of the present application also provides a method for driving a display panel, including:
- the distance between the sub-pixel and the gate driving circuit is positively correlated with the output duration, and the distance between the sub-pixel and the gate driving circuit is negatively correlated with the turn-on duration.
- the output duration is obtained according to the initial output duration, the effective charging duration, and the average turn-on duration of the source driving circuit outputting the data signal to the sub-pixel within a frame time.
- the steps to output duration include:
- the driving method of the display panel further includes:
- the output durations of the data signals received by multiple columns of the sub-pixels connected to the same source driving circuit are equal.
- the embodiments of the present application provide a display panel, a method for driving the display panel, and an electronic device, the electronic device includes the display panel, and the method for driving the display panel is used to drive the display panel.
- a panel the display panel includes a display area, a gate drive circuit and a plurality of source drive circuits, the display area includes sub-pixels distributed in multiple rows and columns, and the gate drive circuit is connected to at least one end of the display area,
- the source driving circuit is connected to the display area, and each of the source driving circuits is used to output data signals to the corresponding multiple columns of the sub-pixels.
- the source driving circuit includes a time control unit, and the time control unit for controlling the output duration of the source drive circuit to output the data signal to the sub-pixel within one frame time, the distance between the sub-pixel and the gate drive circuit is positively correlated with the output duration, In this way, the charging time of the sub-pixels close to the gate driving circuit can be reduced, and the charging time far away from the gate driving circuit can be increased, so as to reduce the voltage difference between the sub-pixels close to the gate driving circuit and the sub-pixels far away from the gate driving circuit , thereby improving the problem of uneven brightness and darkness of the display panel in the lateral direction.
- FIG. 3 is a schematic structural diagram of the first time control unit provided in the embodiment of the present application.
- FIG. 4 is a schematic structural diagram of a second time control unit provided in an embodiment of the present application.
- FIG. 5 is a diagram of the relative timing relationship between the scan signal and the data signal provided by the embodiment of the present application.
- FIG. 6 is a schematic flowchart of a method for driving a display panel provided by an embodiment of the present application.
- Embodiments of the present application provide a display panel, a method for driving the display panel, and an electronic device, where the electronic device includes the display panel, and the method for driving the display panel is used to drive the display panel.
- the electronic device can be a vehicle-mounted display terminal, such as a vehicle-mounted display, a driving recorder, etc.
- the electronic device can also be a mobile terminal, such as a smart phone, a tablet computer, a notebook computer, etc., or a wearable terminal, such as a smart watch, Smart bracelets, smart glasses, augmented reality equipment, etc.
- the electronic device can also be a fixed terminal, such as a desktop computer, a TV, etc., or a vehicle-mounted display terminal, such as a vehicle-mounted display or a driving recorder.
- FIG. 1 is a schematic structural diagram of a display panel provided by an embodiment of the present application.
- the display panel 100 includes a display area 10 , a gate driving circuit 20 and a plurality of source driving circuits 30 .
- the display area 10 includes a plurality of sub-pixels distributed in multiple rows and columns, a plurality of scanning lines 110 extending along the first direction x and arranged at intervals in the second direction y, and a plurality of scanning lines 110 extending along the second direction y and For the data lines 120 arranged at intervals in the first direction x, each sub-pixel has a corresponding switching thin film transistor.
- the source driving circuit 30 is connected to the data line 120, and outputs a data signal to each sub-pixel through the data line 120
- the gate driving circuit 20 is connected to the scanning line 110, and is used to control the opening of the switching thin film transistor corresponding to each sub-pixel and off.
- the source driver chip is not limited to be bound on the flexible circuit board, the source driver chip can also be directly bound on the display area 10 or on the printed circuit board.
- the display panel 100 includes two gate drive circuits 20, the two gate drive circuits 20 are respectively arranged at the opposite ends of the display area 10, and the two gate drive circuits 20 simultaneously provide Outputting the scanning signal, thereby reducing the delay and voltage difference between the sub-pixels near the end of the gate driving circuit 20 and the sub-pixels far away from the end of the gate driving circuit 20 receiving the scanning signal, thereby improving the refresh rate of the display panel and improving
- the display panel 100 has a problem of uneven brightness and darkness.
- the display panel 100 may also have only one gate driving circuit 20 , and the gate driving circuit 20 may be disposed on either side of the display area 10 .
- the display panel 100 is a liquid crystal display panel adopting a dual-gate structure, and the drains of the switching thin film transistors corresponding to the sub-pixels in two adjacent columns are connected to the same data line 120, which is relatively
- the two adjacent scanning lines 110 are connected to the gates of the switch thin film transistors corresponding to the sub-pixels in the same row, and the sources of the switch thin film transistors are connected to the sub-pixel electrodes of the sub-pixels.
- the charging time of each row of sub-pixels in the liquid crystal display panel of the double-gate structure is shortened, and the sub-pixels close to the gate driving circuit 20 are There is a difference between the voltage of the pixel and the voltage of the sub-pixels far away from the gate driving circuit 20 , which leads to the problem of uneven brightness and darkness in the display panel 100 .
- FIG. 2 is a schematic structural diagram of the source driving circuit adopted in the embodiment of the present application.
- the source driving circuit 30 also includes a time control unit 31, and the time control unit 31 It is used to control the output duration of the source drive circuit 30 to output the data signal to the sub-pixel within one frame time, and the distance between the sub-pixel and the gate drive circuit is positively correlated with the output duration The distance between the sub-pixel and the gate driving circuit is negatively correlated with the turn-on duration of the switching thin film transistor corresponding to the sub-pixel within one frame time.
- the charging time of the sub-pixels close to the gate driving circuit 20 can be reduced, and the charging time of the sub-pixels far away from the gate driving circuit 20 can be increased, so as to reduce the charging time of the sub-pixels close to the gate driving circuit 20 and the charging time of the sub-pixels far away from the gate driving circuit 20.
- the voltage difference between the sub-pixels of the electrode driving circuit 20 can improve the problem of uneven brightness and darkness in the display panel 100 and improve the display uniformity of the display panel 100 .
- the type of the display panel 100 is not limited to the above-mentioned liquid crystal display panel with a double-gate structure, and the display panel 100 may also adopt a liquid crystal display panel with a conventional structure or a liquid crystal display panel with a tri-gate structure.
- the source driving circuit 30 also includes an input register 32 , a line latch 33 , a digital-to-analog converter 34 and an output buffer circuit 35 .
- FIG. 3 is a schematic structural diagram of the first time control unit provided by the embodiment of the present application.
- the time control unit 31 includes a storage register 311 , a clock generator 312 and a shift register 313 .
- the storage register 311 is used for storing the setting value of the output time of the source driving circuit 30 outputting the data signal.
- the output terminal of the clock generator 312 is connected to the input terminal of the clock generator 312, and the clock generator 312 is used for generating a clock signal with a corresponding pulse width according to the set value of the output duration.
- the input end of the shift register 313 is also connected to the output end of the clock generator 312, the shift register 313 is used to adjust the initial pulse width of the data signal according to the clock signal, and output the same
- the clock signal corresponds to a data signal with a pulse width.
- the process of the detection module 314 obtaining the average turn-on duration according to the turn-on duration of each switching thin film transistor specifically includes: obtaining the maximum turn-on duration and the minimum turn-on duration of the turn-on duration; according to the The maximum turn-on duration and the minimum turn-on duration are used to obtain the average turn-on duration of the switching thin film transistors corresponding to the multiple columns of sub-pixels connected to the same source drive circuit 30 within a frame time, and the average turn-on duration is the maximum The average of the on time and the minimum on time.
- the time control unit further includes a gear setting module 315, which is used to set and select an output adjustment gear according to the number of the source drive circuits and the average turn-on duration .
- the input terminal of the gear position setting module 315 is connected to the output terminal of the detection module 314, and the gear position setting module 315 sets and selects the output terminal according to the number of the source drive circuits and the average turn-on time.
- the process of adjusting gear specifically includes: obtaining the effective charging time required for the sub-pixel to reach the target voltage; according to the initial output time of the source drive circuit 30 outputting the data signal to the sub-pixel within one frame time, The effective charging duration and the average turn-on duration are used to obtain the output duration; according to the number of the source drive circuits 30 and the average turn-on duration corresponding to each of the source drive circuits 30, various output adjustments are set gears and the output duration corresponding to each output adjustment gear.
- the process of obtaining the output duration according to the initial output duration, the effective charging duration, and the average turn-on duration of the source driving circuit outputting the data signal to the sub-pixel within one frame time Specifically including: obtaining the output compensation duration according to the average turn-on duration and the effective charging duration; obtaining the output duration according to the initial output duration and the output compensation duration.
- the initial output duration is the pulse width of the data signal before being adjusted by the time control unit 31 .
- the output duration adjustment value is the difference between the average turn-on duration and the effective charging duration
- the output duration is the difference between the initial output duration and the output compensation duration
- the display panel includes 12 source drive circuits 30 , numbered sequentially as DR 1 , DR 2 . . .
- the distance between DR 1 and DR 12 is the smallest, the average turn-on duration of the switching thin film transistors corresponding to the sub-pixels connected to DR 1 and DR 12 is the largest, the distance between DR 6 and DR 7 and the gate drive circuit 20 is the largest, and the sub-pixels connected to DR 6 and DR 7
- the average turn-on duration of the corresponding switching thin film transistors is the smallest, and the average turn-on duration of the switching thin film transistors gradually decreases from DR 1 to DR 6 , and from DR 12 to DR 7 .
- the output time gear can be set to 6 gears, where the gears of DR 1 and DR 12 are the same, the gears of DR 2 and DR 11 are the same, and so on, the gears of DR 6 and DR 7
- the bits are the same, from DR 1 to DR 6 , and from DR 12 to DR 7 , the setting value of the output duration increases gradually.
- each source driving circuit 30 has a separate gear, and two or more adjacent source driving circuits 30 may also share a gear.
- Step S10 Obtain the turn-on duration of the switching thin film transistors corresponding to multiple columns of sub-pixels connected to the same source driving circuit within one frame time;
- Step S20 adjusting the output duration of the data signal output by the source drive circuit to the sub-pixel within one frame time according to the turn-on duration
- Step S30 outputting the adjusted data signal to the sub-pixel
- the distance between the sub-pixel and the gate driving circuit is positively correlated with the output duration, and the distance between the sub-pixel and the gate driving circuit is negatively correlated with the turn-on duration.
- step S20 includes:
- Step S210 Acquiring the maximum opening duration and the minimum opening duration among the opening durations
- Step S220 According to the maximum on-time and the minimum on-time, obtain the average on-time of the switching thin film transistors corresponding to the multiple columns of the sub-pixels within a frame time;
- Step S230 Obtain the output duration according to the initial output duration, the effective charging duration, and the average turn-on duration of the source driving circuit outputting the data signal to the sub-pixel within one frame time.
- the obtained The step of outputting the duration includes: obtaining the output compensation duration according to the average turn-on duration and the effective charging duration; obtaining the output duration according to the initial output duration and the output compensation duration.
- the output duration adjustment value in the step S230 is the difference between the average turn-on duration and the effective charging duration, and the output duration is the initial output duration and the output compensation duration Difference.
- the driving method of the display panel further includes: setting various output adjustment gears and each of the The output duration corresponding to the output adjustment gear.
- the output durations of the data signals received by multiple columns of the sub-pixels connected to the same source driving circuit are equal.
- the embodiments of the present application provide a display panel, a method for driving the display panel, and an electronic device, the electronic device includes the display panel, and the method for driving the display panel is used to drive the display A panel, the display panel includes a display area, a gate drive circuit and a plurality of source drive circuits, the display area includes sub-pixels distributed in multiple rows and columns, and the gate drive circuit is connected to at least one end of the display area, The source driving circuit is connected to the display area, and each of the source driving circuits is used to output data signals to the corresponding multiple columns of the sub-pixels.
- the source driving circuit includes a time control unit, and the time control unit used to control the output duration of the source drive circuit to output the data signal to the sub-pixel within one frame time, the distance between the sub-pixel and the gate drive circuit is positively correlated with the output duration, In this way, the charging time of the sub-pixels close to the gate driving circuit can be reduced, and the charging time far away from the gate driving circuit can be increased, so as to reduce the voltage difference between the sub-pixels close to the gate driving circuit and the sub-pixels far away from the gate driving circuit , thereby improving the problem of uneven brightness and darkness of the display panel in the lateral direction.
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Abstract
一种显示面板(100)、显示面板(100)的驱动方法及电子装置，电子装置包括显示面板(100)，显示面板(100)包括显示区(10)、源极驱动电路(30)和栅极驱动电路(20)，显示区(10)包括多个子像素，通过减少靠近栅极驱动电路(20)的子像素的充电时间，并增加远离栅极驱动电路(20)的子像素的充电时间，以此减小不同区域子像素的电压差，改善显示面板(100)亮暗不均的问题。
Description
本发明涉及显示技术领域，尤其涉及一种显示面板、显示面板的驱动方法及电子装置。
近年来随着电子技术的发展，手机、平板等移动式显示电子装置已成为人们日常生活中必不可少的社交媒介与信息存储载体。
对于现有大尺寸的电子装置，由于显示面板的横向宽度较大，扫描线的电容电阻延时会使得靠近栅极驱动电路一端的扫描信号的电压与远离栅极驱动电路一端的扫描信号的电压差异较大。在对子像素充电的过程中，靠近栅极驱动电路的子像素的充电时长大于远离栅极驱动电路的子像素的充电时长，使得充电完成后靠近栅极驱动电路的子像素的电压与远离栅极驱动电路的子像素的电压存在差异，导致显示面板在横向方向上出现亮暗不均的问题。
综上所述，现有显示面板存在由于扫描线的电容电阻延时导致显示面板出现亮暗不均的问题。故，有必要提供一种显示面板、显示面板的驱动方法及电子装置来改善这一缺陷。
本申请实施例提供一种显示面板、显示面板的驱动方法及电子装置，用于解决现有显示面板存在的由于扫描线的电容电阻延时导致显示面板出现亮暗不均的问题。
本申请实施例提供一种显示面板，包括：
显示区，包括呈多行和多列分布的子像素；
多个源极驱动电路，连接于所述显示区，每一个所述源极驱动电路用于向对应的多列所述子像素输出数据信号；以及
栅极驱动电路，连接于所述显示区，用于向对应的多行所述子像素输出扫描信号；
其中，所述源极驱动电路包括时间控制单元，所述时间控制单元用于控制所述源极驱动电路在一帧时间内向所述子像素输出的所述数据信号的输出时长，所述子像素与所述栅极驱动电路之间的距离与所述输出时长成正相关。
根据本申请一实施例，所述时间控制单元包括：
存储寄存器，用于存储所述输出时长的设定值；
时钟发生器，连接于所述存储寄存器，所述时钟发生器用于根据所述输出时长的设定值产生相应脉冲宽度的时钟信号；以及
移位寄存器，连接于所述时钟发生器，所述移位寄存器用于根据所述时钟信号输出相应脉冲宽度的所述数据信号。
根据本申请一实施例，所述时间控制单元还包括：
检测模块，用于获取连接于同一所述源极驱动电路的多列所述子像素对应的开关薄膜晶体管在一帧时间的开启时长，并根据各所述开关薄膜晶体管的所述开启时长获得平均开启时长；以及
档位设定模块，分别连接于所述检测模块以及所述存储寄存器，所述档位设定模块用于根据所述源极驱动电路的数量以及所述平均开启时长，设置并选择所需的输出调节档位。
根据本申请一实施例，所述检测模块根据各所述开关薄膜晶体管的所述开启时长获得平均开启时长，具体包括：
获取所述开启时长中的最大开启时长和最小开启时长；以及
根据所述最大开启时长和所述最小开启时长，获得多列所述子像素对应的所述开关薄膜晶体管在一帧时间内的所述平均开启时长。
根据本申请一实施例，所述档位设定模块根据所述源极驱动电路的数量以及所述平均开启时长，设置并选择所需的输出调节档位，具体包括：
获取所述子像素达到目标电压所需的有效充电时长；
根据所述源极驱动电路在一帧时间内向所述子像素输出所述数据信号的初始输出时长、所述有效充电时长以及所述平均开启时长，获得所述输出时长；以及
根据所述源极驱动电路的数量以及各个所述源极驱动电路对应的所述平均开启时长，设置多种输出调节档位和每种所述输出调节档位对应的所述输出时长。
根据本申请一实施例，所述根据所述源极驱动电路在一帧时间内向所述子像素输出所述数据信号的初始输出时长、所述有效充电时长以及所述平均开启时长，获得所述输出时长，具体包括：
根据所述平均开启时长和所述有效充电时长，获得输出补偿时长；以及
根据所述初始输出时长和所述输出补偿时长，获得所述输出时长；
其中，所述输出时长调整值为所述平均开启时长与所述有效充电时长之差，所述输出时长为所述初始输出时长与所述输出补偿时长之差。
根据本申请一实施例，连接于同一所述源极驱动电路的多列所述子像素接收的所述数据信号的所述输出时长相等。
根据本申请一实施例，所述源极驱动电路还包括：
输入寄存器，用于接收并存储显示数据；
线锁存器，分别连接于所述输入寄存器和所述时间控制单元，所述线锁存器用于锁存所述输入寄存器中的所述显示数据；
数模转换器，连接于所述时间控制单元，所述数模转换器用于将数字信号转换为模拟信号；以及
输出缓冲电路，连接于所述数模转换器，用于将经过所述数模转换器转换后的所述数据信号输出至所述子像素。
本申请实施例还提供一种电子装置，包括显示面板，所述显示面板包括：
显示区，包括呈多行和多列分布的子像素；
多个源极驱动电路，连接于所述显示区，每一个所述源极驱动电路用于向对应的多列所述子像素输出数据信号；以及
栅极驱动电路，连接于所述显示区，用于向对应的多行所述子像素输出扫描信号；
其中，所述源极驱动电路包括时间控制单元，所述时间控制单元用于控制所述源极驱动电路在一帧时间内向所述子像素输出的所述数据信号的输出时长，所述子像素与所述栅极驱动电路之间的距离与所述输出时长成正相关。
根据本申请一实施例，所述时间控制单元包括：
存储寄存器，用于存储所述输出时长的设定值；
时钟发生器，连接于所述存储寄存器，所述时钟发生器用于根据所述输出时长的设定值产生相应脉冲宽度的时钟信号；以及
移位寄存器，连接于所述时钟发生器，所述移位寄存器用于根据所述时钟信号输出相应脉冲宽度的所述数据信号。
根据本申请一实施例，所述时间控制单元还包括：
检测模块，用于获取连接于同一所述源极驱动电路的多列所述子像素对应的开关薄膜晶体管在一帧时间内的开启时长，并根据各所述开关薄膜晶体管的所述开启时长获得平均开启时长；以及
档位设定模块，分别连接于所述检测模块以及所述存储寄存器，所述档位设定模块用于根据所述源极驱动电路的数量以及所述平均开启时长，设置并选择所需的输出调节档位。
根据本申请一实施例，所述检测模块根据各所述开关薄膜晶体管的所述开启时长获得平均开启时长，具体包括：
获取所述开启时长中的最大开启时长和最小开启时长；以及
根据所述最大开启时长和所述最小开启时长，获得连接于同一所述源极驱动电路的多列所述子像素对应的所述开关薄膜晶体管在一帧时间内的所述平均开启时长。
根据本申请一实施例，所述档位设定模块根据所述源极驱动电路的数量以及所述平均开启时长，设置并选择所需的输出调节档位，具体包括：
获取所述子像素达到目标电压所需的有效充电时长；
根据所述源极驱动电路在一帧时间内向所述子像素输出所述数据信号的初始输出时长、所述有效充电时长以及所述平均开启时长，获得所述输出时长；以及
根据所述源极驱动电路的数量以及各个所述源极驱动电路对应的所述平均开启时长，设置多种输出调节档位和每种所述输出调节档位对应的所述输出时长。
根据本申请一实施例，所述根据所述源极驱动电路在一帧时间内向所述子像素输出所述数据信号的初始输出时长、所述有效充电时长以及所述平均开启时长，获得所述输出时长，具体包括：
根据所述平均开启时长和所述有效充电时长，获得输出补偿时长；以及
根据所述初始输出时长和所述输出补偿时长，获得所述输出时长；
其中，所述输出时长调整值为所述平均开启时长与所述有效充电时长之差，所述输出时长为所述初始输出时长与所述输出补偿时长之差。
根据本申请一实施例，连接于同一所述源极驱动电路的多列所述子像素接收的所述数据信号的所述输出时长相等。
本申请实施例还提供一种显示面板的驱动方法，包括：
获取连接于同一源极驱动电路的多列子像素对应的开关薄膜晶体管在一帧时间内的开启时长；
根据所述开启时长调整所述源极驱动电路在一帧时间内向所述子像素输出的数据信号的输出时长；以及
将调整后的所述数据信号输出至所述子像素；
其中，所述子像素与栅极驱动电路之间的距离与所述输出时长成正相关，所述子像素与所述栅极驱动电路之间的距离与所述开启时长成负相关。
根据本申请一实施例，所述根据所述开启时长调整所述源极驱动电路在一帧时间内向所述子像素输出的数据信号的输出时长的步骤包括：
获取所述开启时长中的最大开启时长和最小开启时长；
根据所述最大开启时长和所述最小开启时长，获得多列所述子像素对应的所述开关薄膜晶体管在一帧时间内的所述平均开启时长；
根据所述源极驱动电路在一帧时间内向所述子像素输出所述数据信号的初始输出时长、所述有效充电时长以及所述平均开启时长，获得所述输出时长。
根据本申请一实施例，所述根据所述源极驱动电路在一帧时间内向所述子像素输出所述数据信号的初始输出时长、所述有效充电时长以及所述平均开启时长，获得所述输出时长的步骤包括：
根据所述平均开启时长和所述有效充电时长，获得输出补偿时长；以及
根据所述初始输出时长和所述输出补偿时长，获得所述输出时长；
其中，所述输出时长调整值为所述平均开启时长与所述有效充电时长之差，所述输出时长为所述初始输出时长与所述输出补偿时长之差。
根据本申请一实施例，所述显示面板的驱动方法还包括：
根据所述源极驱动电路的数量以及各个所述源极驱动电路对应的所述平均开启时长，设置多种输出调节档位和每种所述输出调节档位对应的所述输出时长。
根据本申请一实施例，连接于同一所述源极驱动电路的多列所述子像素接收的所述数据信号的所述输出时长相等。
本揭示实施例的有益效果：本申请实施例提供一种显示面板、显示面板的驱动方法及电子装置，所述电子装置包括所述显示面板，所述显示面板的驱动方法用于驱动所述显示面板，所述显示面板包括显示区、栅极驱动电路以及多个源极驱动电路，显示区包括呈多行和多列分布的子像素，栅极驱动电路连接于所述显示区的至少一端，源极驱动电路连接于所述显示区，每一个所述源极驱动电路用于向对应的多列所述子像素输出数据信号，所述源极驱动电路包括时间控制单元，所述时间控制单元用于控制所述源极驱动电路在一帧时间内向所述子像素输出所述数据信号的输出时长，所述子像素与所述栅极驱动电路之间的距离与所述输出时长成正相关，如此可以使得靠近栅极驱动电路的子像素的充电时间减少，远离栅极驱动电路的充电时间增加，以此减小靠近栅极驱动电路的子像素与远离栅极驱动电路的子像素的电压差，从而改善显示面板在横向方向上出现的亮暗不均的问题。
为了更清楚地说明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单介绍，显而易见地，下面描述中的附图仅仅是揭示的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本申请实施例提供的显示面板的结构示意图；
图2为本申请实施例提供的源极驱动电路的结构示意图；
图3为本申请实施例提供的第一种时间控制单元的结构示意图；
图4为本申请实施例提供的第二种时间控制单元的结构示意图；
图5为本申请实施例提供的扫描信号与数据信号的相对时序关系图；
图6为本申请实施例提供的显示面板的驱动方法的流程示意图。
以下各实施例的说明是参考附加的图示，用以例示本揭示可用以实施的特定实施例。本揭示所提到的方向用语，例如[上]、[下]、[前]、[后]、[左]、[右]、[内]、[外]、[侧面]等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本揭示，而非用以限制本揭示。在图中，结构相似的单元是用以相同标号表示。
下面结合附图和具体实施例对本揭示做进一步的说明：
本申请实施例提供一种显示面板、显示面板的驱动方法及电子装置，所述电子装置包括所述显示面板，所述显示面板的驱动方法用于驱动所述显示面板。
所述电子装置可以车载显示终端，例如车载显示器、行车记录仪等，所述电子装置也可以是移动终端，例如智能手机、平板电脑、笔记本电脑等，或者是可穿戴式终端，例如智能手表、智能手环、智能眼镜、增强现实设备等，所述电子装置还可以是固定终端，如台式电脑、电视等，也可以是车载显示终端，如车载显示器或行车记录仪等。
如图1所示，图1为本申请实施例提供的显示面板的结构示意图，所述显示面板100包括显示区10、栅极驱动电路20以及多个源极驱动电路30。
所述显示区10包括呈多行和多列分布的多个子像素、多条沿第一方向x延伸并在第二方向y上间隔设置的扫描线110，以及多条沿第二方向y延伸并在第一方向x上间隔设置的数据线120，每一个子像素具有一个对应的开关薄膜晶体管。源极驱动电路30连接于所述数据线120，并通过数据线120向各子像素输出数据信号，栅极驱动电路20连接于扫描线110，用于控制各子像素对应的开关薄膜晶体管的开启和关闭。
在本申请实施例中，每一个源极驱动电路30都是一个源极驱动芯片，源极驱动芯片可以绑定在柔性电路板上，柔性电路板分别与显示区10和控制板40连接，控制板40与时序控制器50连接。
在实际应用中，源极驱动芯片不仅限绑定于所述柔性电路板上，源极驱动芯片也可以直接绑定在显示区10或者绑定于印刷电路板上。
在本申请实施例中，所述显示面板100包括两个栅极驱动电路20，两个栅极驱动电路20分别设置于显示区10的相对端，两个栅极驱动电路20同时向显示区10输出扫描信号，以此减小靠近栅极驱动电路20一端的子像素与远离栅极驱动电路20一端的子像素接收到扫描信号的延迟和电压差，从而可以提高显示面板的刷新率，并改善显示面板100的显示亮暗不均的问题。
在实际应用中，所述显示面板100也可以仅具有一个栅极驱动电路20，该栅极驱动电路20可以设置于显示区10的左右任意一侧。
在本申请实施例中，所述显示面板100为采用双栅极（dual-gate）架构的液晶显示面板，相邻两列子像素对应的开关薄膜晶体管的漏极连接于同一条数据线120，相邻两条扫描线110连接于同一行子像素对应的开关薄膜晶体管的栅极，所述开关薄膜晶体管的源极连接于所述子像素的子像素电极。通过扫描线110分时的控制子像素对应的开关薄膜晶体管的开启和关闭，实现一条数据线120分时驱动相邻两列子像素，如此可以缩小源极驱动电路30所占用的面积或减少源极驱动电路30的数量。
相较于传统单栅极架构的液晶显示面板，双栅极架构的液晶显示面板中每行子像素的充电时间缩短，由于扫描线110的电容电阻延迟导致，使得靠近栅极驱动电路20的子像素的电压与远离栅极驱动电路20的子像素的电压存在差异，导致显示面板100容易出现亮暗不均的问题。
在本申请实施例中，如图2所示，图2为本申请实施例通过的源极驱动电路的结构示意图，所述源极驱动电路30还包括时间控制单元31，所述时间控制单元31用于控制所述源极驱动电路30在一帧时间内向所述子像素输出所述数据信号的输出时长，所述子像素与所述栅极驱动电路之间的距离与所述输出时长成正相关，所述子像素与所述栅极驱动电路之间的距离与所述子像素对应的开关薄膜晶体管在一帧时间内的开启时长成负相关。如此，可以减小靠近栅极驱动电路20的子像素的充电时间，并增大远离栅极驱动电路20的子像素的充电时间，以此减小靠近栅极驱动电路20的子像素与远离栅极驱动电路20的子像素的电压差，从而改善显示面板100存在的亮暗不均的问题，提高显示面板100的显示均一性。
在实际应用中，显示面板100的种类不仅限于上述的双栅极架构的液晶显示面板，显示面板100也可以采用常规架构的液晶显示面板或三栅极（tri-gate）架构的液晶显示面板。
进一步的，所述源极驱动电路30还包括输入寄存器32、线锁存器33、数模转换器34和输出缓冲电路35。
所述输入寄存器32用于接收并存储由时序控制器50输出至所述源极驱动电路30的显示数据。所述线锁存器33的输入端连接于所述输入寄存器32的输出端，所述线锁存器33用于锁存所述输入寄存器32中的显示数据。
所述线锁存器33的输出端连接于所述时间控制单元31的输入端，以将所述显示数据传递至所述时间控制单元。
所述数模转换器34的输入端连接于所述时间控制单元31的输出端，以接收由时间控制单元31调整后的数据信号，所述数模转换器34用于将所述时间控制单元31输出的数据信号转换为模拟信号。
所述数模转换器34的输出端连接于所述输出缓冲电路35的输入端，所述输出缓冲电路35用于将经过所述数模转换器34转换后的数据信号输出至各个子像素。
进一步的，如图3所示，图3为本申请实施例提供的第一种时间控制单元的结构示意图，所述时间控制单元31包括存储寄存器311、时钟发生器312和移位寄存器313。
所述存储寄存器311用于存储所述源极驱动电路30输出所述数据信号的输出时间的设定值。
所述时钟发生器312的输出端连接于所述时钟发生器312的输入端，所述时钟发生器312用于根据所述输出时长的设定值产生相应脉冲宽度的时钟信号。
所述移位寄存器313的输入端连接于所述线锁存器33，以接收由线锁存器33输出至所述移位寄存器313的数据信号，此时所述数据信号具有初始脉冲宽度。
所述移位寄存器313的输入端还连接于所述时钟发生器312的输出端，所述移位寄存器313用于根据所述时钟信号对所述数据信号的初始脉冲宽度进行调整，并输出与所述时钟信号相应脉冲宽度的数据信号。
进一步的，如图4所示，图4为本申请实施例提供的第二种时间控制单元的结构示意图，所述时间控制单元31还包括检测模块314，所述检测模块314用于获取连接于同一所述源极驱动电路的多列所述子像素对应的开关薄膜晶体管在一帧时间内的开启时长，并根据各所述开关薄膜晶体管的所述开启时长获得平均开启时长。
在一实施例中，所述检测模块314根据各所述开关薄膜晶体管的所述开启时长获得平均开启时长的过程具体包括：获取所述开启时长中的最大开启时长和最小开启时长；根据所述最大开启时长和最小开启时长，获得连接于同一所述源极驱动电路30的多列所述子像素对应的所述开关薄膜晶体管在一帧时间内的平均开启时长，所述平均开启时长为最大开启时长和最小开启时长的平均值。
在实际应用中，可以仅获取连接于同一源极驱动电路30的多列子像素中的第一列和最后一列子像素对应的开关薄膜晶体管的开启时长，并将第一列和最后第一列子像素对应的开关薄膜晶体管的开启时长作为最大开启时长和最小开启时长。
在一实施例中，也可以通过检测模块314获取连接于同一所述源极驱动电路30的多列子像素对应的薄膜晶体管的开启时长，并将各列子像素对应的薄膜晶体管的开启时长累加，将累加后的总开启时长除以连接于同一所述源极驱动电路的子像素的列数，从而可以得到平均开启时长。
在一实施例中，时间控制电源31也可以不包含检测模块314，而是通过外部检测设备直接检测并获取连接于同一所述源极驱动电路的多列所述子像素对应的开关薄膜晶体管的开启时长，并根据各所述开关薄膜晶体管的所述开启时长获得平均开启时长，再根据源极驱动电路30对应的平均开启时长，通过输入不同的输出时长的值，以获得能够使显示效果达到最佳的输出时长的值，并将该输出时长的设定值存储至存储寄存器311中。该输出时长的设定值为固定值，在日常使用过程中不会自动发生能改变，但是该输出时长的设定值可以根据需求通过电子装置自身的软件或外接设备来调节。
进一步的，所述时间控制单元还包括档位设定模块315，所述档位设定模块315用于根据所述源极驱动电路的数量以及所述平均开启时长，设置并选择输出调节档位。
所述档位设定模块315的输入端连接于所述检测模块314的输出端，所述档位设定模块315根据所述源极驱动电路的数量以及所述平均开启时长，设置并选择输出调节档位的过程具体包括：获取所述子像素达到目标电压所需的有效充电时长；根据所述源极驱动电路30在一帧时间内向所述子像素输出所述数据信号的初始输出时长、所述有效充电时长以及所述平均开启时长，获得所述输出时长；根据所述源极驱动电路30的数量以及各个所述源极驱动电路30对应的所述平均开启时长，设置多种输出调节档位和每种所述输出调节档位对应的所述输出时长。
进一步的，所述根据所述源极驱动电路在一帧时间内向所述子像素输出所述数据信号的初始输出时长、所述有效充电时长以及所述平均开启时长，获得所述输出时长的过程具体包括：根据所述平均开启时长和所述有效充电时长，获得输出补偿时长；根据所述初始输出时长和所述输出补偿时长，获得所述输出时长。需要说明的是，初始输出时长为数据信号在未经过时间控制单元31调整之前的脉冲宽度。
在本实施例中，所述输出时长调整值为所述平均开启时长与所述有效充电时长之差，所述输出时长为所述初始输出时长与所述输出补偿时长之差，其公式可以为：T
1=T
0-(T
2-T
3)，其中T
0为初始输出时长，T
1为输出时长，T
2为平均开启时长，T
3为有效充电时长之差。
在一实施例中，如图1所示，所述显示面板包括12个源极驱动电路30，编号依次为DR
1、DR
2……DR
12，其中DR
1和DR
12与栅极驱动电路20的距离最小，DR
1和DR
12所连接的子像素对应的开关薄膜晶体管的平均开启时长最大，DR
6和DR
7距离栅极驱动电路20的距离最大，DR
6和DR
7所连接的子像素对应的开关薄膜晶体管的平均开启时长最小，由DR
1至DR
6、以及DR
12至DR
7，开关薄膜晶体管的平均开启时长逐渐减小。
可以在输出调节档位中将输出时间的档位设置为6档，其中DR
1与DR
12的档位相同、DR
2与DR
11的档位相同，以此类推，DR
6与DR
7的档位相同，由DR
1至DR
6、以及DR
12至DR
7，输出时长的设定值逐渐增大。在实际应用中，并不要求每一个源极驱动电路30都具有一个单独的档位，相邻两个或多个源极驱动电路30也可以共用一个档位。
如图5所示，图5为本申请实施例提供的扫描信号与数据信号的相对时序关系图。在一实施例中，设定源极驱动电路30的初始输出时长T
0为2μs，经测得DR
1和DR
12对应的开关薄膜晶体管的平均开启时长T
2均为1.7μs，有效充电时长T
3为1.5μs，可以得出DR
1的输出时长T
1为1.8μs。DR
6对应的开关薄膜晶体管的平均开启时长T
2均为1.2μs，有效充电时长T
3为1.5μs，可以得出DR
6的输出时长T
1为2.3μs，如此可以在原有初始输出时长的基础上，减小DR1的输出时长，并增大DR6的输出时长，以此使DR1和DR6对应的子像素均能够在相近的充电时间内达到目标电压，并且降低DR1连接的子像素与DR6连接的子像素之间的电压差，从而改善显示面板的亮暗不均的问题。
需要说明的是图4中仅示意DR
1、DR
6以及DR
7对应的扫描信号与数据信号的相对时序关系，其他源极驱动电路的对应的扫描信号与数据信号的相对时序关系可参考图4，此处不再赘述。
档位设定模块315的输出端连接于所述存储寄存器311的输入端，存储寄存器311可将档位设定模块315设定的多种输出调节档位和每种输出调节档位对应的输出时长的设定值进行存储。在显示面板及电子装置工作的过程中，可通过检测模块314检测源极驱动电路30对应的开关薄膜晶体管的平均开启时长，档位设定模块315根据该平均开启时长选择相应的档位，并控制存储寄存器311向时钟发生器312输出与该档位相应的输出时长的设定值。
如图6所示，图6为本申请实施例提供的显示面板的驱动方法的流程示意图，所述显示面板的驱动方法用于驱动上述实施例所提供的显示面板，所述显示面板的驱动方法包括：
步骤S10：获取连接于同一源极驱动电路的多列子像素对应的开关薄膜晶体管在一帧时间内的开启时长；
步骤S20：根据所述开启时长调整所述源极驱动电路在一帧时间内向所述子像素输出的数据信号的输出时长；以及
步骤S30将调整后的所述数据信号输出至所述子像素；
其中，所述子像素与栅极驱动电路之间的距离与所述输出时长成正相关，所述子像素与所述栅极驱动电路之间的距离与所述开启时长成负相关。
进一步的，步骤S20中所述根据所述开启时长调整所述源极驱动电路在一帧时间内向所述子像素输出的数据信号的输出时长的步骤包括：
步骤S210：获取所述开启时长中的最大开启时长和最小开启时长；
步骤S220：根据所述最大开启时长和所述最小开启时长，获得多列所述子像素对应的所述开关薄膜晶体管在一帧时间内的所述平均开启时长；以及
步骤S230：根据所述源极驱动电路在一帧时间内向所述子像素输出所述数据信号的初始输出时长、所述有效充电时长以及所述平均开启时长，获得所述输出时长。
进一步的，所述步骤S230中所述根据所述源极驱动电路在一帧时间内向所述子像素输出所述数据信号的初始输出时长、所述有效充电时长以及所述平均开启时长，获得所述输出时长的步骤包括：根据所述平均开启时长和所述有效充电时长，获得输出补偿时长；根据所述初始输出时长和所述输出补偿时长，获得所述输出时长。
在本申请实施例中，所述步骤S230中的所述输出时长调整值为所述平均开启时长与所述有效充电时长之差，所述输出时长为所述初始输出时长与所述输出补偿时长之差。
进一步的，所述显示面板的驱动方法还包括：根据所述源极驱动电路的数量以及各个所述源极驱动电路对应的所述平均开启时长，设置多种输出调节档位和每种所述输出调节档位对应的所述输出时长。
在本申请实施例中，连接于同一所述源极驱动电路的多列所述子像素接收的所述数据信号的所述输出时长相等。
本申请实施例的有益效果：本申请实施例提供一种显示面板、显示面板的驱动方法及电子装置，所述电子装置包括所述显示面板，所述显示面板的驱动方法用于驱动所述显示面板，所述显示面板包括显示区、栅极驱动电路以及多个源极驱动电路，显示区包括呈多行和多列分布的子像素，栅极驱动电路连接于所述显示区的至少一端，源极驱动电路连接于所述显示区，每一个所述源极驱动电路用于向对应的多列所述子像素输出数据信号，所述源极驱动电路包括时间控制单元，所述时间控制单元用于控制所述源极驱动电路在一帧时间内向所述子像素输出所述数据信号的输出时长，所述子像素与所述栅极驱动电路之间的距离与所述输出时长成正相关，如此可以使得靠近栅极驱动电路的子像素的充电时间减少，远离栅极驱动电路的充电时间增加，以此减小靠近栅极驱动电路的子像素与远离栅极驱动电路的子像素的电压差，从而改善显示面板在横向方向上出现的亮暗不均的问题。
综上所述，虽然本申请以优选实施例揭露如上，但上述优选实施例并非用以限制本申请，本领域的普通技术人员，在不脱离本申请的精神和范围内，均可作各种更动与润饰，因此本申请的保护范围以权利要求界定的范围为基准。
Claims (20)
- 一种显示面板，包括：显示区，包括呈多行和多列分布的子像素；多个源极驱动电路，连接于所述显示区，每一个所述源极驱动电路用于向对应的多列所述子像素输出数据信号；以及栅极驱动电路，连接于所述显示区，用于向对应的多行所述子像素输出扫描信号；其中，所述源极驱动电路包括时间控制单元，所述时间控制单元用于控制所述源极驱动电路在一帧时间内向所述子像素输出的所述数据信号的输出时长，所述子像素与所述栅极驱动电路之间的距离与所述输出时长成正相关。
- 如权利要求1所述的显示面板，其中，所述时间控制单元包括：存储寄存器，用于存储所述输出时长的设定值；时钟发生器，连接于所述存储寄存器，所述时钟发生器用于根据所述输出时长的设定值产生相应脉冲宽度的时钟信号；以及移位寄存器，连接于所述时钟发生器，所述移位寄存器用于根据所述时钟信号输出相应脉冲宽度的所述数据信号。
- 如权利要求2所述的显示面板，其中，所述时间控制单元还包括：检测模块，用于获取连接于同一所述源极驱动电路的多列所述子像素对应的开关薄膜晶体管在一帧时间内的开启时长，并根据各所述开关薄膜晶体管的所述开启时长获得平均开启时长；以及档位设定模块，分别连接于所述检测模块以及所述存储寄存器，所述档位设定模块用于根据所述源极驱动电路的数量以及所述平均开启时长，设置并选择所需的输出调节档位。
- 如权利要求3所述的显示面板，其中，所述检测模块根据各所述开关薄膜晶体管的所述开启时长获得平均开启时长，具体包括：获取所述开启时长中的最大开启时长和最小开启时长；以及根据所述最大开启时长和所述最小开启时长，获得连接于同一所述源极驱动电路的多列所述子像素对应的所述开关薄膜晶体管在一帧时间内的所述平均开启时长。
- 如权利要求4所述的显示面板，其中，所述档位设定模块根据所述源极驱动电路的数量以及所述平均开启时长，设置并选择所需的输出调节档位，具体包括：获取所述子像素达到目标电压所需的有效充电时长；根据所述源极驱动电路在一帧时间内向所述子像素输出所述数据信号的初始输出时长、所述有效充电时长以及所述平均开启时长，获得所述输出时长；以及根据所述源极驱动电路的数量以及各个所述源极驱动电路对应的所述平均开启时长，设置多种输出调节档位和每种所述输出调节档位对应的所述输出时长。
- 如权利要求5所述的显示面板，其中，所述根据所述源极驱动电路在一帧时间内向所述子像素输出所述数据信号的初始输出时长、所述有效充电时长以及所述平均开启时长，获得所述输出时长，具体包括：根据所述平均开启时长和所述有效充电时长，获得输出补偿时长；以及根据所述初始输出时长和所述输出补偿时长，获得所述输出时长；其中，所述输出时长调整值为所述平均开启时长与所述有效充电时长之差，所述输出时长为所述初始输出时长与所述输出补偿时长之差。
- 如权利要求1所述的显示面板，其中，连接于同一所述源极驱动电路的多列所述子像素接收的所述数据信号的所述输出时长相等。
- 如权利要求1所述的显示面板，其中，所述源极驱动电路还包括：输入寄存器，用于接收并存储显示数据；线锁存器，分别连接于所述输入寄存器和所述时间控制单元，所述线锁存器用于锁存所述输入寄存器中的所述显示数据；数模转换器，连接于所述时间控制单元，所述数模转换器用于将数字信号转换为模拟信号；以及输出缓冲电路，连接于所述数模转换器，用于将经过所述数模转换器转换后的所述数据信号输出至所述子像素。
- 一种电子装置，包括显示面板，所述显示面板包括：显示区，包括呈多行和多列分布的子像素；多个源极驱动电路，连接于所述显示区，每一个所述源极驱动电路用于向对应的多列所述子像素输出数据信号；以及栅极驱动电路，连接于所述显示区，用于向对应的多行所述子像素输出扫描信号；其中，所述源极驱动电路包括时间控制单元，所述时间控制单元用于控制所述源极驱动电路在一帧时间内向所述子像素输出的所述数据信号的输出时长，所述子像素与所述栅极驱动电路之间的距离与所述输出时长成正相关。
- 如权利要求9所述的电子装置，其中，所述时间控制单元包括：存储寄存器，用于存储所述输出时长的设定值；时钟发生器，连接于所述存储寄存器，所述时钟发生器用于根据所述输出时长的设定值产生相应脉冲宽度的时钟信号；以及移位寄存器，连接于所述时钟发生器，所述移位寄存器用于根据所述时钟信号输出相应脉冲宽度的所述数据信号。
- 如权利要求10所述的电子装置，其中，所述时间控制单元还包括：检测模块，用于获取连接于同一所述源极驱动电路的多列所述子像素对应的开关薄膜晶体管在一帧时间内的开启时长，并根据各所述开关薄膜晶体管的所述开启时长获得平均开启时长；以及档位设定模块，分别连接于所述检测模块以及所述存储寄存器，所述档位设定模块用于根据所述源极驱动电路的数量以及所述平均开启时长，设置并选择所需的输出调节档位。
- 如权利要求11所述的电子装置，其中，所述检测模块根据各所述开关薄膜晶体管的所述开启时长获得平均开启时长，具体包括：获取所述开启时长中的最大开启时长和最小开启时长；以及根据所述最大开启时长和所述最小开启时长，获得连接于同一所述源极驱动电路的多列所述子像素对应的所述开关薄膜晶体管在一帧时间内的所述平均开启时长。
- 如权利要求12所述的电子装置，其中，所述档位设定模块根据所述源极驱动电路的数量以及所述平均开启时长，设置并选择所需的输出调节档位，具体包括：获取所述子像素达到目标电压所需的有效充电时长；根据所述源极驱动电路在一帧时间内向所述子像素输出所述数据信号的初始输出时长、所述有效充电时长以及所述平均开启时长，获得所述输出时长；以及根据所述源极驱动电路的数量以及各个所述源极驱动电路对应的所述平均开启时长，设置多种输出调节档位和每种所述输出调节档位对应的所述输出时长。
- 如权利要求13所述的电子装置，其中，所述根据所述源极驱动电路在一帧时间内向所述子像素输出所述数据信号的初始输出时长、所述有效充电时长以及所述平均开启时长，获得所述输出时长，具体包括：根据所述平均开启时长和所述有效充电时长，获得输出补偿时长；以及根据所述初始输出时长和所述输出补偿时长，获得所述输出时长；其中，所述输出时长调整值为所述平均开启时长与所述有效充电时长之差，所述输出时长为所述初始输出时长与所述输出补偿时长之差。
- 如权利要求9所述的电子装置，其中，连接于同一所述源极驱动电路的多列所述子像素接收的所述数据信号的所述输出时长相等。
- 一种显示面板的驱动方法，包括：获取连接于同一源极驱动电路的多列子像素对应的开关薄膜晶体管在一帧时间内的开启时长；根据所述开启时长调整所述源极驱动电路在一帧时间内向所述子像素输出的数据信号的输出时长；以及将调整后的所述数据信号输出至所述子像素；其中，所述子像素与栅极驱动电路之间的距离与所述输出时长成正相关，所述子像素与所述栅极驱动电路之间的距离与所述开启时长成负相关。
- 如权利要求16所述的显示面板的驱动方法，其中，所述根据所述开启时长调整所述源极驱动电路在一帧时间内向所述子像素输出的数据信号的输出时长的步骤包括：获取所述开启时长中的最大开启时长和最小开启时长；根据所述最大开启时长和所述最小开启时长，获得多列所述子像素对应的所述开关薄膜晶体管在一帧时间内的所述平均开启时长；以及根据所述源极驱动电路在一帧时间内向所述子像素输出所述数据信号的初始输出时长、所述有效充电时长以及所述平均开启时长，获得所述输出时长。
- 如权利要求17所述的显示面板的驱动方法，其中，所述根据所述源极驱动电路在一帧时间内向所述子像素输出所述数据信号的初始输出时长、所述有效充电时长以及所述平均开启时长，获得所述输出时长的步骤包括：根据所述平均开启时长和所述有效充电时长，获得输出补偿时长；以及根据所述初始输出时长和所述输出补偿时长，获得所述输出时长；其中，所述输出时长调整值为所述平均开启时长与所述有效充电时长之差，所述输出时长为所述初始输出时长与所述输出补偿时长之差。
- 如权利要求17所述的显示面板的驱动方法，其中，所述显示面板的驱动方法还包括：根据所述源极驱动电路的数量以及各个所述源极驱动电路对应的所述平均开启时长，设置多种输出调节档位和每种所述输出调节档位对应的所述输出时长。
- 如权利要求17所述的显示面板的驱动方法，其中，连接于同一所述源极驱动电路的多列所述子像素接收的所述数据信号的所述输出时长相等。
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106205540A (zh) * | 2016-08-31 | 2016-12-07 | 深圳市华星光电技术有限公司 | 改善显示亮度均一性的液晶显示面板与液晶显示器 |
| US20190035349A1 (en) * | 2017-07-31 | 2019-01-31 | Lg Display Co., Ltd. | Liquid crystal display device and method of driving the same |
| CN109473055A (zh) * | 2018-12-11 | 2019-03-15 | 深圳市华星光电半导体显示技术有限公司 | 显示装置及其驱动方法 |
| CN109473075A (zh) * | 2018-12-14 | 2019-03-15 | 深圳市华星光电技术有限公司 | 显示面板的驱动方法及驱动装置 |
| CN109559703A (zh) * | 2019-01-14 | 2019-04-02 | 惠科股份有限公司 | 驱动电路、显示装置及驱动方法 |
| CN110322856A (zh) * | 2019-07-18 | 2019-10-11 | 深圳市华星光电半导体显示技术有限公司 | 一种液晶显示面板及其驱动方法 |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104361878B (zh) * | 2014-12-10 | 2017-01-18 | 京东方科技集团股份有限公司 | 一种显示面板、其驱动方法及显示装置 |
| CN107045858B (zh) * | 2016-12-02 | 2020-05-01 | 厦门天马微电子有限公司 | 一种液晶显示面板的驱动方法及液晶显示面板 |
| CN107665686A (zh) * | 2017-10-19 | 2018-02-06 | 京东方科技集团股份有限公司 | 一种驱动方法、驱动装置及显示装置 |
| CN109614014B (zh) * | 2019-02-12 | 2022-04-19 | 合肥京东方光电科技有限公司 | 像素单元的驱动方法、触控显示器及触控显示驱动电路 |
| CN112669755B (zh) * | 2020-12-30 | 2022-06-10 | Tcl华星光电技术有限公司 | 显示装置的信号延时调整装置 |
| CN113077744B (zh) * | 2021-03-22 | 2022-07-12 | Tcl华星光电技术有限公司 | 像素充电时长的调整方法、时序控制器及显示装置 |
-
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Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106205540A (zh) * | 2016-08-31 | 2016-12-07 | 深圳市华星光电技术有限公司 | 改善显示亮度均一性的液晶显示面板与液晶显示器 |
| US20190035349A1 (en) * | 2017-07-31 | 2019-01-31 | Lg Display Co., Ltd. | Liquid crystal display device and method of driving the same |
| CN109473055A (zh) * | 2018-12-11 | 2019-03-15 | 深圳市华星光电半导体显示技术有限公司 | 显示装置及其驱动方法 |
| CN109473075A (zh) * | 2018-12-14 | 2019-03-15 | 深圳市华星光电技术有限公司 | 显示面板的驱动方法及驱动装置 |
| CN109559703A (zh) * | 2019-01-14 | 2019-04-02 | 惠科股份有限公司 | 驱动电路、显示装置及驱动方法 |
| CN110322856A (zh) * | 2019-07-18 | 2019-10-11 | 深圳市华星光电半导体显示技术有限公司 | 一种液晶显示面板及其驱动方法 |
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