WO2022266921A1 - 触控基板、显示装置及显示*** - Google Patents

触控基板、显示装置及显示*** Download PDF

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Publication number
WO2022266921A1
WO2022266921A1 PCT/CN2021/102024 CN2021102024W WO2022266921A1 WO 2022266921 A1 WO2022266921 A1 WO 2022266921A1 CN 2021102024 W CN2021102024 W CN 2021102024W WO 2022266921 A1 WO2022266921 A1 WO 2022266921A1
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WIPO (PCT)
Prior art keywords
transistor
electrically connected
signal terminal
touch
shift register
Prior art date
Application number
PCT/CN2021/102024
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English (en)
French (fr)
Inventor
蔡寿金
李成
车春城
刘锋
李田生
周琳
张洁
程锦
刘自然
王迎姿
Original Assignee
京东方科技集团股份有限公司
北京京东方传感技术有限公司
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Application filed by 京东方科技集团股份有限公司, 北京京东方传感技术有限公司 filed Critical 京东方科技集团股份有限公司
Priority to CN202180001600.8A priority Critical patent/CN116888570A/zh
Priority to PCT/CN2021/102024 priority patent/WO2022266921A1/zh
Publication of WO2022266921A1 publication Critical patent/WO2022266921A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/042—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by opto-electronic means
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals

Definitions

  • the present disclosure relates to the field of display technology, in particular to a touch substrate, a display device and a display system.
  • H2H Human to Human
  • H2M Human to Machine
  • M2M Object to Machine
  • the Internet of Things came into being in this context, and it is considered to be the third wave of the world's information industry after computers and the Internet.
  • the Internet of Things adopts information technology to promote the comprehensive upgrading of human life and production services. Its application development has broad prospects and strong industrial driving capabilities. European and American countries have incorporated the development of the Internet of Things into the overall informatization strategy, and my country has also clearly incorporated the Internet of Things into the national medium and long-term science and technology development plan (2006-2020) and the national industrial roadmap for 2050.
  • human-computer interaction is particularly important. It is not only the architecture foundation of the Internet of Things, but also the ultimate goal of the Internet of Things. Communicate with the system through the human-computer interface and operate it. Things as small as the play button on the radio, as large as the dashboard on the plane, or the control room of the power plant are not used all the time, and there are many ways to realize human interaction, such as touch based on pressure, resistance, and capacitance , Face recognition based on light, ultrasound based on sound, tactile feedback based on electrostatic feedback, etc., are currently used more in the touch interaction of consumer products such as mobile phones and TVs, but their technologies have certain limitations, that is, they must be touched In order to achieve the purpose of interaction, it not only limits the scope of application, but also cannot realize long-distance touch interaction. Under this background, optical touch came into being.
  • An embodiment of the present disclosure provides a touch substrate, including:
  • a base substrate including a photosensitive area and a frame area surrounding the photosensitive area
  • a plurality of photosensitive pixels are arranged in an array in the photosensitive area, and the photosensitive pixels include invisible light sensors and driving transistors;
  • the gate drive circuit is arranged in the frame area, the gate drive circuit includes a plurality of cascaded shift registers, the output end of one of the shift registers is connected to at least one row of the photosensitive pixels through the gate line
  • the gate of the driving transistor is electrically connected, and the gate line extends along the first direction;
  • the shift register includes a plurality of transistors, and in one shift register, the number of transistors arranged along the second direction is more than the number of transistors arranged along the first direction, and the second The direction is substantially perpendicular to the first direction.
  • the shift register has a first length in the first direction, and the shift register has a first length in the second direction. Two lengths, the first length is smaller than the second length.
  • the second length is approximately equal to the center-to-center distance between two adjacent photosensitive pixels in the second direction.
  • the touch substrate provided by the embodiment of the present disclosure, there are two gate drive circuits, which are respectively arranged in the frame regions on both sides of the extending direction of the gate lines;
  • the first length is less than half of the center-to-center distance between two adjacent photosensitive pixels in the first direction.
  • the distance between the centers of two photosensitive pixels adjacent in the first direction and in the second direction is 3mm-5mm .
  • the width direction of the channel region of each transistor in one of the shift registers extends along the first direction, so The length directions of the channel regions all extend along the second direction.
  • the shift register includes: a first output transistor, the first output transistor includes transistors arranged along the second direction and connected in parallel at least two sub-transistors provided;
  • the gate of each of the sub-transistors is electrically connected to the first node, the first pole of each of the sub-transistors is electrically connected to the clock signal terminal, and the second pole of each of the sub-transistors is electrically connected to the first output signal terminal.
  • the first output signal terminal is electrically connected to the gate line.
  • the channel width of each of the sub-transistors in the first direction is not greater than 1000 um.
  • the maximum amplitude of the clock signal provided by the clock signal terminal is between 15V-25V.
  • the shift register further includes: an input transistor, a reset transistor, and a control circuit arranged along the second direction;
  • Both the gate and the first pole of the input transistor are electrically connected to the input signal terminal, and the second pole of the input transistor is electrically connected to the first node;
  • the gate of the reset transistor is electrically connected to the reset signal terminal, the first pole of the reset transistor is electrically connected to the first power signal terminal, and the second pole of the reset transistor is electrically connected to the first node;
  • the control circuit is electrically connected to the first node, the first output signal terminal and the control signal terminal respectively, and the control circuit is configured to control the first node and the first node in response to the signal of the control signal terminal.
  • the potential of the first output signal terminal is electrically connected to the first node, the first output signal terminal and the control signal terminal respectively, and the control circuit is configured to control the first node and the first node in response to the signal of the control signal terminal. The potential of the first output signal terminal.
  • the control circuit includes two sub-control circuits, and the two sub-control circuits are respectively electrically connected to different control signal terminals.
  • Transistors with the same function in the control circuit are arranged side by side in the first direction, and transistors with different functions are arranged in the second direction.
  • the shift register further includes: a second output transistor
  • the gate of the second output transistor is electrically connected to the first node, the first pole of the second output transistor is electrically connected to the clock signal terminal, and the second pole of the second output transistor is electrically connected to the second
  • the output signal terminal is electrically connected, and the second output signal terminal is configured to be electrically connected to the input signal terminal in the shift register of the next stage and the reset signal terminal in the shift register of the previous stage respectively.
  • the second output transistor and the first output transistor are arranged in the second direction, and the second output transistor is The channel width in the first direction is smaller than the channel width of the sub-transistor in the first direction.
  • the touch substrate provided in the embodiment of the present disclosure further includes:
  • a readout circuit arranged in the frame area and located at a different frame from the gate drive circuit, the readout circuit is electrically connected to the first electrode of the drive transistor in at least one column of the photosensitive pixels through a data line, The data lines extend along the second direction.
  • the touch control substrate provided in the embodiment of the present disclosure further includes: a non-visible light anti-reflection film, located on the side of the non-visible light sensor away from the base substrate, and the non-visible light The AR coating completely covers the photosensitive area.
  • the material of the non-visible light anti-reflection film is a black matrix material, and the black matrix material selectively transmits non-visible light.
  • an embodiment of the present disclosure also provides a display device, including:
  • the touch substrate is located on a side of the display module away from the display surface.
  • the display device provided by the embodiment of the present disclosure, there are multiple touch-sensitive substrates arranged closely, and the borders of two adjacent touch-sensitive substrates in the first direction The sum of the widths of the regions in the first direction is smaller than the center-to-center distance between two adjacent photosensitive pixels in the first direction.
  • the display device provided by the embodiment of the present disclosure further includes a backlight module
  • the display module is a liquid crystal display module, the display module is located on the light emitting side of the backlight module, and the touch control substrate is located in the backlight module.
  • the backlight module includes: a backlight, a stacked reflective sheet, a light guide plate, and a diffusion sheet; On at least one side of the light plate, the touch substrate is located between the light guide plate and the diffusion sheet.
  • an embodiment of the present disclosure further provides a display system, including a display device and a non-visible light emitter, wherein the display device is the display device provided by the embodiment of the present disclosure.
  • FIG. 1 is a schematic structural diagram of a touch substrate provided by an embodiment of the present disclosure
  • FIG. 2 is a schematic diagram of a partial structure of a touch substrate provided by an embodiment of the present disclosure
  • FIG. 3a is another schematic diagram of a partial structure of a touch substrate provided by an embodiment of the present disclosure.
  • Fig. 3b is a schematic cross-sectional structure diagram of a photosensitive pixel provided by an embodiment of the present disclosure
  • FIG. 4 is a schematic circuit structure diagram of a shift register in a touch substrate provided by an embodiment of the present disclosure
  • FIG. 5 is a timing diagram of signals corresponding to a shift register in a touch substrate provided by an embodiment of the present disclosure
  • FIG. 6 is a schematic structural diagram of a first output transistor in a touch control substrate provided by an embodiment of the present disclosure
  • FIG. 7 is a circuit layout corresponding to a shift register in a touch substrate provided by an embodiment of the present disclosure.
  • Fig. 8a is a schematic diagram of the change of the potential of the first node of the shift register with the working temperature
  • Fig. 8b is a schematic diagram showing the change of the output potential of the shift register with the working temperature
  • FIG. 9 is a schematic structural diagram of a display device provided by an embodiment of the present disclosure.
  • FIG. 10 is a schematic structural diagram of splicing touch substrates in a display device provided by an embodiment of the present disclosure.
  • FIG. 11 is a schematic structural diagram of a display system provided by an embodiment of the present disclosure.
  • near-infrared light sensors can realize long-distance interaction. It has great application prospects in the fields of smart large screens (such as TV & electronic whiteboards), Gaming MNT, etc. It has millimeter-level precise positioning, millisecond-level response speed, and technical features such as display flexibility. Realize the effect of accurate positioning operation without delay in the air and non-contact handwriting.
  • the active layer of the thin film transistor (TFT) device in the optical touch panel is generally made of a-Si material, and the carrier mobility of a-Si is relatively low.
  • the size of the TFT in the gate drive circuit need to be designed larger.
  • the gate drive circuit generally adopts a 21T1C architecture solution, and the TFT channel width responsible for controlling the output signal terminal must reach a level of several thousand or even tens of thousands of um.
  • a touch substrate which is especially suitable for the field of remote large-scale non-visible light (such as near-infrared light) interaction technology, as shown in Figure 1, Figure 2, and Figure 2.
  • the touch substrate can include:
  • the base substrate 100 includes a photosensitive area AA and a frame area BB surrounding the photosensitive area AA;
  • a plurality of photosensitive pixels 200 are arranged in an array in the photosensitive area AA, and the photosensitive pixels 200 may include a non-visible light sensor 210 and a driving transistor 220;
  • the gate driving circuit 300 is arranged in the frame area BB, and the gate driving circuit 300 includes a plurality of cascaded shift registers GOA, and the output end of one shift register GOA is connected to the drive in at least one row of photosensitive pixels 200 through the gate line 230
  • the gate of the transistor 220 is electrically connected, and the gate line 230 extends along the first direction x;
  • the shift register GOA includes a plurality of transistors T, and in one shift register GOA, the number of transistors T arranged along the second direction y is more than the number of transistors T arranged along the first direction x, and the number of transistors T arranged along the first direction x, the second direction y is substantially perpendicular to the first direction x.
  • the first direction x is the horizontal direction (horizontal direction)
  • the second direction y is the vertical direction (vertical direction), and vice versa.
  • the first direction x is the horizontal direction
  • the second direction y is the vertical direction as an example for illustration.
  • the gate driving circuit 300 generally sets the frame area BB on at least one side of the left and right sides of the photosensitive area AA, and one side is set as a single-side drive, and the two sides are set as a double-side drive.
  • the number of transistors in the second direction y, that is, the horizontal direction, of the shift register GOA is smaller than the number of transistors in the first direction x, that is, the vertical direction, that is, the circuit of the shift register GOA
  • the vertical design can reduce the size of the shift register in the first direction x, and achieve a narrow frame design, which is conducive to seamless splicing when applied to large-size panels.
  • the shift register GOA has a first length h1 in the first direction x
  • the shift register GOA has a second length h2 in the second direction y
  • the first length h1 is smaller than the first length h1.
  • the shift register GOA also includes a plurality of signal lines extending along the second direction y and arranged along the first direction x, and these signal lines are used to provide the shift register GOA with the required Signals, such as frame start signal, clock signal, low potential signal, control signal, etc. These signal lines also occupy the frame, and h1 can be understood as the length jointly occupied by the transistor and each signal line.
  • the vertical space can be utilized to the maximum extent, so that the second length h2 of the shift register GOA is roughly equal to two adjacent transistors in the second direction y.
  • the distance d2 between the centers of the photosensitive pixels 200 is to minimize the size of the shift register GOA in the first direction, that is, the first length h1.
  • the first length h1 may be less than half of the center-to-center distance d1 between two adjacent photosensitive pixels 200 in the first direction x. In this way, the sum of frame widths between two adjacent touch substrates in the first direction x is smaller than the center-to-center distance d1 between two adjacent photosensitive pixels 200 in the first direction x, which is equivalent to seamless splicing.
  • the area occupied by one photosensitive pixel 200 may be approximately square, that is, the center-to-center distance d1 between two adjacent photosensitive pixels 200 in the first direction x is approximately equal to The center-to-center distance d2 between two photosensitive pixels 200 adjacent in the two directions y.
  • the distance between the centers of two adjacent photosensitive pixels 200 may be referred to as the side length d of the photosensitive pixels 200 , and may also be referred to as a pixel period or a pixel size.
  • the near-infrared light emitter emits near-infrared light with a wavelength of 800nm-900nm, the size of the light spot is controlled within 5mm, and the divergence at a distance of 5m does not exceed 5%.
  • the distance of transmission and reception is controlled within the range of 0m to 10m from the screen. If it is too far away, it does not make much sense depending on the usage scenario.
  • the emission power of the near-infrared light emitter is controlled within 1mw, which meets the harm prevention requirements of the household (it is reported that high-intensity near-infrared light can damage the iris of the human eye), and also meets the signal strength of the receiving end.
  • the invisible near-infrared light emitted in this way is projected on the touch substrate, and a large light spot must cover the invisible light sensor 210 , so that the conversion from optical signal to electrical signal can be realized based on the invisible light sensor 210 .
  • the side length d of the photosensitive pixel 200 may be 3mm-5mm, that is, the sides adjacent in the first direction x and in the second direction y
  • the center-to-center distance d1 and d2 of the two photosensitive pixels 200 is 3mm-5mm, so as to match the spot size of the non-visible light emitter (eg near-infrared light emitter).
  • the frame widths on the left and right sides of the photosensitive area AA can be controlled to be less than 1.5 mm, so that the sum of the frame widths between two adjacent touch substrates in the first direction x is smaller than that of two adjacent touch substrates in the first direction x.
  • the center distance d1 between the photosensitive pixels 200 realizes seamless splicing.
  • the bisector of the distance between the centers of two adjacent photosensitive pixels 200 is the boundary of the photosensitive pixels 200 (that is, the side length of the photosensitive pixels 200 is the same as the distance between the two adjacent photosensitive pixels 200 ).
  • the center distance is equal), so the area of one photosensitive pixel 200 can be equal to the square of the center distance between two adjacent photosensitive pixels 200, for example, the center distance between two adjacent photosensitive pixels 200 is the value range of the side length d of the photosensitive pixel 200 3mm-5mm, correspondingly, the area of the photosensitive pixel 200 may be 3mm*3mm-5mm*5mm, that is, 9mm 2 -25mm 2 .
  • the above-mentioned touch substrate provided in the embodiments of the present disclosure as shown in FIG.
  • the readout circuit ROIC is electrically connected to the first electrode of the driving transistor 220 in at least one column of photosensitive pixels 200 through the data line 240, and the data line 240 extends along the second direction y.
  • the number of read circuit ROICs generally increases with the increase of product size.
  • the invisible light sensor 210 may include a first electrode 2101, a photosensitive layer 2102, and a second electrode 2103 arranged in layers.
  • the first electrode 2101 is located between the base substrate 100 and the photosensitive layer 2102 , and the first electrode 2101 is in direct contact with the photosensitive layer 2102 , and the second electrode 2103 is in direct contact with the photosensitive layer 2102 .
  • the photosensitive layer 1022 may include a P-type amorphous silicon semiconductor layer, an intrinsic amorphous silicon semiconductor layer and an N-type amorphous silicon semiconductor layer stacked, wherein the P-type amorphous silicon semiconductor layer is in direct contact with the second electrode 2103, and the N-type amorphous silicon semiconductor layer is in direct contact with the second electrode 2103.
  • the type amorphous silicon semiconductor layer is in direct contact with the first electrode 2101 .
  • the second pole of the driving transistor 220 is electrically connected to the first electrode 2101, the on and off of the driving transistor 220 is controlled through the gate line 230, and the invisible light sensor 210 read by the driving transistor 220 is passed through the data line 240 The photocurrent is written to the read circuit ROIC.
  • the invisible light sensor 210 may be a near-infrared sensor, and the near-infrared sensor using amorphous silicon (a-si) material is more sensitive to the absorption of near-infrared and visible light bands, especially in the 550nm band.
  • the peak value of green light absorption can reach 80%, and the wavelength band emitted by the near-infrared light emitter used in this disclosure is around 800nm-900nm, so the visible light band becomes noise.
  • the non-visible light anti-reflection film 250 can selectively transmit light in the non-visible light (such as near-infrared light) band. Moreover, for the convenience of manufacture, the non-visible light anti-reflection film 250 may completely cover the photosensitive area AA.
  • the material of the non-visible light antireflection film 250 can be a black matrix (BM) material, which can selectively transmit non-visible light (such as near-infrared light) and block other wavebands (such as non-infrared light). Invisible light and visible light in the near infrared band).
  • BM black matrix
  • the width direction of the channel region of each transistor T in one shift register GOA extends along the first direction x, and the length direction of the channel region extends along the second direction y. In this way, the channel direction of each transistor T in the shift register is not changed, and the performance of the device is guaranteed to be consistent.
  • the vertical design of the circuit of the shift register GOA a narrow frame design can be realized, which is conducive to realizing seamless splicing when applied to large-size panels.
  • the shift register GOA specifically includes: a first output transistor T3, and the first output transistor T3 is used to control the first output transistor T3 connected to the gate line 230.
  • the first output transistor T3 in the existing panel design is a large-sized TFT, and the width W of the channel region of a single first output transistor T3 needs to be greater than 1000um to ensure sufficient driving capability, but the channel width Too large will lead to poor linearity of Ion and W/L.
  • the shift register GOA designs all transistors T vertically, that is, no other transistors are arranged side by side with the first output transistor T3 in the first direction x, since the channel width of the first output transistor T is greater than 1000um, it cannot be further reduced The first length h1 of the shift register GOA.
  • splitting the first output transistor T3 into several sub-transistors with small channel widths and stringing them together to form a vertical structure can improve the matching degree between design and simulation, and is conducive to reducing the size of the shift register GOA.
  • the first length h1 realizes the extremely narrow frame design.
  • the first output transistor T3 includes at least two sub-transistors arranged in parallel along the second direction y. Parallel connection means that the first poles of each sub-transistor are connected to each other, and the second poles are connected to each other.
  • three sub-transistors T3a, T3b, T3c are set as an example
  • four sub-transistors T3a, T3b, T3c, T3d are set as an example, the number of sub-transistors is related to the required driving of the first output transistor T3 The ability is related, which will be introduced in detail later.
  • each sub-transistor T3a-T3d are electrically connected to the first node N1
  • the first poles of each sub-transistor T3a-T3d are electrically connected to the clock signal terminal CLK
  • each sub-transistor T3a-T3d The second pole is electrically connected to the first output signal terminal O1
  • the first output signal terminal O1 is electrically connected to the gate line 230 .
  • the channel width W of each sub-transistor T3a, T3b, and T3c in the first direction x can be designed to be no greater than 1000um. In this way, on the one hand, the linearity between Ion and W/L can be increased to improve the design
  • the degree of matching with the simulation can reduce the first length h1 of the shift register GOA, and cooperate with the vertical design of each transistor in the shift register to realize an extremely narrow frame design, reduce the seam width during splicing, and improve user experience .
  • the load delay (RC loading) of the photosensitive region AA of the touch substrate provided by the embodiment of the present disclosure is smaller than the RC loading of the display region of the liquid crystal display panel (LCD). Therefore, the size of the TFT controlling the output of the GOA in the touch substrate is the first A size of the output transistor T3 needs to be redesigned. If the size of the first output transistor T3 is too large, the RC of the GOA itself will be too large, and the delay between the cascaded GOAs and the GOA of the clock signal line connected to the clock signal terminal CLK will be serious. If the size of the first output transistor T3 is too small, the driving capability of the GOA will be insufficient.
  • the size of the first output transistor T3 of the GOA in the touch substrate is about 1/3 of the size of the first output transistor T3 of the GOA in the liquid crystal display panel.
  • the GOA in the touch substrate will receive light from the LCD backlight reflected by the liquid crystal display panel, and the backlight intensity will reach 8000-10000 nit.
  • the GOA is driven by the original high potential such as 33V, the first node N1 in the GOA will have a serious leakage current due to the excessive voltage difference between the source and the drain of the first output transistor T3 .
  • the output potential of the GOA will drop. Therefore, in some embodiments of the present disclosure, the operating voltage of the GOA can be appropriately reduced.
  • the maximum amplitude of the clock signal provided by the clock signal terminal CLK can be between 15V- between 25V.
  • the shift register GOA may further include: a second output transistor T13; the gate of the second output transistor T13 is electrically connected to the first node N1, the first pole of the second output transistor T13 is electrically connected to the clock signal terminal CK, and the second pole of the second output transistor T13 is electrically connected to the second output signal terminal O2 is electrically connected, and the second output signal terminal O2 is configured to be electrically connected to the input signal terminal I in the shift register GOA of the next stage and the reset signal terminal R in the shift register GOA of the previous stage respectively, that is, through the first
  • the two output transistors T13 are cascaded with the upper and lower shift registers.
  • each set of cascaded shift registers is alternately connected to clock signal terminals CK1 and CK2 that provide opposite clock signals.
  • the timing and amplitude of the signals output by the second output transistor T13 and the first output transistor T3 are the same, but the loads of the two are different, so they can be set to different sizes .
  • the second output transistor T13 and the first output transistor T3 are arranged in the second direction y, and the channel width of the second output transistor T13 in the first direction x is smaller than that of each sub-transistor T3a-T3d in the first direction The channel width of x. That is, the second output transistor T13 does not need a large driving capability.
  • the shift register GOA may further include: an input transistor T1 arranged along the second direction y, a reset transistor T2 and a control circuit;
  • Both the gate and the first pole of the input transistor T1 are electrically connected to the input signal terminal I, and the second pole of the input transistor T1 is electrically connected to the first node N1;
  • the gate of the reset transistor T2 is electrically connected to the reset signal terminal R, the first pole of the reset transistor T2 is electrically connected to the first power signal terminal VGL1, and the second pole of the reset transistor T2 is electrically connected to the first node N1;
  • the control circuit is electrically connected to the first node N1, the first output signal terminal O1 and the control signal terminal V1 or V2 respectively, and the control circuit 310 is configured to control the first node N1 and the first node N1 in response to the signal of the control signal terminal V1 or V2.
  • the control circuit may include two sub-control circuits 311 and 312, and the two sub-control circuits 311 and 312 are respectively electrically connected to different control signal terminals V1 and V2, the sub-control circuits 311 and 312 work alternately, control the signal terminals V1 and V2 respectively, and control the signal terminals V1 and V2 for about 2s to 3s to switch between high and low potentials, so as to prevent the first node N1 from being in a positive bias state for a long time.
  • transistors with the same function in the two sub-control circuits 311 and 312 may be arranged side by side in the first direction x, and transistors with different functions are arranged in the second direction y.
  • the sub-control circuit 311 may include: a fifth transistor T5, a sixth transistor T6, a seventh transistor T7, an eighth transistor T8, a ninth transistor T9, a tenth transistor T10, and an eleventh transistor arranged along the second direction y.
  • the transistor T11 and the twelfth transistor T12; the sub-control circuit 312 may include: a fifth transistor T5', a sixth transistor T6', a seventh transistor T7', an eighth transistor T8', and a ninth transistor arranged along the second direction y.
  • the connection relationship of the transistors in it is as follows:
  • Both the gate and the first pole of the eighth transistor T8 are electrically connected to the control signal terminal V1, and the second pole of the eighth transistor T8 is electrically connected to the gate of the fifth transistor T5;
  • the first pole of the fifth transistor T5 is electrically connected to the control signal terminal V1, and the second pole of the fifth transistor T5 is electrically connected to the second node N2;
  • the gate of the sixth transistor T6 is electrically connected to the first node N1, the first pole of the sixth transistor T6 is electrically connected to the first power signal terminal VGL1, and the second pole of the sixth transistor T6 is electrically connected to the second node N2;
  • the gate of the seventh transistor T7 is electrically connected to the first node N1, the first pole of the seventh transistor T7 is electrically connected to the first power signal terminal VGL1, and the second pole of the seventh transistor T7 is electrically connected to the gate of the fifth transistor T5. connect;
  • the gate of the ninth transistor T9 is electrically connected to the second node N2, the first pole of the ninth transistor T9 is electrically connected to the first power signal terminal VGL1, and the second pole of the ninth transistor T9 is electrically connected to the first node N1;
  • the gate of the tenth transistor M10 is electrically connected to the second node N2, the first pole of the tenth transistor M10 is electrically connected to the second voltage signal terminal VGL2, and the second pole of the tenth transistor M10 is electrically connected to the first output signal terminal O1 ;
  • the gate of the eleventh transistor M11 is electrically connected to the second node N2, the first pole of the eleventh transistor M11 is electrically connected to the first voltage signal terminal VGL1, and the second pole of the eleventh transistor M11 is electrically connected to the second output signal terminal. O2 electrical connection;
  • the gate of the twelfth transistor M12 is electrically connected to the input signal terminal I, the first pole of the twelfth transistor M12 is electrically connected to the first voltage signal terminal VGL1, and the second pole of the twelfth transistor M12 is electrically connected to the second node N2. connect.
  • control circuit in the shift register provided by the embodiment of the present disclosure.
  • specific structure of the above-mentioned control circuit is not limited to the above-mentioned structure provided by the embodiment of the present disclosure, and can also be used by those skilled in the art.
  • Known other structures are not limited here.
  • the shift register GOA may further include: a fourth transistor T4, the gate of the fourth transistor T4 is The first terminal of the fourth transistor T4 is electrically connected to the first power signal terminal VGL1, and the second terminal of the fourth transistor T4 is electrically connected to the first node N1.
  • the fourth transistor T4 is used to reset the first nodes N1 of all the shift registers after the gate drive circuit is turned on.
  • the first frame start signal terminal STV1 is electrically connected to the input signal terminal I of the first-stage shift register, and the input signal terminals I of other shift registers are electrically connected to the second output signal terminal O2 of the upper-stage shift register.
  • the first frame start signal terminal STV1 loads the signal to turn on the first transistor T1, pulling up the first node of the first stage shift register
  • the potential of N1 turns on the twelfth transistor T12 and pulls down the potential of the second node N2.
  • the first node N1 with a high potential turns on the first output transistor T3 and the second output transistor T13, and when the clock signal loaded on the clock signal terminal CK1 is at a high potential, the first output signal terminal O1 and the second output signal terminal O2 output high level.
  • the high level of the second output signal terminal O2 is input to the input signal terminal of the next-stage shift register, and when the second output signal terminal O2 of the next-stage shift register outputs a high-level signal, the current-stage shift register
  • the reset transistor T2 is turned on, pulling down the first node N1, the sixth transistor T6 and the seventh transistor T7 are turned off, the fifth transistor T5 is turned on, pulling up the potential of the second node N2, the tenth transistor T10 and the eleventh transistor T11 turn on, and pull down the potentials of the first output signal terminal O1 and the second output signal terminal O2.
  • an embodiment of the present disclosure also provides a display device, as shown in FIG. The side of the module 10 away from the display surface. Since the problem-solving principle of the display device is similar to the problem-solving principle of the above-mentioned touch substrate, the implementation of the display device provided by the embodiment of the present disclosure can refer to the implementation of the above-mentioned touch substrate provided by the embodiment of the present disclosure. No longer.
  • FIG. 10 when applied to large-sized products, as shown in FIG. 10 , there may be multiple touch substrates 20 closely arranged.
  • four splicing of the touch substrate 20 is taken as an example It is explained that since the gate drive circuit 300 in the frame area BB is designed vertically, the splicing width between the two adjacent touch substrates 20 can be reduced to achieve an effect roughly the same as the size of the photosensitive pixel 200, that is, in The sum H1 of the widths in the first direction x of the frame regions of the two adjacent touch control substrates 20 in the first direction x is smaller than the center-to-center distance d1 between the two adjacent photosensitive pixels 200 in the first direction x, so that the user There is no discontinuous experience when touching.
  • the display module 10 may be a liquid crystal display module (LCD), specifically a twisted nematic (Twisted Nematic, TN) type liquid crystal display , Advanced Dimension Switch (Advanced Dimension Switch, ADS) type liquid crystal display, high aperture ratio-advanced ultra-dimensional field switch (High-Advanced Dimension Switch, HADS) type liquid crystal display, in-plane switch (In-Plane Switch, IPS) type liquid crystal display, etc., are not specifically limited here.
  • the essential components of the liquid crystal display module are those of ordinary skill in the art that should be understood, and will not be repeated here, nor should they be used as limitations on the present disclosure.
  • the above-mentioned display device provided by the embodiments of the present disclosure as shown in FIG. 20 is located in the backlight module 30 .
  • the backlight module 30 may include a backlight 31, a stacked reflection sheet 32, a light guide plate 33, and a diffusion sheet 34, wherein the backlight 31 may be located on at least one side of the light guide plate 33, touching
  • the control substrate may be located between the light guide plate 33 and the diffusion sheet 34 .
  • the emitted light from the backlight 31 enters from the side of the light guide sheet 33 , diffuses through the light guide sheet 7033 and reflects from the reflective sheet 32 , and evenly enters the liquid crystal display module after passing through the touch substrate 20 and the diffuser sheet 34 .
  • the reflective sheet 32 may be configured to reflect visible light and transmit non-visible light (such as near-infrared light).
  • the display module 10 may also be an electroluminescent display module, such as an organic electroluminescent display module (OLED), a quantum dot light-emitting display Module (QLED), mini/micro-luminescent display module (mini/Micro LED), etc., are essential components for electroluminescent display modules, which should be understood by those of ordinary skill in the art.
  • OLED organic electroluminescent display module
  • QLED quantum dot light-emitting display Module
  • mini/micro-luminescent display module mini/Micro LED
  • FIG. Provides protection and support.
  • Other essential components in the display device should be understood by those skilled in the art, and will not be repeated here, nor should they be used as limitations on the present disclosure.
  • an embodiment of the present disclosure also provides a display system, as shown in FIG. 11 , which may include a display device 1 and a non-visible light emitter 2, wherein the display device 1 is the above-mentioned display device provided by the embodiment of the present disclosure .
  • the display device 1 is the above-mentioned display device provided by the embodiment of the present disclosure . Since the problem-solving principle of the display system is similar to the problem-solving principle of the above-mentioned display device, the implementation of the display system provided by the embodiment of the present disclosure can refer to the implementation of the above-mentioned display device provided by the embodiment of the present disclosure, and the repetition will not be repeated. repeat.
  • the invisible light emitted by the invisible light emitter 2 is projected on the display device 1, and the larger light spot can cover the invisible light sensor 210, thereby realizing the conversion from optical signal to electrical signal based on the invisible light sensor 210, and then The touch position is determined by processing the electrical signal to realize remote touch interaction.

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Abstract

本公开提供了一种触控基板、显示装置及显示***，通过对移位寄存器内的各晶体管进行重新排列布局，使移位寄存器在横向的晶体管数量小于在纵向的晶体管数量，即将移位寄存器的电路纵向设计，可以减小移位寄存器在横向的尺寸，实现窄边框设计，有利于应用在大尺寸面板时实现无缝拼接。

Description

触控基板、显示装置及显示*** 技术领域
本公开涉及显示技术领域，尤其涉及一种触控基板、显示装置及显示***。
背景技术
随着通信技术、计算机技术和电子技术的不断发展，移动通信正在从人与人(Human to Human，H2H)向人与物(Human to Machine，H2M)，以及物与物(Machine to Machine，M2M)通信的方向发展，万物互联成为移动通信发展的必然趋势。
物联网(Internet of Things，IoT)正是在此背景下应运而生的，其被认为是继计算机、互联网之后，世界信息产业的第三次浪潮。物联网采用信息化技术手段，促进人类生活和生产服务的全面升级，其应用开发的前景广阔，产业带动能力强。欧美国家已纷纷将发展物联网纳入整体信息化战略，我国也已将物联网明确纳入国家中长期科学技术发展规划(2006～2020年)和2050年国家产业路线图。
而在物联网的大背景下，人机交互就显得尤为重要了，不仅是物联网的架构基础，也是物联网的最终目标，实现服务于人类的万物互联，而所谓的人机交互是指用户通过人机交互界面与***交流，并进行操作。小如收音机的播放按键，大至飞机上的仪表板、或是发电厂的控制室都时时刻刻不在被用到，实现人家交互的方式也比较多，例如基于压力，电阻，电容的触控，基于光线的人脸识别、基于声音的超声、基于静电反馈的触觉反馈等等，目前应用较多的为手机电视等消费品的触控交互，但是其技术具备一定的局限性，那就是必须接触式的触控才能实现交互的目的，不仅局限了应用的范围，而且还没办法实现远距离的触控交互，在此背景下，光触控应运而生。
发明内容
本公开实施例提供了一种触控基板，包括：
衬底基板，包括感光区和包围所述感光区的边框区；
多个感光像素，在所述感光区呈阵列排布，所述感光像素包括非可见光传感器和驱动晶体管；
栅极驱动电路，在所述边框区排布，所述栅极驱动电路包括多个级联的移位寄存器，一个所述移位寄存器的输出端通过栅线与至少一行所述感光像素中的驱动晶体管的栅极电连接，所述栅线沿着第一方向延伸；
其中，所述移位寄存器包括多个晶体管，在一个所述移位寄存器中，沿着第二方向排列的晶体管个数多于沿着所述第一方向排列的晶体管个数，所述第二方向与所述第一方向大致垂直。
在一种可能的实现方式中，在本公开实施例提供的触控基板中，所述移位寄存器在所述第一方向具有第一长度，所述移位寄存器在所述第二方向具有第二长度，所述第一长度小于所述第二长度。
在一种可能的实现方式中，在本公开实施例提供的触控基板中，所述第二长度大致等于在所述第二方向相邻的两个所述感光像素之间的中心间距。
在一种可能的实现方式中，在本公开实施例提供的触控基板中，所述栅极驱动电路为两个且分别排布在所述栅线的延伸方向两侧的边框区内；所述第一长度小于在所述第一方向相邻的两个所述感光像素之间的中心间距的一半。
在一种可能的实现方式中，在本公开实施例提供的触控基板中，在所述第一方向和在所述第二方向相邻的两个所述感光像素的中心间距为3mm-5mm。
在一种可能的实现方式中，在本公开实施例提供的触控基板中，在一个所述移位寄存器中的各晶体管的沟道区域的宽度方向均沿着所述第一方向延伸，所述沟道区域的长度方向均沿着所述第二方向延伸。
在一种可能的实现方式中，在本公开实施例提供的触控基板中，所述移 位寄存器包括：第一输出晶体管，所述第一输出晶体管包括沿着所述第二方向排列且并联设置的至少两个子晶体管；
各所述子晶体管的栅极与第一节点电连接，各所述子晶体管的第一极与时钟信号端电连接，各所述子晶体管的第二极与第一输出信号端电连接，所述第一输出信号端与所述栅线电连接。
在一种可能的实现方式中，在本公开实施例提供的触控基板中，各所述子晶体管在所述第一方向的沟道宽度不大于1000um。
在一种可能的实现方式中，在本公开实施例提供的触控基板中，所述时钟信号端提供的时钟信号的最大幅值在15V-25V之间。
在一种可能的实现方式中，在本公开实施例提供的触控基板中，所述移位寄存器还包括：沿着所述第二方向排列的输入晶体管、复位晶体管和控制电路；
所述输入晶体管的栅极和第一极均与输入信号端电连接，所述输入晶体管的第二极与所述第一节点电连接；
所述复位晶体管的栅极与复位信号端电连接，所述复位晶体管的第一极与第一电源信号端电连接，所述复位晶体管的第二极与所述第一节点电连接；
所述控制电路分别与所述第一节点、所述第一输出信号端和控制信号端电连接，所述控制电路被配置为响应于所述控制信号端的信号，控制所述第一节点和所述第一输出信号端的电位。
在一种可能的实现方式中，在本公开实施例提供的触控基板中，所述控制电路包括两个子控制电路，所述两个子控制电路分别电连接不同的控制信号端，所述两个子控制电路中相同功能的晶体管在所述第一方向并排设置，不同功能的晶体管在所述第二方向排列。
在一种可能的实现方式中，在本公开实施例提供的触控基板中，所述移位寄存器还包括：第二输出晶体管；
所述第二输出晶体管的栅极与所述第一节点电连接，所述第二输出晶体管的第一极与所述时钟信号端电连接，所述第二输出晶体管的第二极与第二 输出信号端电连接，所述第二输出信号端被配置为分别与下一级的移位寄存器中的所述输入信号端和上一级的移位寄存器中的所述复位信号端电连接。
在一种可能的实现方式中，在本公开实施例提供的触控基板中，所述第二输出晶体管与所述第一输出晶体管在所述第二方向排列，且所述第二输出晶体管在所述第一方向的沟道宽度小于所述子晶体管在所述第一方向的沟道宽度。
在一种可能的实现方式中，在本公开实施例提供的触控基板中，还包括：
读取电路，在所述边框区排布且与所述栅极驱动电路位于不同边框处，所述读取电路通过数据线与至少一列所述感光像素中的驱动晶体管的第一极电连接，所述数据线沿着所述第二方向延伸。
在一种可能的实现方式中，在本公开实施例提供的触控基板中，还包括：非可见光增透膜，位于所述非可见光传感器背离所述衬底基板的一侧，所述非可见光增透膜完全覆盖所述感光区。
在一种可能的实现方式中，在本公开实施例提供的触控基板中，所述非可见光增透膜的材料为黑矩阵材料，所述黑矩阵材料选择性透过非可见光。
另一方面，本公开实施例还提供了一种显示装置，包括：
显示模组；
至少一个本公开实施例提供的触控基板，所述触控基板位于所述显示模组远离显示面的一侧。
在一种可能的实现方式中，在本公开实施例提供的显示装置中，所述触控基板为多个且紧密排列，在所述第一方向相邻的两个所述触控基板的边框区在所述第一方向的宽度之和，小于在所述第一方向相邻的两个所述感光像素之间的中心间距。
在一种可能的实现方式中，在本公开实施例提供的显示装置中，还包括背光模组；
所述显示模组为液晶显示模组，所述显示模组位于所述背光模组的出光侧，所述触控基板位于所述背光模组内。
在一种可能的实现方式中，在本公开实施例提供的显示装置中，所述背光模组包括：背光源，堆叠设置的反射片、导光板和扩散片；所述背光源位于所述导光板的至少一个侧边，所述触控基板位于所述导光板和所述扩散片之间。
另一方面，本公开实施例还提供了一种显示***，包括显示装置和非可见光发射器，其中，所述显示装置为本公开实施例提供的显示装置。
附图说明
图1为本公开实施例提供的触控基板的一种结构示意图；
图2为本公开实施例提供的触控基板的一种局部结构示意图；
图3a为本公开实施例提供的触控基板的又一种局部结构示意图；
图3b为本公开实施例提供的一个感光像素的剖面结构示意图；
图4为本公开实施例提供的触控基板中一个移位寄存器的电路结构示意图；
图5为本公开实施例提供的触控基板中移位寄存器对应的信号时序图；
图6为本公开实施例提供的触控基板中第一输出晶体管的一种结构示意图；
图7为本公开实施例提供的触控基板中移位寄存器对应的电路版图；
图8a为移位寄存器的第一节点电位随着工作温度的变化示意图；
图8b为移位寄存器的输出电位随着工作温度的变化示意图；
图9为本公开实施例提供的显示装置的一种结构示意图；
图10为本公开实施例提供的显示装置中触控基板拼接的结构示意图；
图11为本公开实施例提供的显示***的结构示意图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例的附图，对本公开实施例的技术方案进行清楚、完整地描述。需要 注意的是，附图中各图形的尺寸和形状不反映真实比例，目的只是示意说明本公开内容。并且自始至终相同或类似的标号表示相同或类似的元件或具有相同或类似功能的元件。显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。基于所描述的本公开实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其它实施例，都属于本公开保护的范围。
除非另作定义，此处使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开说明书以及权利要求书中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。“内”、“外”、“上”、“下”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也可能相应地改变。
采用近红外光传感器可实现远距离交互，在智慧大屏(例如TV&电子白板)、Gaming MNT等领域具有巨大的应用前景，具备毫米级精确定位，毫秒级响应速度，可显示柔性等技术特点，实现凌空精确无延时定位操作、非接触式手写的效果。
光触控面板中的薄膜晶体管(TFT)器件的有源层一般为a-Si材料，a-Si的载流子迁移率比较低，为获得足够的驱动力，栅极驱动电路中的TFT尺寸需设计的较大。而且针对大尺寸的面板，栅极驱动电路一般采用21T1C的架构方案，负责控制输出信号端的TFT沟道宽度要达到几千甚至上万um的水平。采用现有栅极驱动电路中各TFT横向(即水平方向)排布的结构，则面板的边框将达到4mm-5mm，无法实现窄边框设计。随着产品运用的不断扩展，在应用于更大尺寸的产品中，当需要将光触控面板进行拼接时，过宽的边框将影响用户体验。
为了至少解决相关技术中存在的上述技术问题，本公开实施例提供了一 种触控基板，尤其适用于远程大尺寸非可见光(例如近红外光)交互技术领域，如图1、图2、图3a和图7所示，触控基板可以包括：
衬底基板100，包括感光区AA和包围感光区AA的边框区BB；
多个感光像素200，在感光区AA呈阵列排布，感光像素200可以包括非可见光传感器210和驱动晶体管220；
栅极驱动电路300，在边框区BB排布，栅极驱动电路300包括多个级联的移位寄存器GOA，一个移位寄存器GOA的输出端通过栅线230与至少一行感光像素200中的驱动晶体管220的栅极电连接，栅线230沿着第一方向x延伸；
其中，移位寄存器GOA包括多个晶体管T，在一个移位寄存器GOA中，沿着第二方向y排列的晶体管T个数多于沿着第一方向x排列的晶体管T个数，第二方向y与第一方向x大致垂直。一般地，第一方向x为水平方向(横向)，第二方向y为竖直方向(纵向)，反之亦可，在本公开一些实施例中，以第一方向x为水平方向，第二方向y为竖直方向为例进行说明。
在本公开实施例提供触控基板中，栅极驱动电路300一般设置感光区AA左右至少一侧的边框区BB，在一侧设置为单边驱动，在两侧设置为双边驱动。通过对移位寄存器GOA内的各晶体管T进行重新排列布局，使移位寄存器GOA在第二方向y即横向的晶体管数量小于在第一方向x即纵向的晶体管数量，即将移位寄存器GOA的电路纵向设计，可以减小移位寄存器在第一方向x的尺寸，实现窄边框设计，有利于应用在大尺寸面板时实现无缝拼接。
在本公开一些实施例中，如图2所示，移位寄存器GOA在第一方向x具有第一长度h1，移位寄存器GOA在第二方向y具有第二长度h2，第一长度h1小于第二长度h2。通过将移位寄存器GOA的电路纵向设计，减小移位寄存器GOA在横向设置的晶体管数量，增大移位寄存器GOA在纵向设置的晶体管数量，可以缩小移位寄存器在第一方向x的尺寸h1，使其小于h2，达到缩减移位寄存器GOA占用边框的效果。
值得注意的是，移位寄存器GOA在第一方向x除了晶体管还包括多条沿 第二方向y延伸且沿第一方向x排列的信号线，这些信号线用于向移位寄存器GOA提供所需的信号，例如帧起始信号，时钟信号，低电位信号，控制信号等。这些信号线也会占用边框，此时可以将h1理解为晶体管和各信号线共同占用的长度。
在本公开一些实施例中，通过设计移位寄存器GOA中的晶体管排布方式，可以最大限度利用纵向空间，使移位寄存器GOA的第二长度h2大致等于在第二方向y相邻的两个感光像素200之间的中心间距d2，以尽量减小移位寄存器GOA在第一方向的尺寸即第一长度h1。
在本公开一些实施例中，如图1所示，栅极驱动电路300为两个且分别排布在栅线230的延伸方向两侧的边框区BB内，为了在应用于大尺寸面板时实现无缝拼接，第一长度h1可以小于在第一方向x相邻的两个感光像素200之间的中心间距d1的一半。这样在第一方向x相邻的两个触控基板之间的边框宽度之和小于在第一方向x相邻的两个感光像素200之间的中心间距d1，相当于无缝拼接。
在本公开一些实施例中，如图1所示，一个感光像素200所占区域可以近似于正方形，即在第一方向x相邻的两个感光像素200之间的中心间距d1大致等于在第二方向y相邻的两个感光像素200之间的中心间距d2。具体地，相邻两个感光像素200之间的中心间距，可以称为感光像素200的边长d，也可以称为像素周期或像素尺寸。
具体地，在本公开实施例提供的触控基板中，近红外光发射器发射800nm-900nm波长的近红外光，光斑大小控制在5mm以内，5m距离发散不超过5％。发射和接收的距离控制为距离屏幕的0m～10m范围，太远的话根据使用场景，意义不大。近红外光发射器的发射功率控制在1mw以内，这样满足家用的防伤害需求(有报道说高强度的近红外的光线能伤害人的眼睛虹膜)，同时也能满足接收端的信号强度。这样发射的不可见近红外光投射在触控基板上，较大的光斑一定覆盖住非可见光传感器210，从而可基于非可见光传感器210实现从光信号变电信号的转换。
基于此，在本公开实施例提供的上述触控基板中，如图1所示，感光像素200的边长d可以为3mm-5mm，即在第一方向x和在第二方向y相邻的两个感光像素200的中心间距d1和d2为3mm-5mm，以匹配非可见光发射器(例如近红外光发射器)的光斑大小。此时，可以控制在感光区AA左右两侧的边框宽度小于1.5mm，达到在第一方向x相邻的两个触控基板之间的边框宽度之和小于在第一方向x相邻的两个感光像素200之间的中心间距d1，实现无缝拼接。
在本公开一些实施例中，如图1所示，相邻两个感光像素200的中心间距的平分线为感光像素200的边界(即感光像素200的边长与相邻两个感光像素200的中心间距等同)，因此一个感光像素200的面积可以等于相邻两个感光像素200的中心间距的平方，例如相邻两个感光像素200的中心间距为感光像素200的边长d的取值范围3mm-5mm，相应地，感光像素200的面积可以为3mm*3mm-5mm*5mm，即9mm 2-25mm 2。
在本公开一些实施例中，在本公开实施例提供的上述触控基板中，如图1所示，还可以包括读取电路ROIC，在边框区BB排布且与栅极驱动电路300位于不同边框BB处，读取电路ROIC通过数据线240与至少一列感光像素200中的驱动晶体管220的第一极电连接，数据线240沿着第二方向y延伸。读取电路ROIC的颗数一般随产品尺寸的增大而增加。
在本公开一些实施例中，在本公开实施例提供的上述触控基板中，如图3b所示，非可见光传感器210可以包括层叠设置的第一电极2101、感光层2102和第二电极2103，其中，第一电极2101位于衬底基板100与感光层2102之间，且第一电极2101与感光层2102直接接触，第二电极2103与感光层2102直接接触。感光层1022可以包括层叠设置的P型非晶硅半导体层、本征非晶硅半导体层和N型非晶硅半导体层，其中，P型非晶硅半导体层与第二电极2103直接接触，N型非晶硅半导体层与第一电极2101直接接触。
在本公开一些实施例中，在本公开实施例提供的上述触控基板中，如图3a所示，驱动晶体管220的栅极与栅线230电连接，驱动晶体管220的第一 极与数据线240电连接，驱动晶体管220的第二极与第一电极2101电连接，通过栅线230控制驱动晶体管220的导通与截止，并通过数据线240将驱动晶体管220所读取的非可见光传感器210的光电流写入读取电路ROIC。
在本公开一些实施例中，非可见光传感器210可以为近红外传感器，采用非晶硅(a-si)材料的近红外传感器对近红外和可见光波段的吸收都比较敏感，特别是在550nm波段的绿光吸收峰值能达到80％，而本公开采用的近红外光发射器发射的波段在800nm-900nm附近，因此可见光波段就成了噪声，考虑消除噪声的影响，即为了避免环境光线干扰光触控效果、以及防止非可见光传感器210因接收环境光线而过曝，如图3b所示，在本公开实施例提供的上述触控基板中，还可以包括：非可见光增透膜250，位于非可见光传感器210背离衬底基板100的一侧，该非可见光增透膜250可选择性透过非可见光(例如近红外光)波段的光线。并且，为了便于制作，非可见光增透膜250可以完全覆盖感光区AA。
在本公开一些实施例中，非可见光增透膜250的材料可以为黑矩阵(BM)材料，该黑矩阵材料可选择性透过非可见光(例如近红外光)，而拦截其他波段(例如非近红外波段)的非可见光及可见光。
在本公开一些实施例中，在一个移位寄存器GOA中的各晶体管T的沟道区域的宽度方向均沿着第一方向x延伸，沟道区域的长度方向均沿着第二方向y延伸。这样不改变移位寄存器中各晶体管T的沟道方向，保证器件性能一致，配合移位寄存器GOA的电路纵向设计，可以实现窄边框设计，有利于应用在大尺寸面板时实现无缝拼接。
可选地，在本公开实施例提供的触控基板中，如图4所示，移位寄存器GOA具体包括：第一输出晶体管T3，第一输出晶体管T3用于控制与栅线230连接的第一输出信号端O1。根据TFT测试数据，现有面板设计中第一输出晶体管T3是一个大尺寸的TFT，单个第一输出晶体管T3的沟道区域的宽度W需要大于1000um，以保证足够的驱动能力，但是沟道宽度过大会导致其Ion与W/L的线性度变差。并且，即使移位寄存器GOA将全部晶体管T都纵向 设计，即在第一方向x没有其他晶体管和第一输出晶体管T3并排设置，由于第一输出晶体管T的沟道宽度大于1000um，导致无法进一步缩减移位寄存器GOA的第一长度h1。
本公开一些实施例中，将第一输出晶体管T3拆成几个沟道宽度小的子晶体管串在一起形成纵向结构，可以使设计与仿真的匹配度提升，并且有利于缩小移位寄存器GOA的第一长度h1，实现极窄边框设计。具体地，如图6和图7所示，第一输出晶体管T3包括沿着第二方向y排列且并联设置的至少两个子晶体管，并联指的是各子晶体管的第一极相互连接，第二极相互连接。图6中以设置三个子晶体管T3a、T3b、T3c为例，图7中以设置四个子晶体管T3a、T3b、T3c、T3d为例，子晶体管的个数与所需的第一输出晶体管T3的驱动能力有关，后续会详细介绍。
具体地，如图4所示，各子晶体管T3a-T3d的栅极与第一节点N1电连接，各子晶体管T3a-T3d的第一极与时钟信号端CLK电连接，各子晶体管T3a-T3d的第二极与第一输出信号端O1电连接，第一输出信号端O1与栅线230电连接。
在本公一些实施例中，可以设计每个子晶体管T3a、T3b、T3c在第一方向x的沟道宽度W不大于1000um，这样，一方面可以增加Ion与W/L的线性度，以提高设计与仿真的匹配度，另一方面可以降低移位寄存器GOA的第一长度h1，配合移位寄存器中各晶体管的纵向设计，可以实现极窄边框设计，降低拼接时的接缝宽度，提高用户体验。
本公开实施例提供的触控基板的感光区AA的负载延迟(RC loading)相对液晶显示面板(LCD)的显示区的RC loading较小，因此，触控基板中控制GOA输出的TFT尺寸即第一输出晶体管T3的尺寸(size)需要重新设计。若第一输出晶体管T3的尺寸太大，则会导致GOA本身的RC过大，级联的GOA中距离与时钟信号端CLK连接的时钟信号线的GOA的延迟就会较严重。若第一输出晶体管T3的尺寸太小，则会导致GOA驱动能力不足。根据仿真结果，相同面板尺寸下，触控基板中GOA的第一输出晶体管T3的尺寸为液 晶显示面板中GOA的第一输出晶体管T3尺寸的1/3左右。以55寸为例，第一输出晶体管T3的最佳尺寸为W/L＝4000/4um。因此，如图7所示，可以设计第一输出晶体管T3包括四个沿着第二方向y排列的子晶体管T3a、T3b、T3c、T3d，每个子晶体管T3a、T3b、T3c、T3d的沟道宽度W为1000um，每个子晶体管T3a、T3b、T3c、T3d的沟道长度为4um。
同时，触控基板中的GOA会接收到来自LCD背光经液晶显示面板反射的光，背光强度达到8000～10000nit。此时若GOA采用原有高电位例如33V电压驱动，则GOA中的第一节点N1会因第一输出晶体管T3的源漏端压差过大，导致漏电流比较严重。随着工作温度上升，GOA会出现输出电位下降的情况，因此，在本公开一些实施例中，可以适当降低GOA的工作电压，例如时钟信号端CLK提供的时钟信号的最大幅值可以在15V-25V之间。如图8a和图8b所示，以本公开中时钟信号端CLK提供的时钟信号的最大幅值在18V(无填充)为例，与现有高电位例如27V(黑色填充)进行比较可以看出，在暗态和亮态下，采用本公开的18V第一节点N1的电位随着工作温度上升其电位会下降较慢，GOA输出电位随着工作温度上升其下降情况较小。
可选地，在本公开实施例提供的触控基板中，为了降低移位寄存器输出至栅线的信号负载，如图4和图7所示，移位寄存器GOA还可以包括：第二输出晶体管T13；第二输出晶体管T13的栅极与第一节点N1电连接，第二输出晶体管T13的第一极与时钟信号端CK电连接，第二输出晶体管T13的第二极与第二输出信号端O2电连接，第二输出信号端O2被配置为分别与下一级的移位寄存器GOA中的输入信号端I和上一级的移位寄存器GOA中的复位信号端R电连接，即通过第二输出晶体管T13与上下级移位寄存器实现级联。指的注意的是，级联的上下级移位寄存器可以连续排列，也可以间隔排列，在此不做限定。并且，每组级联的移位寄存器会与提供相反时钟信号的时钟信号端CK1和CK2交替连接。
可选地，在本公开实施例提供的触控基板中，第二输出晶体管T13和第一输出晶体管T3输出的信号时序和幅值相同，但两者的负载不同，因此可以 设置成不同的尺寸。如图7所示，第二输出晶体管T13与第一输出晶体管T3在第二方向y排列，且第二输出晶体管T13在第一方向x的沟道宽度小于各子晶体管T3a-T3d在第一方向x的沟道宽度。即第二输出晶体管T13无需较大的驱动能力。
可选地，在本公开实施例提供的触控基板中，如图4和图7所示，移位寄存器GOA还可以包括：沿着第二方向y排列的输入晶体管T1、复位晶体管T2和控制电路；
输入晶体管T1的栅极和第一极均与输入信号端I电连接，输入晶体管T1的第二极与第一节点N1电连接；
复位晶体管T2的栅极与复位信号端R电连接，复位晶体管T2的第一极与第一电源信号端VGL1电连接，复位晶体管T2的第二极与第一节点N1电连接；
控制电路分别与第一节点N1、第一输出信号端O1和控制信号端V1或V2电连接，控制电路310被配置为响应于控制信号端V1或V2的信号，控制第一节点N1和第一输出信号端O1的电位。
可选地，在本公开实施例提供的触控基板中，如图4所示，控制电路可以包括两个子控制电路311和312，两个子控制电路311和312分别电连接不同的控制信号端V1和V2，子控制电路311和312交替工作，分别控制信号端V1和V2控制，控制信号端V1和V2大约2s～3s进行高低电位切换，以防止第一节点N1长时间处于正偏压状态。
具体地，如图7所示，两个子控制电路311和312中相同功能的晶体管在第一方向x可以并排设置，不同功能的晶体管在第二方向y排列。例如，子控制电路311可以包括：沿着第二方向y排列的第五晶体管T5、第六晶体管T6、第七晶体管T7、第八晶体管T8、第九晶体管T9、第十晶体管T10、第十一晶体管T11和第十二晶体管T12；子控制电路312可以包括：沿着第二方向y排列的第五晶体管T5'、第六晶体管T6'、第七晶体管T7'、第八晶体管T8'、第九晶体管T9'、第十晶体管T10'、第十一晶体管T11'和第十二晶体 管T12'；其中，第五晶体管T5和T5'并排设置，第六晶体管T6和T6'并排设置，以此类推。
具体地，以子控制电路311为例，其内的晶体管连接关系如下：
第八晶体管T8的栅极与第一极均与控制信号端V1电连接，第八晶体管T8的第二极与第五晶体管T5的栅极电连接；
第五晶体管T5的第一极与控制信号端V1电连接，第五晶体管T5的第二极与第二节点N2电连接；
第六晶体管T6的栅极与第一节点N1电连接，第六晶体管T6的第一极与第一电源信号端VGL1电连接，第六晶体管T6的第二极与第二节点N2电连接；
第七晶体管T7的栅极与第一节点N1电连接，第七晶体管T7的第一极与第一电源信号端VGL1电连接，第七晶体管T7的第二极与第五晶体管T5的栅极电连接；
第九晶体管T9的栅极与第二节点N2电连接，第九晶体管T9的第一极与第一电源信号端VGL1电连接，第九晶体管T9的第二极与第一节点N1电连接；
第十晶体管M10的栅极与第二节点N2电连接，第十晶体管M10的第一极与第二电压信号端VGL2电连接，第十晶体管M10的第二极与第一输出信号端O1电连接；
第十一晶体管M11的栅极与第二节点N2电连接，第十一晶体管M11的第一极与第一电压信号端VGL1电连接，第十一晶体管M11的第二极与第二输出信号端O2电连接；
第十二晶体管M12的栅极与输入信号端I电连接，第十二晶体管M12的第一极与第一电压信号端VGL1电连接，第十二晶体管M12的第二极与第二节点N2电连接。
以上仅是举例说明本公开实施例提供的移位寄存器中控制电路的具体结构，在具体实施时，上述控制电路的具体结构不限于本公开实施例提供的上 述结构，还可以是本领域技术人员可知的其他结构，在此不作限定。
可选地，在本公开实施例提供的触控基板中，如图4和图7所示，移位寄存器GOA还可以包括：第四晶体管T4，第四晶体管T4的栅极与第二帧起始信号端电连接，第四晶体管T4的第一极与第一电源信号端VGL1电连接，第四晶体管T4的第二极与第一节点N1电连接。第四晶体管T4用于在栅极驱动电路开启后对全部移位寄存器的第一节点N1进行复位。
以图4所示的移位寄存器的结构为例，结合图5所示的信号时序图，简单说明移位寄存器的工作过程。第一帧起始信号端STV1与首级移位寄存器的输入信号端I电连接，其他移位寄存器的输入信号端I与上一级移位寄存器的第二输出信号端O2电连接。在第二帧起始信号端STV2对全部移位寄存器的第一节点N1复位后，第一帧起始信号端STV1加载信号导通第一晶体管T1，拉高首级移位寄存器的第一节点N1电位，导通第十二晶体管T12，拉低第二节点N2电位。高电位的第一节点N1导通第一输出晶体管T3和第二输出晶体管T13，在时钟信号端CK1加载的时钟信号处于高电位时，第一输出信号端O1和第二输出信号端O2输出高电平。第二输出信号端O2的高电平输入至下一级移位寄存器的输入信号端，并在下一级移位寄存器的第二输出信号端O2输出高电平信号时，本级移位寄存器的复位晶体管T2导通，拉低第一节点N1，第六晶体管T6和第七晶体管T7截止，第五晶体管T5导通，拉高第二节点N2的电位，第十晶体管T10和第十一晶体管T11导通，拉低第一输出信号端O1和第二输出信号端O2的电位。
基于同一发明构思，本公开实施例还提供了一种显示装置，如图9所示，包括：显示模组10，以及至少一个本公开实施例提供的触控基板20，触控基板20位于显示模组10远离显示面的一侧。由于该显示装置解决问题的原理与上述触控基板解决问题的原理相似，因此，本公开实施例提供的该显示装置的实施可以参见本公开实施例提供的上述触控基板的实施，重复之处不再赘述。
在本公开一些实施例中，当应用于大尺寸产品中，如图10所示，触控基 板20可以为多个且紧密排列，图10中以触控基板20采用四个拼接为例进行举例说明，由于在边框区BB的栅极驱动电路300为纵向设计，可以减小左右相邻的两个触控基板20之间的拼接宽度，达到与感光像素200的尺寸大致相同的效果，即在第一方向x相邻的两个触控基板20的边框区在第一方向x的宽度之和H1，小于在第一方向x相邻的两个感光像素200之间的中心间距d1，使用户在进行触控时不会出现不连续的体验。
在本公开一些实施例中，在本公开实施例提供的上述显示装置中，显示模组10可以为液晶显示模组(LCD)，具体可以为扭转向列(Twisted Nematic,TN)型液晶显示屏、高级超维场开关(Adwanced Dimension Switch,ADS)型液晶显示屏、高开口率-高级超维场开关(High-Adwanced Dimension Switch,HADS)型液晶显示屏、平面内开关(In-Plane Switch,IPS)型液晶显示屏等，在此不做具体限定。对于液晶显示模组中必不可少的组成部分均为本领域的普通技术人员应该理解具有的，在此不做赘述，也不应作为对本公开的限制。
在本公开一些实施例中，在本公开实施例提供的上述显示装置中，如图9所示，还可以包括背光模组30，显示模组10位于背光模组30的出光侧，触控基板20位于背光模组30内。
在本公开一些实施例中，背光模组30可以包括背光源31、堆叠设置的反射片32、导光板33和扩散片34，其中，背光源31可以位于导光板33的至少一侧边，触控基板可以位于导光板33和扩散片34之间。背光源31的发射光线从导光片33的侧面进入，经过导光片7033的扩散和反射片32的反射后，在经过触控基板20和扩散片34后可均匀入射至液晶显示模组。
在本公开一些实施例中，为了不影响非可见光(例如近红外光)被非可见光传感器210探测，反射片32可以被配置为反射可见光并透射非可见光(例如近红外光)。
在本公开一些实施例中，在本公开实施例提供的上述显示装置中，显示模组10也可以为电致发光显示模组，例如有机电致发光显示模组(OLED)、量子点发光显示模组(QLED)、迷你/微发光显示模组(mini/Micro LED)等， 对于电致发光显示模组中必不可少的组成部分均为本领域的普通技术人员应该理解具有的，在此不做赘述，也不应作为对本公开的限制。
在本公开一些实施例中，在本公开实施例提供的上述显示装置中，如图9所示，还可以包括支撑框架40，以对显示模组10、触控基板20及背光模组30等提供保护和支撑作用。对于显示装置中其他必不可少的组成部分均为本领域的普通技术人员应该理解具有的，在此不做赘述，也不应作为对本公开的限制。
基于同一发明构思，本公开实施例还提供了一种显示***，如图11所示，可以包括显示装置1和非可见光发射器2，其中，显示装置1为本公开实施例提供的上述显示装置。由于该显示***解决问题的原理与上述显示装置解决问题的原理相似，因此，本公开实施例提供的该显示***的实施可以参见本公开实施例提供的上述显示装置的实施，重复之处不再赘述。
在具体实施时，非可见光发射器2发射的非可见光投射在显示装置1上，较大的光斑可以覆盖住非可见光传感器210，从而基于非可见光传感器210实现从光信号到电信号的转换，进而通过对电信号的处理确定触控位置，实现远距离触控交互。
显然，本领域的技术人员可以对本发明实施例进行各种改动和变型而不脱离本发明实施例的精神和范围。这样，倘若本发明实施例的这些修改和变型属于本发明权利要求及其等同技术的范围之内，则本发明也意图包含这些改动和变型在内。

Claims (21)

  1. 一种触控基板，其中，包括：
    衬底基板，包括感光区和包围所述感光区的边框区；
    多个感光像素，在所述感光区呈阵列排布，所述感光像素包括非可见光传感器和驱动晶体管；
    栅极驱动电路，在所述边框区排布，所述栅极驱动电路包括多个级联的移位寄存器，一个所述移位寄存器的输出端通过栅线与至少一行所述感光像素中的驱动晶体管的栅极电连接，所述栅线沿着第一方向延伸；
    其中，所述移位寄存器包括多个晶体管，在一个所述移位寄存器中，沿着第二方向排列的晶体管个数多于沿着所述第一方向排列的晶体管个数，所述第二方向与所述第一方向大致垂直。
  2. 如权利要求1所述的触控基板，其中，所述移位寄存器在所述第一方向具有第一长度，所述移位寄存器在所述第二方向具有第二长度，所述第一长度小于所述第二长度。
  3. 如权利要求2所述的触控基板，其中，所述第二长度大致等于在所述第二方向相邻的两个所述感光像素之间的中心间距。
  4. 如权利要求2所述的触控基板，其中，所述栅极驱动电路为两个且分别排布在所述栅线的延伸方向两侧的边框区内；所述第一长度小于在所述第一方向相邻的两个所述感光像素之间的中心间距的一半。
  5. 如权利要求3或4所述的触控基板，其中，在所述第一方向和在所述第二方向相邻的两个所述感光像素的中心间距为3mm-5mm。
  6. 如权利要求1-4任一项所述的触控基板，其中，在一个所述移位寄存器中的各晶体管的沟道区域的宽度方向均沿着所述第一方向延伸，所述沟道区域的长度方向均沿着所述第二方向延伸。
  7. 如权利要求1-4任一项所述的触控基板，其中，所述移位寄存器包括：第一输出晶体管，所述第一输出晶体管包括沿着所述第二方向排列且并联设 置的至少两个子晶体管；
    各所述子晶体管的栅极与第一节点电连接，各所述子晶体管的第一极与时钟信号端电连接，各所述子晶体管的第二极与第一输出信号端电连接，所述第一输出信号端与所述栅线电连接。
  8. 如权利要求7所述的触控基板，其中，各所述子晶体管在所述第一方向的沟道宽度不大于1000um。
  9. 如权利要求7所述的触控基板，其中，所述时钟信号端提供的时钟信号的最大幅值在15V-25V之间。
  10. 如权利要求7所述的触控基板，其中，所述移位寄存器还包括：沿着所述第二方向排列的输入晶体管、复位晶体管和控制电路；
    所述输入晶体管的栅极和第一极均与输入信号端电连接，所述输入晶体管的第二极与所述第一节点电连接；
    所述复位晶体管的栅极与复位信号端电连接，所述复位晶体管的第一极与第一电源信号端电连接，所述复位晶体管的第二极与所述第一节点电连接；
    所述控制电路分别与所述第一节点、所述第一输出信号端和控制信号端电连接，所述控制电路被配置为响应于所述控制信号端的信号，控制所述第一节点和所述第一输出信号端的电位。
  11. 如权利要求10所述的触控基板，其中，所述控制电路包括两个子控制电路，所述两个子控制电路分别电连接不同的控制信号端，所述两个子控制电路中相同功能的晶体管在所述第一方向并排设置，不同功能的晶体管在所述第二方向排列。
  12. 如权利要求10所述的触控基板，其中，所述移位寄存器还包括：第二输出晶体管；
    所述第二输出晶体管的栅极与所述第一节点电连接，所述第二输出晶体管的第一极与所述时钟信号端电连接，所述第二输出晶体管的第二极与第二输出信号端电连接，所述第二输出信号端被配置为分别与下一级的移位寄存器中的所述输入信号端和上一级的移位寄存器中的所述复位信号端电连接。
  13. 如权利要求12所述的触控基板，其中，所述第二输出晶体管与所述第一输出晶体管在所述第二方向排列，且所述第二输出晶体管在所述第一方向的沟道宽度小于所述子晶体管在所述第一方向的沟道宽度。
  14. 如权利要求1-4、8-13任一项所述的触控基板，其中，还包括：
    读取电路，在所述边框区排布且与所述栅极驱动电路位于不同边框处，所述读取电路通过数据线与至少一列所述感光像素中的驱动晶体管的第一极电连接，所述数据线沿着所述第二方向延伸。
  15. 如权利要求1-4、8-13任一项所述的触控基板，其中，还包括：非可见光增透膜，位于所述非可见光传感器背离所述衬底基板的一侧，所述非可见光增透膜完全覆盖所述感光区。
  16. 如权利要求15所述的触控基板，其中，所述非可见光增透膜的材料为黑矩阵材料，所述黑矩阵材料选择性透过非可见光。
  17. 一种显示装置，其中，包括：
    显示模组；
    至少一个如权利要求1-16任一项所述的触控基板，所述触控基板位于所述显示模组远离显示面的一侧。
  18. 如权利要求17所述的显示装置，其中，所述触控基板为多个且紧密排列，在所述第一方向相邻的两个所述触控基板的边框区在所述第一方向的宽度之和，小于在所述第一方向相邻的两个所述感光像素之间的中心间距。
  19. 如权利要求17或18所述的显示装置，其中，还包括背光模组；
    所述显示模组为液晶显示模组，所述显示模组位于所述背光模组的出光侧，所述触控基板位于所述背光模组内。
  20. 如权利要求19所述的显示装置，其中，所述背光模组包括：背光源，堆叠设置的反射片、导光板和扩散片；
    所述背光源位于所述导光板的至少一个侧边，所述触控基板位于所述导光板和所述扩散片之间。
  21. 一种显示***，其中，包括显示装置和非可见光发射器，其中，所 述显示装置为如权利要求17-20任一项所述的显示装置。
PCT/CN2021/102024 2021-06-24 2021-06-24 触控基板、显示装置及显示*** WO2022266921A1 (zh)

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CN105469764A (zh) * 2015-12-31 2016-04-06 上海天马微电子有限公司 一种阵列基板、液晶显示面板及电子设备
KR20190075640A (ko) * 2017-12-21 2019-07-01 엘지디스플레이 주식회사 게이트 구동 회로, 터치표시장치 및 표시패널
CN112799548A (zh) * 2021-03-02 2021-05-14 深圳市华星光电半导体显示技术有限公司 显示面板及显示装置

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KR20140079106A (ko) * 2012-12-18 2014-06-26 엘지디스플레이 주식회사 게이트 쉬프트 레지스터와 이를 이용한 표시장치
CN105469764A (zh) * 2015-12-31 2016-04-06 上海天马微电子有限公司 一种阵列基板、液晶显示面板及电子设备
KR20190075640A (ko) * 2017-12-21 2019-07-01 엘지디스플레이 주식회사 게이트 구동 회로, 터치표시장치 및 표시패널
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