WO2022088669A1 - 高重频多波长超短脉冲的锁模光子集成芯片的设计方法及产品和应用 - Google Patents

高重频多波长超短脉冲的锁模光子集成芯片的设计方法及产品和应用 Download PDF

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WO2022088669A1
WO2022088669A1 PCT/CN2021/097324 CN2021097324W WO2022088669A1 WO 2022088669 A1 WO2022088669 A1 WO 2022088669A1 CN 2021097324 W CN2021097324 W CN 2021097324W WO 2022088669 A1 WO2022088669 A1 WO 2022088669A1
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mode
integrated chip
photonic integrated
locked
wavelength
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熊婉姝
吉晨
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浙江大学
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/50—Amplifier structures not provided for in groups H01S5/02 - H01S5/30
    • H01S5/509—Wavelength converting amplifier, e.g. signal gating with a second beam using gain saturation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/026—Monolithically integrated components, e.g. waveguides, monitoring photo-detectors, drivers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/06—Arrangements for controlling the laser output parameters, e.g. by operating on the active medium
    • H01S5/065—Mode locking; Mode suppression; Mode selection ; Self pulsating
    • H01S5/0657—Mode locking, i.e. generation of pulses at a frequency corresponding to a roundtrip in the cavity
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B27/00—Optical systems or apparatus not provided for by any of the groups G02B1/00 - G02B26/00, G02B30/00
    • G02B27/0012—Optical design, e.g. procedures, algorithms, optimisation routines
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/12007—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind forming wavelength selective elements, e.g. multiplexer, demultiplexer
    • G02B6/12009—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind forming wavelength selective elements, e.g. multiplexer, demultiplexer comprising arrayed waveguide grating [AWG] devices, i.e. with a phased array of waveguides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S3/00—Lasers, i.e. devices using stimulated emission of electromagnetic radiation in the infrared, visible or ultraviolet wave range
    • H01S3/10—Controlling the intensity, frequency, phase, polarisation or direction of the emitted radiation, e.g. switching, gating, modulating or demodulating
    • H01S3/11—Mode locking; Q-switching; Other giant-pulse techniques, e.g. cavity dumping
    • H01S3/1106—Mode locking
    • H01S3/1112—Passive mode locking
    • H01S3/1115—Passive mode locking using intracavity saturable absorbers
    • H01S3/1118—Semiconductor saturable absorbers, e.g. semiconductor saturable absorber mirrors [SESAMs]; Solid-state saturable absorbers, e.g. carbon nanotube [CNT] based
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/40—Arrangement of two or more semiconductor lasers, not provided for in groups H01S5/02 - H01S5/30
    • H01S5/4025—Array arrangements, e.g. constituted by discrete laser diodes or laser bar
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/40—Arrangement of two or more semiconductor lasers, not provided for in groups H01S5/02 - H01S5/30
    • H01S5/4025—Array arrangements, e.g. constituted by discrete laser diodes or laser bar
    • H01S5/4031—Edge-emitting structures
    • H01S5/4062—Edge-emitting structures with an external cavity or using internal filters, e.g. Talbot filters
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/026—Monolithically integrated components, e.g. waveguides, monitoring photo-detectors, drivers
    • H01S5/0265—Intensity modulators
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/026—Monolithically integrated components, e.g. waveguides, monitoring photo-detectors, drivers
    • H01S5/0268—Integrated waveguide grating router, e.g. emission of a multi-wavelength laser array is combined by a "dragon router"
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/40—Arrangement of two or more semiconductor lasers, not provided for in groups H01S5/02 - H01S5/30
    • H01S5/4025—Array arrangements, e.g. constituted by discrete laser diodes or laser bar
    • H01S5/4031—Edge-emitting structures
    • H01S5/4068—Edge-emitting structures with lateral coupling by axially offset or by merging waveguides, e.g. Y-couplers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/40—Arrangement of two or more semiconductor lasers, not provided for in groups H01S5/02 - H01S5/30
    • H01S5/4025—Array arrangements, e.g. constituted by discrete laser diodes or laser bar
    • H01S5/4087—Array arrangements, e.g. constituted by discrete laser diodes or laser bar emitting more than one wavelength
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/50—Amplifier structures not provided for in groups H01S5/02 - H01S5/30

Definitions

  • the invention relates to the field of compound semiconductor photonic integration, in particular to a design method, product and application of a mode-locked photonic integrated chip with high repetition frequency multi-wavelength ultrashort pulses.
  • High repetition frequency multi-wavelength semiconductor ultra-short pulse photonic integrated chip can perfectly generate multiple channels of different wavelengths and synchronized high-speed optical pulse signals, and finally generate repetition frequencies up to 100GHz, 200GHz to N ⁇ 100GHz through wavelength division multiplexing (WDM) technology high-quality optical pulse signal sequence.
  • the chip can provide a high-performance, miniaturized, low-cost, and mass-produced ideal chip-level solution for the core optical pulse source in the next-generation 100GHz and subsequent higher-speed photonic analog-to-digital converter (ADC) systems.
  • ADC analog-to-digital converter
  • the role of the analog-to-digital converter ADC is to convert the continuously transformed analog signal in the real world into a discrete digital signal that the computer can read and process.
  • ADCs play an important role in modern communication network systems and are widely used in radar systems, high-speed and high-resolution image and video displays, base station receivers, and high-performance transmitters and controllers.
  • Today's ADCs are mostly traditional electrical ADCs, which are limited by the "electronic bottleneck” and can only process signals with a bandwidth of less than 10 GHz, making it difficult to achieve higher speeds.
  • the concept of photonic ADC is proposed, which takes advantage of the ultra-high bandwidth of photonics to overcome the jitter problem of electronic ADC, breaks through the current technical bottleneck and elevates the performance of ADC to a new level.
  • photonic ADCs are implemented based on discrete devices, with large volume and power consumption, and the stability of the system is also reduced, which greatly limits the application of photonic ADCs.
  • the schemes for generating multi-wavelength short-pulse light sources that have been reported internationally mainly use spectral cutting methods, or fiber mode-locked lasers, external cavity active mode-locked lasers, and so on.
  • Most of the above methods for generating multi-wavelength pulses have complex system structures and require many precise optical components, which are bulky and expensive. More importantly, it is difficult to achieve high repetition frequency pulse output.
  • a good choice for frequency multi-wavelength light sources domestic research on multi-wavelength mode-locked lasers has also been ongoing, but mainly focuses on fiber mode-locked lasers.
  • the mode-locked photonic integrated chip has the advantages of small size, light weight, low power consumption, high stability and durability. With the characteristics of electromagnetic interference, it can output ultra-short pulses with high repetition frequency and multiple wavelengths.
  • Another object of the present invention is to provide an application of a mode-locked photonic integrated chip with high repetition frequency multi-wavelength ultrashort pulses as an emission light source of a high-speed photonic analog-to-digital converter.
  • the present invention provides the following scheme:
  • a method for designing a mode-locked photonic integrated chip with high repetition frequency and multi-wavelength ultrashort pulses includes a semiconductor optical amplifier array, a phase delay line array, an arrayed waveguide grating, Saturable absorbers and semiconductor optical amplifiers are connected by passive waveguides between adjacent components;
  • the semiconductor optical amplifier array separately provides gain for N channels of different wavelengths, and N is an integer greater than or equal to 2;
  • the dimension of the phase delay line array is the same as that of the semiconductor optical amplifier array.
  • the phase delay line array includes phase delay lines of different lengths made of passive waveguide materials, and the phase delay lines of each length compensate for each wavelength channel respectively. Different effective optical path difference of gain light due to dispersion effect;
  • the arrayed waveguide grating adopts a flattening design, which is used for multiplexing the gain light after effective optical path difference compensation, and multiplexing N optical pulse signals into one optical pulse signal;
  • the saturable absorber is connected to the output end of the arrayed waveguide grating, and forms N independent and synchronized mode-locked optical pulse channels of different wavelengths with the arrayed waveguide grating;
  • the semiconductor optical amplifier is used to gain and output the output pulse of the saturable absorber
  • the saturable absorber is designed to be placed at 1/M of the cavity length of the mode-locked photonic integrated chip, and a forward current is applied to the semiconductor optical amplifier array and the semiconductor optical amplifier , the reverse bias voltage is applied to the saturable absorber, and the high repetition frequency optical pulse output M times the fundamental frequency can be realized.
  • a mode-locked photonic integrated chip of high repetition frequency multi-wavelength ultrashort pulse is obtained by the above-mentioned design method of the mode-locked photonic integrated chip of high repetition frequency multi-wavelength ultrashort pulse.
  • the components are connected by passive waveguides, and all the components are tightly combined, which solves the problems of coupling loss, incompressible volume, high cost, and large power consumption between components that would be caused by separating components.
  • the optimized arrayed waveguide grating determines that the complex grating fabrication and grating buried growth process in traditional DFB and DBR lasers are eliminated, the yield of the device is improved, and the cost of the device is reduced.
  • the pulse signal spectral line is narrower and the pulse quality is higher.
  • a high-speed photonic analog-to-digital converter includes the above-mentioned mode-locked photonic integrated chip of high repetition frequency multi-wavelength ultrashort pulses as a light source.
  • the above-mentioned mode-locked photonic integrated chip of high repetition frequency multi-wavelength ultra-short pulse has the above beneficial effects, the above-mentioned mode-locked photonic integrated chip of high repetition frequency multi-wavelength ultra-short pulse can be perfectly applied to high-speed photonic analog-to-digital converter, breaking the The speed bottleneck of traditional analog-to-digital converters provides technical support for 100GHz, 200GHz and later higher-speed network construction.
  • FIG. 2( a ) and FIG. 2( b ) are respectively the spectrograms of the FP laser provided by the embodiment without the arrayed waveguide grating and with the arrayed waveguide grating added.
  • FIG. 1 is a schematic structural diagram of a mode-locked photonic integrated chip of a high repetition frequency multi-wavelength ultrashort pulse provided by an embodiment of the present invention.
  • the mode-locked photonic integrated chip of the high repetition frequency multi-wavelength ultra-short pulse sequentially includes components according to the transmission direction of the optical signal.
  • a semiconductor optical amplifier array composed of amplifiers (SOA), a phase delay line array (Delay Lines) composed of N passive phase delay lines of different lengths and bending degrees (the same as the number of SOAs in the SOA array), an array Waveguide grating (AWG), shared saturable absorber (SA), semiconductor optical amplifier (SOA Amp), and the components are connected by passive waveguides.
  • SOA Array composed of amplifiers (SOA), a phase delay line array (Delay Lines) composed of N passive phase delay lines of different lengths and bending degrees (the same as the number of SOAs in the SOA array), an array Waveguide grating (AWG), shared saturable absorber
  • the N SOAs in the semiconductor optical amplifier array provide gain for the N wavelength channels respectively, and the passive phase delay lines of different lengths and bending degrees compensate the effective optical path difference of each wavelength channel due to the dispersion effect.
  • the flattened AWG selects the wavelength of the broad gain light after effective optical path difference compensation, and forms N independent and synchronous wavelength mode-locked channels with the common SA connected to its output, and finally the output pulse light is realized by SOA Amp gain and output.
  • the five components of SOA Array, Delay Lines, planarized AWG, SA, and SOA Amp are fabricated on the same substrate and connected by passive waveguides. These five components and the passive waveguides that connect them together.
  • the cleavage faces (Cleaved Facets) at both ends of the device together form a mode-locked photonic integrated chip with high repetition frequency and multi-wavelength ultrashort pulses.
  • the output pulse frequency of the above-mentioned high repetition frequency multi-wavelength ultrashort pulse mode-locked photonic integrated chip is also adjustable, and the adjustable range is extremely wide, which can be from 1 to several hundreds of GHz.
  • the repetition frequency of the monolithically integrated semiconductor mode-locked laser can be increased by increasing the harmonic order, and the increase of the harmonic order can be realized by designing and adjusting the structure of the mode-locked photonic integrated chip.
  • the SA structure is designed to be located at 1/M of the cavity length of the mode-locked photonic integrated chip, where M is an integer, and the value of M can be arbitrarily set according to requirements.
  • the SOA Array gain area on both sides of the SA area And SOA Amp gain area is applied with forward current, and reverse bias voltage is applied in SA area, under certain conditions, the pulse shaping effect can be improved to achieve high repetition frequency optical pulse output M times the fundamental frequency.
  • the above mode-locked photonic integrated chip achieves the mode-locking condition by introducing a semiconductor saturable absorber. During operation, a forward current is applied to the gain region to form a gain, and a reverse bias voltage is applied to the absorption region to provide a mode-locking start-up mechanism, thereby obtaining a narrower continuous pulse output.
  • FIG. 2(a) and FIG. 2(b) are respectively the spectrograms of the laser provided by the embodiment without the arrayed waveguide grating and with the arrayed waveguide grating added. It can be obtained by analyzing Fig. 2(a) and Fig. 2(b) that inserting the AWG will introduce the insertion loss of the AGW.
  • a flattened AWG is introduced into the mode-locked photonic integrated chip to obtain a flattened transmission bandwidth.
  • a multi-mode interferometer that generates double Gaussian mode fields is designed on the waveguide entrance surface of the arrayed waveguide grating to improve the transmission bandwidth of the arrayed waveguide grating.
  • FROG Frequency-Resolved Optical Grating
  • the FROG pulse analyzer can test the intensity and phase of the pulse in the time and frequency domains, so as to obtain all the information of the pulse signal.
  • FROG can measure the pulse width more accurately and also test the phase and chirp of the mode-locked pulse. information.
  • the DC source forward current applied in SOA Array and SOA Amp gain region and reverse bias applied in SA region
  • external RF source RF power and frequency
  • the optical pulse time jitter generated in the operation of the mode-locked photonic integrated chip will directly affect the performance of the optical sampling ADC.
  • the optical pulse signal output by the mode-locked photonic integrated chip needs to have low time jitter to meet the requirement of 100G ADC.
  • a hybrid mode-locking method is adopted for the mode-locked photonic integrated chip. Specifically, an external RF source and a biaser are added to the saturable absorber, the reverse bias voltage applied to the saturable absorber and the RF clock signal are combined by the biaser, and the ground-signal (GS) Probes are applied to the saturable absorber to achieve hybrid mode locking.
  • GS ground-signal
  • the embodiment reduces the optical pulse time jitter of the mode-locked photonic integrated chip by optimizing the output frequency and output power of the RF clock signal.
  • the optical pulse time jitter is reduced to less than 1ps.
  • the above-mentioned mode-locked photonic integrated chip has the characteristics of small size, light weight, low power consumption, high stability and resistance to electromagnetic interference, which is convenient for large-scale mass production in the future for network construction and deployment.
  • the high repetition frequency multi-wavelength short pulse source is used in the core network based on the current wavelength division multiplexing (WDM) technology, and even the next generation optical hybrid mode time division-wavelength division multiplexing (OTDM-WDM) core network, optical passive connection.
  • WDM wavelength division multiplexing
  • OTDM-WDM optical hybrid mode time division-wavelength division multiplexing
  • the embodiment also provides a high-speed photonic analog-to-digital converter, and the above-mentioned mode-locked photonic integrated chip of high repetition frequency multi-wavelength ultrashort pulse is used as a light source of the high-speed photonic analog-to-digital converter.
  • the above-mentioned mode-locked photonic integrated chip of high repetition frequency multi-wavelength ultra-short pulse has the above beneficial effects, the above-mentioned mode-locked photonic integrated chip of high repetition frequency multi-wavelength ultra-short pulse can be perfectly applied to high-speed photonic analog-to-digital converters.
  • the mode-locked photonic integrated chip is used to generate ultra-stable optical pulse sequences for sampling, which can be applied to photonic ADCs with high sampling rates.

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Abstract

本发明公开了一种高重频多波长超短脉冲的锁模光子集成芯片的设计方法及产品和应用，包括：半导体光放大器阵列，为N个波长的通道提供增益；相位延迟线阵列，包含不同长度的相位延迟线，分别补偿各波长通道的增益光由于色散效应带来的不同有效光程差；平坦化的阵列波导光栅，对经过有效光程差补偿的增益光进行多路复用，将N路光脉冲信号复用为1路光脉冲信号；饱和吸收体，与阵列波导光栅形成N个独立而又同步的不同波长锁模光脉冲通道；半导体光放大器，用于对所述饱和吸收体的输出脉冲进行增益并输出，具有体积小、质量轻、功耗低、稳定性高和耐电磁干扰的特点，能够输出高重频多波长超短脉冲，可以完美应用于高速光子模数转换器。

Description

高重频多波长超短脉冲的锁模光子集成芯片的设计方法及产品和应用
本申请要求于2020年10月27日提交中国专利局、申请号为202011166148.4、发明名称为“高重频多波长超短脉冲的锁模光子集成芯片的设计方法及产品和应用”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本发明涉及化合物半导体光子集成领域，特别是涉及一种高重频多波长超短脉冲的锁模光子集成芯片的设计方法及产品和应用。
背景技术
高重频多波长半导体超短脉冲光子集成芯片可以完美的产生多路不同波长且同步的高速率光脉冲信号，通过波分复用(WDM)技术最终产生重复频率高达100GHz、200GHz至N×100GHz的高质量光脉冲信号序列。该芯片可以为下一代100GHz继而之后更高速的光子模数转换器(ADC)***中的核心光脉冲源提供一个高性能、小型化、低成本、可批量生产的理想芯片级解决方案。模数转换器ADC的作用是将真实世界中连续变换的模拟信号转换为计算机可以读懂并处理的离散的数字信号。ADC在现代通讯网络***中有着重要的地位，且其应用极度广泛，如在雷达***、高速高分辨率的图像和视频显示、基站的接收机以及高性能传输器和控制器中等。
现如今的ADC多为传统电学ADC，其受限于“电子瓶颈”只能处理带宽不超过10GHz的信号，难以达到更高速度。随着光电子技术的发展，光子ADC的概念被提出，其利用光子学超高带宽的优势克服电子ADC的抖动问题，突破当前技术瓶颈将ADC的性能拔高到新的水平。但是目前光子ADC都是基于分立器件实现，体积和功耗较大，***的稳定性也随之降低，极大地限制了光子ADC的应用。
目前，国际上已报道的产生多波长短脉冲光源的方案主要有用谱切割方式，或光纤锁模激光器、外腔式主动锁模激光器等。上述所有产生多波 长脉冲的方法多数***结构复杂、且需要诸多精密光学元件，体积庞大，价格昂贵，更重要的是难以达到高重频的脉冲输出，不是应用于光采样电量化ADC的高重频多波长光源的良选。国内对于多波长锁模激光器的研究也一直在进行，但主要集中在光纤锁模激光器。
半导体锁模光子集成芯片因其结构紧凑、波长调谐灵活、工作高效等优点，近年来成为诸多科学工作者研究的热点。如前文所说，由于目前光采样电量化ADC都是基于分立器件实现，体积大、功耗高、***的稳定性低，使得光子ADC的应用极大受限。
目前，国内外对多波长半导体锁模激光器芯片的研究已经取得了一定的成果。在2010年，英国格拉斯哥大学的Lianping Hou等人使用量子阱混杂(QWI)技术首次实现了四波长半导体锁模激光器，但四通道的输出频率不完全一致。加州理工学院此前报道了由9个并行的碰撞锁模激光器(CPM)构成的集成芯片，9个锁模激光器只能独立工作。总的来说，各方案具有诸多缺陷。
发明内容
基于此，有必要提供一种高重频多波长超短脉冲的锁模光子集成芯片的设计方法及产品，该锁模光子集成芯片具有体积小、质量轻、功耗低、稳定性高和耐电磁干扰的特点，能够输出高重频多波长超短脉冲。
本发明的另一目的是提供一种高重频多波长超短脉冲的锁模光子集成芯片作为高速光子模数转换器的发射光源的应用。
为实现上述目的，本发明提供了如下方案：
第一方面，一种高重频多波长超短脉冲的锁模光子集成芯片的设计方法，设计所述锁模光子集成芯片包括的部件有半导体光放大器阵列、相位延迟线阵列、阵列波导光栅、饱和吸收体以及半导体光放大器，相邻部件之间通过无源波导连接；
其中，所述半导体光放大器阵列分别单独为N个不同波长的通道提供增益，N为大于等于2的整数；
所述相位延迟线阵列维度与所述半导体光放大器阵列维度相同，所 述相位延迟线阵列包含由无源波导材质制作的不同长度的相位延迟线，各个长度的相位延迟线分别补偿各波长通道的增益光由于色散效应产生的不同有效光程差；
所述阵列波导光栅采用平坦化设计，用于对经过有效光程差补偿的增益光进行多路复用，将N路光脉冲信号复用为1路光脉冲信号；
所述饱和吸收体连接在所述阵列波导光栅的输出端，并与阵列波导光栅形成N个独立而又同步的不同波长锁模光脉冲通道；
所述半导体光放大器用于对所述饱和吸收体的输出脉冲进行增益并输出；
在锁模光子集成芯片的设计方法中，设计所述饱和吸收体置于锁模光子集成芯片的腔长的1/M处，对所述半导体光放大器阵列和所述半导体光放大器施加正向电流，在饱和吸收体施加反向偏置电压，能够实现M倍于基频的高重频光脉冲输出。
第二方面，一种高重频多波长超短脉冲的锁模光子集成芯片，通过上述高重频多波长超短脉冲的锁模光子集成芯片的设计方法得到。
本发明提供的锁模光子集成芯片具有的有益效果至少包括：
部件之间通过无源波导连接，将所有部件紧密地结合到一起，解决了分离器件会产生的器件之间的耦合损耗、无法压缩的体积和高成本、功耗大等问题；各个波长通过平坦化的阵列波导光栅决定，免去传统DFB、DBR激光器中复杂的光栅制作和光栅掩埋生长工艺，提高器件成品率，降低了器件成本，同时，平坦化AWG的引入，使得整个芯片产生的多波长脉冲信号谱线更窄，脉冲质量更高。
第三方面，一种高速光子模数转换器，包括上述高重频多波长超短脉冲的锁模光子集成芯片作为光源。
由于上述高重频多波长超短脉冲的锁模光子集成芯片具有以上有益效果，使得上述高重频多波长超短脉冲的锁模光子集成芯片可以完美应用于高速光子模数转换器上，打破传统模数转换器速度瓶颈，为100GHz、200GHz以及之后更高速率的网络建设提供技术保障。
说明书附图
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是本发明实施例提供的高重频多波长超短脉冲的锁模光子集成芯片的结构示意图，图中N＝10，图示为10通道的锁模光子集成芯片；
图2(a)和图2(b)分别是实施例提供的FP激光器未增加阵列波导光栅和增加阵列波导光栅的光谱图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
为使本发明的上述目的、特征和优点能够更加明显易懂，下面结合附图和具体实施方式对本发明作进一步详细的说明。
图1为本发明实施例提供的高重频多波长超短脉冲的锁模光子集成芯片的结构示意图。如图1所示，该高重频多波长超短脉冲的锁模光子集成芯片按照光信号传输方向依次包括的部件有由N个(N为大于等于2的整数，根据需求任意设置)半导体光放大器(SOA)组成的半导体光放大器阵列(SOA Array)、由N个(与SOA阵列中SOA数量相同)不同长度和弯曲程度的无源相位延迟线组成的相位延迟线阵列(Delay Lines)、阵列波导光栅(AWG)、共用的饱和吸收体(SA)、半导体光放大器(SOA Amp)，部件之间通过无源波导相连接。其中，半导体光放大器阵列中的N个SOA分别为N个波长的通道提供增益，不同长度和弯曲程度的无源相位延迟线对各个波长通道由于色散效应带来的有效光程差进行了补偿，平坦化设计的AWG对经过有效光程差补偿的宽普增益光进行波长选择，与连接在其输出端的共用SA形成N个独立而又同步的波长锁模通道，最 后输出脉冲光通过SOA Amp实现增益并输出。实际制备时，SOA Array、Delay Lines、平坦化的AWG、SA、SOA Amp五个部件制作在同一衬底上，并由无源波导相连，这五个部件以及将其连接起来的无源波导连同器件两端的解理面(CleavedFacet)共同形成了高重频多波长超短脉冲的锁模光子集成芯片。
在制备实施例提供的高重频多波长超短脉冲的锁模光子集成芯片时，只需要调整SOA Array和SOA Array中的半导体增益材料，并保证调整后的半导体增益材料可以产生足够的增益即可以获得满足激光输出条件的任何波段的脉冲光。上述高重频多波长超短脉冲的锁模光子集成芯片的输出脉冲频率也是可调的，可调范围极广，可以为1至几百GHz。其中，单片集成半导体锁模激光器的重复频率可以通过增加谐波阶数来提升，而提高谐波阶数可以通过设计调整锁模光子集成芯片结构来实现。在锁模光子集成芯片结构中，设计将SA结构位于锁模光子集成芯片腔长的1/M处，其中，M为整数，可以根据需求任意设置M值，SA区两侧的SOA Array增益区和SOA Amp增益区被施加正向电流，在SA区施加反向偏置电压，在一定条件下可提升脉冲整形作用实现M倍于基频的高重频光脉冲输出。
上述锁模光子集成芯片通过引入半导体可饱和吸收体达到锁模条件。工作时在增益区加正向电流形成增益，而吸收区加反向偏压来提供锁模启动机制，从而获得较窄的连续脉冲输出。
在上述锁模光子集成芯片中引入AWG结构时，AWG的***损耗会直接影响光脉冲的宽度，使得通过AWG通道的脉冲宽度比锁模之后的脉冲宽度宽很多。图2(a)和图2(b)分别是实施例提供的激光器未增加阵列波导光栅和增加阵列波导光栅的光谱图。分析图2(a)和图2(b)可以得到，***AWG会引入AGW的***损耗。
为了解决AWG的***损耗影响光脉冲宽度的问题，实施例中，在锁模光子集成芯片引入平坦化的AWG，得到一个平坦化的传输带宽。在所述阵列波导光栅的波导入射面设计有产生双重高斯模场的多模干涉仪来提升阵列波导光栅的传输带宽。
在设计锁模光子集成芯片的过程中，可以采用FROG (Frequency-ResolvedOptical Grating)来测试输出的脉冲信号的啁啾特性。FROG脉冲分析仪可以实现对脉冲在时域和频域的强度和相位测试，从而得到脉冲信号的全部信息，FROG在更加准确的测量脉冲宽度的同时还能够测试出锁模脉冲的相位和啁啾信息。
在用FROG分析锁模脉冲的啁啾特性之后，可以分析研究DC源(在SOA Array和SOA Amp增益区施加的正向电流与SA区施加的反向偏压)和外部RF源(RF的功率和频率)对减小脉冲宽度的影响。从而使锁模光子集成芯片的时间带宽积临近脉冲型的转换极限值(确定的常数)，来有效地降低输出脉冲的啁啾。
在设计锁模光子集成芯片时，还发现锁模光子集成芯片在工作中产生的光脉冲时间抖动会直接影响光采样ADC的性能。在光子ADC实际应用***中，锁模光子集成芯片输出的光脉冲信号需要具有较低的时间抖动，来满足100GADC需求。
为了大大降低输出光脉冲信号的时间抖动，对锁模光子集成芯片采用混合锁模方式。具体地，在所述饱和吸收体上增加外部RF源和偏置器，利用偏置器将施加于饱和吸收体的反向偏置电压和RF时钟信号合并到一起，利用地-信号(GS)探针施加在饱和吸收体以实现混合锁模。
在研究的过程中发现，锁模光子集成芯片的输出脉冲信号宽度对外部RF时钟源的调谐频率和输出功率很敏感。因此，实施例通过优化RF时钟信号的输出频率和输出功率以降低锁模光子集成芯片的光脉冲时间抖动。经过探究得到，当RF时钟信号的输出功率大于20dBm时，光脉冲时间抖动降低到1ps以下。
上述锁模光子集成芯片具有体积小、质量轻、功耗低、稳定性高和耐电磁干扰的特点，便于日后大规模批量生产用于网络***署。不仅如此，高重频多波长短脉冲源在基于当前波分复用(WDM)技术的核心网，甚至下一代光混合模式时分-波分复用(OTDM-WDM)核心网、光无源接入网(OTDM-WDM PON)中，都会有大量且重要的应用。
实施例还提供了一种高速光子模数转换器，上述高重频多波长超短脉冲的锁模光子集成芯片作为高速光子模数转换器的光源。
由于上述高重频多波长超短脉冲的锁模光子集成芯片具有以上有益 效果，使得上述高重频多波长超短脉冲的锁模光子集成芯片可以完美应用于高速光子模数转换器上，利用锁模光子集成芯片来产生超稳定的光脉冲序列进行采样，可以应用于高采样率的光子ADC中。
本说明书中各个实施例采用递进的方式描述，每个实施例重点说明的都是与其他实施例的不同之处，各个实施例之间相同相似部分互相参见即可。对于实施例公开的***而言，由于其与实施例公开的方法相对应，所以描述的比较简单，相关之处参见方法部分说明即可。
本文中应用了具体个例对本发明的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本发明的方法及其核心思想；同时，对于本领域的一般技术人员，依据本发明的思想，在具体实施方式及应用范围上均会有改变之处。综上所述，本说明书内容不应理解为对本发明的限制。

Claims (9)

  1. 一种高重频多波长超短脉冲的锁模光子集成芯片的设计方法，其特征在于，设计所述锁模光子集成芯片包括的部件有半导体光放大器阵列、相位延迟线阵列、阵列波导光栅、饱和吸收体以及半导体光放大器，相邻部件之间通过无源波导连接；
    其中，所述半导体光放大器阵列分别单独为N个不同波长的通道提供增益，N为大于等于2的整数；
    所述相位延迟线阵列维度与所述半导体光放大器阵列维度相同，所述相位延迟线阵列包含由无源波导材质制作的不同长度的相位延迟线，各个长度的相位延迟线分别补偿各波长通道的增益光由于色散效应产生的不同有效光程差；
    所述阵列波导光栅采用平坦化设计，用于对经过有效光程差补偿的增益光进行多路复用，将N路光脉冲信号复用为1路光脉冲信号；
    所述饱和吸收体连接在所述阵列波导光栅的输出端，并与阵列波导光栅形成N个独立而又同步的不同波长锁模光脉冲通道；
    所述半导体光放大器用于对所述饱和吸收体的输出脉冲进行增益并输出。
  2. 如权利要求1所述的高重频多波长超短脉冲的锁模光子集成芯片的设计方法，其特征在于，设计所述饱和吸收体置于锁模光子集成芯片的腔长的1/M处，对所述半导体光放大器阵列和所述半导体光放大器施加正向电流，在饱和吸收体施加反向偏置电压，能够实现M倍于基频的高重频光脉冲输出。
  3. 如权利要求1所述的高重频多波长超短脉冲的锁模光子集成芯片的设计方法，其特征在于，在所述阵列波导光栅的波导入射面设计有多模干涉仪来提升阵列波导光栅的传输带宽。
  4. 如权利要求1所述的高重频多波长超短脉冲的锁模光子集成芯片的设计方法，其特征在于，通过控制锁模光子集成芯片的时间带宽积临近脉冲型的转换极限值，来降低输出脉冲的啁啾。
  5. 如权利要求1所述的高重频多波长超短脉冲的锁模光子集成芯片的设计方法，其特征在于，在所述饱和吸收体上增加外部RF源和偏置器，利用偏置器将施加于饱和吸收体的反向偏置电压和RF时钟信号合并到一 起，利用地-信号探针施加在饱和吸收体以实现混合锁模。
  6. 如权利要求5所述的高重频多波长超短脉冲的锁模光子集成芯片的设计方法，其特征在于，通过优化RF时钟信号的输出功率和输出频率以降低锁模光子集成芯片的光脉冲时间抖动。
  7. 如权利要求6所述的高重频多波长超短脉冲的锁模光子集成芯片的设计方法，其特征在于，所述RF时钟信号的输出功率大于20dBm。
  8. 一种高重频多波长超短脉冲的锁模光子集成芯片，其特征在于，通过权利要求1～6任一项所述的高重频多波长超短脉冲的锁模光子集成芯片的设计方法得到。
  9. 一种高速光子模数转换器，其特征在于，包括所述权利要求6所述的高重频多波长超短脉冲的锁模光子集成芯片作为光源。
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