WO2022041813A1 - 双馈变频器及其调制方法 - Google Patents

双馈变频器及其调制方法 Download PDF

Info

Publication number
WO2022041813A1
WO2022041813A1 PCT/CN2021/090209 CN2021090209W WO2022041813A1 WO 2022041813 A1 WO2022041813 A1 WO 2022041813A1 CN 2021090209 W CN2021090209 W CN 2021090209W WO 2022041813 A1 WO2022041813 A1 WO 2022041813A1
Authority
WO
WIPO (PCT)
Prior art keywords
switch module
state
positive
negative
zero
Prior art date
Application number
PCT/CN2021/090209
Other languages
English (en)
French (fr)
Inventor
孟浩
胡子晨
曹亮
Original Assignee
远景能源有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 远景能源有限公司 filed Critical 远景能源有限公司
Priority to MX2023001971A priority Critical patent/MX2023001971A/es
Priority to GB2300907.9A priority patent/GB2618406A/en
Publication of WO2022041813A1 publication Critical patent/WO2022041813A1/zh
Priority to ZA2023/00358A priority patent/ZA202300358B/en

Links

Images

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/487—Neutral point clamped inverters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • H02M7/53871—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0048—Circuits or arrangements for reducing losses
    • H02M1/0054—Transistor switching losses
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

  • the invention relates to the technical field of power electronics, in particular to a doubly-fed frequency converter and a modulation method thereof.
  • Doubly-fed generator both the stator and rotor can feed power to the grid, the rotor side adopts slip control, and the excitation frequency changes with the motor speed.
  • the doubly-fed frequency converter is used for the AC grid to provide excitation current to the generator, to control the torque of the generator, and to realize the generator feeding power to the grid.
  • the purpose of the present invention is to provide a doubly-fed frequency converter and a modulation method thereof, so as to solve the problem that the existing doubly-fed frequency converter has a risk of failure under synchronous speed operation.
  • the present invention provides a modulation method for a doubly-fed frequency converter.
  • the doubly-fed frequency converter includes a three-phase bridge arm, and each phase bridge arm includes a first switch module, a second switch module, a third switch module, and a fourth switch module.
  • the switch module, the fifth switch module and the sixth switch module including:
  • the bridge arm of each phase is brought into a positive half-wave cycle state, a positive dead zone state, a positive zero state, an all-zero state, a negative zero state, a negative dead zone state and a negative half-wave cycle state.
  • the said doubly-fed frequency converter modulation method also includes:
  • the bridge arm of each phase enters the positive half-wave cycle state, the positive dead zone state, the positive zero state, the all zero state, the negative zero state, and the all zero state in sequence state, the positive zero state, the positive deadband state, and the positive half-wave cycle state;
  • the bridge arm of each phase enters the positive zero state, the all zero state, the negative zero state, the negative dead zone state, the negative half-wave cycle state, and the negative dead state in turn. a zone state, the negative zero state, the all zero state, and the positive zero state;
  • the first stage and the second stage are cyclically performed with each other.
  • the method further includes: the rotational speed of the rotor of the generator connected to the doubly-fed frequency converter is equal to the rotational speed of the stator rotating magnetic field.
  • the bridge arm of each phase further includes a first capacitor and a second capacitor connected in series between the positive input terminal and the negative input terminal in sequence, and the first capacitor The junction with the second capacitor is zero input, where:
  • the first switch module, the second switch module, the third switch module and the fourth switch module are connected in series between the positive input terminal and the negative input terminal in sequence;
  • connection between the first switch module and the second switch module is a first connection point
  • connection between the third switch module and the fourth switch module is a second connection point
  • connection between the second switch module and the third switch module is the output end of each phase
  • One end of the fifth switch module is connected to the first connection point, and the other end is connected to the sixth switch module and the zero input terminal;
  • the other end of the sixth switch module is connected to the second connection point.
  • the said doubly-fed frequency converter modulation method also includes:
  • the first switch module, the second switch module, the third switch module, the fourth switch module, the fifth switch module and the sixth switch module are Si IGBT modules and SiC MOSFET modules. one or more of.
  • the said doubly-fed frequency converter modulation method also includes:
  • a first signal is provided for the first switch module, the second switch module and the sixth switch module, and the third switch module and the fourth switch module are provided and the fifth switch module provides a second signal;
  • a first signal is provided for the second switch module, and the first switch module, the third switch module, the fourth switch module, the fifth switch module and the the sixth switch module provides a second signal;
  • a first signal is provided for the second switch module and the fifth switch module, and a first signal is provided for the first switch module, the third switch module, the fourth switch module and all the sixth switch module provides the second signal;
  • a first signal is provided for the second switch module, the third switch module, the fifth switch module and the sixth switch module, and the first switch module and the sixth switch module are provided with a first signal.
  • the fourth switch module provides the second signal;
  • a first signal is provided for the third switch module and the sixth switch module, and a first signal is provided for the first switch module, the second switch module, the fourth switch module and all the fifth switch module provides the second signal;
  • a first signal is provided for the third switch module, the first switch module, the second switch module, the fourth switch module, the fifth switch module and the the sixth switch module provides a second signal;
  • a first signal is provided for the third switch module, the fourth switch module and the fifth switch module, and the first switch module and the second switch module are provided and the sixth switch module provides a second signal.
  • the said doubly-fed frequency converter modulation method also includes:
  • the modulating wave is a sine wave, and the carrier wave is a triangular wave;
  • the zero-state analysis process includes:
  • a time distribution result of the positive zero state, the all zero state, and the negative zero state is output.
  • the zero-level thermal optimization redistribution includes:
  • the bridge arm of each phase enters the positive half-wave cycle state, the positive dead zone state, the positive zero state, the all zero state, the negative zero state, and the all zero state in sequence state, the positive zero state, the positive deadband state, and the positive half-wave cycle state;
  • the bridge arm of each phase enters the positive zero state, the all zero state, the negative zero state, the negative dead zone state, the negative half-wave cycle state, and the negative dead state in turn. zone state, the negative zero state, the all zero state, and the positive zero state.
  • the small loop ANPC modulation includes:
  • each phase bridge arm sequentially enters the positive half-wave cycle state, the positive dead zone state, the positive zero state, the positive dead zone state and the positive half-wave cycle state;
  • each phase bridge arm sequentially enters the negative half-wave cycle state, the negative dead zone state, the negative zero state, the negative dead zone state and the negative half-wave cycle state.
  • the present invention also provides a double-fed frequency converter, comprising a three-phase bridge arm and a control unit, wherein:
  • Each phase bridge arm includes a first switch module, a second switch module, a third switch module, a fourth switch module, a fifth switch module and a sixth switch module;
  • the control unit controls on and off of the first switch module, the second switch module, the third switch module, the fourth switch module, the fifth switch module and the sixth switch module. Turn off, so that the bridge arm of each phase enters a positive half-wave cycle state, a positive dead-time state, a positive-zero state, an all-zero state, a negative-zero state, a negative-dead-time state, and a negative half-wave cycle state.
  • the control unit controls the conduction of the first switch module, the second switch module, the third switch module, the fourth switch module, the fifth switch module and the sixth switch module On and off, so that each phase bridge arm enters the positive half-wave cycle state, positive dead zone state, positive zero state, all zero state, negative zero state, negative dead zone state and negative half-wave cycle state, realizing flexible use ANPC zero-level distribution time, especially for high-power doubly-fed inverters, makes the heat distribution of the components of each switch module more uniform at the synchronous speed operating point, and the commutation loop adopts a small loop, so that the source-drain of the devices of each switch module is The problems of lower pole voltage, voltage stress and heat distribution are effectively solved, and the voltage equalization effect between the first switch module and the second switch module, and between the fifth switch module and the sixth switch module is better, and the inverter Synchronous speed current output capability is increased by more than 20%.
  • the present invention redistributes modulation through zero-level thermal optimization, so that the device conduction loss of the second switch module and the device conduction loss of the fifth switch module are transferred to the third switch module and the sixth switch module. Since the switching times of the second switch module, the fifth switch module, the third switch module and the sixth switch module are additionally increased in this process (for example, the second switch module and the fifth switch module are subjected to 1/4 Udc voltage when the state is switched) The switching action will cause a small amount of additional loss ⁇ Ps). After the state is switched, the device conduction loss reduced by the second switch module and the fifth switch module is ⁇ Pon.
  • the present invention first calculates the first nominal loss and the second nominal loss, and makes judgment and analysis based on the two. Less small loop ANPC modulation makes the zero-level thermal optimization redistribution modulation strategy more reasonable.
  • the present invention provides an ANPC three-level doubly-fed frequency converter modulation strategy, a modulation method for active uniform loss distribution, in the conventional ANPC three-level modulation switching sequence, the zero state is divided into positive zero OU, negative zero OL and The intermediate transient all-zero OUL, and according to the operating point and loss model of the doubly-fed generator, the zero-state re-optimization distribution is carried out to make the loss distribution more uniform and improve the output capacity of the inverter.
  • the solution of the present invention can also perform active voltage equalization on the devices of each switch module. For example, in the positive half-wave cycle state, when the first switch module and the second switch module are turned on, the fifth switch module is turned on, and the third switch module is turned on.
  • the voltages borne by the switch module and the fourth switch module are equally divided to prevent device failure caused by uneven voltage.
  • the output voltage state can be obtained either by the space vector or by the carrier modulation.
  • the carrier modulation compares the low-frequency sinusoidal voltage signal output by the control loop with the triangular carrier. When the modulated wave is greater than zero and greater than the carrier, a positive state is output. When the modulated wave is less than Zero and less than the carrier, output negative state, the rest output zero state.
  • 1 is a schematic diagram of the existing ANPC structure and current path
  • FIG. 2 is a schematic diagram of an existing ANPC conventional small-loop modulation commutation loop
  • FIG. 3 is a schematic diagram of an existing ANPC conventional large-loop modulation commutation loop
  • FIG. 4 is a schematic diagram of a current commutation circuit of a modulation method for a doubly-fed inverter according to an embodiment of the present invention
  • FIG. 5 is a schematic diagram of a modulation switch signal modulated by a doubly-fed inverter modulation method according to an embodiment of the present invention
  • FIG. 6 is a schematic diagram of a modulation logic flow of a modulation method for a doubly-fed inverter according to an embodiment of the present invention.
  • the core idea of the present invention is to provide a doubly-fed frequency converter and a modulation method thereof, so as to solve the problem that the existing doubly-fed frequency converter has a failure risk under the condition of synchronous speed operation.
  • the present invention provides a doubly-fed frequency converter and a modulation method thereof.
  • the doubly-fed frequency converter includes a three-phase bridge arm and a control unit, wherein: each phase bridge arm includes a first switch module, a second switch module, The third switch module, the fourth switch module, the fifth switch module and the sixth switch module; the control unit controls the first switch module, the second switch module, the third switch module, the fourth switch module.
  • the switch module, the fifth switch module and the sixth switch module are turned on and off, so that the bridge arm of each phase enters a positive half-wave cycle state, a positive dead zone state, a positive zero state, and an all-zero state , negative zero state, negative dead zone state and negative half-wave cycle state.
  • the doubly-fed inverter and its modulation method provided by the invention realize the application of ANPC three-level devices in the doubly-fed inverter, and redesign the modulation strategy for the doubly-fed inverter at the working point of the motor synchronous speed, so as to improve the torque output capability, The risk of power module failure is reduced, and the heat loss of the inverter power semiconductor devices is evenly distributed.
  • the outer tubes T1/D1 and T5/D5 are one package
  • the inner tubes T2/D2 and T3/D3 are one package
  • the outer tubes T4/D4 and T6/ D6 is a package.
  • the existing modulation technology is shown in Figure 3. It is not suitable for high-power inverters. Considering that the parasitic loop of the power module has inductance parameters, it will increase the voltage stress of the semiconductor device, reduce the DC voltage utilization rate, and increase additional losses. , also has a negative impact on lifespan.
  • the doubly-fed inverter includes a three-phase bridge arm, and each phase bridge arm includes a first switch module T1, a second switch module T2, and a third switch module T3, the fourth switch module T4, the fifth switch module T5 and the sixth switch module T6, each phase AC output has 3 states, respectively (bus voltage is Udc) positive voltage +0.5Udc, zero voltage, negative voltage -0.5 Udc, there are 7 corresponding switch states, including: as shown in FIG.
  • Fig. 4(1) is called P state (positive half-wave cycle state P), and the corresponding switching sequence is 110010.
  • Figure 4(2) is called DeadP state, that is, the positive dead zone state DeadP, and the corresponding switching sequence is 010000.
  • Figure 4(3) is called the OU state, that is, the positive zero state OU, and the corresponding switching sequence is 010010.
  • Figure 4(4) is called the OUL state, that is, the all-zero state OUL, and the corresponding switching sequence is 011011.
  • Figure 4(5) is called the OL state, that is, the negative zero state OL, and the corresponding switching sequence is 001001.
  • Figure 4(6) is called the DeadN state, that is, the negative dead zone state DeadN, and the corresponding switching sequence is 001000.
  • Figure 4(7) is called the N state, that is, the negative half-wave cycle state N, and the corresponding switching sequence is 001110.
  • the method further includes: in the first stage, the bridge arm of each phase enters the positive half-wave period state P, the positive dead zone state DeadP, the positive zero state OU, the all zero state OUL, the negative zero state OL, the all zero state OUL, the positive zero state OU, the positive dead zone state DeadP, and the positive half-wave cycle state P; In the second stage, the bridge arm of each phase enters the positive zero state OU, the all-zero state OUL, the negative zero state OL, the negative dead zone state DeadN, and the negative half-wave cycle state N in sequence , the negative dead zone state DeadN, the negative zero state OL, the all zero state OUL, and the positive zero state OU; the first stage and the second stage are cyclically performed.
  • the method further includes: the rotational speed of the rotor of the generator connected to the doubly-fed frequency converter is equal to the rotational speed of the rotating magnetic field of the stator.
  • the bridge arm of each phase further includes a first capacitor C1 and a second capacitor connected in series between the positive input terminal P and the negative input terminal N in sequence C2, the connection between the first capacitor C1 and the second capacitor C2 is zero input terminal O, wherein: the first switch module T1, the second switch module T2, the third switch module T3 and The fourth switch module T4 is connected in series between the positive input terminal P and the negative input terminal N in sequence; the connection between the first switch module T1 and the second switch module T2 is the first connection point; the third switch module T2 The connection between the switch module T3 and the fourth switch module T4 is the second connection point; the connection between the second switch module T2 and the third switch module T3 is the output end of each phase; the fifth switch module One end of T5 is connected to the first connection point, and the other end is connected to the sixth switch module T6 and the zero input terminal O; the other end of the sixth switch module T6 is connected to the second connection point
  • the modulation method for a doubly-fed frequency converter further includes: the first switch module T1, the second switch module T2, the third switch module T3, the The fourth switch module T4, the fifth switch module T5 and the sixth switch module T6 are one or more of a Si IGBT module and a SiC MOSFET module.
  • the method further includes: in the positive half-wave period state P, for the first switch module T1 and the second switch module T2 and the sixth switch module T6 to provide a first signal to provide a second signal to the third switch module T3, the fourth switch module T4 and the fifth switch module T5; in the positive dead zone state DeadP Next, a first signal is provided for the second switch module T2, and the first switch module T1, the third switch module T3, the fourth switch module T4, the fifth switch module T5 and the The sixth switch module T6 provides a second signal; in the positive zero state OU, the second switch module T2 and the fifth switch module T5 are provided with a first signal, and the first switch module T1, all The third switch module T3, the fourth switch module T4 and the sixth switch module T6 provide a second signal; in the all-zero state OUL, the second switch module T2, the third switch Module T3, the fifth switch module T5 and the sixth switch module T6 provide a first signal to provide a second signal to the third switch module T3, the fourth switch module T4 and the
  • the modulation method of the double-fed frequency converter further includes: providing a modulating wave and a carrier wave; the modulating wave is a low-frequency sine wave, and the carrier wave is a high-frequency triangular wave, wherein in FIG. 5 Only a microscopic image of a sine wave is shown, which is close to a square wave; when the modulated wave is positive and greater than the carrier, the positive half-wave cycle state P is entered; when the modulated wave is positive and When it is less than the carrier, enter the zero-state analysis process; when the modulated wave is negative and greater than the carrier, enter the zero-state analysis process; when the modulated wave is negative and less than the carrier, enter the negative Half-wave cycle state N.
  • the zero-state analysis process includes: calculating the total time of the positive-zero state OU, the all-zero state OUL and the negative-zero state OL; calculating The additional switching loss generated by switching between the positive-zero state OU, the all-zero state OUL and the negative-zero state OL obtains the first nominal loss; calculate the positive-zero state OU, the all-zero state OUL and the reduction of conduction loss caused by switching between the negative zero states OL, to obtain the second nominal loss; calculating the amplitude of the modulating wave when the first nominal loss is less than the second nominal loss, obtain Nominal modulation wave amplitude; determine whether the generator speed is synchronous speed, or whether the amplitude of the modulation wave is less than the nominal modulation wave amplitude; The model allocates the time of the positive zero state OU, the all zero state OUL and the negative zero state OL, otherwise it enters the small loop ANPC
  • the zero-level thermal optimization redistribution includes: in the first stage, the bridge arms of each phase enter the positive half-wave in sequence Period state P, the positive dead zone state DeadP, the positive zero state OU, the all zero state OUL, the negative zero state OL, the all zero state OUL, the positive zero state OU, the positive zero state Dead zone state DeadP and the positive half-wave cycle state P; in the second stage, the bridge arm of each phase enters the positive zero state OU, the all-zero state OUL, the negative zero state OL, the Negative deadband state DeadN, the negative half-wave cycle state N, the negative deadband state DeadN, the negative zero state OL, the all zero state OUL, and the positive zero state OU.
  • the small-loop ANPC modulation includes: in the first stage, each phase bridge arm sequentially enters the positive half-wave cycle state P , the positive dead zone state DeadP, the positive zero state OU, the positive dead zone state DeadP, and the positive half-wave cycle state P; in the second stage, each phase bridge arm sequentially enters the negative half-wave Period state N, the negative dead zone state DeadN, the negative zero state OL, the negative dead zone state DeadN, and the negative half-wave periodic state N.
  • the switching sequence switching is divided into two types:
  • Zero-level state optimization modulation positive half-wave period P—>DeadP—>OU—>OUL—>OL, negative half-wave period N—>DeadN—>OL—>OUL—>OU; switch from positive state with output voltage Taking the zero state as an example, the switching relationship is shown in (1)(2)(3)(4)(5) in Figure 4. On the basis of the small loop modulation, the positive zero continues to switch, and the transient all-zero OUL process is added.
  • each phase bridge arm includes a first switch module T1, a second switch module T2, a third switch module T3, and a fourth switch module T4, a fifth switch module T5 and a sixth switch module T6;
  • the control unit controls the first switch module T1, the second switch module T2, the third switch module T3, and the fourth switch module T4 , the turn-on and turn-off of the fifth switch module T5 and the sixth switch module T6, so that the bridge arm of each phase enters the positive half-wave cycle state P, the positive dead zone state DeadP, the positive zero state OU, All-zero state OUL, negative zero state OL, negative dead zone state DeadN, and negative half-wave cycle state N.
  • the first switch module T1, the second switch module T2, the third switch module T3, the fourth switch module T4, the fifth switch module T5 and the third switch module T1 are controlled by the control unit.
  • DeadN and negative half-wave cycle state N realize the flexible use of ANPC zero-level distribution time, especially for high-power doubly-fed inverters, under the operating point of synchronous speed, the heat distribution of the components of each switch module is more uniform, and the commutation loop is evenly distributed.
  • the use of small loops can effectively solve the problems of lower source-drain voltage, voltage stress and heat distribution of the devices of each switch module.
  • the voltage equalization effect with the sixth switch module T6 is better, and the synchronous speed current output capability of the inverter is increased by more than 20%.
  • the present invention redistributes modulation through zero-level thermal optimization, so that the device conduction loss of the second switch module T2 and the device conduction loss of the fifth switch module T5 are transferred to the third switch module T3 and the sixth switch module T6. Since the switching times of the second switch module T2, the fifth switch module T5, the third switch module T3 and the sixth switch module T6 are additionally increased in this process (for example, the second switch module T2, the fifth switch module T5 during the state switching Switching under 1/4 Udc voltage will cause a small amount of additional loss ⁇ Ps). After the state is switched, the device conduction loss reduced by the second switch module T2 and the fifth switch module T5 is ⁇ Pon.
  • the present invention first calculates the first nominal loss and the second nominal loss, and makes judgment and analysis based on the two. Less small loop ANPC modulation makes the zero-level thermal optimization redistribution modulation strategy more reasonable.
  • the present invention provides an ANPC three-level doubly-fed frequency converter modulation strategy, a modulation method for active uniform loss distribution, in the conventional ANPC three-level modulation switching sequence, the zero state is divided into positive zero OU, negative zero OL and The intermediate transient all-zero OUL, and according to the operating point and loss model of the doubly-fed generator, the zero-state re-optimization distribution is carried out to make the loss distribution more uniform and improve the output capacity of the inverter.
  • the solution of the present invention can also perform active voltage equalization on the devices of each switch module. For example, in the positive half-wave cycle state P, when the first switch module T1 and the second switch module T2 are turned on, the fifth switch module T5 is turned on at the same time.
  • the voltages of the third switch module T3 and the fourth switch module T4 are equally divided to prevent device failure caused by uneven voltages.
  • the output voltage state can be obtained either by the space vector or by the carrier modulation.
  • the carrier modulation compares the low-frequency sinusoidal voltage signal output by the control loop with the triangular carrier. When the modulated wave is greater than zero and greater than the carrier, a positive state is output. When the modulated wave is less than Zero and less than the carrier, output negative state, the rest output zero state.
  • the above-mentioned embodiments describe in detail the different configurations of the doubly-fed frequency converter and its modulation method.
  • the present invention includes but is not limited to the configurations listed in the above-mentioned embodiments, any configuration provided in the above-mentioned embodiments.
  • the content transformed on the basis of the type all belong to the scope of protection of the present invention. Those skilled in the art can draw inferences from the contents of the foregoing embodiments.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)
  • Rectifiers (AREA)

Abstract

本发明提供了一种双馈变频器及其调制方法，双馈变频器包括三相桥臂和控制单元，每相桥臂包括第一开关模块、第二开关模块、第三开关模块、第四开关模块、第五开关模块及第六开关模块，控制单元控制所述第一开关模块、所述第二开关模块、所述第三开关模块、所述第四开关模块、所述第五开关模块及所述第六开关模块的导通和关断，以使所述每相桥臂进入正半波周期状态、正死区状态、正零状态、全零状态、负零状态、负死区状态及负半波周期状态。

Description

双馈变频器及其调制方法 技术领域
本发明涉及电力电子技术领域，特别涉及一种双馈变频器及其调制方法。
背景技术
双馈发电机(DFIG)，定子转子均可向电网馈电，转子侧采用转差控制，励磁频率随着电机转速而变化。双馈变频器用于交流电网向发电机提供励磁电流，对发电机进行转矩控制，实现发电机向电网馈电。
目前市场上同类产品主要采用两电平变频器或者I型NPC三电平，针对双馈变频器同步速运行的特殊应用场景，变频器提供的励磁电流为直流，会使电流长时间流过变频器特定的某些功率半导体器件，使之发热集中，限制了发电机扭矩输出能力，存在失效风险。市面上针对ANPC三电平器件的使用，未对双馈发电机的此特殊工况进行处理。
发明内容
本发明的目的在于提供一种双馈变频器及其调制方法，以解决现有的双馈变频器同步速运行情况下存在失效风险的问题。
为解决上述技术问题，本发明提供一种双馈变频器调制方法，双馈变频器包括三相桥臂，每相桥臂包括第一开关模块、第二开关模块、第三开关模块、第四开关模块、第五开关模块及第六开关模块，包括：
控制所述第一开关模块、所述第二开关模块、所述第三开关模块、所述第四开关模块、所述第五开关模块及所述第六开关模块的导通和关断，以使所述每相桥臂进入正半波周期状态、正死区状态、正零状态、全零状态、负零状态、负死区状态及负半波周期状态。
可选的，在所述的双馈变频器调制方法中，还包括：
在第一阶段，所述每相桥臂依次进入所述正半波周期状态、所述正死区状态、所述正零状态、所述全零状态、所述负零状态、所述全零状态、所述正零状态、所述正死区状态及所述正半波周期状态；
在第二阶段，所述每相桥臂依次进入所述正零状态、所述全零状态、所述负零状态、所述负死区状态、所述负半波周期状态、所述负死区状态、所述负零状态、所述全零状态及所述正零状态；
所述第一阶段和所述第二阶段互相循环进行。
可选的，在所述的双馈变频器调制方法中，还包括：所述双馈变频器所连接的发电机的转子转速与定子旋转磁场的转速相等。
可选的，在所述的双馈变频器调制方法中，所述每相桥臂还包括依次串联在正输入端和负输入端的之间的第一电容和第二电容，所述第一电容和所述第二电容的连接处为零输入端，其中：
所述第一开关模块、所述第二开关模块、所述第三开关模块及所述第四开关模块依次串联在正输入端和负输入端之间；
所述第一开关模块与所述第二开关模块的连接处为第一连接点；
所述第三开关模块与所述第四开关模块的连接处为第二连接点；
所述第二开关模块与所述第三开关模块的连接处为每相输出端；
所述第五开关模块一端连接所述第一连接点，另一端连接所述第六开关模块和所述零输入端；
所述第六开关模块的另一端连接所述第二连接点。
可选的，在所述的双馈变频器调制方法中，在所述正半波周期状态下，电流流过所述第一开关模块和所述第二开关模块；
在所述正死区状态下，电流流过所述第二开关模块和所述第五开关模块；
在所述正零状态下，电流流过所述第二开关模块和所述第五开关模块；
在所述全零状态下，电流流过所述第二开关模块、所述第三开关模块、所述第五开关模块和所述第六开关模块；
在所述负零状态下，电流流过所述第三开关模块和所述第六开关模块；
在所述负死区状态下，电流流过所述第三开关模块和所述第六开关模 块；
在所述负半波周期状态下，电流流过所述第三开关模块和所述第四开关模块。
可选的，在所述的双馈变频器调制方法中，还包括：
所述第一开关模块、所述第二开关模块、所述第三开关模块、所述第四开关模块、所述第五开关模块及所述第六开关模块为Si IGBT模块和SiC MOSFET模块中的一种或多种。
可选的，在所述的双馈变频器调制方法中，还包括：
在所述正半波周期状态下，为所述第一开关模块、所述第二开关模块及所述第六开关模块提供第一信号，为所述第三开关模块、所述第四开关模块及所述第五开关模块提供第二信号；
在所述正死区状态下，为所述第二开关模块提供第一信号，为所述第一开关模块、所述第三开关模块、所述第四开关模块、所述第五开关模块及所述第六开关模块提供第二信号；
在所述正零状态下，为所述第二开关模块及所述第五开关模块提供第一信号，为所述第一开关模块、所述第三开关模块、所述第四开关模块及所述第六开关模块提供第二信号；
在所述全零状态下，为所述第二开关模块、所述第三开关模块、所述第五开关模块及所述第六开关模块提供第一信号，为所述第一开关模块及所述第四开关模块提供第二信号；
在所述负零状态下，为所述第三开关模块及所述第六开关模块提供第一信号，为所述第一开关模块、所述第二开关模块、所述第四开关模块及所述第五开关模块提供第二信号；
在所述负死区状态下，为所述第三开关模块提供第一信号，为所述第一开关模块、所述第二开关模块、所述第四开关模块及所述第五开关模块及所述第六开关模块提供第二信号；
在所述负半波周期状态下，为所述第三开关模块、所述第四开关模块及所述第五开关模块提供第一信号，为所述第一开关模块、所述第二开关模块及所述第六开关模块提供第二信号。
可选的，在所述的双馈变频器调制方法中，还包括：
提供调制波与载波；
所述调制波为正弦波，所述载波为三角波；
当所述调制波为正且大于所述载波时，进入所述正半波周期状态；
当所述调制波为正且小于所述载波时，进入零状态分析流程；
当所述调制波为负且大于所述载波时，进入零状态分析流程；
当所述调制波为负且小于所述载波时，进入所述负半波周期状态。
可选的，在所述的双馈变频器调制方法中，零状态分析流程包括：
计算所述正零状态、所述全零状态及所述负零状态的总和时间；
计算所述正零状态、所述全零状态及所述负零状态之间切换产生的额外开关损耗，得到第一标称损耗；
计算所述正零状态、所述全零状态及所述负零状态之间切换导致的导通损耗的降低量，得到第二标称损耗；
计算所述第一标称损耗小于所述第二标称损耗时调制波的幅值，得到标称调制波幅值；
判断发电机转速是否为同步速，或所述调制波的幅值是否小于所述标称调制波幅值；
若是，则开启零电平热优化重新分配，根据热损耗模型分配所述正零状态、所述全零状态及所述负零状态的时间，否则进入小回路ANPC调制；
输出所述正零状态、所述全零状态及所述负零状态的时间分配结果。
可选的，在所述的双馈变频器调制方法中，所述零电平热优化重新分配包括：
在第一阶段，所述每相桥臂依次进入所述正半波周期状态、所述正死区状态、所述正零状态、所述全零状态、所述负零状态、所述全零状态、所述正零状态、所述正死区状态及所述正半波周期状态；
在第二阶段，所述每相桥臂依次进入所述正零状态、所述全零状态、所述负零状态、所述负死区状态、所述负半波周期状态、所述负死区状态、所述负零状态、所述全零状态及所述正零状态。
可选的，在所述的双馈变频器调制方法中，所述小回路ANPC调制包 括：
在第一阶段时，每相桥臂依次进入所述正半波周期状态、所述正死区状态、所述正零状态、所述正死区状态及所述正半波周期状态；
在第二阶段时，每相桥臂依次进入所述负半波周期状态、所述负死区状态、所述负零状态、所述负死区状态及所述负半波周期状态。
本发明还提供一种双馈变频器，包括三相桥臂和控制单元，其中：
每相桥臂包括第一开关模块、第二开关模块、第三开关模块、第四开关模块、第五开关模块及第六开关模块；
所述控制单元控制所述第一开关模块、所述第二开关模块、所述第三开关模块、所述第四开关模块、所述第五开关模块及所述第六开关模块的导通和关断，以使所述每相桥臂进入正半波周期状态、正死区状态、正零状态、全零状态、负零状态、负死区状态及负半波周期状态。
在本发明提供的双馈变频器及其调制方法中，通过控制单元控制第一开关模块、第二开关模块、第三开关模块、第四开关模块、第五开关模块及第六开关模块的导通和关断，以使每相桥臂进入正半波周期状态、正死区状态、正零状态、全零状态、负零状态、负死区状态及负半波周期状态，实现了灵活使用ANPC零电平分布时间，特别对于大功率双馈变频器，在同步转速工作点下使各个开关模块的器件热分布更加均匀，换流回路均采用小回路，使各个开关模块的器件的源漏极电压更低、电压应力和热分布的问题均得到有效解决，第一开关模块与第二开关模块之间，以及第五开关模块与第六开关模块之间的均压效果更好，变频器同步转速电流输出能力增加20％以上。
本发明通过零电平热优化重新分配调制，使得第二开关模块的器件导通损耗、第五开关模块的器件导通损耗转移到了第三开关模块和第六开关模块上。由于这个过程中额外增加了第二开关模块、第五开关模块、第三开关模块和第六开关模块的开关次数(如在状态切换时第二开关模块、第五开关模块承受1/4Udc电压进行开关动作，会造成少量额外的损耗△Ps)，状态切换后，第二开关模块、第五开关模块降低的器件导通损耗为△Pon。结合双馈发电机的转速和损耗降低的关系，确定调制进入零电平优化的条 件，对各种零电平状态(正零和负零)进行时间分配。因此本发明先计算了第一标称损耗、第二标称损耗，并根据两者进行了判断分析，若切换导致的导通损耗的降低量小于切换产生的额外开关损耗，则采用切换次数更少的小回路ANPC调制，使零电平热优化重新分配调制策略更加合理。
本发明提供的一种ANPC三电平双馈变频器调制策略，主动均匀损耗分布的调制方法，在常规ANPC三电平的调制开关序列中，把零状态分为正零OU，负零OL和中间暂态全零OUL，并根据双馈发电机的工作点和损耗模型，进行零状态重新优化分配，使损耗分布更加均匀，提升变频器的输出能力。另外，本发明的方案还可以对各个开关模块的器件进行主动均压，例如，在正半波周期状态，开通第一开关模块和第二开关模块的同时，开通第五开关模块，对第三开关模块和第四开关模块承受的电压进行均分，防止不均压导致的器件失效。输出电压状态既可以通过空间矢量得出也可以通过载波调制，载波调制通过控制环输出的低频正弦电压信号和三角载波进行比较，当调制波大于零且大于载波，输出正状态，当调制波小于零且小于载波，输出负状态，其余输出零状态。
附图说明
图1是现有的ANPC结构和电流路径示意图；
图2是现有的ANPC常规小回路调制换流回路示意图；
图3是现有的ANPC常规大回路调制换流回路示意图；
图4是本发明一实施例双馈变频器调制方法电流换流回路示意图；
图5是本发明一实施例双馈变频器调制方法调制开关信号示意图；
图6是本发明一实施例双馈变频器调制方法调制逻辑流程示意图。
具体实施方式
以下结合附图和具体实施例对本发明提出的双馈变频器及其调制方法作进一步详细说明。根据下面说明和权利要求书，本发明的优点和特征将更清楚。需说明的是，附图均采用非常简化的形式且均使用非精准的比例，仅用以方便、明晰地辅助说明本发明实施例的目的。
另外，除非另行说明，本发明的不同实施例中的特征可以相互组合。例如，可以用第二实施例中的某特征替换第一实施例中相对应或功能相同或相似的特征，所得到的实施例同样落入本申请的公开范围或记载范围。
本发明的核心思想在于提供一种双馈变频器及其调制方法，以解决现有的双馈变频器同步速运行情况下存在失效风险的问题。
为实现上述思想，本发明提供了一种双馈变频器及其调制方法，双馈变频器包括三相桥臂和控制单元，其中：每相桥臂包括第一开关模块、第二开关模块、第三开关模块、第四开关模块、第五开关模块及第六开关模块；所述控制单元控制所述第一开关模块、所述第二开关模块、所述第三开关模块、所述第四开关模块、所述第五开关模块及所述第六开关模块的导通和关断，以使所述每相桥臂进入正半波周期状态、正死区状态、正零状态、全零状态、负零状态、负死区状态及负半波周期状态。
本发明提供的一种双馈变频器及其调制方法实现了ANPC三电平器件在双馈变频器应用，并针对双馈变频器在电机同步速工作点重新设计调制策略，提高扭矩输出能力，降低功率模块失效风险，变频器功率半导体器件热损耗分布均匀。
现有常规ANPC调制，如图2所示，以电流流向交流侧，调制正半周为例。输出正电平时，T1和T2导通，电流流过T1和T2。输出零电平时，经过死区后，T2和T5导通，电流流过D5和T2。针对双馈发电机特殊的工况，在同步速附近，转子电流为直流，转子调制电压接近0，此时交流侧长时间输出0电平，对应状态即图1中的正零状态OU，电流长时间流过D5和T2，导致热主要分布在D5和T2管，二极管的热阻更大，热分布较为集中，因此限制了双馈变频器此工况电流的输出能力。
针对市面上常用的三电平模块封装结构，如白模块，外管T1/D1和T5/D5为一个封装，内管T2/D2和T3/D3为一个封装，外管T4/D4和T6/D6为一个封装。现有调制技术如图3所示，对于大功率变频器并不适用，考虑到功率模组的寄生回路存在电感参数，会增加半导体器件的电压应力，使直流电压利用率降低，并增加额外损耗，对寿命也造成不良影响。
本实施例提供一种双馈变频器调制方法，如图1所示，双馈变频器包括三相桥臂，每相桥臂包括第一开关模块T1、第二开关模块T2、第三开关模块T3、第四开关模块T4、第五开关模块T5及第六开关模块T6，每相交流输出有3种状态，分别为(母线电压为Udc)正电压+0.5Udc、零电压、负电压-0.5Udc，对应的开关状态有7种，包括：如图4所示，控制所述第一开关模块T1、所述第二开关模块T2、所述第三开关模块T3、所述第四开关模块T4、所述第五开关模块T5及所述第六开关模块T6的导通和关断，以使所述每相桥臂进入正半波周期状态P、正死区状态DeadP、正零状态OU、全零状态OUL、负零状态OL、负死区状态DeadN及负半波周期状态N。
如图4所示，其中图4(1)称为P状态(正半波周期状态P)，对应开关序列为110010。图4(2)称为DeadP状态，即正死区状态DeadP，对应开关序列为010000。图4(3)称为OU状态，即正零状态OU，对应开关序列为010010。图4(4)称为OUL状态，即全零状态OUL，对应开关序列为011011。图4(5)称为OL状态，即负零状态OL，对应开关序列为001001。图4(6)称为DeadN状态，即负死区状态DeadN，对应开关序列为001000。图4(7)称为N状态，即负半波周期状态N，对应开关序列为001110。
具体的，在所述的双馈变频器调制方法中，还包括：在第一阶段，所述每相桥臂依次进入所述正半波周期状态P、所述正死区状态DeadP、所述正零状态OU、所述全零状态OUL、所述负零状态OL、所述全零状态OUL、所述正零状态OU、所述正死区状态DeadP及所述正半波周期状态P；在第二阶段，所述每相桥臂依次进入所述正零状态OU、所述全零状态OUL、所述负零状态OL、所述负死区状态DeadN、所述负半波周期状态N、所述负死区状态DeadN、所述负零状态OL、所述全零状态OUL及所述正零状态OU；所述第一阶段和所述第二阶段互相循环进行。
进一步的，在所述的双馈变频器调制方法中，还包括：所述双馈变频器所连接的发电机的转子转速与定子旋转磁场的转速相等。
如图4所示，在所述的双馈变频器调制方法中，所述每相桥臂还包括 依次串联在正输入端P和负输入端N的之间的第一电容C1和第二电容C2，所述第一电容C1和所述第二电容C2的连接处为零输入端O，其中：所述第一开关模块T1、所述第二开关模块T2、所述第三开关模块T3及所述第四开关模块T4依次串联在正输入端P和负输入端N之间；所述第一开关模块T1与所述第二开关模块T2的连接处为第一连接点；所述第三开关模块T3与所述第四开关模块T4的连接处为第二连接点；所述第二开关模块T2与所述第三开关模块T3的连接处为每相输出端；所述第五开关模块T5一端连接所述第一连接点，另一端连接所述第六开关模块T6和所述零输入端O；所述第六开关模块T6的另一端连接所述第二连接点。
其中，在所述的双馈变频器调制方法中，在所述正半波周期状态P下，电流流过所述第一开关模块T1和所述第二开关模块T2；在所述正死区状态DeadP下，电流流过所述第二开关模块T2和所述第五开关模块T5；在所述正零状态OU下，电流流过所述第二开关模块T2和所述第五开关模块T5；在所述全零状态OUL下，电流流过所述第二开关模块T2、所述第三开关模块T3、所述第五开关模块T5和所述第六开关模块T6；在所述负零状态OL下，电流流过所述第三开关模块T3和所述第六开关模块T6；在所述负死区状态DeadN下，电流流过所述第三开关模块T3和所述第六开关模块T6；在所述负半波周期状态N下，电流流过所述第三开关模块T3和所述第四开关模块T4。
在本发明的一个实施例中，在所述的双馈变频器调制方法中，还包括：所述第一开关模块T1、所述第二开关模块T2、所述第三开关模块T3、所述第四开关模块T4、所述第五开关模块T5及所述第六开关模块T6为Si IGBT模块和SiC MOSFET模块中的一种或多种。
如图4～5所示，在所述的双馈变频器调制方法中，还包括：在所述正半波周期状态P下，为所述第一开关模块T1、所述第二开关模块T2及所述第六开关模块T6提供第一信号，为所述第三开关模块T3、所述第四开关模块T4及所述第五开关模块T5提供第二信号；在所述正死区状态DeadP下，为所述第二开关模块T2提供第一信号，为所述第一开关模块T1、所述第三开关模块T3、所述第四开关模块T4、所述第五开关模块T5及所述 第六开关模块T6提供第二信号；在所述正零状态OU下，为所述第二开关模块T2及所述第五开关模块T5提供第一信号，为所述第一开关模块T1、所述第三开关模块T3、所述第四开关模块T4及所述第六开关模块T6提供第二信号；在所述全零状态OUL下，为所述第二开关模块T2、所述第三开关模块T3、所述第五开关模块T5及所述第六开关模块T6提供第一信号，为所述第一开关模块T1及所述第四开关模块T4提供第二信号；在所述负零状态OL下，为所述第三开关模块T3及所述第六开关模块T6提供第一信号，为所述第一开关模块T1、所述第二开关模块T2、所述第四开关模块T4及所述第五开关模块T5提供第二信号；在所述负死区状态DeadN下，为所述第三开关模块T3提供第一信号，为所述第一开关模块T1、所述第二开关模块T2、所述第四开关模块T4及所述第五开关模块T5及所述第六开关模块T6提供第二信号；在所述负半波周期状态N下，为所述第三开关模块T3、所述第四开关模块T4及所述第五开关模块T5提供第一信号，为所述第一开关模块T1、所述第二开关模块T2及所述第六开关模块T6提供第二信号。
如图5～6所示，在所述的双馈变频器调制方法中，还包括：提供调制波与载波；所述调制波为低频正弦波，所述载波为高频三角波，其中图5中只示出了正弦波的微观图像，该微观图像接近于方波；当所述调制波为正且大于所述载波时，进入所述正半波周期状态P；当所述调制波为正且小于所述载波时，进入零状态分析流程；当所述调制波为负且大于所述载波时，进入零状态分析流程；当所述调制波为负且小于所述载波时，进入所述负半波周期状态N。
如图6所示，在所述的双馈变频器调制方法中，零状态分析流程包括：计算所述正零状态OU、所述全零状态OUL及所述负零状态OL的总和时间；计算所述正零状态OU、所述全零状态OUL及所述负零状态OL之间切换产生的额外开关损耗，得到第一标称损耗；计算所述正零状态OU、所述全零状态OUL及所述负零状态OL之间切换导致的导通损耗的降低量，得到第二标称损耗；计算所述第一标称损耗小于所述第二标称损耗时调制波的幅值，得到标称调制波幅值；判断发电机转速是否为同步速，或所述 调制波的幅值是否小于所述标称调制波幅值；若是，则开启零电平热优化重新分配，根据热损耗模型分配所述正零状态OU、所述全零状态OUL及所述负零状态OL的时间，否则进入小回路ANPC调制；输出所述正零状态OU、所述全零状态OUL及所述负零状态OL的时间分配结果。
在本发明的一个实施例中，在所述的双馈变频器调制方法中，所述零电平热优化重新分配包括：在第一阶段，所述每相桥臂依次进入所述正半波周期状态P、所述正死区状态DeadP、所述正零状态OU、所述全零状态OUL、所述负零状态OL、所述全零状态OUL、所述正零状态OU、所述正死区状态DeadP及所述正半波周期状态P；在第二阶段，所述每相桥臂依次进入所述正零状态OU、所述全零状态OUL、所述负零状态OL、所述负死区状态DeadN、所述负半波周期状态N、所述负死区状态DeadN、所述负零状态OL、所述全零状态OUL及所述正零状态OU。
在本发明的另一个实施例中，在所述的双馈变频器调制方法中，所述小回路ANPC调制包括：在第一阶段时，每相桥臂依次进入所述正半波周期状态P、所述正死区状态DeadP、所述正零状态OU、所述正死区状态DeadP及所述正半波周期状态P；在第二阶段时，每相桥臂依次进入所述负半波周期状态N、所述负死区状态DeadN、所述负零状态OL、所述负死区状态DeadN及所述负半波周期状态N。
根据以上7种开关状态设置状态切换逻辑，开关序列切换分为两种：
小回路调制：正半波周期P—>DeadP—>OU—>DeadP—>P、负半波周期N—>DeadN—>OL—>DeadN—>N；以输出电压从正状态切换为零状态时为例，切换关系如图4中(1)(2)(3)所示，开关状态由正状态先切换到正半周死区态DeadP(关闭T1，T2保留打开状态)，DeadP工作时长为△Tdead，由器件开关时间确定，再打开T2，输出切换到正零态OU，电流路径从T1/D1和T2/D2切换到了路径T2/D2和T5/D5。
零电平状态优化调制：正半波周期P—>DeadP—>OU—>OUL—>OL、负半波周期N—>DeadN—>OL—>OUL—>OU；以输出电压从正状态切换为零状态时为例，切换关系如图4中(1)(2)(3)(4)(5)所示，小回路调制基础上，正零继续切换，增加了暂态全零OUL过程，打开内管T2/T3 和钳位管T5/T6，电流流过T2/D2、T5/D5和T3/D3、T6/D6，再关闭T2/T5使电流切换到负零OL，此时电流流过T3/D3、T6/D6。
本实施例还提供一种双馈变频器，包括三相桥臂和控制单元，其中：每相桥臂包括第一开关模块T1、第二开关模块T2、第三开关模块T3、第四开关模块T4、第五开关模块T5及第六开关模块T6；所述控制单元控制所述第一开关模块T1、所述第二开关模块T2、所述第三开关模块T3、所述第四开关模块T4、所述第五开关模块T5及所述第六开关模块T6的导通和关断，以使所述每相桥臂进入正半波周期状态P、正死区状态DeadP、正零状态OU、全零状态OUL、负零状态OL、负死区状态DeadN及负半波周期状态N。
在本发明提供的双馈变频器及其调制方法中，通过控制单元控制第一开关模块T1、第二开关模块T2、第三开关模块T3、第四开关模块T4、第五开关模块T5及第六开关模块T6的导通和关断，以使每相桥臂进入正半波周期状态P、正死区状态DeadP、正零状态OU、全零状态OUL、负零状态OL、负死区状态DeadN及负半波周期状态N，实现了灵活使用ANPC零电平分布时间，特别对于大功率双馈变频器，在同步转速工作点下使各个开关模块的器件热分布更加均匀，换流回路均采用小回路，使各个开关模块的器件的源漏极电压更低、电压应力和热分布的问题均得到有效解决，第一开关模块T1与第二开关模块T2之间，以及第五开关模块T5与第六开关模块T6之间的均压效果更好，变频器同步转速电流输出能力增加20％以上。
本发明通过零电平热优化重新分配调制，使得第二开关模块T2的器件导通损耗、第五开关模块T5的器件导通损耗转移到了第三开关模块T3和第六开关模块T6上。由于这个过程中额外增加了第二开关模块T2、第五开关模块T5、第三开关模块T3和第六开关模块T6的开关次数(如在状态切换时第二开关模块T2、第五开关模块T5承受1/4Udc电压进行开关动作，会造成少量额外的损耗△Ps)，状态切换后，第二开关模块T2、第五开关模块T5降低的器件导通损耗为△Pon。结合双馈发电机的转速和损耗降低的关系，确定调制进入零电平优化的条件，对各种零电平状态(正零 和负零)进行时间分配。因此本发明先计算了第一标称损耗、第二标称损耗，并根据两者进行了判断分析，若切换导致的导通损耗的降低量小于切换产生的额外开关损耗，则采用切换次数更少的小回路ANPC调制，使零电平热优化重新分配调制策略更加合理。
本发明提供的一种ANPC三电平双馈变频器调制策略，主动均匀损耗分布的调制方法，在常规ANPC三电平的调制开关序列中，把零状态分为正零OU，负零OL和中间暂态全零OUL，并根据双馈发电机的工作点和损耗模型，进行零状态重新优化分配，使损耗分布更加均匀，提升变频器的输出能力。另外，本发明的方案还可以对各个开关模块的器件进行主动均压，例如，在正半波周期状态P，开通第一开关模块T1和第二开关模块T2的同时，开通第五开关模块T5，对第三开关模块T3和第四开关模块T4承受的电压进行均分，防止电压不均导致的器件失效。输出电压状态既可以通过空间矢量得出也可以通过载波调制，载波调制通过控制环输出的低频正弦电压信号和三角载波进行比较，当调制波大于零且大于载波，输出正状态，当调制波小于零且小于载波，输出负状态，其余输出零状态。
综上，上述实施例对双馈变频器及其调制方法的不同构型进行了详细说明，当然，本发明包括但不局限于上述实施中所列举的构型，任何在上述实施例提供的构型基础上进行变换的内容，均属于本发明所保护的范围。本领域技术人员可以根据上述实施例的内容举一反三。
本说明书中各个实施例采用递进的方式描述，每个实施例重点说明的都是与其他实施例的不同之处，各个实施例之间相同相似部分互相参见即可。对于实施例公开的***而言，由于与实施例公开的方法相对应，所以描述的比较简单，相关之处参见方法部分说明即可。
上述描述仅是对本发明较佳实施例的描述，并非对本发明范围的任何限定，本发明领域的普通技术人员根据上述揭示内容做的任何变更、修饰，均属于权利要求书的保护范围。

Claims (12)

  1. 一种双馈变频器调制方法，双馈变频器包括三相桥臂，每相桥臂包括第一开关模块、第二开关模块、第三开关模块、第四开关模块、第五开关模块及第六开关模块，其特征在于，包括：
    控制所述第一开关模块、所述第二开关模块、所述第三开关模块、所述第四开关模块、所述第五开关模块及所述第六开关模块的导通和关断，以使所述每相桥臂进入正半波周期状态、正死区状态、正零状态、全零状态、负零状态、负死区状态及负半波周期状态。
  2. 如权利要求1所述的双馈变频器调制方法，其特征在于，还包括：
    在第一阶段，所述每相桥臂依次进入所述正半波周期状态、所述正死区状态、所述正零状态、所述全零状态、所述负零状态、所述全零状态、所述正零状态、所述正死区状态及所述正半波周期状态；
    在第二阶段，所述每相桥臂依次进入所述正零状态、所述全零状态、所述负零状态、所述负死区状态、所述负半波周期状态、所述负死区状态、所述负零状态、所述全零状态及所述正零状态；
    所述第一阶段和所述第二阶段互相循环进行。
  3. 如权利要求1所述的双馈变频器调制方法，其特征在于，还包括：所述双馈变频器所连接的发电机的转子转速与定子旋转磁场的转速相等。
  4. 如权利要求1所述的双馈变频器调制方法，其特征在于，所述每相桥臂还包括依次串联在正输入端和负输入端的之间的第一电容和第二电容，所述第一电容和所述第二电容的连接处为零输入端，其中：
    所述第一开关模块、所述第二开关模块、所述第三开关模块及所述第四开关模块依次串联在正输入端和负输入端之间；
    所述第一开关模块与所述第二开关模块的连接处为第一连接点；
    所述第三开关模块与所述第四开关模块的连接处为第二连接点；
    所述第二开关模块与所述第三开关模块的连接处为每相输出端；
    所述第五开关模块一端连接所述第一连接点，另一端连接所述第六开关模块和所述零输入端；
    所述第六开关模块的另一端连接所述第二连接点。
  5. 如权利要求1所述的双馈变频器调制方法，其特征在于，在所述正半波周期状态下，电流流过所述第一开关模块和所述第二开关模块；
    在所述正死区状态下，电流流过所述第二开关模块和所述第五开关模块；
    在所述正零状态下，电流流过所述第二开关模块和所述第五开关模块；
    在所述全零状态下，电流流过所述第二开关模块、所述第三开关模块、所述第五开关模块和所述第六开关模块；
    在所述负零状态下，电流流过所述第三开关模块和所述第六开关模块；
    在所述负死区状态下，电流流过所述第三开关模块和所述第六开关模块；
    在所述负半波周期状态下，电流流过所述第三开关模块和所述第四开关模块。
  6. 如权利要求1所述的双馈变频器调制方法，其特征在于，还包括：
    所述第一开关模块、所述第二开关模块、所述第三开关模块、所述第四开关模块、所述第五开关模块及所述第六开关模块为Si IGBT模块和SiC MOSFET模块中的一种或多种。
  7. 如权利要求1所述的双馈变频器调制方法，其特征在于，还包括：
    在所述正半波周期状态下，为所述第一开关模块、所述第二开关模块及所述第六开关模块提供第一信号，为所述第三开关模块、所述第四开关模块及所述第五开关模块提供第二信号；
    在所述正死区状态下，为所述第二开关模块提供第一信号，为所述第一开关模块、所述第三开关模块、所述第四开关模块、所述第五开关模块及所述第六开关模块提供第二信号；
    在所述正零状态下，为所述第二开关模块及所述第五开关模块提供第一信号，为所述第一开关模块、所述第三开关模块、所述第四开关模块及所述第六开关模块提供第二信号；
    在所述全零状态下，为所述第二开关模块、所述第三开关模块、所述第五开关模块及所述第六开关模块提供第一信号，为所述第一开关模块及所述第四开关模块提供第二信号；
    在所述负零状态下，为所述第三开关模块及所述第六开关模块提供第一信号，为所述第一开关模块、所述第二开关模块、所述第四开关模块及所述第五开关模块提供第二信号；
    在所述负死区状态下，为所述第三开关模块提供第一信号，为所述第一开关模块、所述第二开关模块、所述第四开关模块及所述第五开关模块及所述第六开关模块提供第二信号；
    在所述负半波周期状态下，为所述第三开关模块、所述第四开关模块及所述第五开关模块提供第一信号，为所述第一开关模块、所述第二开关模块及所述第六开关模块提供第二信号。
  8. 如权利要求1所述的双馈变频器调制方法，其特征在于，还包括：
    提供调制波与载波；
    所述调制波为正弦波，所述载波为三角波；
    当所述调制波为正且大于所述载波时，进入所述正半波周期状态；
    当所述调制波为正且小于所述载波时，进入零状态分析流程；
    当所述调制波为负且大于所述载波时，进入零状态分析流程；
    当所述调制波为负且小于所述载波时，进入所述负半波周期状态。
  9. 如权利要求8所述的双馈变频器调制方法，其特征在于，零状态分析流程包括：
    计算所述正零状态、所述全零状态及所述负零状态的总和时间；
    计算所述正零状态、所述全零状态及所述负零状态之间切换产生的额外开关损耗，得到第一标称损耗；
    计算所述正零状态、所述全零状态及所述负零状态之间切换导致的导通损耗的降低量，得到第二标称损耗；
    计算所述第一标称损耗小于所述第二标称损耗时调制波的幅值，得到标称调制波幅值；
    判断发电机转速是否为同步速，或所述调制波的幅值是否小于所述标称调制波幅值；
    若是，则开启零电平热优化重新分配，根据热损耗模型分配所述正零状态、所述全零状态及所述负零状态的时间，否则进入小回路ANPC调制；
    输出所述正零状态、所述全零状态及所述负零状态的时间分配结果。
  10. 如权利要求9所述的双馈变频器调制方法，其特征在于，所述零电平热优化重新分配包括：
    在第一阶段，所述每相桥臂依次进入所述正半波周期状态、所述正死区状态、所述正零状态、所述全零状态、所述负零状态、所述全零状态、所述正零状态、所述正死区状态及所述正半波周期状态；
    在第二阶段，所述每相桥臂依次进入所述正零状态、所述全零状态、所述负零状态、所述负死区状态、所述负半波周期状态、所述负死区状态、所述负零状态、所述全零状态及所述正零状态。
  11. 如权利要求9所述的双馈变频器调制方法，其特征在于，所述小回路ANPC调制包括：
    在第一阶段时，每相桥臂依次进入所述正半波周期状态、所述正死区状态、所述正零状态、所述正死区状态及所述正半波周期状态；
    在第二阶段时，每相桥臂依次进入所述负半波周期状态、所述负死区状态、所述负零状态、所述负死区状态及所述负半波周期状态。
  12. 一种双馈变频器，其特征在于，包括三相桥臂和控制单元，其中：
    每相桥臂包括第一开关模块、第二开关模块、第三开关模块、第四开关模块、第五开关模块及第六开关模块；
    所述控制单元控制所述第一开关模块、所述第二开关模块、所述第三开关模块、所述第四开关模块、所述第五开关模块及所述第六开关模块的导通和关断，以使所述每相桥臂进入正半波周期状态、正死区状态、正零状态、全零状态、负零状态、负死区状态及负半波周期状态。
PCT/CN2021/090209 2020-08-25 2021-04-27 双馈变频器及其调制方法 WO2022041813A1 (zh)

Priority Applications (3)

Application Number Priority Date Filing Date Title
MX2023001971A MX2023001971A (es) 2020-08-25 2021-04-27 Convertidor de alimentacion doble y metodo de modulacion del mismo.
GB2300907.9A GB2618406A (en) 2020-08-25 2021-04-27 Doubly-fed converter and modulation method thereof
ZA2023/00358A ZA202300358B (en) 2020-08-25 2023-01-09 Doubly-fed converter and modulation method thereof

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202010865234.8 2020-08-25
CN202010865234.8A CN112202353B (zh) 2020-08-25 2020-08-25 双馈变频器及其调制方法

Publications (1)

Publication Number Publication Date
WO2022041813A1 true WO2022041813A1 (zh) 2022-03-03

Family

ID=74006191

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2021/090209 WO2022041813A1 (zh) 2020-08-25 2021-04-27 双馈变频器及其调制方法

Country Status (5)

Country Link
CN (1) CN112202353B (zh)
GB (1) GB2618406A (zh)
MX (1) MX2023001971A (zh)
WO (1) WO2022041813A1 (zh)
ZA (1) ZA202300358B (zh)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112202353B (zh) * 2020-08-25 2022-07-01 远景能源有限公司 双馈变频器及其调制方法
CN113098310B (zh) * 2021-05-24 2022-06-07 青岛大学 一种有源钳位三电平逆变电路及其控制方法
CN113452256B (zh) * 2021-06-21 2022-06-21 华中科技大学 一种采用混合功率器件的anpc-dab变换器、调制方法及***
CN114400916A (zh) * 2022-01-18 2022-04-26 河北建投新能源有限公司 逆变器调制方法、装置、存储介质及电子设备

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2728734A1 (en) * 2012-11-02 2014-05-07 ABB Oy A three-level neutral-point-clamped inverter
CN105186902A (zh) * 2015-09-10 2015-12-23 阳光电源股份有限公司 一种anpc型三电平逆变器、调制方法和电气设备
CN106787906A (zh) * 2016-12-27 2017-05-31 电子科技大学 一种anpc三电平逆变器的开关损耗分散分布调制方法
CN107681913A (zh) * 2017-09-29 2018-02-09 特变电工西安电气科技有限公司 一种anpc型三电平逆变器调制方法
CN109088559A (zh) * 2018-09-10 2018-12-25 浙江大学 一种应用于混合型有源中点钳位式三电平变换器的调制方法
CN112202353A (zh) * 2020-08-25 2021-01-08 远景能源有限公司 双馈变频器及其调制方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2590312A1 (en) * 2011-11-04 2013-05-08 Alstom Technology Ltd Voltage source converter (VSC) with neutral-point-clamped (NPC) topology and method for operating such voltage source converter
EP3114764A4 (en) * 2014-03-03 2017-11-08 Schneider Electric IT Corporation Systems and methods for improving efficiency of a neutral-point-clamped inverter
CN109905048B (zh) * 2017-12-08 2021-01-26 台达电子企业管理（上海）有限公司 三电平电路中点电压平衡控制方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2728734A1 (en) * 2012-11-02 2014-05-07 ABB Oy A three-level neutral-point-clamped inverter
CN105186902A (zh) * 2015-09-10 2015-12-23 阳光电源股份有限公司 一种anpc型三电平逆变器、调制方法和电气设备
CN106787906A (zh) * 2016-12-27 2017-05-31 电子科技大学 一种anpc三电平逆变器的开关损耗分散分布调制方法
CN107681913A (zh) * 2017-09-29 2018-02-09 特变电工西安电气科技有限公司 一种anpc型三电平逆变器调制方法
CN109088559A (zh) * 2018-09-10 2018-12-25 浙江大学 一种应用于混合型有源中点钳位式三电平变换器的调制方法
CN112202353A (zh) * 2020-08-25 2021-01-08 远景能源有限公司 双馈变频器及其调制方法

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
IGBTGO: "Depth | Modulation Methods of Two ANPC Topologies and Discussion on Practical Application", CN BLOGS, CN BLOGS, 1 January 2020 (2020-01-01), pages 1 - 18, XP055902519, Retrieved from the Internet <URL:https://www.cnblogs.com/igbtgo/p/13365751.html> [retrieved on 20220317] *

Also Published As

Publication number Publication date
GB2618406A (en) 2023-11-08
GB202300907D0 (en) 2023-03-08
MX2023001971A (es) 2023-02-23
CN112202353A (zh) 2021-01-08
ZA202300358B (en) 2024-05-30
CN112202353B (zh) 2022-07-01

Similar Documents

Publication Publication Date Title
WO2022041813A1 (zh) 双馈变频器及其调制方法
US11201565B2 (en) Conversion circuit, control method, and power supply device
Barater et al. Performance evaluation of a three-level ANPC photovoltaic grid-connected inverter with 650-V SiC devices and optimized PWM
Zhao et al. Voltage and power balance control for a cascaded H-bridge converter-based solid-state transformer
Yaragatti Design and implementation of active neutral-point-clamped nine-level reduced device count inverter: an application to grid integrated renewable energy sources.
US10003279B2 (en) System and method for power conversion
TWI458235B (zh) 風力發電系統及其功率電路和變流器結構
BR102013023246A2 (pt) Conversor de energia, método de conversão de energia e sistema de conversão de energia
CN102983771B (zh) 一种用于模块化多电平换流器的脉宽调制方法
CN104682736A (zh) 五电平整流器
US20140153287A1 (en) System and method for improving power conversion efficiency
CN109639160B (zh) 基于软开关技术的新型单向三相三电平整流器
US20150062991A1 (en) Method and system for power conversion
Feng et al. Comparative study of 2SiC&4Si hybrid configuration schemes in ANPC inverter
BRPI1104341A2 (pt) mÉtodo de controle para conversço de energia e conversor eletrânico de energia adaptado para conduzir o mÉtodo de controle
Li et al. An SiC MOSFET and Si diode hybrid three-phase high-power three-level rectifier
CN105356778A (zh) 一种模块化多电平逆变器及其无差拍控制方法
Shu et al. Diode-clamped three-level multi-module cascaded converter based power electronic traction transformer
Nayak A photovoltaic based multilevel inverter fed induction motor drive
EP4075658B1 (en) Inverter circuit control method and related device
CN103633874B (zh) H桥级联多电平变换器的单极性spwm无死区调制方法
KR101514803B1 (ko) 신재생에너지 계통연계 분산 전원에 사용되는 단상 전압형 spwm 인버터 시스템
CN106208131B (zh) 用于新能源接入和主动配电网的多电平变流器拓扑结构
JP6733816B2 (ja) 電力変換装置
Tuluhong et al. A Novel Hybrid T‐Type Three‐Level Inverter Based on SVPWM for PV Application

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 21859660

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 202300907

Country of ref document: GB

Kind code of ref document: A

Free format text: PCT FILING DATE = 20210427

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 21859660

Country of ref document: EP

Kind code of ref document: A1

WWE Wipo information: entry into national phase

Ref document number: 523442440

Country of ref document: SA