WO2022000774A1 - 一种二极管电流旁路控制电路及其控制方法 - Google Patents

一种二极管电流旁路控制电路及其控制方法 Download PDF

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Publication number
WO2022000774A1
WO2022000774A1 PCT/CN2020/114133 CN2020114133W WO2022000774A1 WO 2022000774 A1 WO2022000774 A1 WO 2022000774A1 CN 2020114133 W CN2020114133 W CN 2020114133W WO 2022000774 A1 WO2022000774 A1 WO 2022000774A1
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Prior art keywords
current
diode
main
transistor
module
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PCT/CN2020/114133
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English (en)
French (fr)
Inventor
肖川
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上海汇瑞半导体科技有限公司
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Priority claimed from CN202021235241.1U external-priority patent/CN212231416U/zh
Priority claimed from CN202010608456.1A external-priority patent/CN111555740A/zh
Application filed by 上海汇瑞半导体科技有限公司 filed Critical 上海汇瑞半导体科技有限公司
Priority to US18/011,527 priority Critical patent/US20230284353A1/en
Publication of WO2022000774A1 publication Critical patent/WO2022000774A1/zh

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/30—Driver circuits
    • H05B45/345—Current stabilisation; Maintaining constant current
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/30—Driver circuits
    • H05B45/395—Linear regulators
    • H05B45/397—Current mirror circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16—Modifications for eliminating interference voltages or currents
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/40—Details of LED load circuits

Definitions

  • the invention relates to the field of integrated circuits, in particular to a diode current bypass control circuit and a control method thereof.
  • the body diode of the separate device flows through; for example, in high-efficiency and energy-saving DC motor drive applications, power switches such as IGBT/SiC/GaN will additionally add freewheeling diodes, so that when the upper and lower bridges drive the main switch to turn off, it can reach dozens of A current of hundreds of amps flows through the freewheeling diode to drive the motor to work properly.
  • power switches such as IGBT/SiC/GaN will additionally add freewheeling diodes, so that when the upper and lower bridges drive the main switch to turn off, it can reach dozens of A current of hundreds of amps flows through the freewheeling diode to drive the motor to work properly.
  • the purpose of the present invention is to provide a diode current bypass control circuit and a control method thereof, which are used to solve the problem that a large current flows through the body diode during the off period of the main switch in the prior art. Or the heating problem caused by the freewheeling diode and the circuit runaway problem caused by the introduction of large current into the substrate.
  • the present invention provides a diode current bypass control circuit, the control circuit includes: a main module, a diode current sensing module and a driving module,
  • the main module includes a main switch tube and a main diode, and the main diode is connected in parallel with the source and drain ends of the main switch tube;
  • the diode current sensing module is connected to both ends of the main diode, and is used for inducing the current flowing through the main diode;
  • the driving module is connected to the output terminal of the diode current sensing module and the gate terminal of the main switch tube, and is used for generating a driving current proportional to the induced current to drive the main switch tube to conduct;
  • the main module, the diode current sensing module and the driving module form a negative feedback loop to reduce the current of the main diode to a set current value.
  • the diode current sensing module includes a sensing diode, which can sense the current flowing through the main diode through the sensing diode by making the voltage across the sensing diode positively correlated or equal to the voltage across the main diode. current.
  • the diode current sensing module includes: an error amplifier, a source follower tube and a sensing diode, the non-inverting input end of the error amplifier is connected to the anode end of the main diode, and the inverting input end of the error amplifier is connected to At the source end of the source follower tube and the anode end of the sensing diode, the output end of the error amplifier is connected to the gate end of the source follower tube, and the drain end of the source follower tube serves as the diode current sensing
  • the output end of the module, the cathode end of the induction diode is connected to the cathode end of the main diode.
  • the diode current sensing module includes: a bias current source, a first common gate transistor, a second common gate transistor, an inductive switch transistor and an inductive diode, and an input end of the bias current source is connected to a power supply voltage,
  • the output end of the bias current source is connected to the drain end of the first cascode transistor, the source end of the first cascode transistor is connected to the anode end of the main diode, and the The gate terminal is connected to the drain terminal of the first common gate transistor and the gate terminal of the second common gate transistor, and the drain terminal of the second common gate transistor is used as the output terminal of the diode current sensing module.
  • the source end of the cascode is connected to the source end of the induction switch tube and the anode end of the induction diode
  • the gate end of the induction switch tube is connected to the source end of the induction switch tube
  • the induction switch tube The drain terminal is connected to the cathode terminal of the induction diode and the cathode terminal of the main diode.
  • the diode current sensing module further includes: a first resistor connected between the source end of the first cascode transistor and the anode end of the main diode.
  • the diode current sensing module further includes: a first resistor and a second resistor, the first resistor is connected between the source end of the first common gate tube and the anode end of the main diode, so The second resistor is connected between the source end of the second cascode transistor and the anode end of the induction diode.
  • the driving module includes: a first current mirror tube, a second current mirror tube and a driving resistor, the source end of the first current mirror tube is connected to the source end of the second current mirror tube and connected to power supply voltage, the drain terminal of the first current mirror tube is connected to the output terminal of the diode current sensing module, the gate terminal of the first current mirror tube is connected to the drain terminal of the first current mirror tube and the The gate terminal of the second current mirror tube, the drain terminal of the second current mirror tube is connected to one end of the driving resistor, and serves as the output terminal of the driving module, and the other end of the driving resistor is connected to the main switch tube switch control signal.
  • the drive module includes: a first current mirror tube, a second current mirror tube, a sampling resistor, an NMOS drive tube and a PMOS drive tube, and the source end of the first current mirror tube is connected to the second current mirror
  • the source end of the mirror tube is connected to the power supply voltage
  • the drain end of the first current mirror tube is connected to the output end of the diode current sensing module
  • the gate end of the first current mirror tube is connected to the first current mirror tube
  • the drain end of the mirror tube and the gate end of the second current mirror tube, the drain end of the second current mirror tube is connected to one end of the sampling resistor, the gate end of the NMOS drive tube and the PMOS drive tube
  • the other end of the sampling resistor is connected to the source end of the main switch tube
  • the drain end of the NMOS drive tube is connected to the power supply voltage
  • the source end of the NMOS drive tube is connected to the PMOS drive tube
  • the source end of the drive module is connected to the gate end of the main switch tube as
  • the driving module further includes: a PMOS switch tube, the source terminal of which is connected to the power supply voltage, the drain terminal is connected to the gate terminal of the NMOS driving tube, and the gate terminal is connected to the switch control signal of the PMOS switch tube.
  • the driving module includes: a first current mirror tube, a second current mirror tube, a sampling resistor, a first transistor and a second transistor, and the source end of the first current mirror tube is connected to the The source end of the second current mirror tube is connected to the power supply voltage, the drain end of the first current mirror tube is connected to the output end of the diode current sensing module, and the gate end of the first current mirror tube is connected to the The drain end of the first current mirror tube and the gate end of the second current mirror tube, the drain end of the second current mirror tube is connected to one end of the sampling resistor and the base of the first triode and the base of the second triode, the other end of the sampling resistor is connected to the source end of the main switch, the collector of the first triode is connected to the power supply voltage, the first three The emitter of the diode is connected to the emitter of the second triode, and at the same time, the output end of the driving module is connected to the gate end of the main switch, and the collector of the second triode is connected
  • the driving module further includes: a PMOS switch tube, the source terminal of which is connected to the power supply voltage, the drain terminal of which is connected to the base of the first transistor, and the gate terminal of which is connected to the switch control of the PMOS switch tube Signal.
  • a PMOS switch tube the source terminal of which is connected to the power supply voltage, the drain terminal of which is connected to the base of the first transistor, and the gate terminal of which is connected to the switch control of the PMOS switch tube Signal.
  • control circuit further includes: a current threshold module, connected between the diode current sensing module and the driving module, for comparing the induced current with the set threshold current, and when the induced current is less than the The driving module is turned off when the set threshold current is set, and the driving module is turned on when the induced current is greater than the set threshold current.
  • a current threshold module connected between the diode current sensing module and the driving module, for comparing the induced current with the set threshold current, and when the induced current is less than the The driving module is turned off when the set threshold current is set, and the driving module is turned on when the induced current is greater than the set threshold current.
  • the current threshold module includes: a threshold current source, an input terminal of the threshold current source is connected to a power supply voltage, and an output terminal of the threshold current source is connected to the output terminal of the diode current sensing module and the The input terminal of the drive module.
  • the present invention also provides a diode current bypass control method, which is used to perform bypass control on the main diode in the main module connected in parallel with the source and drain ends of the main switch tube, and the control method includes:
  • the driving module generates a driving current proportional to the induced current to drive the main switch to be turned on;
  • the main module, the diode current sensing module and the driving module form a negative feedback loop to reduce the current of the main diode to a set current value.
  • the method for sensing the current flowing through the main diode based on the diode current sensing module includes: by making the voltage across the sensing diode in the diode current sensing module positively correlated or equal to the voltage across the main diode, the induced current is realized. current through the main diode.
  • control method further includes: comparing the sensed current with a set threshold current, and when the sensed current is less than the set threshold current The driving module is turned off, and the driving module is turned on when the induced current is greater than the set threshold current.
  • a diode current bypass control circuit and a control method thereof of the present invention utilize the negative feedback loop constructed by the main module, the diode current sensing module and the driving module to control the opening of the main switch tube to bypass and adjust the main diode current. , to reduce the main diode current to the set current value, so as to control the main diode current within a limited range.
  • the present invention has the property of negative feedback, and an opening threshold (that is, a threshold current is set) can also be added to automatically realize the opening or closing of the circuit, and the circuit structure of the present invention is simple and easy to implement.
  • FIG. 1 shows an implementation of the diode current bypass control circuit according to the first embodiment of the present invention.
  • FIG. 2 shows another implementation of the diode current sensing module in the diode current bypass control circuit of the present invention.
  • FIG. 3 shows another implementation manner of the driving module in the diode current bypass control circuit of the present invention.
  • FIG. 4 shows another implementation manner of the driving module in the diode current bypass control circuit of the present invention.
  • FIG. 5 shows another implementation manner of the driving module in the diode current bypass control circuit of the present invention.
  • FIG. 6 shows another implementation manner of the driving module in the diode current bypass control circuit of the present invention.
  • FIG. 7 shows an implementation of the diode current bypass control circuit according to the second embodiment of the present invention.
  • this embodiment provides a diode current bypass control circuit, the control circuit includes: a main module 101 , a diode current sensing module 102 and a driving module 103 ,
  • the main module 101 includes a main switch tube Mmain and a main diode Dmain, and the main diode Dmain is connected in parallel to both ends of the source and the drain of the main switch tube Mmain;
  • the diode current sensing module 102 is connected to both ends of the main diode Dmain, and is used for sensing the current flowing through the main diode Dmain;
  • the driving module 103 is connected to the output terminal of the diode current sensing module 102 and the gate terminal of the main switch Mmain, and is used to generate a driving current proportional to the induced current to drive the main switch Mmain to conduct. Pass;
  • the main module 101 , the diode current sensing module 102 and the driving module 103 form a negative feedback loop to reduce the current of the main diode Dmain to a set current value.
  • the main switch tube Mmain includes: one of a power MOSFET, an IGBT, a SiC tube or a GaN tube, and the main diode Dmain is a body diode or a freewheeling diode of the main switch tube Mmain; Whether the main diode Dmain is a body diode or a freewheeling diode needs to be considered according to the actual application.
  • the diode current sensing module 102 includes a sensing diode Dsns, which makes the voltage across the sensing diode Dsns be positively correlated or equal to the voltage across the main diode Dmain, so as to sense the flow through the sensing diode Dsns through the sensing diode Dsns.
  • the current of the main diode Dmain is the sensing diode Dsns.
  • the diode current sensing module 102 includes: an error amplifier ERROR AMP, a source follower transistor Md0 and a sensing diode Dsns, and the non-inverting input end of the error amplifier ERROR AMP is connected to the The anode terminal of the main diode Dmain, the inverting input terminal of the error amplifier ERROR AMP is connected to the source terminal of the source follower tube Md0 and the anode terminal of the sensing diode Dsns, and the output terminal of the error amplifier ERROR AMP is connected to At the gate terminal of the source follower transistor Md0, the drain terminal of the source follower transistor Md0 serves as the output terminal of the diode current sensing module 102, and the cathode terminal of the sensing diode Dsns is connected to the cathode terminal of the main diode Dmain .
  • the sensing diode Dsns and the main diode Dmain are the same type of diode, and only have different junction areas, and the ratio of the junction area of the sensing diode Dsns to the junction area of the main diode Dmain is 1/N, N is a positive number.
  • the error amplifier ERROR AMP and the source follower transistor Md0 form a negative feedback circuit, so that the voltage at the anode terminal of the sensing diode Dsns is equal to the voltage at the source terminal of the main switch transistor Mmain, that is, the sensing
  • the anode terminal voltage of the diode Dsns is equal to the anode terminal voltage of the main diode Dmain, and since the cathode terminal of the induction diode Dsns is connected to the cathode terminal of the main diode Dmain, the cathode terminal voltage of the induction diode Dsns is the same as that of the main diode Dmain.
  • the voltages of the cathode terminals of the main diode Dmain are also equal, so that the voltage across the sensing diode Dsns is equal to the voltage across the main diode Dmain; at this time, the current ID_main flowing through the main diode Dmain is the same as the voltage flowing through the main diode Dmain.
  • the diode current sensing module 102 includes: a bias current source Ibias, a first common gate transistor MN0, a second common gate transistor MN1, a sensing switch transistor Msns, and a sensing A diode Dsns, the input end of the bias current source Ibias is connected to the power supply voltage VDD, the output end of the bias current source Ibias is connected to the drain end of the first common gate transistor MN0, the first common gate transistor The source terminal of MN0 is connected to the anode terminal of the main diode Dmain, and the gate terminal of the first common gate transistor MN0 is connected to the drain terminal of the first common gate transistor MN0 and the gate of the second common gate transistor MN1 terminal, the drain terminal of the second common gate transistor MN1 is used as the output terminal of the diode current sensing module 102, and the source terminal of the second common gate transistor MN1 is connected to the source terminal of the sensing switch tube Msn
  • the inductive switch tube Msns and the main switch tube Mmain are the same type of switch tube, and only have different sizes, and the ratio of the size of the inductive switch tube Msns to the size of the main switch tube Mmain is 1/N , where N is a positive number.
  • the first common gate transistor MN0 and the second common gate transistor MN1 constitute a common gate circuit
  • the source voltage of the first common gate transistor MN0 is regarded as a reference voltage
  • the second common gate transistor MN0 is regarded as a reference voltage
  • the source terminal voltage of the common gate transistor MN1 is regarded as a regulation voltage.
  • the source terminal of the first common gate transistor MN0 generates a voltage due to the current flowing through the main diode Dmain, and this voltage is the same as that of the gate source of the first common gate transistor MN0.
  • the sum of the voltages is used as the gate voltage of the second common gate transistor MN1, and the second common gate transistor MN1 will generate a current to flow through the sensing diode Dsns under the bias of its gate voltage.
  • the source terminal voltage of the second cascode transistor MN1 will increase to be equal to the source terminal voltage of the first cascode transistor MN0.
  • the source end reference voltage of MN0 adjusts the source end regulation voltage of the second common gate transistor MN1, and makes the regulation voltage equal to the reference voltage, so that the source end voltage of the second common gate transistor MN1 is always the same as that of the first common gate transistor MN1.
  • the source terminal voltage of the gate transistor MN0 is equal, that is, the anode terminal voltage of the sensing diode Dsns is equal to the anode terminal voltage of the main diode Dmain. Therefore, the voltage at the cathode terminal of the sensing diode Dsns is also equal to the voltage at the cathode terminal of the main diode Dmain, so that the voltage across the sensing diode Dsns is equal to the voltage across the main diode Dmain;
  • the diode current sensing module 102 further includes: a first resistor R0, the first resistor R0 is connected to the source end of the first cascode transistor MN0 and the Between the anode terminals Dmain of the main diode, a corresponding DC component is introduced to fine-tune the voltage relationship between the main diode Dmain and the sensing diode Dsns.
  • the diode current sensing module 102 can also add a second resistor R1 on the basis of the first resistor R0. At this time, the second resistor R1 is connected to the source terminal of the second cascode transistor MN1 and the sensing between the anode terminals of the diode Dsns.
  • the driving module 103 includes: a first current mirror tube MP0, a second current mirror tube MP1 and a driving resistor Rg, and the source end of the first current mirror tube MP0 is connected to
  • the source terminal of the second current mirror tube MP1 is connected to the power supply voltage VDD
  • the drain terminal of the first current mirror tube MP0 is connected to the output terminal of the diode current sensing module 102
  • the first current mirror tube MP0 The gate terminal is connected to the drain terminal of the first current mirror transistor MP0 and the gate terminal of the second current mirror transistor MP1
  • the drain terminal of the second current mirror transistor MP1 is connected to one end of the driving resistor Rg
  • the other end of the driving resistor Rg is connected to the switch control signal Crl_main of the main switch tube.
  • the switch control signal Crl_main of the main switch tube is a control signal generated by an external circuit, which is used to control the turn-on or turn-off of the main switch tube Mmain, so as to control whether the main switch tube Mmain is in On cycle or off cycle.
  • the first current mirror transistor MP0 and the second current mirror transistor MP1 constitute a current mirror, which is used to generate a driving current Idrv proportional to the induced current ID_sns (the induced current ID_sns is proportional to the driving current ID_sns).
  • the driving module 103 includes: a first current mirror transistor MP0, a second current mirror transistor MP1, a sampling resistor Rg, an NMOS driving transistor MNdrv, and a PMOS driving transistor MPdrv.
  • the source terminal of the current mirror tube MP0 is connected to the source terminal of the second current mirror tube MP1 and connected to the power supply voltage VDD, and the drain terminal of the first current mirror tube MP0 is connected to the output terminal of the diode current sensing module 102 , the gate terminal of the first current mirror transistor MP0 is connected to the drain terminal of the first current mirror transistor MP0 and the gate terminal of the second current mirror transistor MP1, and the drain terminal of the second current mirror transistor MP1 is connected to At one end of the sampling resistor Rg, the gate end of the NMOS drive transistor MNdrv and the gate end of the PMOS drive transistor MPdrv, the other end of the sampling resistor Rg is connected to the source end of the main switch transistor Mmain, so The drain terminal of the NMOS drive transistor MNdrv is connected to the power supply voltage VDD, the source terminal of the NMOS drive transistor MNdrv is connected to the source terminal of the PMOS drive transistor MPdrv, and is simultaneously connected to the main drive module 103 as the output
  • the gate terminal of the switch transistor Mmain and the drain terminal of the PMOS drive transistor MPdrv are connected to the source terminal of the main switch transistor Mmain; wherein the threshold voltage of the PMOS drive transistor MPdrv is lower than the threshold voltage of the main switch transistor Mmain.
  • the first current mirror transistor MP0 and the second current mirror transistor MP1 constitute a current mirror, which is used to generate a driving current Idrv proportional to the induced current ID_sns (the induced current ID_sns is proportional to the driving current ID_sns).
  • the driving module 103 in this example further includes: a PMOS switch MP, the source of which is connected to the power supply voltage VDD, The drain terminal is connected to the gate terminal of the NMOS driving transistor MNdrv, and the gate terminal is connected to the switch control signal Ctl_MP of the PMOS switch transistor.
  • the switch control signal Ctl_MP of the PMOS switch tube is an external control signal, which is used to control whether the NMOS drive tube MNdrv and the PMOS drive tube MPdrv are turned on, so as to realize the external control of the drive module 103 control.
  • the driving module 103 includes: a first current mirror transistor MP0, a second current mirror transistor MP1, a sampling resistor Rg, a first transistor NPN and a second transistor PNP,
  • the source terminal of the first current mirror tube MP0 is connected to the source terminal of the second current mirror tube MP1 and connected to the power supply voltage VDD, and the drain terminal of the first current mirror tube MP0 is connected to the diode current sensing module
  • the output terminal of 102, the gate terminal of the first current mirror tube MP0 is connected to the drain terminal of the first current mirror tube MP0 and the gate terminal of the second current mirror tube MP1, and the second current mirror tube MP1
  • the drain terminal is connected to one end of the sampling resistor Rg, the base of the first triode NPN and the base of the second triode PNP, and the other end of the sampling resistor Rg is connected to the main
  • the source terminal of the switch, the collector of the first transistor NPN is connected to the power supply voltage VDD, the emitter of the first transistor NPN is
  • the first current mirror transistor MP0 and the second current mirror transistor MP1 constitute a current mirror, which is used to generate a driving current Idrv proportional to the induced current ID_sns (the induced current ID_sns is proportional to the driving current ID_sns).
  • the transistor PNP is turned on, so as to control the conduction of the main switch tube Mmain, so as to realize the conduction of the main switch tube Mmain in the off period.
  • the drive module 103 in this example has its own turn-off current threshold, wherein the turn-off current threshold is the main switch Mmain.
  • the driving module 103 in this example further includes: a PMOS switch MP, the source of which is connected to the power supply voltage VDD, The drain terminal is connected to the base of the first transistor NPN, and the gate terminal is connected to the switch control signal Ctl_MP of the PMOS switch.
  • the switch control signal Ctl_MP of the PMOS switch is an external control signal used to control whether the first transistor NPN and the second transistor PNP are turned on, so as to realize the drive External control of module 103 .
  • the present embodiment also provides a diode current bypass control method for performing bypass control on the main diode Dmain connected in parallel to the source and drain ends of the main switch tube Mmain in the main module 101.
  • the control method includes:
  • the driving module 103 generates a driving current proportional to the induced current to drive the main switch Mmain to conduct;
  • the main module 101 , the diode current sensing module 102 and the driving module 103 form a negative feedback loop to reduce the current of the main diode Dmain to a set current value.
  • the method for sensing the current flowing through the main diode Dmain based on the diode current sensing module 102 includes: by making the voltage across the sensing diode Dsns in the diode current sensing module 102 positively correlated or equal to the voltage across the main diode Dmain , so as to realize the induction of the current flowing through the main diode Dmain.
  • the diode current sensing module 102 senses and detects the forward current of the main diode Dmain, and the driving module 103 amplifies the induced current by M times.
  • a gate voltage is formed at the gate end of the main switch transistor Mmain through the driving resistor Rg, thereby driving the main switch transistor Mmain to turn on the on-current again during the off period; at this time, the main switch transistor Mmain flows through the current
  • the current of the main switch Mmain increases to ID_Mmain from zero when it is turned off.
  • the The current of the main diode Dmain will be reduced by ID_Mmain; at this time, the induced current of the diode current sensing module 102 is proportionally reduced, and the driving module 103 amplifies the reduced induced current by M times through the driving resistor Rg in the main switch.
  • the gate terminal of the transistor Mmain forms a gate voltage, and a smaller gate voltage will reduce the current ID_Mmain flowing through the main switching transistor Mmain, and on the premise that the total system current is a fixed value, the current ID_Mmain flowing through the main diode The current of Dmain will increase, thus forming a negative feedback loop.
  • the negative feedback loop will keep the whole loop in a steady state, so that the forward current flowing through the main diode Dmain is reduced to the current set value; when the forward current flowing through the main diode Dmain is greater than this negative
  • the feedback loop turns on the current threshold (ie Vth_main/Rg/M*N)
  • the gate terminal voltage of the main switch Mmain will be greater than its own threshold voltage, and the main switch Mmain is turned on, so that it is turned off Re-opening in the cycle
  • the main switch tube Mmain will flow through the current ID_Mmain, so that the forward current flowing through the main diode Dmain will be reduced to the current set value;
  • the forward current is less than the turn-on current threshold of the negative feedback loop (ie Vth_main/Rg/M*N)
  • the gate terminal voltage of the main switch Mmain will be less than its own threshold voltage, and the main switch Mmain is turned off. off, so that it can automatically restore the off state during the off cycle.
  • the main module 101, the diode current sensing module 102 and the driving module 103 are also constructed as an adaptive acceleration response circuit.
  • the above negative feedback loop reduces the forward current of the main diode Dmain to the current setting value, which is calculated as follows:
  • the on-current ID_Mmain of the main switch Mmain that is turned on again in the selected turn-off period is much larger than the current flowing through the main diode Dmain at this time, that is, the current flowing through the system at this time.
  • the operating current passed is that almost all of Isys flows through the main switch tube Mmain, and a very small part flows through the main diode Dmain. This very small fraction of the current flowing through the main diode can be ignored in the calculation.
  • MOSFET power tube as the main switch tube Mmain as an example, when the Isys current is small, when the source-drain voltage difference of the MOSFET power tube is greater than the overdrive voltage (Vgs-Vth), the MOSFET works in the saturation region. According to the relevant basic knowledge, at this time:
  • Vgs Sqrt (2 * Isys / ( ⁇ n * Cox * W / L)) + Vth
  • the main diode Dmain current setting value ID_set is:
  • ID_set Vgs/Rg/M*N (1)
  • ID_set (Sqrt(2*Isys/( ⁇ n *Cox*W/L))+Vth)/Rg/M*N
  • the forward voltage drop VD_main of the main diode Dmain is:
  • VD_main VT*ln(ID_set/Is)
  • VD_main VT*ln((Sqrt(2*Isys/( ⁇ n *Cox*W/L))+Vth)/Rg/M*N/Is)
  • the area ratio of the main diode Dmain and the sensing diode Dsns is selected to be 1E5 times (ie, 100,000 times), the current amplification of the driving module 103 is 20 times, and the resistance of the driving resistor is 50K ohms.
  • the system current If it is 10A. Without the present invention, the 10A current all flows through the main diode Dmain during the off period, causing the main diode Dmain to heat up, and the large current of 10A flowing through the main diode Dmain has a large forward voltage drop.
  • the voltage difference between the source and drain terminals of the switch tube Mmain is also about 0.3V, that is, the system power consumption is sharply reduced from the 7W power consumption generated by the previous main diode Dmain 10A forward voltage drop of 0.7V to the main switch tube Mmain flowing through 10A.
  • the power consumption generated by the voltage drop of 0.3 volts is 3W, which greatly improves the system efficiency and reduces heat generation during the off period of the main switch tube Mmain.
  • the main switch tube Mmain during the off period of the main switch tube Mmain, if the main diode Dmain has a forward current flowing and exceeds a certain current threshold, the main switch tube Mmain will be restarted to be turned on, and the main switch tube Mmain will be turned on. Most of the current is bypassed by the main switch tube Mmain, leaving only a very small current to flow through the main diode Dmain; when the forward current of the main diode Dmain is less than the current threshold, the main switch tube Mmain is automatically restored and turned off.
  • this embodiment provides a diode current bypass control circuit.
  • the control circuit of this embodiment further includes: a current threshold module 104 connected to the diode current sensing module 102 and the driving module 103, for comparing the induced current ID_sns with the set threshold current Ith_adj, and turning off the driving module 103 when the induced current ID_sns is less than the set threshold current Ith_adj, and when the induced current ID_sns is less than the set threshold current Ith_adj
  • the driving module 103 is turned on when ID_sns is greater than the set threshold current Ith_adj.
  • the current threshold module 104 includes: a threshold current source, the input terminal of the threshold current source is connected to the power supply voltage VDD, and the output terminal of the threshold current source is connected to the diode current sensing The output end of the module 102 and the input end of the driving module 103 .
  • the induced current ID_sns when the induced current ID_sns is less than the set threshold current Ith_adj provided by the threshold current source, the induced current ID_sns is offset by the set threshold current Ith_adj, and the first mirror current tube
  • the gate terminal voltage of MP0 is always at a high level, that is, the first mirror current tube MP0 is in an off state, and the driving module 103 is in an off state; at this time, the bypass control circuit is in a dormant state, and the standby power consumption is very low.
  • the inductive current ID_sns When the inductive current ID_sns is greater than the set threshold current Ith_adj provided by the threshold current source, a current (ie the difference between the inductive current ID_sns and the set threshold current Ith_adj) flows into the first mirror current tube MP0.
  • the driving module 103 is in an on state. It should be noted that when the diode current bypass control circuit includes the current threshold module 104, due to the existence of the set threshold current Ith_adj, the set current value corresponding to the circuit will be adjusted to (Vth_main/Rg/M +Ith_adj)*N.
  • the present embodiment also provides a diode current bypass control method for performing bypass control on the main diode Dmain connected in parallel to the source and drain ends of the main switch tube Mmain in the main module 101.
  • the control method includes:
  • the current threshold module 104 compares the induced current ID_sns with the set threshold current Ith_adj, and turns off the driving module 103 when the induced current ID_sns is less than the set threshold current Ith_adj, and when the induced current ID_sns is greater than the set threshold current Turn on the drive module 103 when Ith_adj;
  • the driving module 103 When the driving module 103 is turned on, the driving module 103 generates a driving current Idrv proportional to the induced current ID_sns to drive the main switch Mmain to be turned on;
  • the main module 101 , the diode current sensing module 102 and the driving module 103 form a negative feedback loop to reduce the current of the main diode Dmain to a set current value.
  • a diode current bypass control circuit and a control method thereof of the present invention utilize the negative feedback loop constructed by the main module, the diode current sensing module and the driving module to control the opening of the main switch tube to bypass and adjust the main diode reduce the current of the main diode to the set current value, so as to control the current of the main diode within a limited range.
  • the present invention has the property of negative feedback, and an opening threshold (that is, a threshold current is set) can also be added to automatically realize the opening or closing of the circuit, and the circuit structure of the present invention is simple and easy to implement. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has high industrial application value.

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Abstract

一种二极管电流旁路控制电路及其控制方法，所述控制电路包括：主模块（101）、二极管电流感应模块（102）及驱动模块（103），所述主模块（101）包括主开关管及主二极管，主二极管并联于主开关管的源、漏两端；所述二极管电流感应模块连接于主二极管的两端，用于感应流经主二极管的电流；所述驱动模块（103）连接于二极管电流感应模块的输出端及主开关管的栅端，用于产生与感应电流呈比例的驱动电流以驱动主开关管导通；其中，主模块（101）、二极管电流感应模块（102）及驱动模块（103）构成负反馈环路，实现减小主二极管的电流至设定电流值，解决了在主开关管关断周期内大电流流过体二极管或续流二极管而导致的发热问题及因大电流引入衬底而导致的电路失控问题。

Description

一种二极管电流旁路控制电路及其控制方法 技术领域
本发明涉及集成电路领域，特别是涉及一种二极管电流旁路控制电路及其控制方法。
背景技术
随着社会对高效和环保越来越重视，功率MOSFET、IGBT、SiC、GaN等不断提升效率的功率器件得到不断发展，如何增加效率、减小发热成为工程师为之努力的目标。
功率MOSFET、IGBT、SiC、GaN等在功率电源或作为主开关管使用时，在这些主开关关断周期内广泛涉及到大电流从体二极管或续流二极管流过；如功率MOSFET在开关电源使用时，开关切换期间，大电流从功率MOSFET的体二极管流过；又如便携式设备电池中，保护所使用的MOSFET在过压保护和欠压保护期间，大电流放电和充电电流都将全部从MOSFET分离器件的体二极管流过；还如在高效节能的直流电机驱动应用中IGBT/SiC/GaN等功率开关管会额外增加续流二极管，以便在上下桥驱动主开关管关断时达到数十上百安培的电流从续流二极管流过，以驱动电机正常工作。
由于流过体二极管或续流二极管的大电流往往会导致发热，甚至因衬底电流过大导致逻辑混乱，从而使电路无法正常工作；因此，如何减小这种负面效应，长久以来都是工程师不断摸索的方向。
发明内容
鉴于以上所述现有技术的缺点，本发明的目的在于提供一种二极管电流旁路控制电路及其控制方法，用于解决现有技术中在主开关管关断周期内大电流流过体二极管或续流二极管而导致的发热问题及因大电流引入衬底而导致的电路失控问题。
为实现上述目的及其他相关目的，本发明提供一种二极管电流旁路控制电路，所述控制电路包括：主模块、二极管电流感应模块及驱动模块，
所述主模块包括主开关管及主二极管，所述主二极管并联于所述主开关管的源、漏两端；
所述二极管电流感应模块连接于所述主二极管的两端，用于感应流经所述主二极管的电流；
所述驱动模块连接于所述二极管电流感应模块的输出端及所述主开关管的栅端，用于产生与所述感应电流呈比例的驱动电流以驱动所述主开关管导通；
其中，所述主模块、所述二极管电流感应模块及所述驱动模块构成负反馈环路，实现减 小所述主二极管的电流至设定电流值。
可选地，所述二极管电流感应模块包括感应二极管，其通过使所述感应二极管两端的电压正相关或等于所述主二极管两端的电压，实现通过所述感应二极管感应流经所述主二极管的电流。
可选地，所述二极管电流感应模块包括：误差放大器、源跟随管及感应二极管，所述误差放大器的同相输入端连接于所述主二极管的阳极端，所述误差放大器的反相输入端连接于所述源跟随管的源端及所述感应二极管的阳极端，所述误差放大器的输出端连接于所述源跟随管的栅端，所述源跟随管的漏端作为所述二极管电流感应模块的输出端，所述感应二极管的阴极端连接于所述主二极管的阴极端。
可选地，所述二极管电流感应模块包括：偏置电流源、第一共栅管、第二共栅管、感应开关管及感应二极管，所述偏置电流源的输入端接入电源电压，所述偏置电流源的输出端连接于所述第一共栅管的漏端，所述第一共栅管的源端连接于所述主二极管的阳极端，所述第一共栅管的栅端连接于所述第一共栅管的漏端及所述第二共栅管的栅端，所述第二共栅管的漏端作为所述二极管电流感应模块的输出端，所述第二共栅管的源端连接于所述感应开关管的源端及所述感应二极管的阳极端，所述感应开关管的栅端连接于所述感应开关管的源端，所述感应开关管的漏端连接于所述感应二极管的阴极端及所述主二极管的阴极端。
可选地，所述二极管电流感应模块还包括：第一电阻，所述第一电阻连接于所述第一共栅管的源端和所述主二极管的阳极端之间。
可选地，所述二极管电流感应模块还包括：第一电阻及第二电阻，所述第一电阻连接于所述第一共栅管的源端和所述主二极管的阳极端之间，所述第二电阻连接于所述第二共栅管的源端和所述感应二极管的阳极端之间。
可选地，所述驱动模块包括：第一电流镜像管、第二电流镜像管及驱动电阻，所述第一电流镜像管的源端连接于所述第二电流镜像管的源端并接入电源电压，所述第一电流镜像管的漏端连接于所述二极管电流感应模块的输出端，所述第一电流镜像管的栅端连接于所述第一电流镜像管的漏端及所述第二电流镜像管的栅端，所述第二电流镜像管的漏端连接于所述驱动电阻的一端，同时作为所述驱动模块的输出端，所述驱动电阻的另一端接入主开关管的开关控制信号。
可选地，所述驱动模块包括：第一电流镜像管、第二电流镜像管、采样电阻、NMOS驱动管及PMOS驱动管，所述第一电流镜像管的源端连接于所述第二电流镜像管的源端并接入电源电压，所述第一电流镜像管的漏端连接于所述二极管电流感应模块的输出端，所述第一 电流镜像管的栅端连接于所述第一电流镜像管的漏端及所述第二电流镜像管的栅端，所述第二电流镜像管的漏端连接于所述采样电阻的一端、所述NMOS驱动管的栅端及所述PMOS驱动管的栅端，所述采样电阻的另一端连接于所述主开关管的源端，所述NMOS驱动管的漏端接入电源电压，所述NMOS驱动管的源端连接于所述PMOS驱动管的源端，同时作为所述驱动模块的输出端连接于所述主开关管的栅端，所述PMOS驱动管的漏端连接于所述主开关管的源端；其中，所述PMOS驱动管的阈值电压小于所述主开关管的阈值电压。
可选地，所述驱动模块还包括：PMOS开关管，其源端接入电源电压，其漏端连接于所述NMOS驱动管的栅端，其栅端接入PMOS开关管的开关控制信号。
可选地，所述驱动模块包括：第一电流镜像管、第二电流镜像管、采样电阻、第一三极管及第二三极管，所述第一电流镜像管的源端连接于所述第二电流镜像管的源端并接入电源电压，所述第一电流镜像管的漏端连接于所述二极管电流感应模块的输出端，所述第一电流镜像管的栅端连接于所述第一电流镜像管的漏端及所述第二电流镜像管的栅端，所述第二电流镜像管的漏端连接于所述采样电阻的一端、所述第一三极管的基极及所述第二三极管的基极，所述采样电阻的另一端连接于所述主开关管的源端，所述第一三极管的集电极接入电源电压，所述第一三极管的发射极连接于所述第二三极管的发射极，同时作为所述驱动模块的输出端连接于所述主开关管的栅端，所述第二三极管的集电极连接于所述主开关管的源端；其中，所述第二三极管的导通电压小于所述主开关管的阈值电压。
可选地，所述驱动模块还包括：PMOS开关管，其源端接入电源电压，其漏端连接于所述第一三极管的基极，其栅端接入PMOS开关管的开关控制信号。
可选地，所述控制电路还包括：电流门限模块，连接于所述二极管电流感应模块及所述驱动模块之间，用于比较感应电流和设定门限电流，并在所述感应电流小于所述设定门限电流时关闭所述驱动模块，在所述感应电流大于所述设定门限电流时开启所述驱动模块。
可选地，所述电流门限模块包括：门限电流源，所述门限电流源的输入端接入电源电压，所述门限电流源的输出端连接于所述二极管电流感应模块的输出端及所述驱动模块的输入端。
本发明还提供了一种二极管电流旁路控制方法，用于对主模块中并联于主开关管源、漏两端的主二极管进行旁路控制，所述控制方法包括：
基于二极管电流感应模块感应流经所述主二极管的电流；
驱动模块根据所述感应电流产生与其呈比例的驱动电流以驱动所述主开关管导通；
其中，所述主模块、所述二极管电流感应模块及所述驱动模块构成负反馈环路，实现减 小所述主二极管的电流至设定电流值。
可选地，基于二极管电流感应模块感应流经所述主二极管电流的方法包括：通过使所述二极管电流感应模块中感应二极管两端的电压正相关或等于所述主二极管两端的电压，实现感应流经所述主二极管的电流。
可选地，基于二极管电流感应模块感应流经所述主二极管的电流之后，所述控制方法还包括：比较感应电流和设定门限电流，并在所述感应电流小于所述设定门限电流时关闭所述驱动模块，在所述感应电流大于所述设定门限电流时开启所述驱动模块。
如上所述，本发明的一种二极管电流旁路控制电路及其控制方法，利用主模块、二极管电流感应模块及驱动模块构建的负反馈环路控制开启主开关管以旁路、调节主二极管电流，实现减小主二极管电流至设定电流值，从而将主二极管电流控制在限定范围内。本发明具有负反馈属性，也可添加开启门限(即设定门限电流)，以自动实现开启或关闭电路，同时本发明电路结构简单、易实现。
附图说明
图1显示为本发明实施例一所述二极管电流旁路控制电路的实现方式。
图2显示为本发明所述二极管电流旁路控制电路中二极管电流感应模块的另一种实现方式。
图3显示为本发明所述二极管电流旁路控制电路中驱动模块的另一种实现方式。
图4显示为本发明所述二极管电流旁路控制电路中驱动模块的另一种实现方式。
图5显示为本发明所述二极管电流旁路控制电路中驱动模块的另一种实现方式。
图6显示为本发明所述二极管电流旁路控制电路中驱动模块的另一种实现方式。
图7显示为本发明实施例二所述二极管电流旁路控制电路的实现方式。
元件标号说明
101                    主模块
102                    二极管电流感应模块
103                    驱动模块
104                    比较检测模块
具体实施方式
以下通过特定的具体实例说明本发明的实施方式，本领域技术人员可由本说明书所揭露 的内容轻易地了解本发明的其他优点与功效。本发明还可以通过另外不同的具体实施方式加以实施或应用，本说明书中的各项细节也可以基于不同观点与应用，在没有背离本发明的精神下进行各种修饰或改变。
请参阅图1至图7。需要说明的是，本实施例中所提供的图示仅以示意方式说明本发明的基本构想，虽图示中仅显示与本发明中有关的组件而非按照实际实施时的组件数目、形状及尺寸绘制，其实际实施时各组件的形态、数量及比例可为一种随意的改变，且其组件布局形态也可能更为复杂。
实施例一
如图1所示，本实施例提供一种二极管电流旁路控制电路，所述控制电路包括：主模块101、二极管电流感应模块102及驱动模块103，
所述主模块101包括主开关管Mmain及主二极管Dmain，所述主二极管Dmain并联于所述主开关管Mmain的源、漏两端；
所述二极管电流感应模块102连接于所述主二极管Dmain的两端，用于感应流经所述主二极管Dmain的电流；
所述驱动模块103连接于所述二极管电流感应模块102的输出端及所述主开关管Mmain的栅端，用于产生与所述感应电流呈比例的驱动电流以驱动所述主开关管Mmain导通；
其中，所述主模块101、所述二极管电流感应模块102及所述驱动模块103构成负反馈环路，实现减小所述主二极管Dmain的电流至设定电流值。
作为示例，所述主开关管Mmain包括：功率MOSFET、IGBT、SiC管或GaN管中的一种，所述主二极管Dmain为所述主开关管Mmain的体二极管或续流二极管；当然，所述主二极管Dmain具体为体二极管或续流二极管还需根据实际应用来看。
作为示例，所述二极管电流感应模块102包括感应二极管Dsns，其通过使所述感应二极管Dsns两端的电压正相关或等于所述主二极管Dmain两端的电压，以实现通过所述感应二极管Dsns感应流经所述主二极管Dmain的电流。
具体的，如图1所示，在一示例中，所述二极管电流感应模块102包括：误差放大器ERROR AMP、源跟随管Md0及感应二极管Dsns，所述误差放大器ERROR AMP的同相输入端连接于所述主二极管Dmain的阳极端，所述误差放大器ERROR AMP的反相输入端连接于所述源跟随管Md0的源端及所述感应二极管Dsns的阳极端，所述误差放大器ERROR AMP的输出端连接于所述源跟随管Md0的栅端，所述源跟随管Md0的漏端作为所述二极管电流感应模块102的输出端，所述感应二极管Dsns的阴极端连接于所述主二极管Dmain的阴极端。其 中，所述感应二极管Dsns和所述主二极管Dmain为同一类型二极管，且两者仅结面积不同，所述感应二极管Dsns的结面积与所述主二极管Dmain的结面积比为1/N，N为正数。
本示例中，所述误差放大器ERROR AMP和所述源跟随管Md0构成负反馈电路，以使所述感应二极管Dsns的阳极端电压与所述主开关管Mmain的源端电压相等，即所述感应二极管Dsns的阳极端电压与所述主二极管Dmain的阳极端电压相等，而由于所述感应二极管Dsns的阴极端与所述主二极管Dmain的阴极端相连，故所述感应二极管Dsns的阴极端电压与所述主二极管Dmain的阴极端电压也相等，从而使所述感应二极管Dsns两端电压与所述主二极管Dmain两端电压相等；此时，流经所述主二极管Dmain的电流ID_main与流经所述感应二极管Dsns的电流ID_sns满足如下公式：ID_sns：ID_main＝1：N，从而实现通过所述感应二极管Dsns精确感应流经所述主二极管Dmain的电流。
具体的，如图2所示，在另一示例中，所述二极管电流感应模块102包括：偏置电流源Ibias、第一共栅管MN0、第二共栅管MN1、感应开关管Msns及感应二极管Dsns，所述偏置电流源Ibias的输入端接入电源电压VDD，所述偏置电流源Ibias的输出端连接于所述第一共栅管MN0的漏端，所述第一共栅管MN0的源端连接于所述主二极管Dmain的阳极端，所述第一共栅管MN0的栅端连接于所述第一共栅管MN0的漏端及所述第二共栅管MN1的栅端，所述第二共栅管MN1的漏端作为所述二极管电流感应模块102的输出端，所述第二共栅管MN1的源端连接于所述感应开关管Msns的源端及所述感应二极管Dsns的阳极端，所述感应开关管Msns的栅端连接于所述感应开关管Msns的源端，所述感应开关管Msns的漏端连接于所述感应二极管Dsns的阴极端及所述主二极管Dmain的阴极端。其中，所述感应开关管Msns和所述主开关管Mmain为同一类型开关管，且两者仅尺寸不同，所述感应开关管Msns的尺寸与所述主开关管Mmain的尺寸比为1/N，N为正数。
本示例中，所述第一共栅管MN0和所述第二共栅管MN1构成共栅极电路，将所述第一共栅管MN0的源端电压看作参考电压，将所述第二共栅管MN1的源端电压看作调节电压，所述第一共栅管MN0的源端由于电流流经所述主二极管Dmain产生电压，此电压与所述第一共栅管MN0的栅源电压之和作为所述第二共栅管MN1的栅极电压，所述第二共栅管MN1在其栅极电压的偏置下会产生电流流经所述感应二极管Dsns，随着流经所述感应二极管Dsns电流的增大，所述第二共栅管MN1的源端电压将升高至与所述第一共栅管MN0的源端电压相等，以此根据所述第一共栅管MN0的源端参考电压调节所述第二共栅管MN1的源端调节电压，并使调节电压等于参考电压，从而实现所述第二共栅管MN1的源端电压始终与所述第一共栅管MN0的源端电压相等，即所述感应二极管Dsns的阳极端电压与所述主二极管Dmain 的阳极端电压相等，同时由于所述感应二极管Dsns的阴极端与所述主二极管Dmain的阴极端相连，故所述感应二极管Dsns的阴极端电压与所述主二极管Dmain的阴极端电压也相等，从而使感应二极管Dsns的两端电压与所述主二极管Dmain两端电压相等；此时，流经所述主二极管Dmain的电流ID_main与流经所述感应二极管Dsns的电流ID_sns满足如下公式：ID_sns：ID_main＝1：N，从而实现通过所述感应二极管Dsns精确感应流经所述主二极管Dmain的电流。
具体的，如图2所示，在另一示例中，所述二极管电流感应模块102还包括：第一电阻R0，所述第一电阻R0连接于所述第一共栅管MN0的源端和所述主二极管的阳极端Dmain之间，用于引入对应直流分量，以微调所述主二极管Dmain与所述感应二极管Dsns的电压关系。当然，所述二极管电流感应模块102还可以在第一电阻R0的基础上增加第二电阻R1，此时所述第二电阻R1连接于所述第二共栅管MN1的源端和所述感应二极管Dsns的阳极端之间。
作为一示例，如图1和2所示，所述驱动模块103包括：第一电流镜像管MP0、第二电流镜像管MP1及驱动电阻Rg，所述第一电流镜像管MP0的源端连接于所述第二电流镜像管MP1的源端并接入电源电压VDD，所述第一电流镜像管MP0的漏端连接于所述二极管电流感应模块102的输出端，所述第一电流镜像管MP0的栅端连接于所述第一电流镜像管MP0的漏端及所述第二电流镜像管MP1的栅端，所述第二电流镜像管MP1的漏端连接于所述驱动电阻Rg的一端，同时作为所述驱动模块103的输出端，所述驱动电阻Rg的另一端接入主开关管的开关控制信号Crl_main。需要注意的是，所述主开关管的开关控制信号Crl_main为外部电路产生的控制信号，用来控制所述主开关管Mmain的导通或关断，以此控制所述主开关管Mmain是处于导通周期还是关断周期。
本示例中，所述第一电流镜像管MP0和所述第二电流镜像管MP1构成电流镜，用来产生与所述感应电流ID_sns呈比例的驱动电流Idrv(所述感应电流ID_sns与所述驱动电流Idrv满足如下公式：Idrv＝M*ID_sns，M为电流镜的放大倍数)，通过将所述驱动电流Idrv作用于所述驱动电阻Rg上以产生相应的驱动电压来驱动所述主开关管Mmain导通，以此实现关断周期内所述主开关管Mmain的导通。
作为另一示例，如图3所示，所述驱动模块103包括：第一电流镜像管MP0、第二电流镜像管MP1、采样电阻Rg、NMOS驱动管MNdrv及PMOS驱动管MPdrv，所述第一电流镜像管MP0的源端连接于所述第二电流镜像管MP1的源端并接入电源电压VDD，所述第一电流镜像管MP0的漏端连接于所述二极管电流感应模块102的输出端，所述第一电流镜像管 MP0的栅端连接于所述第一电流镜像管MP0的漏端及所述第二电流镜像管MP1的栅端，所述第二电流镜像管MP1的漏端连接于所述采样电阻Rg的一端、所述NMOS驱动管MNdrv的栅端及所述PMOS驱动管MPdrv的栅端，所述采样电阻Rg的另一端连接于所述主开关管Mmain的源端，所述NMOS驱动管MNdrv的漏端接入电源电压VDD，所述NMOS驱动管MNdrv的源端连接于所述PMOS驱动管MPdrv的源端，同时作为所述驱动模块103的输出端连接于所述主开关管Mmain的栅端，所述PMOS驱动管MPdrv的漏端连接于所述主开关管Mmain的源端；其中，所述PMOS驱动管MPdrv的阈值电压小于所述主开关管Mmain的阈值电压。
本示例中，所述第一电流镜像管MP0和所述第二电流镜像管MP1构成电流镜，用来产生与所述感应电流ID_sns呈比例的驱动电流Idrv(所述感应电流ID_sns与所述驱动电流Idrv满足如下公式：Idrv＝M*ID_sns，M为电流镜的放大倍数)，该驱动电流Idrv经采样电阻Rg后产生相应的驱动电压来驱动所述NMOS驱动管MNdrv及所述PMOS驱动管MPdrv导通，以此控制所述主开关管Mmain导通，从而实现关断周期内所述主开关管Mmain的导通。由于所述PMOS驱动管MPdrv的阈值电压小于所述主开关管Mmain的阈值电压，故本示例所述驱动模块103自带电流关断门限，其中该关断电流门限为所述主开关管Mmain的阈值电压与所述PMOS驱动管MPdrv的阈值电压之差与所述采样电阻Rg的比值，即(Vth_main-Vth_MPdrv)/Rg。
作为另一示例，如图4所示，相较于上一示例(即图3所述示例)，本示例所述驱动模块103还包括：PMOS开关管MP，其源端接入电源电压VDD，其漏端连接于所述NMOS驱动管MNdrv的栅端，其栅端接入PMOS开关管的开关控制信号Ctl_MP。需要注意的是，所述PMOS开关管的开关控制信号Ctl_MP为外部控制信号，用来控制所述NMOS驱动管MNdrv及所述PMOS驱动管MPdrv是否导通，以此实现所述驱动模块103的外部控制。
作为另一示例，如图5所示，所述驱动模块103包括：第一电流镜像管MP0、第二电流镜像管MP1、采样电阻Rg、第一三极管NPN及第二三极管PNP，所述第一电流镜像管MP0的源端连接于所述第二电流镜像管MP1的源端并接入电源电压VDD，所述第一电流镜像管MP0的漏端连接于所述二极管电流感应模块102的输出端，所述第一电流镜像管MP0的栅端连接于所述第一电流镜像管MP0的漏端及所述第二电流镜像管MP1的栅端，所述第二电流镜像管MP1的漏端连接于所述采样电阻Rg的一端、所述第一三极管NPN的基极及所述第二三极管PNP的基极，所述采样电阻Rg的另一端连接于所述主开关管的源端，所述第一三极管NPN的集电极接入电源电压VDD，所述第一三极管NPN的发射极连接于所述第二三极管 PNP的发射极，同时作为所述驱动模块103的输出端连接于所述主开关管Mmain的栅端，所述第二三极管PNP的集电极连接于所述主开关管Mmain的源端；其中，所述第二三极管PNP的导通电压小于所述主开关管Mmain的阈值电压。
本示例中，所述第一电流镜像管MP0和所述第二电流镜像管MP1构成电流镜，用来产生与所述感应电流ID_sns呈比例的驱动电流Idrv(所述感应电流ID_sns与所述驱动电流Idrv满足如下公式：Idrv＝M*ID_sns，M为电流镜的放大倍数)，该驱动电流Idrv经采样电阻Rg后产生相应的驱动电压来驱动所述第一三极管NPN及所述第二三极管PNP导通，以此控制所述主开关管Mmain导通，从而实现关断周期内所述主开关管Mmain的导通。由于所述第二三极管PNP的导通电压小于所述主开关管Mmain的阈值电压，故本示例所述驱动模块103自带关断电流门限，其中，该关断电流门限为所述主开关管Mmain的阈值电压与所述第二三极管PNP的基极与发射极间电压之差与所述采样电阻Rg的比值，即(Vth_main-Vbe_PNP)/Rg。
作为另一示例，如图6所示，相较于上一示例(即图5所述示例)，本示例所述驱动模块103还包括：PMOS开关管MP，其源端接入电源电压VDD，其漏端连接于所述第一三极管NPN的基极，其栅端接入PMOS开关管的开关控制信号Ctl_MP。需要注意的是，所述PMOS开关管的开关控制信号Ctl_MP为外部控制信号，用来控制所述第一三极管NPN及所述第二三极管PNP是否导通，以此实现所述驱动模块103的外部控制。
相应的，本实施例还提供一种二极管电流旁路控制方法，用于对主模块101中并联于主开关管Mmain源、漏两端的主二极管Dmain进行旁路控制，所述控制方法包括：
基于二极管电流感应模块102感应流经所述主二极管Dmain的电流；
驱动模块103根据所述感应电流产生与其呈比例的驱动电流以驱动所述主开关管Mmain导通；
其中，所述主模块101、所述二极管电流感应模块102及所述驱动模块103构成负反馈环路，实现减小所述主二极管Dmain的电流至设定电流值。
作为示例，基于二极管电流感应模块102感应流经所述主二极管Dmain电流的方法包括：通过使所述二极管电流感应模块102中感应二极管Dsns两端的电压正相关或等于所述主二极管Dmain两端的电压，从而实现感应流经所述主二极管Dmain的电流。
下面请参阅图1对本实施例所述二极管电流旁路控制电路的工作原理进行详细说明，其中，所述主开关管Mmain在外部电路产生的主开关管的开关控制信号Ctl_main的作用下处于关断周期。
如图1所示，在主开关管的关断周期内，所述二极管电流感应模块102感应和侦测所述主二极管Dmain的正向电流，所述驱动模块103将此感应电流放大M倍后通过驱动电阻Rg在所述主开关管Mmain的栅端形成栅极电压，以此驱动所述主开关管Mmain在关断周期内重新开启导通电流；此时，流经所述主开关管Mmain的电流由关断时的零增加至ID_Mmain，由于在此工作瞬间，***流过的总电流为一固定值，故在所述主开关管Mmain流过的电流增至ID_Mmain时，流经所述主二极管Dmain的电流将减小ID_Mmain；此时，二极管电流感应模块102的感应电流等比例减小，驱动模块103将此减小后的感应电流放大M倍后通过驱动电阻Rg在所述主开关管Mmain的栅端形成栅极电压，较小的栅极电压将减小流经所述主开关管Mmain的电流ID_Mmain，而在***总电流为一固定值的前提下，流经所述主二极管Dmain的电流将增大，从而形成负反馈环路。该负反馈环路将使整个环路处于稳态，以使流经所述主二极管Dmain的正向电流减小至电流设定值；当流经所述主二极管Dmain的正向电流大于此负反馈环路开启电流阈值(即Vth_main/Rg/M*N)时，所述主开关管Mmain的栅端电压将大于其自身的阈值电压，所述主开关管Mmain导通，实现其在关断周期内重新开启，所述主开关管Mmain将流过电流ID_Mmain，以此将流经所述主二极管Dmain的正向电流减小，并至电流设定值；而当流经所述主二极管Dmain的正向电流小于此负反馈环路开启电流阈值(即Vth_main/Rg/M*N)时，所述主开关管Mmain的栅端电压将小于其自身的阈值电压，所述主开关管Mmain关断，实现其在关断周期内自动恢复关断状态。
所述主模块101、所述二极管电流感应模块102及所述驱动模块103同时还构建成一自适应加速响应电路，具有所述主二极管Dmain初始流过的电流越大，该负反馈环路响应越快的特点，以此实现在更短时间内旁路和减小所述主二极管Dmain的电流到设定电流值。
以上负反馈环路将主二极管Dmain的正向电流减小至电流设定值，该电流设定值计算如下：
设计中，通常在负反馈环路开启后到达稳态时，选定关断周期内重新开启的主开关管Mmain导通电流ID_Mmain远大于此时主二极管Dmain流过的电流，即***此时流过的工作电流为Isys几乎全部流过主开关管Mmain，非常小的部分流过主二极管Dmain。计算中，可忽略此非常小的部分流过主二极管的电流。以MOSFET功率管为主开关管Mmain为例，当Isys电流较小时，此时MOSFET功率管的源漏电压差大于过驱电压(Vgs-Vth)时，MOSFET工作在饱和区。根据相关基础知识，此时：
Isys＝1/2*μ n*Cox*W/L*(Vgs-Vth) 2
Vgs＝Sqrt(2*Isys/(μ n*Cox*W/L))+Vth
负反馈达到稳态时，主二极管Dmain电流设定值ID_set为：
ID_set＝Vgs/Rg/M*N                    (1)
即：ID_set＝(Sqrt(2*Isys/(μ n*Cox*W/L))+Vth)/Rg/M*N
根据相关基础知识，主二极管Dmain此时正向压降VD_main为：
VD_main＝VT*ln(ID_set/Is)
即VD_main＝VT*ln((Sqrt(2*Isys/(μ n*Cox*W/L))+Vth)/Rg/M*N/Is)
列举一设计实例，便于理解。如图2所示，选取主二极管Dmain与感应二极管Dsns面积比为1E5倍(即十万倍)，驱动模块103的电流放大倍数为20倍，驱动电阻的阻值为50K欧姆，此时***电流若为10A。没有本发明时，在关断周期内此10A电流全部流过主二极管Dmain，造成主二极管Dmain发热，大电流10A流过主二极管Dmain正向压降大。在本发明的应用下，主开关管Mmain重新开启，主开关管Mmain通常宽长比非常大，若此时栅极驱动电压为3V，根据以上公式(1)在负反馈环路稳定时流经主二极管Dmain的电流为：ID_set＝Vgs/Rg/M*N＝3/50K/20*1E5＝300mA。
可见，无本发明应用前10A电流流过主二极管Dmain，造成其发热；有本发明应用时，负反馈环路达到稳态时仅有300mA电流流过主二极管Dmain，主二极管Dmain电流减小效果十分明显。且，因为主二极管Dmain电流由10A变为300mA后，保守估算主二极管Dmain压降将由10A电流时的0.7V或更大减小为300mA电流时的0.3V左右，并联于主二极管Dmain两端的主开关管Mmain的源、漏端压差也为0.3V左右，即***功耗在此处由以前主二极管Dmain 10A正向压降0.7V产生的7W功耗锐减到主开关管Mmain流过10A压降0.3伏产生的功耗3W，实现主开关管Mmain关断周期内大大提升***效率、减小发热。
由以上的实例可看出，本发明在主开关管Mmain的关断周期内，若主二极管Dmain有正向电流流过，且超过一定电流阈值时，将重启主开关管Mmain导通，并将绝大部分电流由主开关管Mmain旁路流走，只留极小的电流流过主二极管Dmain；在主二极管Dmain正向电流小于电流阈值时，自动恢复关闭主开关管Mmain。
实施例二
如图7所示，本实施例提供一种二极管电流旁路控制电路，相较于实施例一，本实施例所述控制电路还包括：电流门限模块104，连接于所述二极管电流感应模块102及所述驱动模块103之间，用于比较感应电流ID_sns和设定门限电流Ith_adj，并在所述感应电流ID_sns小于所述设定门限电流Ith_adj时关闭所述驱动模块103，在所述感应电流ID_sns大于所述设定门限电流Ith_adj时开启所述驱动模块103。
作为示例，如图7所示，所述电流门限模块104包括：门限电流源，所述门限电流源的输入端接入电源电压VDD，所述门限电流源的输出端连接于所述二极管电流感应模块102的输出端及所述驱动模块103的输入端。
本示例中，在所述感应电流ID_sns小于所述门限电流源提供的设定门限电流Ith_adj时，所述感应电流ID_sns被所述设定门限电流Ith_adj抵消掉，此时所述第一镜像电流管MP0的栅端电压一直为高电平，即所述第一镜像电流管MP0处于关断状态，则所述驱动模块103处于关闭状态；此时所述旁路控制电路处于休眠状态，待机功耗非常低。在所述感应电流ID_sns大于所述门限电流源提供的设定门限电流Ith_adj时，有电流(即感应电流ID_sns与设定门限电流Ith_adj之差)流入所述第一镜像电流管MP0，此时所述驱动模块103处于开启状态。需要注意的是，在所述二极管电流旁路控制电路包括电流门限模块104时，由于所述设定门限电流Ith_adj的存在，将使得电路对应的设定电流值大小调整为(Vth_main/Rg/M+Ith_adj)*N。
相应的，本实施例还提供一种二极管电流旁路控制方法，用于对主模块101中并联于主开关管Mmain源、漏两端的主二极管Dmain进行旁路控制，所述控制方法包括：
基于二极管电流感应模块102感应流经所述主二极管Dmain的电流；
基于电流门限模块104比较感应电流ID_sns和设定门限电流Ith_adj，并在所述感应电流ID_sns小于所述设定门限电流Ith_adj时关闭驱动模块103，在所述感应电流ID_sns大于所述设定门限电流Ith_adj时开启所述驱动模块103；
在所述驱动模块103开启时，所述驱动模块103根据所述感应电流ID_sns产生与其呈比例的驱动电流Idrv以驱动所述主开关管Mmain导通；
其中，所述主模块101、所述二极管电流感应模块102及所述驱动模块103构成负反馈环路，实现减小所述主二极管Dmain的电流至设定电流值。
综上所述，本发明的一种二极管电流旁路控制电路及其控制方法，利用主模块、二极管电流感应模块及驱动模块构建的负反馈环路控制开启主开关管以旁路、调节主二极管电流，实现减小主二极管电流至设定电流值，从而将主二极管电流控制在限定范围内。本发明具有负反馈属性，也可添加开启门限(即设定门限电流)，以自动实现开启或关闭电路，同时本发明电路结构简单、易实现。所以，本发明有效克服了现有技术中的种种缺点而具高度产业利用价值。
上述实施例仅例示性说明本发明的原理及其功效，而非用于限制本发明。任何熟悉此技术的人士皆可在不违背本发明的精神及范畴下，对上述实施例进行修饰或改变。因此，举凡 所属技术领域中具有通常知识者在未脱离本发明所揭示的精神与技术思想下所完成的一切等效修饰或改变，仍应由本发明的权利要求所涵盖。

Claims (16)

  1. 一种二极管电流旁路控制电路，其特征在于，所述控制电路包括：主模块、二极管电流感应模块及驱动模块，
    所述主模块包括主开关管及主二极管，所述主二极管并联于所述主开关管的源、漏两端；
    所述二极管电流感应模块连接于所述主二极管的两端，用于感应流经所述主二极管的电流；
    所述驱动模块连接于所述二极管电流感应模块的输出端及所述主开关管的栅端，用于产生与所述感应电流呈比例的驱动电流以驱动所述主开关管导通；
    其中，所述主模块、所述二极管电流感应模块及所述驱动模块构成负反馈环路，实现减小所述主二极管的电流至设定电流值。
  2. 根据权利要求1所述的二极管电流旁路控制电路，其特征在于，所述二极管电流感应模块包括感应二极管，其通过使所述感应二极管两端的电压正相关或等于所述主二极管两端的电压，实现通过所述感应二极管感应流经所述主二极管的电流。
  3. 根据权利要求2所述的二极管电流旁路控制电路，其特征在于，所述二极管电流感应模块包括：误差放大器、源跟随管及感应二极管，所述误差放大器的同相输入端连接于所述主二极管的阳极端，所述误差放大器的反相输入端连接于所述源跟随管的源端及所述感应二极管的阳极端，所述误差放大器的输出端连接于所述源跟随管的栅端，所述源跟随管的漏端作为所述二极管电流感应模块的输出端，所述感应二极管的阴极端连接于所述主二极管的阴极端。
  4. 根据权利要求2所述的二极管电流旁路控制电路，其特征在于，所述二极管电流感应模块包括：偏置电流源、第一共栅管、第二共栅管、感应开关管及感应二极管，所述偏置电流源的输入端接入电源电压，所述偏置电流源的输出端连接于所述第一共栅管的漏端，所述第一共栅管的源端连接于所述主二极管的阳极端，所述第一共栅管的栅端连接于所述第一共栅管的漏端及所述第二共栅管的栅端，所述第二共栅管的漏端作为所述二极管电流感应模块的输出端，所述第二共栅管的源端连接于所述感应开关管的源端及所述感应二极管的阳极端，所述感应开关管的栅端连接于所述感应开关管的源端，所述感应开关管的漏端连接于所述感应二极管的阴极端及所述主二极管的阴极端。
  5. 根据权利要求4所述的二极管电流旁路控制电路，其特征在于，所述二极管电流感应模块还包括：第一电阻，所述第一电阻连接于所述第一共栅管的源端和所述主二极管的阳极端之间。
  6. 根据权利要求4所述的二极管电流旁路控制电路，其特征在于，所述二极管电流感应模块还包括：第一电阻及第二电阻，所述第一电阻连接于所述第一共栅管的源端和所述主二极管的阳极端之间，所述第二电阻连接于所述第二共栅管的源端和所述感应二极管的阳极端之间。
  7. 根据权利要求1所述的二极管电流旁路控制电路，其特征在于，所述驱动模块包括：第一电流镜像管、第二电流镜像管及驱动电阻，所述第一电流镜像管的源端连接于所述第二电流镜像管的源端并接入电源电压，所述第一电流镜像管的漏端连接于所述二极管电流感应模块的输出端，所述第一电流镜像管的栅端连接于所述第一电流镜像管的漏端及所述第二电流镜像管的栅端，所述第二电流镜像管的漏端连接于所述驱动电阻的一端，同时作为所述驱动模块的输出端，所述驱动电阻的另一端接入主开关管的开关控制信号。
  8. 根据权利要求1所述的二极管电流旁路控制电路，其特征在于，所述驱动模块包括：第一电流镜像管、第二电流镜像管、采样电阻、NMOS驱动管及PMOS驱动管，所述第一电流镜像管的源端连接于所述第二电流镜像管的源端并接入电源电压，所述第一电流镜像管的漏端连接于所述二极管电流感应模块的输出端，所述第一电流镜像管的栅端连接于所述第一电流镜像管的漏端及所述第二电流镜像管的栅端，所述第二电流镜像管的漏端连接于所述采样电阻的一端、所述NMOS驱动管的栅端及所述PMOS驱动管的栅端，所述采样电阻的另一端连接于所述主开关管的源端，所述NMOS驱动管的漏端接入电源电压，所述NMOS驱动管的源端连接于所述PMOS驱动管的源端，同时作为所述驱动模块的输出端连接于所述主开关管的栅端，所述PMOS驱动管的漏端连接于所述主开关管的源端；其中，所述PMOS驱动管的阈值电压小于所述主开关管的阈值电压。
  9. 根据权利要求8所述的二极管电流旁路控制电路，其特征在于，所述驱动模块还包括：PMOS开关管，其源端接入电源电压，其漏端连接于所述NMOS驱动管的栅端，其栅端接入PMOS开关管的开关控制信号。
  10. 根据权利要求1所述的二极管电流旁路控制电路，其特征在于，所述驱动模块包括： 第一电流镜像管、第二电流镜像管、采样电阻、第一三极管及第二三极管，所述第一电流镜像管的源端连接于所述第二电流镜像管的源端并接入电源电压，所述第一电流镜像管的漏端连接于所述二极管电流感应模块的输出端，所述第一电流镜像管的栅端连接于所述第一电流镜像管的漏端及所述第二电流镜像管的栅端，所述第二电流镜像管的漏端连接于所述采样电阻的一端、所述第一三极管的基极及所述第二三极管的基极，所述采样电阻的另一端连接于所述主开关管的源端，所述第一三极管的集电极接入电源电压，所述第一三极管的发射极连接于所述第二三极管的发射极，同时作为所述驱动模块的输出端连接于所述主开关管的栅端，所述第二三极管的集电极连接于所述主开关管的源端；其中，所述第二三极管的导通电压小于所述主开关管的阈值电压。
  11. 根据权利要求10所述的二极管电流旁路控制电路，其特征在于，所述驱动模块还包括：PMOS开关管，其源端接入电源电压，其漏端连接于所述第一三极管的基极，其栅端接入PMOS开关管的开关控制信号。
  12. 根据权利要求1至11任一项所述的二极管电流旁路控制电路，其特征在于，所述控制电路还包括：电流门限模块，连接于所述二极管电流感应模块及所述驱动模块之间，用于比较感应电流和设定门限电流，并在所述感应电流小于所述设定门限电流时关闭所述驱动模块，在所述感应电流大于所述设定门限电流时开启所述驱动模块。
  13. 根据权利要求12所述的二极管电流旁路控制电路，其特征在于，所述电流门限模块包括：门限电流源，所述门限电流源的输入端接入电源电压，所述门限电流源的输出端连接于所述二极管电流感应模块的输出端及所述驱动模块的输入端。
  14. 一种二极管电流旁路控制方法，用于对主模块中并联于主开关管源、漏两端的主二极管进行旁路控制，其特征在于，所述控制方法包括：
    基于二极管电流感应模块感应流经所述主二极管的电流；
    驱动模块根据所述感应电流产生与其呈比例的驱动电流以驱动所述主开关管导通；
    其中，所述主模块、所述二极管电流感应模块及所述驱动模块构成负反馈环路，实现减小所述主二极管的电流至设定电流值。
  15. 根据权利要求14所述的二极管电流旁路控制方法，其特征在于，基于二极管电流感应模块感应流经所述主二极管电流的方法包括：通过使所述二极管电流感应模块中感应二 极管两端的电压正相关或等于所述主二极管两端的电压，实现感应流经所述主二极管的电流。
  16. 根据权利要求14所述的二极管电流旁路控制方法，其特征在于，基于二极管电流感应模块感应流经所述主二极管的电流之后，所述控制方法还包括：比较感应电流和设定门限电流，并在所述感应电流小于所述设定门限电流时关闭所述驱动模块，在所述感应电流大于所述设定门限电流时开启所述驱动模块。
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