WO2021249309A1 - 显示基板、显示装置 - Google Patents
显示基板、显示装置 Download PDFInfo
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- WO2021249309A1 WO2021249309A1 PCT/CN2021/098417 CN2021098417W WO2021249309A1 WO 2021249309 A1 WO2021249309 A1 WO 2021249309A1 CN 2021098417 W CN2021098417 W CN 2021098417W WO 2021249309 A1 WO2021249309 A1 WO 2021249309A1
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- base substrate
- isolation
- electrode
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- display
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Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/122—Pixel-defining structures or layers, e.g. banks
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/30—Devices specially adapted for multicolour light emission
- H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
- H10K59/353—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels characterised by the geometrical arrangement of the RGB subpixels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/30—Devices specially adapted for multicolour light emission
- H10K59/38—Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
- H10K50/10—OLEDs or polymer light-emitting diodes [PLED]
- H10K50/18—Carrier blocking layers
Definitions
- the embodiments of the present disclosure relate to, but are not limited to, the field of display technology, and in particular to a display substrate and a display device.
- OLED Organic Light-Emitting Display
- the micro OLED micro display can provide high-quality video display for mobile information products such as portable computers, wireless Internet browsers, portable DVDs, gaming platforms and wearable computers. It can be said that micro-silicon-based OLED micro-displays provide an excellent solution for near-eye applications (such as helmet displays), whether for civilian consumption, industrial applications, or even military use. It is expected to set off near-eye displays in the military and consumer electronics fields. New wave.
- Miniature silicon-based OLED display devices have extremely small pixel sizes, high pixel density (Pixels PerInch, PPI), and small spacing between adjacent pixels. The spacing distance is often less than 1 micron, which will cause the horizontal direction between adjacent pixels.
- PPI Pixel PerInch
- the problem of current crosstalk causes cross color in the display device. For example, when a pixel has a display signal, part of the display current is transmitted to the adjacent pixel, so that the adjacent pixel cannot display the predetermined pixel gray scale, which greatly affects the display effect of the micro silicon-based OLED display device .
- embodiments of the present disclosure provide a display substrate, including a base substrate and at least two spaced apart first electrodes arranged on one side of the base substrate, the first electrodes being far away from the substrate
- a pixel film layer is provided on one side of the substrate, a spacer region is formed between adjacent first electrodes, and an isolation groove is provided on the side of the spacer region away from the base substrate, and the isolation groove is adjacent to the first electrode.
- the pixel film on the electrode is electrically isolated.
- a side of the at least two first electrodes away from the base substrate is provided with an isolation column, and the isolation column is located on a side of the first electrode close to the spacer region, and is adjacent to The isolation trench is formed in the spacer region between the isolation pillars of the first electrode.
- the isolation pillar has a first side wall close to a side of the isolation groove, and an included angle between the first side wall and the base substrate is not less than 80 degrees.
- the isolation pillar has a second side wall away from the isolation groove, and an inner corner between the second side wall and a surface of the first electrode away from the base substrate Less than 60 degrees.
- the distance from the surface of the isolation column on the side away from the base substrate to the surface of the first electrode on the side away from the base substrate is 200 to 2000 angstroms.
- the base substrate includes at least two sub-pixel regions and a non-display area located between adjacent sub-pixel regions, and the orthographic projection of the isolation pillar on the base substrate and the The non-display areas overlap.
- the pixel film layer includes a charge generation layer disposed on the side of the first electrode away from the base substrate, and the surface of the charge generation layer on the side away from the base substrate is not high. On the surface of the isolation column far away from the base substrate.
- the pixel film layer further includes a light emitting layer disposed on a side of the charge generation layer away from the base substrate, and a second light emitting layer disposed on a side of the light emitting layer away from the base substrate.
- the surface of the light-emitting layer on the side away from the base substrate is higher than the surface of the isolation column on the side away from the base substrate.
- an insulating layer covering the base substrate is provided between the first electrode and the base substrate, and the thickness of the pixel film layer is equal to the thickness of the insulating layer and the first substrate. The sum of the thickness of an electrode.
- an insulating layer covering the base substrate is provided between the first electrode and the base substrate, and the insulating layer on the spacer between adjacent first electrodes The layer is provided with the isolation groove recessed inward.
- the isolation groove has a side wall and a bottom wall, and an included angle between the side wall and the bottom wall is not less than 80 degrees.
- the depth of the isolation groove is not greater than 2000 angstroms.
- a side of the at least two first electrodes away from the base substrate is provided with an isolation column, and the isolation column is located on a side of the first electrode close to the spacer region, and is adjacent to A first groove is formed in the spacer area between the isolation pillars, and an insulating layer covering the base substrate is provided between the at least two first electrodes and the base substrate, adjacent to the first
- the insulating layer on the spacer region between the electrodes is provided with a second groove recessed inward, and the first groove and the second groove are combined to form the isolation groove.
- embodiments of the present disclosure also provide a display device, including any of the foregoing display substrates.
- FIG. 1 is a first schematic diagram of an embodiment of the disclosure showing that the isolation groove is formed on a substrate;
- FIG. 2 is a schematic diagram of a display substrate after a pixel film layer is formed on a display substrate according to an embodiment of the disclosure
- FIG. 3 is a schematic diagram of the structure of a pixel film layer in a display substrate according to an embodiment of the disclosure
- FIG. 4 is a second schematic diagram showing the isolation grooves formed on the substrate according to the embodiment of the present disclosure.
- FIG. 5 is a third schematic diagram of an embodiment of the disclosure showing that the isolation groove is formed on the substrate.
- installation should be interpreted broadly unless otherwise clearly defined and defined.
- it can be a fixed connection, or a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or an indirect connection through an intermediate piece, or a connection between two components.
- connection can be a fixed connection, or a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or an indirect connection through an intermediate piece, or a connection between two components.
- the "about” in the present disclosure refers to a value within the allowable process and measurement error range without strictly limiting the limit.
- top-emitting electroluminescence structure is widely used in mobile products due to its high aperture ratio and high product brightness.
- top-emission electroluminescence is the only choice. Due to the limitations of current masks, it is difficult for current RGB structure products to break through 1000ppi.
- White organic electroluminescent devices (WOLED) + color film substrates (CF) make it possible for products to reach several thousand ppi.
- Top-emitting devices have a strong microcavity effect. Generally, top-emitting white light devices will give priority to weakening the microcavity effect so that the red, green and blue colors can emit light in a balanced manner, which places higher requirements on the device cathode.
- the magnesium (Mg):silver (Ag) composite cathode that has been mass-produced in the industry has a transmittance of only about 50%, and the microcavity effect is relatively obvious. In addition, the color film substrate's light selectivity makes it The brightness of the final product is lower.
- the reflectivity of the mirror P1 is R 1
- the reflectivity of the half mirror P2 is R2
- the optical path between the mirror P1 and the half mirror P2 is L
- the optical path of the light-emitting center distance P1 is Z
- the light intensity when emitted at the luminous center is I 0 .
- a hole injection layer (HIL) material with better injection performance is also required.
- the hole injection layer (HIL) material has high conductivity. Since the cathodes of organic electroluminescent materials are shared, the surrounding pixels often become bright when they are lit. For pixel arrangements such as BV3 or real RGB, it will cause cross-color phenomenon and reduce the color gamut of the product.
- CMOS Complementary Metal Oxide Semiconductor
- An embodiment of the present disclosure provides a display substrate, including a base substrate and at least two spaced apart first electrodes arranged on one side of the base substrate, and the first electrode is provided with a side away from the base substrate.
- a spacer region is formed between adjacent first electrodes, and an isolation groove is provided on the side of the spacer region away from the base substrate, and the isolation groove connects the pixel film adjacent to the first electrode.
- the substrate forms an isolation groove on the interval between adjacent first electrodes, so that the isolation groove and the first electrode form a step difference, so that in the process of forming the pixel film, the isolation groove can block the adjacent first electrode.
- the lateral current between the pixel film layers on one electrode, that is, the isolation groove can block the hole injection layer and the charge generation layer in the pixel film layer on the adjacent first electrode, so that the pixel film layer on the adjacent first electrode Electrical isolation prevents crosstalk of pixel film layers on adjacent first electrodes.
- FIG. 1 is a first schematic diagram of an embodiment of the disclosure showing that the isolation groove is formed on a substrate.
- the display substrate of the embodiment of the present disclosure is an organic light emitting diode display substrate, which includes a base substrate 10 and at least two first electrodes 11 arranged on one side of the base substrate 10. At least two first electrodes 11 interval settings.
- the first electrode 11 may be an anode.
- the adjacent first electrodes 11 are disconnected from each other to form a spacer 12.
- At least two first electrodes 11 are provided with isolation pillars 13 on the side away from the base substrate 10, and the isolation pillars 13 are located on the side of the first electrode 11 close to the spacer region 12, and the isolation pillars 13 adjacent to the first electrode 11 are in the spacer region.
- the isolation trench 14 forms the isolation trench 14, that is, the isolation pillars 13 on the adjacent first electrodes 11 enclose the isolation trench 14 in the isolation region 12.
- At least one first electrode 11 is provided with isolation pillars 13 on opposite sides, and the isolation pillars 13 on opposite sides of one first electrode 11 form a pixel opening, and the pixel opening exposes the first electrode 11.
- the pixel film (not shown in the figure) is disposed on the pixel opening.
- the isolation groove 14 and the first electrode 11 form a step difference, which can isolate the pixel film layer on the adjacent first electrode 11 to block the lateral current of the pixel film layer on the adjacent first electrode 11 and prevent adjacent The pixel film layer of the first electrode crosstalks.
- the isolation pillars 13 may be arranged on both sides of the first electrode 11, or the isolation pillars 13 may be arranged on one side of the first electrode 11, as long as the isolation pillars 13 of the first electrode 11 are adjacent to each other. It suffices that the isolation groove 14 can be formed in the spacer region 12.
- the present disclosure shows that the substrate may be top-emitting.
- the first electrode 11 includes a contact electrode 111 provided on a side of the base substrate 10 and a reflective electrode 112 provided on a side of the contact electrode 111 away from the base substrate 10.
- the contact electrodes 111 of adjacent first electrodes 11 are disconnected from each other, and the reflective electrodes 112 of adjacent first electrodes 11 are disconnected from each other.
- the first electrode 11 may be a transparent electrode or a semi-transparent electrode.
- the type and material of the first electrode are not limited.
- the first electrode may be formed of a transparent conductive material with a high work function, and its electrode material may include indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium oxide (IGO), gallium zinc oxide (GZO), oxide Zinc (ZnO), indium oxide (In2O3), aluminum oxide zinc (AZO) and carbon nanotubes.
- ITO indium tin oxide
- IZO indium zinc oxide
- IGO indium gallium oxide
- GZO gallium zinc oxide
- ZnO oxide Zinc
- In2O3 aluminum oxide zinc
- AZO aluminum oxide zinc
- a protective layer (not shown in the figure) is provided on the side of the first electrode away from the base substrate 10, and the protective layer is used to protect the first electrode.
- the protective layer is a PR protective layer.
- the base substrate 10 includes at least two sub-pixel regions and a non-display region located between adjacent sub-pixel regions.
- the orthographic projection of the pixel opening on the base substrate 10 overlaps the sub-pixel area.
- the orthographic projection of the isolation pillar 13 on the base substrate 10 overlaps the non-display area, so as to prevent the isolation pillar 13 from blocking the sub-pixel area and reduce the area of the pixel opening.
- the design process is simple, efficient and accurate, improves the overall luminous efficiency of the device, and is suitable for the field of ultra-high micro display.
- the material of the isolation column 13 may be an inorganic material.
- the material of the isolation pillar 13 may be silicon nitride (SiNx) or silicon oxide (SiOx).
- the isolation pillar 13 has a first side wall 131 on the side close to the isolation groove 14, and the included angle a between the first side wall 131 and the surface of the base substrate 10 on the side close to the first electrode 11 is not less than 80. Spend.
- the angle a is 90 degrees. This ensures that during the process of forming the pixel film on the first electrode 11, the pixel film is broken at the first side wall 131, so as to block the lateral current of the pixel film on the adjacent first electrode 11.
- the isolation pillar 13 has a second side wall 132 away from the isolation groove 14, and the internal angle b between the second side wall 132 and the surface of the first electrode 11 away from the base substrate 10 is less than 60 degrees.
- the angle b is 45 degrees. This ensures that during the process of forming the pixel film on the first electrode 11, the second electrode (cathode) in the pixel film will not be broken.
- the cross-section of the isolation column may have various shapes, such as regular trapezoid, inverted trapezoid, rectangle, regular hexagon and other polygons, or other regular or irregular shapes, which will not be omitted here in this embodiment. Go into details.
- the distance from the surface of the isolation column on the side away from the base substrate to the surface of the first electrode on the side away from the base substrate is 200 to 2000 angstroms to ensure that the isolation groove formed by the isolation column can resist
- the lateral current of the adjacent pixel film layer is interrupted, and it is ensured that the second electrode (cathode) in the pixel film layer will not be broken.
- FIG. 2 is a schematic diagram of a display substrate after a pixel film layer is formed on a display substrate according to an embodiment of the disclosure.
- a pixel film 15 is provided on the side of the first electrode 11 away from the base substrate 10.
- the pixel film layer 15 is connected to the first electrode 11 exposed by the pixel opening.
- the pixel film layer 15 at least includes a hole injection layer 151 disposed on the side of the first electrode 11 away from the base substrate 10.
- the surface of the hole injection layer 151 away from the base substrate 10 is not higher than the surface of the isolation pillar 13 away from the base substrate 10, so as to ensure that the hole injection layer 151 can be separated by the isolation groove.
- the pixel film layer 15 further includes a charge generation layer 152 disposed on the side of the hole injection layer 151 away from the base substrate 10.
- the surface of the charge generation layer 152 on the side away from the base substrate 10 is not higher than the spacers. 13
- the surface of the charge generation layer 152 away from the base substrate 10 is flush with the surface of the isolation column 13 away from the base substrate 10. This ensures that the charge generation layer 152 is separated by the isolation groove.
- the charge generation layer includes a first generation layer and a second generation layer superimposed, the first generation layer is located on a side close to the base substrate, and the second generation layer is located on a side far from the base substrate.
- the surface of the second generation layer away from the base substrate is not higher than the surface of the isolation column away from the base substrate.
- the pixel film layer 15 further includes a light-emitting layer disposed on the side of the charge generation layer 152 away from the base substrate 10 and a second electrode 154 disposed on the side of the light-emitting layer away from the base substrate 10.
- the second electrode 154 may be a cathode.
- the surface of the light-emitting layer on the side away from the base substrate 10 is higher than the surface of the spacer 13 on the side away from the base substrate 10. Therefore, it is ensured that the second electrode 154 will not be separated by the isolation groove, and the second electrode 154 will not be broken.
- an insulating layer 16 covering the base substrate 10 is provided between the first electrode 11 and the base substrate 10.
- the thickness of the pixel film layer is equal to the sum of the thickness of the insulating layer 16 and the thickness of the first electrode 11. Thereby weakening the microcavity effect.
- FIG. 3 is a schematic diagram of the structure of a pixel film layer in a display substrate according to an embodiment of the disclosure.
- the pixel film layer 15 includes a hole injection layer 151 disposed on the side of the first electrode away from the base substrate, and a first hole transport layer 155 disposed on the side of the hole injection layer 151 away from the base substrate.
- the second light-emitting layer 156 disposed on the side of the first hole transport layer 155 away from the base substrate, the first electron transport layer 157 disposed on the side of the second light-emitting layer 156 away from the base substrate, and the first electron transport layer 157 disposed on the first electron transport layer.
- the layer 157 is the charge generation layer 152 on the side away from the base substrate, the second hole transport layer 158 disposed on the side of the charge generation layer 152 away from the base substrate, and the second hole transport layer 158 is disposed on the side away from the base substrate.
- the charge generation layer 152 may include a first generation layer and a second generation layer.
- the first generation layer may be an N-type charge generation layer
- the second generation layer may be a P-type charge generation layer.
- the N-type charge generation layer includes metal materials (for example, Li, Mg, Ca, Cs, Yb).
- the P-type charge generation layer is made of metal oxides (such as ITO, WO3, MoO3, V2O5, ReO3), or hole transport materials doped with Lewis acids (such as FeCl3:NPB, F4-TCNQ:NPB), or P-type organic Material (such as HATCN) composition.
- the N-type charge generation layer can improve the injection and migration characteristics of electrons, thereby reducing the driving voltage and improving the efficiency and lifetime of the device.
- the first hole transport layer 155 and the second hole transport layer 158 can play a role in promoting the transport of holes.
- the material of the first hole transport layer 155 and the second hole transport layer 158 may include any one selected from the group consisting of: for example, NPD (N,N-dinaphthyl-N,N'-diphenylbenzidine) ( N,N'-bis(naphthalene-1-yl)-N,N'-bis(phenyl)-2,2'-dimethylbenzidine), TPD(N,N'-bis-(3-methyl Phenyl)-N,N'-bis-(phenyl)-benzidine), and MTDATA(4,4',4-tris(N-3-methylphenyl-N-phenyl-amino)- Triphenylamine).
- NPD N,N-dinaphthyl-N,N'-diphenylbenzidine
- TPD N,N'-bis-(3-methyl Phenyl)-
- the hole injection layer 151 can promote the injection of holes.
- the hole injection layer 151 may be made of at least one selected from the group consisting of CuPc (copper phthalocyanine), PEDOT (poly(3,4)-ethylenedioxythiophene), PANI (polyaniline), NPD (N ,N-dinaphthyl-N,N'-diphenylbenzidine) and combinations thereof.
- this embodiment is not limited to this.
- the first electron transport layer 157 and the second electron transport layer 159 receive electrons from the second electrode, and can transfer the supplied electrons to the light emitting layer.
- the first electron transport layer 157 and the second electron transport layer 159 are also used to facilitate the transport of electrons.
- the materials of the first electron transport layer 157 and the second electron transport layer 159 may include at least one selected from the group consisting of: for example, Alq3 (tris(8-hydroxyquinoline) aluminum), Liq (8-hydroxyquinoline lithium), PBD ( 2-(4-Biphenyl)-5-(4-tert-butylphenyl)-1,3,4-diazole), TAZ(3-(4-Biphenyl)-4-phenyl-5- Tert-butylphenyl-1,2,4-triazole), spiro-PBD, BAlq (bis(2-methyl-8-quinoline)-4-(phenylphenol) aluminum), SAlq, TPBi(2 ,2',2-(1,3,5-benzinetriyl)-tris(1-phenyl-1-H-benzimidazole)(2,2',2-(1,3,5-benzinetriyl) -tris(1-phenyl-1-H-benzimidazole))), diazole,
- the second electrode 154 may be formed of a material with high conductivity and low work function.
- the material of the second electrode 154 may include alloys such as magnesium aluminum alloy (MgAl), lithium aluminum alloy (LiAl), or magnesium alloy. , Aluminum, lithium, silver and other single metals.
- the “patterning process” in this embodiment includes the processes of depositing a film layer, coating photoresist, mask exposure, developing, etching, and stripping the photoresist.
- the "photolithography process” “Process” includes treatments such as film coating, mask exposure, development, etc.
- the evaporation, deposition, coating, coating, etc. mentioned in this embodiment are all mature preparation processes in related technologies.
- the preparation process of the display substrate includes:
- An insulating layer 16 is formed on the base substrate 10, a metal film is deposited on the insulating layer 16, and the metal film is patterned through a patterning process. At least two first layers are formed on the side of the insulating layer 16 away from the base substrate 10. The electrodes 11, at least two first electrodes 11 are arranged at intervals. The adjacent first electrodes 11 are disconnected from each other, and a spacer 12 is formed between the adjacent first electrodes 11. A PR protection film (not shown in the figure) is formed on the side of the first electrode 11 away from the base substrate 10, as shown in FIG. 1.
- the metal thin film can use a transparent conductive material with a high work function, and the metal thin film material can include indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium oxide (IGO), gallium zinc oxide (GZO), and zinc oxide. (ZnO), indium oxide (In2O3), aluminum oxide zinc (AZO) and carbon nanotubes.
- ITO indium tin oxide
- IZO indium zinc oxide
- IGO indium gallium oxide
- GZO gallium zinc oxide
- ZnO zinc oxide
- In2O3 aluminum oxide zinc (AZO) and carbon nanotubes.
- isolation material layer covering the entire base substrate 10 on the side of the first electrode 11 away from the base substrate 10 Coat the isolation material layer through an etching process to remove the isolation material layer on the spacer region 12 ,
- the isolation material layer on the first electrode 11 is partially removed, and the remaining isolation material layer on the first electrode 11 forms an isolation column 13, which is located on the side of the first electrode 11 close to the spacer region 12, and is adjacent to the isolation column 13
- An isolation groove 14 is formed in the spacer region 12.
- At least one first electrode 11 is provided with isolation pillars 13 on opposite sides, and the isolation pillars 13 on opposite sides of a first electrode 11 form a pixel opening, and the pixel opening exposes the first electrode 11, as shown in FIG. 1 .
- the thickness of the isolation material layer is 200 to 2000 angstroms, and the material of the isolation material layer can be an inorganic material.
- the width and depth of the isolation groove 14 can be set according to the thickness of the pixel film layer, as long as the isolation groove 14 can block the hole injection layer and the charge generation layer in the adjacent pixel film layer, and will not cause the second electrode to occur. Just break.
- a pixel film layer 15 is formed on the side of the first electrode 11 away from the base substrate 10.
- the pixel film layer 15 at least includes a hole injection layer 151 disposed on the side of the first electrode away from the base substrate, a first hole transport layer 155 disposed on the side of the hole injection layer 151 away from the base substrate, and The first hole transport layer 155 is far from the second light-emitting layer 156 on the side of the base substrate, the first electron transport layer 157 is located on the side of the second light-emitting layer 156 far from the base substrate, and the first electron transport layer 157 is located far away.
- the charge generation layer 152 on the side of the base substrate, the second hole transport layer 158 provided on the side of the charge generation layer 152 away from the base substrate, and the first hole transport layer 158 provided on the side of the second hole transport layer 158 away from the base substrate.
- the hole injection layer 151 and the charge generation layer 152 are separated by the isolation trench 14.
- the second electrode 154 in the pixel film layer 15 is not separated by the isolation groove 14, as shown in FIGS. 2 and 3.
- An encapsulation layer is formed on the pixel film layer to encapsulate the pixel film layer.
- a low-temperature color film structure layer is formed on the encapsulation layer to achieve a display effect.
- FIG. 4 is a second schematic diagram of an embodiment of the disclosure showing that the isolation groove is formed on the substrate.
- FIG. 4 illustrates an exemplary implementation of the display substrate according to the embodiment of the present disclosure.
- the main structure of the display substrate of the embodiment of the present disclosure is basically the same as that of the display substrate of the previous embodiment. The difference is that an insulating layer covering the base substrate 10 is provided between the first electrode 11 and the base substrate 10. 16.
- the insulating layer 16 on the spacer area between the adjacent first electrodes 11 is provided with an inwardly recessed isolation groove 14.
- the isolation groove 14 forms a step with the first electrode 11 to ensure that the lateral current of the pixel film layer on the adjacent first electrode 11 is blocked, and to prevent the pixel film layer on the adjacent first electrode from crosstalk.
- the isolation groove 14 has a side wall 141 and a bottom wall 142, and the included angle c between the side wall 141 and the bottom wall 142 is not less than 80 degrees.
- the angle c between the side wall 141 and the bottom wall 142 is 90 degrees.
- the angle c between the side wall 141 and the bottom wall 142 is not less than 80 degrees to ensure that during the formation of the pixel film layer, the pixel film layer is broken at the isolation groove 14 so as to block the adjacent first electrode 11 The lateral current of the pixel film.
- the depth of the isolation groove is not greater than 2000 angstroms to ensure that the isolation groove can block the lateral current of the adjacent pixel film layer and ensure that the second electrode (cathode) in the pixel film layer does not Fracture occurred.
- FIG. 5 is a third schematic diagram of an embodiment of the disclosure showing that the isolation groove is formed on the substrate.
- FIG. 5 illustrates an exemplary implementation of a display substrate according to an embodiment of the present disclosure.
- the main structure of the display substrate of the embodiment of the present disclosure is basically the same as that of the display substrate of the previous embodiment. The difference is that the at least two first electrodes 11 are provided on the side away from the base substrate 10
- the isolation pillar 13 is located on a side of the first electrode 11 close to the spacer region 12, and a first groove 17 is formed on the spacer region between adjacent isolation columns 13.
- An insulating layer 16 covering the base substrate 10 is provided between the first electrode 11 and the base substrate 10, and the insulating layer 16 on the interval between adjacent first electrodes 11 is provided with a second groove 18 recessed inward.
- the orthographic projection of the second groove 18 on the base substrate 10 is located in the orthographic projection of the first groove 17 on the base substrate 10.
- the first groove 17 and the second groove 18 combine to form an isolation groove 14.
- the shape and size of the isolation column 13 in the embodiment of the present disclosure are the same as the shape and size of the isolation column in the display substrate shown in FIG. 1. This embodiment will not be repeated here.
- the second groove 18 in the embodiment of the present disclosure has the same shape and size as the isolation groove in the display substrate shown in FIG. 4. This embodiment will not be repeated here.
- the isolation pillar 13 in the process of forming the isolation trench 14, the isolation pillar 13 is first formed on the first electrode 11, and then the second groove 18 is formed on the insulating layer 16.
- the second groove 18 is formed on the insulating layer 16 first, and then the isolation pillar 13 is formed on the first electrode 11.
- This embodiment also provides a method for preparing a display substrate, including:
- At least two first electrodes are formed on one side of the base substrate, and the at least two first electrodes are arranged at intervals, so that a spacer area is formed between adjacent first electrodes;
- a pixel film layer is formed on the first electrode, and the pixel film layer on the adjacent first electrode is electrically separated by the isolation groove.
- step S2 includes:
- An isolation column is formed on the side of the first electrode away from the base substrate, and the isolation column is located on the side of the first electrode close to the spacer region, so that adjacent isolation columns form the isolation groove in the spacer region.
- this embodiment shows a method for preparing a substrate, including:
- At least two first electrodes are formed on the side of the insulating layer away from the base substrate, and the at least two first electrodes are arranged at intervals, so that a spacer area is formed between adjacent first electrodes;
- this embodiment shows a method for preparing a substrate, including:
- At least two first electrodes are formed on the side away from the base substrate, and the at least two first electrodes are arranged at intervals, so that a spacer area is formed between adjacent first electrodes;
- isolation pillars on the side of the at least two first electrodes away from the base substrate, and the isolation pillars are located on the side of the at least two first electrodes close to the spacer area, so that adjacent isolation pillars form first in the spacer area.
- a second groove recessed inward is formed in the insulating layer on the spacer region between the adjacent at least two first electrodes, and the first groove and the second groove are combined to form the isolation groove.
- this embodiment shows a method for preparing a substrate, including:
- At least two first electrodes are formed on the side away from the base substrate, and the at least two first electrodes are arranged at intervals, so that a spacer area is formed between adjacent first electrodes;
- An embodiment of the present disclosure also provides a display device, including the display substrate of any one of the foregoing embodiments.
- the display device can be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigator, etc.
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Abstract
Description
Claims (14)
- 一种显示基板,包括衬底基板以及设置于所述衬底基板一侧的至少两个间隔设置的第一电极,所述第一电极远离所述衬底基板一侧设置有像素膜层,相邻所述第一电极之间形成间隔区,所述间隔区远离所述衬底基板一侧设置有隔离槽,所述隔离槽将相邻所述第一电极上的像素膜层电性隔断。
- 根据权利要求1所述的显示基板,其中,所述至少两个第一电极远离所述衬底基板的一侧设置有隔离柱,所述隔离柱位于所述第一电极靠近所述间隔区的一侧,相邻所述第一电极的隔离柱之间在间隔区形成所述隔离槽。
- 根据权利要求2所述的显示基板,其中,所述隔离柱具有靠近所述隔离槽一侧的第一侧壁,所述第一侧壁与所述衬底基板之间的夹角不小于80度。
- 根据权利要求2所述的显示基板,其中,所述隔离柱具有远离所述隔离槽一侧的第二侧壁,所述第二侧壁与所述第一电极远离所述衬底基板一侧表面之间的内角小于60度。
- 根据权利要求2所述的显示基板,其中,所述隔离柱远离所述衬底基板一侧的表面到所述第一电极远离所述衬底基板一侧的表面的距离为200至2000埃米。
- 根据权利要求2所述的显示基板,其中,所述衬底基板包括至少两个子像素区以及位于相邻所述子像素区之间的非显示区,所述隔离柱在所述衬底基板的正投影与所述非显示区在所述衬底基板的正投影交叠。
- 根据权利要求2所述的显示基板,其中,所述像素膜层包括设置于所述第一电极远离所述衬底基板一侧的电荷生成层,所述电荷生成层远离所述衬底基板一侧的表面不高于所述隔离柱远离所述衬底基板一侧的表面。
- 根据权利要求7所述的显示基板,其中,所述像素膜层还包括设置于所述电荷生成层远离所述衬底基板一侧的发光层以及设置于所述发光层远离所述衬底基板一侧的第二电极,所述发光层远离所述衬底基板一侧的表面高于所述隔离柱远离所述衬底基板一侧的表面。
- 根据权利要求2所述的显示基板,其中,所述第一电极与所述衬底基板之间设置有覆盖所述衬底基板的绝缘层,所述像素膜层的厚度等于所述绝缘层的厚度与所述第一电极的厚度之和。
- 根据权利要求1所述的显示基板,其中,所述第一电极与所述衬底基板之间设置有覆盖所述衬底基板的绝缘层,相邻所述第一电极之间所述间隔区上的所述绝缘层设置有向内凹陷的所述隔离槽。
- 根据权利要求10所述的显示基板,其中,所述隔离槽具有侧壁和底壁,所述侧壁与所述底壁之间的夹角不小于80度。
- 根据权利要求10所述的显示基板,其中,所述隔离槽的深度不大于2000埃米。
- 根据权利要求1所述的显示基板,其中,所述至少两个第一电极远离所述衬底基板的一侧设置有隔离柱,所述隔离柱位于所述第一电极靠近所述间隔区的一侧,相邻的所述隔离柱之间在所述间隔区形成第一凹槽,所述至少两个第一电极与所述衬底基板之间设置有覆盖所述衬底基板的绝缘层,相邻第一电极之间间隔区上的绝缘层设置有向内凹陷的第二凹槽,所述第一凹槽与所述第二凹槽组合形成所述隔离槽。
- 一种显示装置,包括如权利要求1-13任一所述的显示基板。
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CN111668380A (zh) * | 2020-06-12 | 2020-09-15 | 京东方科技集团股份有限公司 | 显示基板及其制备方法、显示装置 |
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