WO2021224265A1

WO2021224265A1 - Power module

Info

Publication number: WO2021224265A1
Application number: PCT/EP2021/061735
Authority: WO
Inventors: Matthias Beck; Klaus Olesen
Original assignee: Danfoss Silicon Power Gmbh
Priority date: 2020-05-06
Filing date: 2021-05-04
Publication date: 2021-11-11
Also published as: DE102020112276A1

Abstract

A semiconductor power module is described comprising at least one power module component mounted on a substrate, wherein the substrate comprises a first, relatively electrically conducting, portion on which the power module components are mounted and a second, relatively electrically insulating, portion on which the first portion is mounted. The first (relatively conducting) portion of the substrate is mounted on a first surface of the second (relatively insulating) portion and the first portion has a thickness profile that varies in a direction parallel to said first surface.

Description

POWER MODULE

Field

The present specification relates to a semiconductor power module.

Background

A semiconductor power module may comprise one or more heat generating components mounted to a substrate. The substrate provides mechanical support for the power module and can also provide other functions, such as heat transfer and electrical connections. The substrate may have dimensions dictated by the need for heat transfer. Although many power module configuration are known, there remains a need for further developments in this field.

Summary In a first embodiment, this specification describes a semiconductor power module comprising at least one power module component mounted on a substrate (such as a direct bonded copper substrate), wherein the substrate comprises a first, relatively electrically conducting, portion on which the power module components are mounted and a second, relatively electrically insulating, portion on which the first portion is mounted, wherein the first portion of the substrate is mounted on a first surface of the second portion and the first portion has a thickness profile that varies in a direction parallel to said first surface.

The thickness profile of the first portion may, at least sectionally, continuously vary in a direction parallel to said first surface. In this embodiment the thickness may gradually increase from a first thickness to a second thickness thus forming a profile without any abrupt changes in thickness.

At least part of the first portion of the substrate may be proud of the second portion of the substrate. Alternatively, an exposed surface of the first portion, on which the power module components are mounted, may be flush with the first or a second surface of the second portion of the substrate.

In some example embodiments, the first portion of the substrate may be at least partially embedded within the second portion of the substrate. The thickness profile of the first portion of the substrate may be set in order to meet one or more of: an electrical conductivity requirement (such as an electrical power requirement of one or more power module components mounted on the substrate); a thermal conductivity requirement (e.g. heat dissipation requirements of one or power module components mounted on the substrate); and/or a reliability requirement (e.g. reliability requirements of one or more power module components mounted on the substrate).

The second portion of the substrate may comprise channels for passage of a coolant. Further, in one example embodiment, the first portion of the substrate may comprise extensions into the second portion that end in close proximity with at least some of said channels.

In a second embodiment, this specification describes a method of forming a semiconductor power module, wherein the semiconductor power module comprises at least one power module component mounted on a substrate (such as a direct bonded copper substrate), wherein the substrate comprises a first, relatively electrically conducting, portion on which the power module components are mounted and a second, relatively electrically insulating, portion on which the first portion is mounted, wherein the first portion of the substrate is mounted on a first surface of the second portion, the method comprising: forming the first portion of the substrate (for example using additive manufacturing methods and/or cold gas spraying) such that said first portion has a thickness profile that varies in a direction parallel to said first surface.

The method may comprise modifying said first portion to generate the thickness profile of the first portion.

The method may further comprise forming the first portion of the substrate such that said first portion has a thickness profile that at least sectionally, continuously varies in a direction parallel to said first surface.

At least part of the first portion of the substrate may be proud of the second portion of the substrate. Alternatively, an exposed surface of the first portion, on which the power module components are mounted, may be flush with the first or a second surface of the second portion of the substrate. In some example embodiments, the first portion of the substrate may be at least partially embedded within the second portion of the substrate. The method may comprise forming the second portion of the substrate using additive manufacturing methods.

Some example embodiments further comprise forming an insulating covering for said power module components using additive manufacturing methods.

In a third embodiment, this specification describes a method of designing a semiconductor power module as described above with reference to the first embodiment (or as formed in accordance with the method of any aspect of the second embodiment), the method comprising: modelling thermal and/or electrical properties of the semiconductor power module at each of a plurality of thickness profiles of the first portion of the substrate; and selecting a desired thickness profile for the first portion of the substrate depending on results of said modelling. In a fourth embodiment, this specification describes computer-readable instructions which, when executed by computing apparatus, cause the computing apparatus to perform (at least) any method as described with reference to the second aspect.

In a fifth embodiment, this specification describes a computer-readable medium (such as a non-transitory computer-readable medium) comprising program instructions stored thereon for performing (at least) any method as described with reference to the second aspect.

In a sixth embodiment, this specification describes an apparatus comprising: at least one processor; and at least one memory including computer program code which, when executed by the at least one processor, causes the apparatus to perform (at least) any method as described with reference to the second aspect.

In a seventh embodiment, this specification describes a method of forming a semiconductor power module as described above with reference to the first embodiment (or as formed in accordance with the method of any aspect of the second embodiment), wherein at least some of the semiconductor power module is formed by additive manufacturing, the method comprising the steps of: providing a computer- readable medium having computer-executable instructions adapted to cause a 3D printer or additive manufacturing apparatus to form the semiconductor power module; and forming the semiconductor power module using said 3D printer or additive manufacturing apparatus.

In an eighth embodiment, this specification describes a computer-readable medium having computer executable instructions adapted to cause a 3D printer or additive manufacturing apparatus to form some or all of a semiconductor power module as described above with reference to the first embodiment (or as formed in accordance with the method of any aspect of the second embodiment). Brief description of the drawings

Example embodiments will now be described, by way of example only, with reference to the following schematic drawings, in which:

FIG. 1 is a cross-section of an example semiconductor component; FIG. 2 is a circuit diagram of an example inverter;

FIG. 3 is a cross-section of a semiconductor power module in accordance with an example embodiment;

FIG. 4 is a flow chart showing an algorithm in accordance with an example embodiment; FIGS. 5 to 8 are cross-sections of semiconductor components in accordance with example embodiments;

FIG. 9 is a flow chart showing an algorithm in accordance with an example embodiment;

FIGS to to 15 are cross-sections of semiconductor components in accordance with example embodiments; and

FIGS. 16 and 17 are flow charts showing algorithms in accordance with example embodiments.

Detailed description The scope of protection sought for various embodiments of the invention is set out by the independent claims. The embodiments and features, if any, described in the specification that do not fall under the scope of the independent claims are to be interpreted as examples useful for understanding various embodiments of the invention. In the description and drawings, like reference numerals refer to like elements throughout.

FIG. l is a cross-section of an example semiconductor module (e.g. a semiconductor power module), indicated generally by the reference numeral to. The semiconductor module to comprises a substrate it and one or more semiconductor components 12 (e.g. power module components).

In the example module to, the substrate 11 is a direct bonded copper (DBC) substrate comprising two conducting layers (e.g. metal layers) with an insulating layer sandwiched in between. By way of example, the substrate 11 comprises an upper metal layer 13 and lower metal layer 15 and an insulating layer 14. (Note that the substrate may be referred to as a direct copper bonded (DCB) substrate - the terms DBC and DCB are generally interchangeable.)

The substrate 11 may be a DBC substrate comprising a ceramic electrical insulator with copper layers on either side. The upper metal layer 13 (e.g. upper copper layer) in the semiconductor module to may form the circuitry required for the semiconductor module, as discussed further below. Other possible substrates include DBA (direct bonded aluminium).

The metal layers 13 and 15 can be formed from copper, aluminium, or other alloys commonly used in the field. The insulating layer 14 may be of any insulating material. Example ceramic layers that may be used as the insulating layer 14 are listed below, but the skilled person will be aware of alternatives:

• Alumina (Al₂0₃), which is widely used because of its low cost. It is however not a particularly good thermal conductor (24-28 W/mK) and is brittle.

• Aluminium nitride (AIN), which is more expensive, but has far better thermal performance (> 150 W/mK). · Beryllium oxide (BeO),

The semiconductor components 12 mounted on the substrate 11 may include semiconductor components such as transistors, IGBTs, MOSFETs and other components such as resistors, capacitors, and inductors which together form the circuitry of a semiconductor module for switching electrical currents (e.g. a power module). By way of example, FIG. 2 is a circuit diagram of an example inverter circuit, indicated generally by the reference numeral 20, that may be used to provide the switching circuitry of a semiconductor power module. The skilled person will be aware of many alternative circuits that could be used.

FIG. 3 is a cross-section of a semiconductor power module, indicated generally by the reference numeral 30, in accordance with an example embodiment. The semiconductor power module 30 comprises a substrate 31 with power module components 32 mounted thereon, such as the components of the inverter 20 described above. (A single power module component is shown in FIG. 3 for clarity, but typically a plurality of power module components would be provided.) The substrate 31 comprises a first, relatively electrically conducting, portion 33 on which the power module components are mounted and a second, relatively electrically insulating, portion 34 on which the first portion is mounted, wherein the first portion of the substrate is mounted on a first surface of the second portion and the first portion has a thickness profile that varies in a direction parallel to said first surface. In the power module 30, some or all of the first portion of the substrate is proud of the second portion of the substrate.

In the embodiment of the power module 30 shown in FIG. 3 it can be seen that the thickness profile of the first portion 33, at least sectionally, varies continuously in a direction parallel to said first surface. In this embodiment the thickness may gradually increase from a first thickness to a second thickness thus forming a profile without any abrupt changes in thickness. This can be a great advantage when considering the uses to which the first portion 33 is put. Firstly, the first portion 33 conducts current into or out of the power module component 32 mounted on it. The density of such current is greatest in close proximity to the power module component 32 and this is indeed where the first portion 33 is at its thickest. In the peripheral areas of the first portion 33, closer to the edges of the substrate 31, the first portion is significantly thinner. Less current flow is likely in these areas, and so the influence of the thickness (namely the effect of the thickness on the overall Ohmic resistance) is minimised. Secondly, the first portion 33 conducts heat generated in the power module component 32 away from the component and into the bulk of the second portion 34 of the substrate 31. It is often the case that in service, such a power module 30 is cooled by attaching the third portion 35 to a cooling device such as a heat sink or coolant distributer. Thus the second portion 33 forms part of the thermal pathway conducting heat away from the power module component. The density of such thermal flow is greatest in close proximity to the power module component 32 and this is indeed where the first portion 33 is at its thickest. In the peripheral areas of the first portion 33, closer to the edges of the substrate 31, the first portion is significantly thinner. Less thermal flow is likely in these areas, and so the influence of the thickness (namely the effect of the thickness on the overall thermal resistance) is minimised. In applications where the cost, weight or size of a power module is critical, and savings in material such as by making the first portion thinner where is does not adversely affect the performance of the power module, is of great commercial value.

The substrate 31 may comprise a third, relatively electrically conducting, portion 35 (as shown in FIG. 3). For example, the substrate 31 may be a direct bonded copper substrate, as discussed above with reference to FIG. 1.

The power module components 32 may be mounted on the substrate 31 using soldering, sintering or other similar techniques.

The first portion 33 of the substrate 31 (onto which the power module components are mounted) may be used for the conduction of currents to and from the power module components which are mounted thereon. Processes such as etching may be used to form the first portion 33 into multiple conductors for connecting the components. This forms the circuitry of the semiconductor power module. The third portion 35 (if provided) may be cooled, enabling the heat generated by the power module components to be conducted away from the module. As discussed below, cooling may be provided using cooling channels. However, other cooling options, such as heat sinks and heat pipes, are possible as will be readily apparent to the skilled person.

As shown in FIG. 3 (and described in detail below) the first portion 33 of the substrate 31 is formed with a varying thickness.

FIG. 4 is a flow chart showing an algorithm, indicated generally by the reference numeral 40, in accordance with an example embodiment. The operation 44 of the algorithm 40 includes forming a first portion of the substrate (such as the first portion 33 of the substrate 31 described above) such that said first portion has a thickness profile that varies in a direction parallel to said first surface.

The layer of the first portion could be generating using additive manufacturing techniques (e.g. by 3D printing). Indeed, the entire substrate could 3D printed.

The algorithm 40 includes an optional operation 42 in which a thickness profile of the first portion 33 of the substrate 31 may be set. The thickness profile of the first portion of the substrate could be set based on many different requirements. Factors that might be relevant include one or more of:

• An electrical conductivity requirement (e.g. an electrical power requirements of power module components mounted on the substrate);

• A thermal conductivity requirement (e.g. heat dissipation requirements of power module components mounted on the substrate) ; and/ or

• A reliability requirement (e.g. reliability requirements of power module components mounted on the substrate).

Thus, for example, the thickness of the layer 33 may be such that it is sufficient, but not in excess of, the amount that is required for the circuit at that point. The requirement may be dictated by the current-carrying capacity of the particular conductor which is formed by the metal layer at that point. Alternatively, or additionally, the requirement might be dictated by the conduction of heat away from the heat-generating components mounted on the top side metallisation layer. In other embodiments, changes in thickness may be formed in order to enhance the reliability of the module, such as when “dimples” or other structures (such as notches) are formed in the metallisation layer for the relief of stress during service.

FIGS. 5 to 8 illustrate various embodiments of semiconductor power modules 50, 60, 70 and 80 showing top side metallisation with variable thicknesses, in accordance with example embodiments.

FIG. 5 is a cross-section of the semiconductor power module 50 in accordance with an example embodiment. The semiconductor power module 50 comprises a substrate 51 with power module components 52 mounted thereon. The substrate 51 comprises a first, relatively electrically conducting, portion 53 on which the power module components are mounted; a second, relatively electrically insulating, portion 54 on which the first portion is mounted; and may comprise a third, relatively electrically conducting, portion 55. FIG. 6 is a cross-section of the semiconductor power module 60 in accordance with an example embodiment. The semiconductor power module 60 comprises a substrate 61 with power module components 62 mounted thereon. The substrate 61 comprises a first, relatively electrically conducting, portion 63 on which the power module components are mounted; a second, relatively electrically insulating, portion 64 on which the first portion is mounted; and may comprise a third, relatively electrically conducting, portion 65.

FIG. 7 is a cross-section of the semiconductor power module 70 in accordance with an example embodiment. The semiconductor power module 70 comprises a substrate 71 with power module components 72 mounted thereon. The substrate 71 comprises a first, relatively electrically conducting, portion 73 on which the power module components are mounted; a second, relatively electrically insulating, portion 74 on which the first portion is mounted; and may comprise a third, relatively electrically conducting, portion 75. The power module components 72 are encapsulated in an encapsulant 76.

FIG. 8 is a cross-section of the semiconductor power module 80 in accordance with an example embodiment. The semiconductor power module 80 comprises a substrate 81 with power module components 82 mounted thereon. The substrate 81 comprises a first, relatively electrically conducting, portion 83 on which the power module components are mounted a second, relatively electrically insulating, portion 84 on which the first portion is mounted and may comprise a third, relatively electrically conducting, portion 85. The first portion 83 include notches (indicated generally by the reference numerals 86a and 86b). For example, the notches 86 may facilitate lower stress levels (e.g. stress field) in the insulating layer, such that the substrate 81 may have higher quality and strength. In use, semiconductor power modules are typically subject to cyclical temperature variations of various components within them. Such temperature changes may cause different expansions in materials that have different coefficients of thermal expansion, and stresses occur because of this. Such stresses may lead to the formation of cracks, or at least delamination between different materials. Such damage is often the reason for the failure of a component, and avoiding this is important for increasing the reliability of a semiconductor power module. The presence of notches (such as the notches 86a and 86b) can reduce the shear stress caused by the difference in the thermal expansion between the relatively conducting portion and the relatively insulating portion. It can also reduce the shear stress caused by differences in the thermal expansions of the relatively conducting portion and any encapsulant which encapsulates the relatively conducting portion.

Thus, the semiconductor power modules 50, 60, 70 and 80 are similar to the power module 30 described above.

In the semiconductor power module 50, an exposed surface of the first portion 52 of the substrate 51 is flush with a surface of the second portion of the substrate.

In the semiconductor power modules 50, 60 and 70, the first portion of the substrate is embedded within the second portion of the substrate.

The semiconductor power modules may be partially or totally embedded in the substrate. For example, in the power module 60, the power module components 62 are embedded within the first portion of the substrate such that the power module components are flush with the surface of the substrate.

FIG. 9 is a flow chart showing an algorithm, indicated generally by the reference numeral 90, in accordance with an example embodiment. The algorithm 90 starts at an optional operation 91, where a thickness profile of a first (relatively electrically conducting) portion (e.g. upper metal layer) of a substrate is set (similar to operation 42 described above). Alternatively, the thickness profile may be retrieved externally, rather than being set. Note that the thickness and/or thickness profiles of other portions of the substrate may also be set in the operation 91.

Next, at operation 92, a second (relatively electrically insulating) portion is formed, for example, mounted on a third (relatively conducting) portion (e.g. lower metal layer) of a substrate. At an optional operation 93, the second portion may be modified such that the second portion has a thickness profile that varies in a direction parallel to a first surface of the second portion. For example, the second portion may be modified by initially forming (e.g. operation 92) the second portion with a constant thickness profile, and then selectively etching the second portion to generate a variable thickness profile. Alternatively, this modification step may be omitted by forming (e.g. using 3D printing; at operation 92) the second portion such that the second portion has a thickness profile that varies in a direction parallel to the first surface of the second portion. In yet another embodiment, the second portion may have a flat upper surface such that no forming of the second portion is required. At operation 94, the first portion of the substrate is formed such that the first portion is mounted on the first surface of the second portion.

At an optional operation 95, the first portion may be modified such that the first portion has a thickness profile that varies in a direction parallel to the first surface. For example, the first portion may be modified by initially forming (e.g. in operation 94) the first portion with a constant thickness profile, and then selectively etching (or otherwise modifying) the first portion to generate a variable thickness profile (e.g. by forming thinner sections at selected points). Alternatively, the first portion may be formed at operation 94, for example, using 3D printing, such that the first portion has a thickness profile that varies in a direction parallel to the first surface. In this case, the modification at operation 95 may be omitted. Alternatively, the first portion may be formed at operation 94, for example, using cold gas spraying, such that the first portion has a thickness profile that varies in a direction parallel to the first surface. For example, the cold gas spraying may be formed iteratively, such that one or more sections of the first portion may be masked once the sections have reached the desired thickness. In this case, the modification at operation 95 may be omitted.

FIGS. 10 to 15 illustrate various embodiments of semiconductor power modules too, 110, 120, 130, 140 and 150 showing top side metallisation with variable thicknesses, in accordance with example embodiments. In each of the power modules too, 110, 120, 130, 140 and 150, cooling channels are integrated into the insulation layer of the substrate. The cooling channels (such as the cooling channel 106 indicated in FIG. to) may allow for passage of a coolant, such as a liquid coolant.

The power modules too, 110, 120, 130 and 140 are similar to the power modules 30, 50, 60, 70 and 80 respectively described above and are not discussed further below.

In the power module 150, a first portion 153 of the substrate comprises extensions into the second portion 154 that end in close proximity with at least some of a plurality of cooling channels 156 within the second portion. The power module 150 may therefore provide more efficient transfer of heat from the power module components to the coolant is the cooling channels.

FIG. 16 is a flow chart showing an algorithm, indicated generally by the reference numeral 160, in accordance with an example embodiment.

The algorithm 160 starts at operation 162, where thermal and/or electrical properties of the semiconductor power module are modelled at a plurality of thickness profiles of the first portion. For example, the modelling may be performed using 3D simulations to determine the optimal thickness profile across the first portion. The simulation may apply different thickness profiles to determine a thickness profile that provides optimal thermal and/or electrical properties (e.g. electrical heat generation, heat flow, etc.).

Next, at operation 164, a desired thickness profile for the first portion is selected depending on the results of said modelling. For example, a thickness profile that provides optimal thermal and/ or electrical properties may be selected for the first portion of the substrate. The first portion may be formed (e.g. operation 94) and/or modified (e.g. operation 95) according to the selected thickness profile.

In an example embodiment, operations similar to the operations 162 and 164 maybe performed for selecting a thickness profile for the second (relatively insulating) portion of the substrate. The second portion may be formed (e.g. operation 92) and/or modified (e.g. operation 93) according to the selected thickness profile.

FIG. 17 is a flow chart showing an algorithm, indicated generally with the reference numeral 170, in accordance with an example embodiment. The algorithm 170 starts at operation 172, where a 3D printer or additive manufacturing apparatus is caused (e.g. by way of program instructions, etc.) to form a semiconductor power module (e.g. power modules described above). For example, a computer-readable medium may have computer executable instructions adapted to cause a 3D printer or additive manufacturing apparatus to form a semiconductor power module.

Next, at operation 174, the semiconductor power module is formed using the 3D printer or additive manufacturing apparatus.

In one example, when forming the semiconductor power module at operation 174, the second (relatively insulating) portion of the substrate may be formed using additive manufacturing methods (e.g. using additive manufacturing apparatus). The second portion may comprise cooling channels (e.g. as shown in FIGs. to to 15).

In one example, when forming the semiconductor power module at operation 174, an insulating covering is formed for one or more power module components using additive manufacturing methods (e.g. using additive manufacturing apparatus). In one example, a method of forming a semiconductor power module may comprise providing a computer-readable medium having computer-executable instructions adapted to cause a 3D printer or additive manufacturing apparatus to form the semiconductor power module. The semiconductor power module may be formed by additive manufacturing, for example, using said 3D printer or additive manufacturing apparatus.

The embodiments of the invention described above are provided by way of example only. The skilled person will be aware of many modification, changes and substitutions that could be made without departing from the scope of the present invention. The claims of the present application are intended to call all such modifications, changes and substitutions as fall within the spirit and scope of the invention.

Claims

1. A semiconductor power module comprising at least one power module component mounted on a substrate, wherein the substrate comprises a first, relatively electrically conducting, portion on which the power module components are mounted and a second, relatively electrically insulating, portion on which the first portion is mounted, wherein the first portion of the substrate is mounted on a first surface of the second portion and the first portion has a thickness profile that varies in a direction parallel to said first surface.

2. A semiconductor power module as claimed in claim l, wherein the first portion has a thickness profile that at least sectionally, continuously varies in a direction parallel to said first surface. 3. A semiconductor power module as claimed in claims 1 or 2, wherein at least part of the first portion of the substrate is proud of the second portion of the substrate.

4. A semiconductor power module as claimed in claims 1 or 2, wherein an exposed surface of the first portion, on which the power module components are mounted, is flush with the first or a second surface of the second portion of the substrate.

5. A semiconductor power module as claimed in any one of claims 1 to 4, wherein the first portion of the substrate is at least partially embedded within the second portion of the substrate.

6. A semiconductor power module as claimed in any one of the preceding claims, wherein the thickness profile of the first portion of the substrate is set in order to meet one or more of: an electrical conductivity requirement; a thermal conductivity requirement; and/ or a reliability requirement.

7. A semiconductor power module as claimed in any one of the preceding claims, wherein the second portion of the substrate comprises channels for passage of a coolant.

8. A semiconductor power module as claimed in claim 7, wherein the first portion of the substrate comprises extensions into the second portion that end in close proximity with at least some of said channels. 9. A semiconductor power module as claimed in any one of the preceding claims, wherein the substrate is a direct bonded copper substrate. to. A method of forming a semiconductor power module, wherein the semiconductor power module comprises at least one power module component mounted on a substrate, wherein the substrate comprises a first, relatively electrically conducting, portion on which the power module components are mounted and a second, relatively electrically insulating, portion on which the first portion is mounted, wherein the first portion of the substrate is mounted on a first surface of the second portion, the method comprising: forming the first portion of the substrate such that said first portion has a thickness profile that varies in a direction parallel to said first surface.

11. A method as claimed in claim to, further comprising forming the first portion of the substrate such that said first portion has a thickness profile that at least sectionally, continuously varies in a direction parallel to said first surface.

12. A method as claimed in claims to or 11, further comprising forming the first portion of the substrate using additive manufacturing methods. 13. A method as claimed in any of claims to to 12, further comprising modifying said first portion to generate the thickness profile of the first portion.

14. A method as claimed in any one of claims to to 13, further comprising forming the first portion of the substrate using cold gas spraying.

15. A method as claimed in any one of claims to to 14, further comprising forming the second portion of the substrate using additive manufacturing methods.

16. A method as claimed in any one of claims to to 15, further comprising forming an insulating covering for said power module components using additive manufacturing methods. 17. A method of designing a semiconductor power module as claimed in any one of claims 1 to 9, the method comprising: modelling thermal and/or electrical properties of the semiconductor power module at each of a plurality of thickness profiles of the first portion of the substrate; and selecting a desired thickness profile for the first portion of the substrate depending on results of said modelling. 18. A method of forming a semiconductor power module as claimed in any one of claims 1 to 9, wherein the semiconductor power module is formed by additive manufacturing, the method comprising the steps of: providing a computer-readable medium having computer-executable instructions adapted to cause a 3D printer or additive manufacturing apparatus to form the semiconductor power module; and forming the semiconductor power module using said 3D printer or additive manufacturing apparatus.

19. A computer-readable medium having computer executable instructions adapted to cause a 3D printer or additive manufacturing apparatus to form a semiconductor power module according to any one of claims 1 to 9 or to implement a method of any one of claims to to 18.