WO2021223105A1 - 像素、图像传感器及电子装置 - Google Patents

像素、图像传感器及电子装置 Download PDF

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Publication number
WO2021223105A1
WO2021223105A1 PCT/CN2020/088795 CN2020088795W WO2021223105A1 WO 2021223105 A1 WO2021223105 A1 WO 2021223105A1 CN 2020088795 W CN2020088795 W CN 2020088795W WO 2021223105 A1 WO2021223105 A1 WO 2021223105A1
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transistor
pixel
coupled
optical sensor
voltage
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PCT/CN2020/088795
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English (en)
French (fr)
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林奇青
杨富强
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深圳市汇顶科技股份有限公司
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Priority to PCT/CN2020/088795 priority Critical patent/WO2021223105A1/zh
Publication of WO2021223105A1 publication Critical patent/WO2021223105A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors

Definitions

  • the present application relates to pixels, and more particularly to a pixel including a pixel circuit provided on a non-epitaxial substrate, and related image sensors and electronic devices.
  • the optical sensor Without increasing the area of the pixel, increasing the sensing area of the optical sensor in the pixel will make the usable area of the pixel circuit other than the optical sensor relatively smaller.
  • the optical sensor has the problem of linearity in the sensing signal due to the change of the cross pressure in the sensing phase.
  • current pixels are generally implemented using epitaxial substrates, and their cost is relatively high. If pixels implemented using non-epitaxial substrates, their cost can be much lower than pixels implemented using epitaxial substrates, but those implemented using non-epitaxial substrates The pixel has a problem of increased leakage current. Therefore, the structure of the existing pixel needs to be further improved to overcome the above-mentioned problems.
  • One of the objectives of the present application is to disclose a pixel and related image sensor and electronic device to solve the above-mentioned problems.
  • An embodiment of the present application discloses a pixel including an optical sensor and a pixel circuit.
  • the optical sensor has a cathode and an anode, and the anode is coupled to the first voltage source.
  • the optical sensor is used for sensing the light signal in the sensing stage and generating the sensing signal in the floating diffusion area.
  • the pixel circuit is arranged on the non-epitaxial substrate.
  • the pixel circuit is coupled between the cathode of the optical sensor, the second voltage source and the floating diffusion region.
  • the pixel circuit includes a reset circuit and an operational amplifier.
  • the reset circuit is coupled between the cathode of the optical sensor and the floating diffusion area. In the reset phase, the reset circuit is used to reset the sensing signal on the floating diffusion region.
  • the operational amplifier has a positive terminal, a negative terminal and an output terminal.
  • the positive terminal is coupled to the second voltage source
  • the negative terminal is coupled to the cathode of the optical sensor
  • the output terminal is coupled to the floating diffusion region.
  • the operational amplifier is used to fix the voltage difference between the cathode and anode of the optical sensor.
  • the optical sensor is arranged on the pixel circuit.
  • An embodiment of the application discloses an image sensor including a pixel array.
  • the pixel array includes a plurality of the pixels.
  • An embodiment of the present application discloses an electronic device including the image sensor and a display screen.
  • the pixels and related image sensors and electronic devices disclosed in the present application can increase the light sensing area, increase the fill factor, and reduce the cost while ensuring the performance of the pixels. Further, the pixels disclosed in the present application improve the performance of the optical sensor. In addition to linearity, it does not increase the leakage current of the circuit.
  • FIG. 1 is a schematic diagram of an embodiment of the image sensor of the application.
  • FIG. 2 is a schematic diagram of an embodiment of a pixel of this application.
  • FIG. 3 is a schematic diagram of another embodiment of the pixel of the application.
  • Fig. 4 is a timing chart of the operation of the pixel.
  • FIG. 5 is a schematic diagram of an embodiment of an electronic device of this application.
  • the optical sensor and the pixel circuits other than the optical sensor are all fabricated on the same plane.
  • the optical sensor and the pixel circuit share a fixed area. Without changing the area of the pixel, increasing the area of the optical sensor will inevitably reduce the usable area of the pixel circuit.
  • the pixel disclosed in this application is realized by a layered structure. The difference from the traditional pixel is that the optical sensor and the pixel circuit in the pixel of this application are arranged on different planes, so the area of the photosensitive area of the optical sensor can be affected by the pixel. The limitation of the area required by the circuit increases the area of the photosensitive area of the optical sensor and thereby increases the fill factor.
  • the filling factor is defined as the ratio of the area of the photosensitive area of the optical sensor to the total area of the pixels.
  • the pixel of the present application uses a novel pixel circuit to control the cross voltage between the cathode and the anode when the optical sensor is sensing the light signal, thereby increasing the linearity of the sensing signal.
  • the entire pixel is realized by using an epitaxial substrate. However, the cost of non-epitaxial substrates is lower than that of epitaxial substrates.
  • the pixels of the present application replace epitaxial substrates with non-epitaxial substrates to realize pixel circuits other than optical sensors, thereby reducing manufacturing costs and changing the circuit structure to overcome Physical disadvantages of non-epitaxial substrates (such as higher leakage current).
  • the technical content of the pixels, related image sensors, and electronic devices of the present application will be described in detail below in conjunction with a number of embodiments and drawings.
  • FIG. 1 is a schematic diagram of an embodiment of an image sensor 100 of this application.
  • the image sensor 100 includes a pixel array 101 and a reading circuit structure 103.
  • the pixel array 101 includes an array composed of at least one pixel. In FIG. 1, only pixels P11, P21, P12, and P22 are shown. In fact, the pixel array 101 includes, for example, a pixel array 101 of n rows*m columns, where n And m are integers greater than zero.
  • the reading circuit structure 103 includes multiple columns of reading circuits, such as reading circuits 103_1, 103_2, etc., which are respectively coupled to the multiple columns of pixels in the pixel array 101.
  • the operation of the image sensor 100 has a reset phase, a sensing phase, and a readout phase.
  • Each pixel in the pixel array 101 resets the sensing signal in the reset stage, and regenerates the sensing signal in the sensing stage, and outputs the sensing signal to The corresponding reading circuit in the reading circuit structure 103.
  • the pixel array 101 can respectively output a plurality of sensing signals corresponding to the entire row of pixels to the corresponding reading circuit in the reading circuit structure 103 line by line.
  • the charges of the pixel P11 and the pixel P12 are respectively output to the reading circuits 103_1 and 103_2 in the reading circuit structure 103 through the bit line BL1 and the bit line BL2, and then the charges of the pixel P21 and the pixel P22 are passed through the bit lines BL1 and The bit line BL2 is output to the reading circuits 103_1 and 103_2 in the reading circuit structure 103.
  • the reading circuits 103_1 and 103_2 will correspondingly output the reading results SO1 and SO2.
  • FIG. 2 is a schematic diagram of an embodiment of the pixel P11 of this application.
  • the pixel P11 is coupled to the reading circuit 103_1, and the pixel P11 includes the optical sensor PD and the pixel circuit 200.
  • the optical sensor PD In the sensing phase, when the light signal SL is irradiated to the pixel P11, the optical sensor PD is used to convert the light signal SL into electric charge.
  • the sensing signal SS is generated by induction, and then in the read phase, the output signal SO is generated to the read circuit 103_1 according to the sensing signal SS and the selection signal SE.
  • the optical sensor PD and the pixel circuit 200 are arranged on different planes.
  • the pixel circuit 200 is disposed on a non-epitaxial substrate, and the optical sensor PD1 is disposed above the pixel circuit 200.
  • the present application does not limit the implementation of the optical sensor PD.
  • the optical sensor PD can be implemented by a thin film photodiode or a complementary metal-oxide semiconductor (Complementary Metal-Oxide-Semiconductor Transistor, CMOS) photodiode.
  • CMOS complementary Metal-Oxide-Semiconductor Transistor
  • the optical sensor PD covers the pixel circuit 200. From the incident direction of the optical signal SL, the optical signal SL will first encounter the optical sensor PD.
  • the optical sensor PD can increase the photosensitive area without occupying the area of the pixel circuit 200 below, thereby increasing the fill factor of the pixel P11.
  • the optical sensor PD is a photodiode, which includes a cathode and an anode. As shown in FIG. 2, the cathode and anode of the optical sensor PD are connected across the pixel circuit 200, and the anode is further coupled to the voltage source V1.
  • the pixel circuit 200 is coupled between the optical sensor PD and the reading circuit 103_1.
  • the pixel circuit 200 includes an operational amplifier OP, a capacitor C, a reset circuit 202, and a pixel readout circuit 204.
  • the operational amplifier OP, the capacitor C and the reset circuit 202 are respectively coupled between the optical sensor PD and the floating diffusion FD,
  • the pixel readout circuit 204 is coupled between the floating diffusion FD and the readout circuit 103_1.
  • the reset circuit 202 is used to reset the sensing signal SS on the floating diffusion FD according to at least one control signal.
  • the operational amplifier OP is used to control the voltage difference between the cathode and anode of the optical sensor PD, and the capacitor C is used to accumulate the charge generated by the optical sensor PD induced by the light signal SL, and generate sensing in the floating diffusion area FD Test signal SS.
  • the pixel reading circuit 204 is used to generate an output signal SO to the reading circuit 103_1 according to the sensing signal SS and the selection signal SE.
  • the reset circuit 202 includes a transistor T1, a transistor T2, and a transistor T3.
  • the gates of the transistor T1, the transistor T2, and the transistor T3 respectively receive the control signal CS1, the control signal CS2, and the control signal CS3. Therefore, the conduction and non-conduction of the transistor T1, the transistor T2, and the transistor T3 can be controlled by the control signal CS1, respectively. , Control signal CS2 and control signal CS3. As shown in FIG.
  • the drain of the transistor T1 is coupled to the cathode of the optical sensor PD, the first terminal of the capacitor C1 and the negative terminal (-) of the operational amplifier OP, and the source of the transistor T1 is coupled to the drain of the transistor T2 and the transistor
  • the drain of T3, the source of the transistor T2 is coupled to the second end of the capacitor C, the output of the operational amplifier OP and the floating diffusion FD, and the source of the transistor T3 is coupled to the base of the transistor T3 and the operational amplifier OP
  • the pixel readout circuit 204 includes a transistor T4 and a source follower transistor SF.
  • the gate of the transistor T4 receives the selection signal SE, so the conduction and non-conduction of the transistor T4 can be controlled by the selection signal SE.
  • the source of the source follower transistor SF is coupled to the drain of the transistor T4, and the drain of the source follower transistor SF and the source of the transistor T4 are coupled to the read circuit structure 103_1.
  • the transistor T1, the transistor T2, and the transistor T3 are P-type transistors, and the transistor T4 and the source follower transistor SF are N-type transistors.
  • the foregoing transistor implementation is not limited to this.
  • the control signal CS1 and the control signal CS2 have a system low potential, and the control signal CS3 has a system high potential.
  • the transistor T1 and the transistor T2 are turned on, and the transistor T3 is not turned on.
  • the sensing signal SS is reset, so that the cathode of the optical sensor PD and the floating diffusion area FD have the same potential.
  • the control signal CS1 and the control signal CS2 have a system high potential, and the control signal CS3 has a system low potential.
  • the transistor T1 and the transistor T2 are not conductive, and the transistor T3 is conductive. In this configuration, there is an open circuit between the floating diffusion FD and the cathode of the optical sensor PD. After the optical sensor PD senses the light signal SL, the optical sensor PD senses and generates charges accumulated at the first end of the capacitor C, and induces a sensing signal SS at the second end of the capacitor C.
  • the optical sensor PD is connected across the positive terminal and the negative terminal of the operational amplifier OP, there is a gap between the cathode and the anode of the optical sensor PD.
  • the cross voltage is controlled by the operational amplifier OP to be approximately zero.
  • the optical sensor PD is operated in the photovoltaic mode of the photodiode.
  • the linearity of the optical sensor PD is higher than in other working modes. Compared with the traditional pixel operating the optical sensor PD in the light guide mode, the optical sensor PD operated by the pixel P11 provided in the present application has a higher linearity.
  • the photovoltaic mode is defined as when the cross voltage of the optical sensor PD is operated at zero, and the light guide mode is defined as when the cross voltage of the optical sensor PD is operated under a negative bias voltage, that is, the potential of the cathode is higher than the potential of the anode .
  • the dark current of the optical sensor PD is the smallest, and the optical sensor PD is relatively sensitive to other currents in the pixel circuit 200 at this time. For example, if the leakage current in the pixel circuit 200 having a magnitude equivalent to the dark current of the optical sensor PD flows to the optical sensor PD, the operation of the optical sensor PD will be affected. In other words, under this configuration, the tolerance of the optical sensor PD to the leakage current of the pixel circuit 200 decreases. therefore.
  • the non-conduction of the transistor T1 and the transistor T2 is also used to reduce the leakage current flowing to the optical sensor PD.
  • the turn-on of the transistor T3 transmits the voltage of the voltage source V1 to the source of the transistor T1, and transmits the voltage of the voltage source V1 from the positive terminal to the negative terminal through the virtual short circuit characteristic of the operational amplifier OP.
  • the negative terminal is transmitted to the drain of the transistor T1.
  • the source and drain of the transistor T1 have the same potential, so that the transistor T1 does not flow through the channel leakage current of the transistor T1 during the sensing phase.
  • the pixel circuit 200 is disposed on a non-epitaxial substrate, that is, the components of the pixel circuit 200 are not implemented with any epitaxial layer structure.
  • Transistors realized using non-epitaxial substrates because the lattice arrangement of the non-epitaxial substrate material itself is irregular compared with that of the epitaxial substrate material, so that the transistor is not conductive from the base to the source/drain The leakage current of the pole is relatively high.
  • the source of the transistor T3 is also coupled to the voltage source V1, the positive terminal of the operational amplifier OP, and the base of the transistor T1, and the voltage of the positive terminal of the voltage source V1 is reduced through the virtual short-circuit characteristic of the operational amplifier OP.
  • the drain of the transistor T1 also has the same potential as the voltage of the voltage source V1.
  • the base and drain potentials of the transistor T1 are equal, there is no voltage difference from the base to the drain of the transistor T1, so the leakage current flowing from the base to the drain of the transistor T1 approaches zero. .
  • the pixel circuit 200 can strengthen the control of the leakage current flowing to the optical sensor PD in the sensing phase.
  • the reset circuit 202 makes the transistor T1 and the transistor T2 non-conductive and the transistor T3 conductive during the sensing phase to prevent leakage current from flowing to the optical sensor PD.
  • the reset circuit 202 uses a larger number of transistors to prevent leakage current from flowing to the optical sensor PD, it will have a better effect, that is, the leakage current will be smaller. In other words, for the suppression of leakage current, the more transistors used, the better the effect.
  • this embodiment only uses three transistors T1, T2, and T3 as examples, but this application does not limit the number of transistors in the reset circuit 202, that is, the number of transistors can be more than three or less than three.
  • the reset circuit 202 only uses the transistor T1 and the transistor T2 to prevent leakage current from flowing to the optical sensor PD. Or for example, in other embodiments, the reset circuit 202 only uses the transistor T1 to prevent leakage current from flowing to the optical sensor PD. In other examples, the reset circuit 202 uses additional transistors to prevent leakage current from flowing to the optical sensor PD. The drain of the additional transistor is coupled to the source of the transistor T2, the source of the additional transistor is coupled to the second end of the capacitor C, the output end and the floating diffusion FD, and the gate of the additional transistor receives the additional control signal.
  • the transistor T1 and the transistor T2 are converted from the conducting state to the non-conducting state, and the transistor T3 is converted from the non-conducting state to the conducting state.
  • the control signal CS1, the control signal CS2, and the control signal CS3 sequentially change from a system low potential to a system high potential or from a system high potential to a system low potential, that is In other words, the transistor T1, the transistor T2, and the transistor T3 sequentially switch between conducting and non-conducting states.
  • the control signal CS1, control signal CS2, and control signal CS3 simultaneously change from system high to system low or from system high.
  • the potential becomes the system low potential.
  • the control signal CS1 changes from a system low level to a system high level.
  • the control signal CS2 changes from a system low level to a system high level.
  • the control signal CS2 changes from a system low level to a system high level.
  • the signal CS3 changes from the system high potential to the system low potential. Therefore, in the reset phase, the conduction time of the transistor T2 is longer than the conduction time of the transistor T1, and the non-conduction time of the transistor T3 is longer than the conduction time of the transistor T2.
  • the selection signal SE has a system high potential.
  • the transistor T4 is turned on.
  • the source follower transistor SF outputs the sensing signal SS received at the gate stage as the output signal SO, and then transmits it to the reading circuit 103_1 through the turned-on transistor T4.
  • FIG. 3 is a schematic diagram of another embodiment of the pixel P11.
  • the pixel P11 in FIG. 3 is similar to the pixel P11 in FIG. 2, so similar numbers and related descriptions are not repeated here.
  • the positive terminal of the operational amplifier OP of the pixel P11 in FIG. 3 and the anode of the optical sensor PD are not coupled to each other.
  • the operational amplifier OP of FIG. The positive terminal and the source of the transistor T3 are changed to be coupled to the voltage source V2.
  • the voltage difference between the cathode and the anode of the optical sensor PD is equal to the voltage difference between the voltage of the voltage source V1 and the voltage of the voltage source V2.
  • the operation of the optical sensor PD deviates from the photovoltaic mode.
  • the voltage of the voltage source V2 is greater than the voltage of the voltage source V1, that is, the optical sensor PD operates in the light guide mode.
  • the quantum efficiency of the optical sensor PD is related to the voltage difference between the cathode and the anode, that is, the voltage difference between the voltage of the voltage source V2 and the voltage of the voltage source V1.
  • the quantum efficiency of the optical sensor PD When the voltage of the voltage source V2 is greater than the voltage of the voltage source V1, the more For a long time, the quantum efficiency of the optical sensor PD is higher. When the quantum efficiency of the optical sensor PD is higher, for the same optical signal SL, the optical sensor PD can generate more charges to induce a larger sensing signal SS. However, when the voltage of the voltage source V2 is greater than the voltage of the voltage source V1, the dark current of the optical sensor PD also increases. When the dark current increases, the offset of the sensing signal SS due to the dark current will also increase, thus reducing the dynamic range of the sensing signal SS.
  • the voltage of the voltage source V1 and the voltage of the voltage source V2 are adjustable, that is, the voltage difference between the cathode and the anode of the optical sensor PD can be determined by the quantum efficiency and dark current of the optical sensor PD. The actual situation is optimized.
  • the voltage of the voltage source V2 is the system reference potential, which has a fixed value, such as the ground potential.
  • the pixel P11 only adjusts the voltage of the voltage source V1 to control the quantum efficiency and dark current of the optical sensor PD.
  • the pixel circuit 200 is on the semiconductor substrate, and the optical sensor PD is on the pixel circuit 200, so as to increase the photosensitive area of the pixel P11 per unit area. That is, the filling factor is increased, the linearity of the optical sensor PD is also increased without increasing the leakage current, and the non-epitaxial substrate is used to realize the novel pixel circuit 200 to reduce the manufacturing cost without affecting the quality of the sensing signal SS.
  • FIG. 5 is a schematic diagram of an embodiment of an electronic device of this application.
  • the electronic device 500 can be used to perform optical under-screen/in-screen fingerprint sensing to sense the fingerprint of a specific object.
  • the electronic device 500 includes a display screen 502 and an image sensor 100.
  • the image sensor 100 may be disposed under the display screen 502 to realize under-screen optical fingerprint sensing.

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Abstract

本申请公开了一种像素(P11)，包括光学传感器(PD)以及像素电路(200)。光学传感器具有阴极与阳极，阳极耦接第一电压源(V1)。其中光学传感器用以在感测阶段下感测光信号(SL)，并在浮置扩散区(FD)产生感测信号(SS)。像素电路设置于非外延衬底。像素电路耦接于光学传感器的阴极与第二电压源(V2)。其中像素电路包括重置电路(202)以及运算放大器(OP)。重置电路耦接于阴极与浮置扩散区之间，其中在重置阶段下，重置电路用以重置浮置扩散区的感测信号。运算放大器具有正端(+)、负端(-)与输出端，其中正端耦接第二电压源(V2)，负端耦接阴极，以及输出端耦接浮置扩散区。运算放大器用以固定光学传感器的阴极与阳极间的电压差。光学传感器(PD)设置于像素电路(200)之上。

Description

像素、图像传感器及电子装置 技术领域
本申请涉及像素，尤其涉及一种包括设置于非外延衬底的像素电路的像素及相关图像传感器及电子装置。
背景技术
在不加增像素的面积的情况下，增加像素中的光学传感器的感测面积会使光学传感器之外的像素电路可使用的面积相对变小。此外，光学传感器在感测阶段因跨压的变化使得感测信号具有线性度的问题。再者，当前像素一般使用外延衬底实现，其成本较高，若使用非外延衬底实现的像素，其成本能够远远低于使用外延衬底实现的像素，但使用非外延衬底实现的像素存在漏电流增加的问题。因此，现有的像素的结构需要进一步的改良以克服上述问题。
发明内容
本申请的目的之一在于公开一种像素及相关图像传感器及电子装置，来解决上述问题。
本申请的一实施例公开了种像素，包括光学传感器与像素电路。光学传感器具有阴极与阳极，阳极耦接第一电压源。光学传感器用以在感测阶段下感测光信号，并在浮置扩散区产生感测信号。像素电路设置于非外延衬底。像素电路耦接于光学传感器的阴极、第二电压源与浮置扩散区之间。像素电路包括重置电路以及运算放大器。重置电路耦接于光学传感器的阴极与浮置扩散区之间。在重置阶段下，重置电路用以重置浮置扩散区上的感测信号。运算放大器具有正端、负端 与输出端。正端耦接第二电压源，负端耦接光学传感器的阴极，以及输出端耦接浮置扩散区。运算放大器用以固定光学传感器的阴极与阳极间的电压差。光学传感器设置于像素电路之上。
本申请的一实施例公开了一种图像传感器，包括像素阵列。所述像素阵列包括多个所述像素。
本申请的一实施例公开了一种电子装置，包括所述图像传感器与显示屏。
具体来说，本申请所公开的像素及相关图像传感器及电子装置能增加光感测区域提高填充系数、降低成本的同时还能保证像素的性能，进一步的，本申请公开的像素改善光学传感器的线性度外，亦不增加电路的漏电流。
附图说明
图1为本申请的图像传感器的实施例的示意图。
图2为本申请的像素的实施例的示意图。
图3为本申请的像素的另一实施例的示意图。
图4为像素的操作时序图。
图5为本申请电子装置的实施例的示意图。
具体实施方式
传统使用外延衬底实现的像素中，光学传感器与光学传感器之外的像素电路均制作在同一平面上。也就是说，光学传感器与像素电路共享一个固定的面积。在不改变像素的面积下，增加光学传感器的面积势必减少像素电路可用的面积。本申请所公开的像素利用分层结构来实现，和传统的像素不同的地方在于，本申请的像素中的光学传感器与像素电路设置在不同平面，因此光学传感器的感光区域的面积可 以不受像素电路所需面积的限制，增加光学传感器的感光区域的面积进而增加填充系数。在此，填充系数的定义为光学传感器的感光区域的面积与像素的总面积的比值，当像素的总面积不变时，增加光学传感器的感光区域的面积即增加填充系数。此外，本申请的像素使用新颖的像素电路可控制光学传感器在感测光信号时阴极与阳极间的跨压，进而增加感测信号的线性度。另外，传统的像素为了使光学传感器具有较好的电子特性，整个像素均使用外延衬底来实现。但，非外延衬底的成本比外延衬底的成本低，本申请的像素以非外延衬底取代外延衬底以实现光学传感器以外的像素电路，因此降低了制造成本，并改变电路结构以克服非外延衬底的物理性缺点(例如较高的漏电流)。以下配合多个实施例及图式，详细说明本申请的像素、相关图像传感器及电子装置的技术内容。
图1为本申请的图像传感器100的实施例的示意图。图像传感器100包括像素阵列101和读取电路结构103。像素阵列101包括由至少一个像素构成的阵列，在图1中仅绘示了像素P11、P21、P12、P22，实际上所述像素阵列101包括例如n行*m列的像素阵列101，其中n和m为大于0的整数。读取电路结构103包括多列读取电路，例如读取电路103_1、103_2等，所述多列读取电路分别耦接至像素阵列101中的所述多列像素。
图像传感器100的操作具有重置阶段、感测阶段以及读出阶段。像素阵列101中的每一像素会在所述重置阶段重置感测信号，以及在所述感测阶段重新产生感测信号，并在所述读出阶段才将所述感测信号输出至所述读取电路结构103中对应的读取电路。在此实施例中，像素阵列101可以一行一行地将对应整行像素的多个感测信号分别输出至读取电路结构103中对应的读取电路。例如将像素P11和像素P12的电荷分别通过位线BL1和位线BL2输出至读取电路结构103中的读取电路103_1和103_2，之后再把像素P21和像素P22的电荷分别通过位线BL1和位线BL2输出至读取电路结构103中的读取电路103_1和103_2。读取电路103_1和103_2会对应地输出读取结果SO1和SO2。
图2为本申请的像素P11的实施例的示意图。像素P11耦接读取电路103_1，其中像素P11包括光学传感器PD与像素电路200。在感测阶段下，当光信号SL照射至像素P11时，光学传感器PD用以将光信号SL转换为电荷，像素电路200累积所述电荷并在浮置扩散区FD(亦称为感测节点)感应产生感测信号SS，接着在读出阶段下，依据感测信号SS与选择信号SE产生输出信号SO至读取电路103_1。
在像素P11中，光学传感器PD与像素电路200设置在不同平面。例如，像素电路200设置于非外延衬底上，光学传感器PD1设置于像素电路200的上方。本申请并不对光学传感器PD的实施方式多做限制，举例来说，光学传感器PD可以薄膜光电二极管或互补金属氧化物半导体(Complementary Metal-Oxide-Semiconductor Transistor，CMOS)光电二极管实现。在某些实施例中，光学传感器PD覆盖在像素电路200之上，从光信号SL入射的方向看来，光信号SL会先遇到光学传感器PD。如此一来，即使像素电路200和光学传感器PD重叠，像素电路200也不会阻挡光学传感器PD接收光信号SL。因此，在不增加像素P11面积的情况下，光学传感器PD可以增加感光面积而不占用下方的像素电路200的面积，进而增加像素P11的填充系数。
在图2的实施例中，光学传感器PD为光电二极管，其包括阴极与阳极。如图2所示，光学传感器PD的阴极与阳极跨接在像素电路200上，阳极更耦接电压源V1。
像素电路200耦接在光学传感器PD与读取电路103_1之间。像素电路200包括运算放大器OP、电容C、重置电路202与像素读出电路204，其中运算放大器OP、电容C与重置电路202分别耦接在光学传感器PD与浮置扩散区FD之间，以及像素读出电路204耦接在浮置扩散区FD与读取电路103_1之间。
在重置阶段下，重置电路202用以依据至少一个控制信号重置浮置扩散区FD上的感测信号SS。在感测阶段下，运算放大器OP用以控制光学传感器PD阴极与阳极间的电压差，以及电容C用以累积光学传感器PD感应光信号SL而产生的电荷，并且在浮置扩散区FD 产生感测信号SS。在读取阶段下，像素读出电路204用以依据感应信号SS与选择信号SE产生输出信号SO至读取电路103_1。
在本实施例中，重置电路202包括晶体管T1、晶体管T2与晶体管T3。其中，晶体管T1、晶体管T2与晶体管T3的闸极分别接收控制信号CS1、控制信号CS2与控制信号CS3，因此，晶体管T1、晶体管T2与晶体管T3的导通与不导通可分别由控制信号CS1、控制信号CS2与控制信号CS3控制。如图2所示，晶体管T1的漏极耦接光学传感器PD的阴极、电容C1的第一端与运算放大器OP的负端(-)，晶体管T1的源极耦接晶体管T2的漏极与晶体管T3的漏极，晶体管T2的源极耦接电容C的第二端、运算放大器OP的输出端与浮置扩散区FD，以及晶体管T3的源极耦接晶体管T3的基极、运算放大器OP的正端(+)、光学传感器PD的阳极与电压源V1。
像素读出电路204包括晶体管T4与源跟随晶体管SF。其中，晶体管T4的闸极接收选择信号SE，因此晶体管T4的导通与不导通可由选择信号SE控制。如图2所示，源跟随晶体管SF的源极耦接晶体管T4的漏极，以及源跟随晶体管SF的漏极与晶体管T4的源极耦接读取电路结构103_1。
在此实施例中，晶体管T1、晶体管T2与晶体管T3为P型晶体管，以及晶体管T4与源跟随晶体管SF为N型晶体管。但上述晶体管实现方式不以此为限。
请一起参照图4。在重置阶段下，控制信号CS1与控制信号CS2具有***低电位，以及控制信号CS3具有***高电位。晶体管T1与晶体管T2导通，以及晶体管T3不导通。在此配置下，光学传感器PD的阴极至浮置扩散区FD之间为导通。藉由将浮置扩散区FD至导通光学传感器PD，将感测信号SS重置，使光学传感器PD的阴极与浮置扩散区FD具有相同电位。
在感测阶段下，控制信号CS1与控制信号CS2具有***高电位，以及控制信号CS3具有***低电位。晶体管T1与晶体管T2不导通，以及晶体管T3导通。在此配置下，浮置扩散区FD至光学传感器PD 的阴极之间为开路。当光学传感器PD感测光信号SL之后，光学传感器PD感测产生电荷累积在电容C的第一端，并在电容C的第二端感应产生感测信号SS。此外，运算放大器OP的正端与负端之间具有虚短路的特性，又因为光学传感器PD跨接在运算放大器OP的正端与负端之间，所以光学传感器PD的阴极与阳极之间的跨压被运算放大器OP控制在大约为零。当光学传感器PD的跨压被控制在大约为零时，光学传感器PD***作在光电二极管的光伏模式，此时光学传感器PD的线性度比在其他工作模式高。相较于传统像素将光学传感器PD操作于光导模式，本申请提供的像素P11所操作的光学传感器PD具有较高的线性度。此处，光伏模式定义为当光学传感器PD的跨压***作在零时，以及光导模式定义为当光学传感器PD的跨压***作在负偏压下，亦即阴极的电位高于阳极的电位。
当光学传感器PD***作在光伏模式时，光学传感器PD的暗电流最小，此时光学传感器PD对像素电路200中其他电流相对敏感。举例来说，若像素电路200中具有与光学传感器PD的暗电流相当大小的漏电流流至光学传感器PD时，光学传感器PD的操作将被影响。换句话说，在此配置下，光学传感器PD对像素电路200的漏电流的容忍度下降。因此。晶体管T1与晶体管T2的不导通亦用以降低流至光学传感器PD的漏电流。再者，晶体管T3的导通将电压源V1的电压传输至晶体管T1的源级，以及透过运算放大器OP虚短路的特性将电压源V1的电压等效从正端传输至负端，再从负端传输至晶体管T1的漏级，在此情况下，晶体管T1的源级与漏级的电位相同，使晶体管T1在感测阶段下没有流经过晶体管T1信道的漏电流。
在本实施例中，像素电路200设置于非外延衬底，亦即像素电路200的组件不是以任何外延层的结构实现。使用非外延衬底实现的晶体管，因为非外延衬底材料本身的晶格排列相较于外延衬底材料不规则，使得晶体管在不导通的状态下的由基极导通至源极/漏极的漏电流较高。在一些实施例中，晶体管T3的源极还耦接电压源V1、运算放大器OP的正端与晶体管T1的基极，再透过运算放大器OP虚短路的特性，将正端的电压源V1的电压等效至负端，其中负端耦接晶体 管T1的漏极，使晶体管T1的漏极亦具有与电压源V1的电压相同的电位。在这样的连接关系下，因为晶体管T1的基极与漏极电位相等，从晶体管T1的基级至漏极没有电压差，因此从晶体管T1的基极流至漏级的漏电流趋近于零。经过如此的设置，可以加强在感测阶段下像素电路200对流至光学传感器PD的漏电流的控制。
在本实施例中，在感测阶段下重置电路202使晶体管T1与晶体管T2不导通以及晶体管T3导通以防止漏电流流至光学传感器PD。然而，当重置电路202使用更多数量的晶体管来防止漏电流流至光学传感器PD时，会具有更好的效果，也就是说，漏电流会更小。换言之，对于漏电流的抑制，使用越多的晶体管效果越好。为了易于说明，本实施例仅以三个晶体管T1、T2与T3示例，但本申请并不限制重置电路202中晶体管的数量，亦即晶体管的数量可多于三个或少于三个。例如，在某个实施例中，重置电路202仅使用晶体管T1与晶体管T2防止漏电流流至光学传感器PD。又或例如，在其他的实施例中，重置电路202仅使用晶体管T1防止漏电流流至光学传感器PD。在其他的例子中，重置电路202使用额外的晶体管防止漏电流流至光学传感器PD。其中，额外的晶体管的漏极耦接晶体管T2的源极，额外的晶体管的源极耦接电容C的第二端、输出端与浮置扩散区FD，以及额外的晶体管的闸极接收额外的控制信号。
从重置阶段到感测阶段，晶体管T1与晶体管T2由导通状态转换成不导通状态，以及晶体管T3由不导通状态转换成导通状态。请再参照图4，从重置阶段到感测阶段，控制信号CS1、控制信号CS2与控制信号CS3依序从***低电位变成***高电位或由***高电位变成***低电位，也就是说，晶体管T1、晶体管T2、晶体管T3依序转换导通或不导通的状态。从控制信号CS1、控制信号CS2与控制信号CS3的电位来看，在重置阶段开始的时候，控制信号CS1、控制信号CS2与控制信号CS3同时由***高电位变成***低电位或由***高电位变成***低电位。在感测阶段开始前，控制信号CS1先由***低电位变成***高电位，过了一段时间间隔后，控制信号CS2由***低电位变成***高电位，再过了一段时间间隔后，控制信号 CS3由***高电位变成***低电位。因此，在重置阶段下，晶体管T2的导通时间比晶体管T1的导通时间长，且晶体管T3的不导通时间比晶体管T2的导通时间长。
在读出阶段下，选择信号SE具有***高电位。晶体管T4导通。在此配置下，源跟随晶体管SF将在闸级接收的感测信号SS输出为输出信号SO，再经导通的晶体管T4传输至读取电路103_1。
图3为像素P11的另一实施例的示意图。图3中的像素P11与图2的像素P11类似，因此类似的编号与相关的叙述于此不再重复。相较于图2中的实施例，图3的像素P11的运算放大器OP的正端与光学传感器PD的阳极互不耦接，具体来说，相较于图2，图3的运算放大器OP的正端与晶体管T3的源级改成耦接电压源V2。
在本实施例中，同样是因为运算放大器OP的虚短路的特性，光学传感器PD阴极与阳极之间的电压差等于电压源V1的电压与电压源V2的电压之间的电压差。当电压源V1的电压与电压源V2的电压不相等时，光学传感器PD的操作偏离光伏模式。在此实施例中，电压源V2的电压大于电压源V1的电压，也就是说，光学传感器PD操作在光导模式。光学传感器PD的量子效率相关于阴极与阳极之间的电压差，也就是说电压源V2的电压与电压源V1的电压之间的电压差，当电压源V2的电压大于电压源V1的电压越多时，光学传感器PD的量子效率越高。当光学传感器PD的量子效率越高时，对于相同的光信号SL，光学传感器PD可产生更多电荷以感应产生更大的感测信号SS。然而，当电压源V2的电压大于电压源V1的电压越多时，光学传感器PD的暗电流亦随之增加。当暗电流增加时，感测信号SS因暗电流产生的偏移(offset)也会跟着增加，因此缩减了感测信号SS动态范围。所以，在本实施例中，电压源V1的电压与电压源V2的电压为可调整的，也就是说，光学传感器PD阴极与阳极之间的电压差可依光学传感器PD的量子效率与暗电流的实际状况来做优化。
在一些实施例中，电压源V2的电压为***参考电位，其具有一 个固定的值，例如接地电位。像素P11仅调整电压源V1的电压以控制光学传感器PD的量子效率与暗电流。
通过以上将像素电路200和光学传感器PD配置于不同的层叠，也就是说像素电路200在半导体衬底上，光学传感器PD位于像素电路200上，达到了增加单位面积下像素P11的可感光面积，即增加了填充系数，亦增加光学传感器PD的线性度且不增加漏电流，以及在不影响感测信号SS的质量下，使用非外延衬底实现新颖的像素电路200以降低制作成本。
图5为本申请电子装置的实施例的示意图。举例来说，电子装置500可用来进行光学式屏下/屏内指纹感测以感测特定对象的指纹。电子装置500包括显示屏502以及图像传感器100，当手指接近显示屏502时，显示屏502发出的光线会照射手指并被手指反射回电子装置500，并由图像传感器100接收，图像传感器100并据以产生感测信号并进行指纹辨识，可选地，图像传感器100可以设置在显示屏502的下方以实现屏下光学指纹感测。

Claims (19)

  1. 一种像素，其特征在于，包括:
    光学传感器，具有阴极与阳极，所述阳极耦接第一电压源，其中所述光学传感器用以在感测阶段下感测光信号，并在浮置扩散区产生感测信号；以及
    像素电路，设置于非外延衬底，所述像素电路耦接于所述光学传感器的所述阴极与第二电压源，其中所述像素电路包括:
    重置电路，耦接于所述阴极与所述浮置扩散区之间，其中在重置阶段下，所述重置电路用以重置所述浮置扩散区的所述感测信号；以及
    运算放大器，具有正端、负端与输出端，其中所述正端耦接所述第二电压源，所述负端耦接所述阴极，以及所述输出端耦接所述浮置扩散区，所述运算放大器用以固定所述光学传感器的所述阴极与所述阳极间的电压差，
    其中，所述光学传感器设置于所述像素电路之上。
  2. 如权利要求1所述的像素，其特征在于，所述光学传感器为薄膜光电二级管，并覆盖于所述像素电路。
  3. 如权利要求1所述的像素，其特征在于，所述光学传感器为互补金属氧化物半导体光电二极管，并覆盖于所述像素电路。
  4. 如权利要求1所述的像素，其特征在于，所述像素电路还包括：
    电容，具有第一端与第二端，其中所述第一端耦接于所述光学传感器的所述阴极，所述第二端耦接所述浮置扩散区，
    其中在感测阶段下，所述电容用以累积电荷以在所述浮置扩散区产生所述感测信号，其中所述电荷为响应所述光学传感器感测所述光信号而产生。
  5. 如权利要求1所述的像素，其特征在于，所述重置电路包含:
    第一晶体管；以及
    第二晶体管，
    其中，所述第一晶体管的漏极耦接所述阴极、所述负端与所述电容的所述第一端，所述第一晶体管的源极耦接所述第二晶体管的漏极，所述第二晶体管的源极耦接所述输出端、所述电容的所述第二端与所述浮置扩散区。
  6. 如权利要求5所述的像素，其特征在于，所述第一晶体管的闸极接收第一控制信号，以及所述第二晶体管的闸极接收第二控制信号，在所述重置阶段下，所述第一控制信号与所述第二控制信号分别使所述第一晶体管与所述第二晶体管导通，以及在所述感测阶段下，所述第一控制信号与所述第二控制信号使所述第一晶体管与所述第二晶体管不导通。
  7. 如权利要求6所述的像素，其特征在于，所述重置电路还包括：
    第三晶体管，其中所述第三晶体管的漏极耦接所述第一晶体管的源极与所述第二晶体管的漏极，所述第三晶体管的源极耦接所述第三晶体管的基极、所述第二电压源与所述正端。
  8. 如权利要求7所述的像素，其特征在于，所述第三晶体管的源极还耦接所述第一晶体管的基极。
  9. 如权利要求7所述的像素，其特征在于，所述第三晶体管的闸极接收第三控制信号，在所述重置阶段下，所述第三控制信号使所述第三晶体管不导通，以及在所述感测阶段下，所述第三控制信号使所述第三晶体管导通。
  10. 如权利要求7所述的像素，其特征在于，在所述重置阶段下，所述第二晶体管的导通时间长度大于所述第一晶体管的导通时间长度。
  11. 如权利要求10所述的像素，其特征在于，在所述重置阶段下，所述第三晶体管的不导通时间长度大于所述第二晶体管的导通时间长度。
  12. 如权利要求1或权利要求7所述的像素，其特征在于，所述第一电压源的电压与所述第二电压源的电压相等，且所述电压差为零。
  13. 如权利要求12所述的像素，其特征在于，所述正端更直接耦接所述光学传感器的所述阳极。
  14. 如权利要求1所述的像素，其特征在于，所述第一电压源的电压与所述第二电压源的电压不相等，且所述电压差不为零。
  15. 如权利要求14所述的像素，其特征在于，所述第二电压源的电压高于所述第一电压源的电压。
  16. 如权利要求1所述的像素，其特征在于，所述像素电路更包括：
    像素读出电路，耦接至所述浮置扩散区，所述像素读取电路用以在读出阶段下依据所述感测信号与选择信号输出输出信号。
  17. 如权利要求16所述的像素，其特征在于，所述像素读出电路包括源跟随晶体管与第四晶体管，其中所述源跟随晶体管的闸极耦接所述浮置扩散区，所述源跟随晶体管的源极耦接所述第四晶体管的漏极，以及所述第四晶体管的闸极接收选择信号。
  18. 一种图像传感器，其特征在于，包括：
    像素阵列，包括多个如权利要求1-17中任一项所述的像素。
  19. 一种电子装置，其特征在于，包括：
    如权利要求18所述的图像传感器；以及
    显示屏。
PCT/CN2020/088795 2020-05-06 2020-05-06 像素、图像传感器及电子装置 WO2021223105A1 (zh)

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CN101656472A (zh) * 2008-08-22 2010-02-24 索尼株式会社 升压电路、固体摄像器件和照相机***
CN102881703A (zh) * 2012-09-29 2013-01-16 上海中科高等研究院 图像传感器及其制备方法
CN108419031A (zh) * 2018-03-08 2018-08-17 京东方科技集团股份有限公司 像素电路及其驱动方法和图像传感器
CN108470539A (zh) * 2018-06-13 2018-08-31 京东方科技集团股份有限公司 一种像素电路及其驱动方法、显示面板和显示装置
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US20030150977A1 (en) * 2002-02-13 2003-08-14 Canon Kabushiki Kaisha Photoelectric conversion apparatus
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