WO2021174648A1 - 像素驱动电路及其驱动方法、显示面板 - Google Patents

像素驱动电路及其驱动方法、显示面板 Download PDF

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Publication number
WO2021174648A1
WO2021174648A1 PCT/CN2020/085003 CN2020085003W WO2021174648A1 WO 2021174648 A1 WO2021174648 A1 WO 2021174648A1 CN 2020085003 W CN2020085003 W CN 2020085003W WO 2021174648 A1 WO2021174648 A1 WO 2021174648A1
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Prior art keywords
transistor
node
storage capacitor
light
driving
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PCT/CN2020/085003
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English (en)
French (fr)
Inventor
薛炎
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深圳市华星光电半导体显示技术有限公司
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Priority to US16/768,576 priority Critical patent/US11776471B2/en
Publication of WO2021174648A1 publication Critical patent/WO2021174648A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0852—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor being a dynamic memory with more than one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0262—The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/021—Power management, e.g. power saving
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/04—Display protection

Definitions

  • the present invention relates to the field of display technology, in particular to a pixel driving circuit and a driving method thereof, and a display panel.
  • LED light emitting diode
  • Mini-LED mini-light emitting diode
  • organic light emitting diodes Organic-Light
  • Various display panels require pixel driving circuits to drive the light emitting diodes in the display panel to emit light to display images.
  • the general pixel drive circuit uses the 2T1C pixel drive circuit structure shown in FIG. 1.
  • the existing 2T1C structure pixel driving circuit includes a transistor T1, a transistor T2, a storage capacitor C, a light-emitting element D, a power signal line, a low-level signal line, a scanning signal line, and a data signal line; among them, the transistor The gate G1 of T1 is connected to the first electrode of the transistor T2, the first electrode of the transistor T1 is connected to the power signal line VDD, and the second electrode of the transistor T1 is connected to the anode of the light-emitting element D; the cathode of the light-emitting element is grounded VSS; the transistor The gate of T2 is connected to the scan signal line, the second electrode of the transistor T2 is connected to the data signal line; one end of the storage capacitor C is connected to the first node G, and the first node G is connected to the gate of the transistor T1 and the first node of the transistor T2.
  • FIG. 2 is a first timing diagram of the driving method of the pixel driving circuit of FIG. 1.
  • the driving method includes:
  • the data signal is provided through the data signal line, the scanning signal is provided through the scanning signal line, the low-level signal is provided through the low-level signal line, and the power signal is provided through the power signal line.
  • a high-level scan signal, a data signal line and the high-level data signal so that the transistor T2 is opened, node G to obtain a first high potential V g, the transistors T1 and so on, the storage capacitor voltage will result storage section, Therefore, the second node S obtains a second high potential V S lower than the first high potential, and the light-emitting element is generated by the voltage difference between the second high potential V S of the second node S and the low potential VSS of the low level line.
  • the current I OLED emits light, and the second high potential V S.
  • I is the dynamic power consumption of the data signal line
  • f is the display frequency of the image
  • c is the capacitance
  • V data is the voltage of the data signal line.
  • the dynamic power consumption of the display panel is relatively large, which is easy to cause display.
  • the temperature of the related components of the panel rises greatly, and the characteristics of the components are prone to change, so that display abnormalities appear on the display screen, which affects the display performance and practicality of the display panel.
  • the present invention provides a pixel drive circuit.
  • the pixel drive circuit includes a first data input module, a second data input module, a display drive module, and a light emitting module;
  • the first data input module is used to couple a first data signal to a first node
  • the second data input module is used to couple a second data signal to the first node
  • the display driving module includes a driving transistor that is controlled by a potential generated at the first node when the first data signal and the second data signal are coupled to the first node, and is used for transmission Power signal to the second node;
  • the light-emitting module includes a light-emitting element, the anode of the light-emitting element is connected to the second node, and the cathode of the light-emitting element is grounded, and is used to generate an operating current under the control of a power signal coupled to the second node. This glows.
  • the present invention additionally provides a driving method of a pixel driving circuit, including:
  • the pixel drive circuit includes a first data input module, a second data input module, a display drive module and a light emitting module;
  • the display driving module includes a driving transistor, the driving transistor is controlled by a potential generated at the first node when the first data signal and the second data signal are coupled to the first node;
  • the light-emitting module includes a light-emitting element, an anode of the light-emitting element is connected to the second node, and a cathode of the light-emitting element is grounded;
  • the driving method includes in the display period of one frame of image:
  • the first data input module couples the first data signal to the first node
  • the second data input module couples the second data signal to the first node
  • the display driving module transmits the power signal to the second node
  • the light-emitting module generates a working current under the control of a power signal coupled to the second node and emits light accordingly.
  • the present invention also provides a display panel, wherein the display panel includes a pixel drive circuit, wherein the pixel drive circuit includes a first data input module, a second data input module, a display drive module, and a light emitting module;
  • the first data input module is used to couple a first data signal to a first node
  • the second data input module is used to couple a second data signal to the first node
  • the display driving module includes a driving transistor that is controlled by a potential generated at the first node when the first data signal and the second data signal are coupled to the first node, and is used for transmission Power signal to the second node;
  • the light-emitting module includes a light-emitting element, the anode of the light-emitting element is connected to the second node, and the cathode of the light-emitting element is grounded, and is used to generate an operating current under the control of a power signal coupled to the second node. This glows.
  • the second data input module couples the second data signal to the second node, so that the voltage of the second node becomes the first data signal
  • the voltage of the second data signal is superimposed on the voltage of the second data signal, and since the voltage is greater than the voltage between the gate and source of the driving transistor, the driving transistor is turned on and the power signal is coupled to the second node.
  • the voltage of the second node is The voltage of the first node and the high-level voltage transmitted after the driving transistor is turned on are positively correlated.
  • the light-emitting element in the light-emitting module generates a control current under the control of the power signal of the second node to make the light-emitting element emit light.
  • each data signal After the low voltage of each data signal is superimposed, it becomes a voltage sufficient to cause the light-emitting element to emit light, which can greatly reduce the data voltage of the display panel, thereby reducing dynamic power consumption, and ultimately reducing the total power consumption, and improving the display performance of the display panel .
  • FIG. 1 is an equivalent schematic diagram of an existing 2T1C pixel driving circuit
  • FIG. 2 is a first timing diagram of a driving method of a conventional 2T1C pixel driving circuit
  • FIG. 3 is an equivalent schematic diagram of a pixel driving circuit in an embodiment of the present invention.
  • FIG. 4 is an equivalent schematic diagram of another pixel driving circuit in an embodiment of the present invention.
  • FIG. 5 is a schematic flowchart of a driving method of a pixel driving circuit in an embodiment of the present invention.
  • FIG. 6 is a second timing diagram of a driving method of a pixel driving circuit in an embodiment of the present invention.
  • the primary purpose of the present invention is: by adding a single-stage compensation circuit of the second data input module to the first data input module, when the driving transistor is coupled to the first node by the first data signal and the second data signal, The potential generated by the node is controlled, and the power signal is transmitted to the second node to cause the light-emitting element to emit light, which can reduce dynamic power consumption and improve the display performance of the display panel.
  • FIG. 3 is an equivalent schematic diagram of a pixel driving circuit in an embodiment of the present invention.
  • An embodiment of the present invention provides a pixel drive circuit, which is used to drive a display panel to emit light.
  • the pixel drive circuit includes a first data input module 31, a second data input module 32, a display drive module 33, and a light emitting module 34 ;
  • the first data input module 31 is configured to couple the first data signal Data1 to the first node G;
  • the second data input module 32 is configured to couple the second data signal Data2 to the first node G;
  • the display driving module 33 includes a driving transistor T1, which is controlled by a potential generated at the first node when the first data signal and the second data signal are coupled to the first node, and is used to transmit the power signal to the second node;
  • the light-emitting module 334 includes a light-emitting element D.
  • the anode of the light-emitting element D is connected to the second node S, and the cathode of the light-emitting element D is grounded.
  • the driving transistor T1 in the embodiment of the present invention may be a P-type transistor or an N-type transistor, which is not specifically limited here.
  • the driving transistor T1 in the embodiment of the present invention may be a metal-oxide-semiconductor field-effect transistor (MOS tube) or a thin film transistor (TFT). , The specifics are not limited here.
  • MOS tube metal-oxide-semiconductor field-effect transistor
  • TFT thin film transistor
  • the driving transistor T1 in the embodiment of the present invention is a thin film transistor
  • the thin film transistor may be an amorphous silicon thin film transistor or a low temperature polysilicon thin film transistor, which is not specifically limited here.
  • the light-emitting element in the embodiment of the present invention may be a light-emitting diode LED, or a mini-light-emitting diode Mini-LED, an organic light-emitting diode OLED, or an active matrix organic light-emitting diode AMOLED, which is not specifically limited here.
  • the second data input module 32 couples the second data signal Data2 to the second node G.
  • the voltage of the second node G becomes the superposition of the voltage of the first data signal Data1 and the voltage of the second data signal Data2, and since the voltage is greater than the threshold voltage between the gate and the source of the driving transistor T1,
  • the driving transistor T1 is turned on, and the power signal is coupled to the second node S.
  • the voltage of the second node S is positively correlated with the voltage of the first node G and the high-level voltage transmitted after the driving transistor T1 is turned on.
  • the element D generates a control current to emit light under the control of the power signal of the second node S.
  • the low voltage of the two data signals is superimposed to become a voltage sufficient to make the light emitting element emit light, which can greatly reduce the data voltage of the display panel.
  • the dynamic power consumption can be reduced, and the goal of reducing the total power consumption is finally achieved, and the display performance of the display panel is improved.
  • the specific solution for implementing a pixel driving circuit in the embodiment of the present invention is:
  • the pixel drive circuit includes a first data input module 31, a second data input module 32, a display drive module 33, and a light emitting module 34;
  • the first data input module 31 includes:
  • the first transistor T2 the first electrode of the first transistor T2 is connected to the first node G, the second electrode of the first transistor T2 is connected to the first data signal Data1, and the gate G2 of the first transistor T2 is connected to the first scan signal Scan1;
  • the first storage capacitor C1 one end of the first storage capacitor C1 is connected to the first node G, and the other end of the first storage capacitor C1 is connected to the second node S.
  • the second data input module 32 includes:
  • the second transistor T3, the first electrode of the second transistor T3 is connected to the third node M, the second electrode of the second transistor T3 is connected to the second data signal Data2, and the gate G3 of the second transistor is connected to the second scan signal Scan2 ;
  • the second storage capacitor C2 one end of the second storage capacitor C2 is connected to the third node M, and the other end of the second storage capacitor C2 is connected to the second node S.
  • the first electrode of the driving transistor T1 in the display driving module 33 is connected to the power signal VDD
  • the second electrode of the driving transistor T1 is connected to the second node S
  • the gate of the driving transistor T1 is connected to the first node G.
  • first data signal Data1 in the embodiment of the present invention may be provided by the first data signal line
  • first scan signal Scan1 may be provided by the first scan signal line
  • second data signal Data2 may be provided by the second data signal.
  • the second scan signal Scan2 can be provided by the second scan signal line.
  • the driving transistor T1, the first transistor T2, and the second transistor T3 in the embodiment of the present invention may all be N-type transistors or all P-type transistors.
  • the transistors in this embodiment are all N-type, the first electrode of the driving transistor T1, the first electrode of the first transistor T2, and the first electrode of the second transistor T3 are all drains, and the driving transistor T1 The second electrode of, the second electrode of the first transistor T2, and the second electrode of the second transistor T3 are all sources. Conversely, when the transistors in this embodiment are all P-type, the first electrode of the driving transistor T1, the first electrode of the first transistor T2, and the first electrode of the second transistor T3 are all sources, while the first electrode of the driving transistor T1 The second electrode, the second electrode of the first transistor T2, and the second electrode of the second transistor T3 are all drains.
  • an N-type transistor is taken as an example to describe the pixel driving circuit and the driving method thereof.
  • FIG. 4 is an equivalent schematic diagram of another pixel driving circuit in an embodiment of the present invention.
  • the pixel drive circuit includes a first data input module 41, a second data input module 42, a display drive module 43, and a light emitting module 44;
  • the first data input module 41 includes:
  • the first transistor T2 the first electrode of the first transistor T2 is connected to the first node G, the second electrode of the first transistor T2 is connected to the first data signal Data1, and the gate G2 of the first transistor T2 is connected to the first scan signal Scan1;
  • the first storage capacitor C1 one end of the first storage capacitor C1 is connected to the first node G, and the other end of the first storage capacitor C1 is grounded to VSS.
  • the structure of the second data input module 42 is similar to the structure of the second data input module 32 in the aforementioned pixel driving circuit, and will not be repeated here.
  • the structure of the display driving module 43 is similar to the structure of the display driving module 42 in the aforementioned pixel driving circuit, and will not be repeated here.
  • FIG. 5 is a schematic flowchart of a driving method of a pixel driving circuit in an embodiment of the present invention.
  • S501 Provide a pixel driving circuit
  • the first data input module 31 couples the first data signal Data1 to the first node G;
  • the second data input module 32 couples the second data signal Data2 to the first node G;
  • the display driving module 33 transmits the power signal VSS to the second node S;
  • the light emitting module 34 generates a working current under the control of the power signal VDD coupled to the second node S and emits light accordingly.
  • the voltage of the input first data signal is compensated to obtain the superposition of the voltage of the first data signal and the voltage of the second data signal, thereby enabling the light-emitting element to obtain Enough current to emit light, so that the voltage that is sufficient to make the light-emitting element emit light through the superposition of the respective low voltages of the two data signals can greatly reduce the data voltage of the display panel, thereby reducing dynamic power consumption, and ultimately reducing the total power
  • the purpose of consumption is to improve the display performance of the display panel.
  • Table 1 shows the voltage amplitude transmitted by each signal line.
  • the first data signal Data1 with a high potential or the first data signal Data1 with a low potential may be provided through the first data signal line, and the first scan signal Scan1 with a high potential or the first scan signal Scan1 with a low potential may be provided through the first scan signal line.
  • the first scan signal Scan1 of high potential can be provided through the second data signal line to provide the second data signal Data1 of high potential or the second data signal Data1 of low potential, and the second scan signal Scan1 of high potential can be provided through the second scan signal line Or the second scan signal Scan1 at a low level.
  • the first transistor T2 is connected to the first high potential 5V of the first scan signal Scan1, and the first transistor T2 is turned on.
  • the first data signal Data1 is coupled to the first node G.
  • the voltage of the first node G rises to the first threshold voltage V G1 . Since the first threshold voltage V G1 is greater than the threshold voltage between the gate and source of the driving transistor T1, the driving transistor T1 is turned on, the power signal VDD is coupled to the second node S, and the voltage of the second node rises to the second threshold voltage V S1 , the current I OLED of the light-emitting element D rises slightly to the first threshold current I OLED1 .
  • the second threshold voltage at the second node S is not only positively correlated with the voltage of the power signal, but also positively correlated with the first threshold voltage at the first node G.
  • the first scan signal before the preset time period N1 and the first scan signal that is at a high potential during the preset time period N1 all refer to pulse signals. .
  • the first scan signal Scan1 is at a low level
  • the second scan signal Scan2 is at a high level
  • the first transistor T2 is turned off and the second transistor T3 is turned on.
  • the second data signal Data15V Coupled to the third node M the voltage of the third node M can be changed from 1V to 5V, and then coupled to the first node G through the second storage capacitor C2, so the voltage of the first node G rises from the first threshold voltage V G1 to The third threshold voltage V G3 .
  • the increase in the voltage of the first node G that is, the difference between the third threshold voltage V G3 and the first threshold voltage V G1 , can be obtained by the following formula (2):
  • V G13 4V*C2/(C1+C2) (2)
  • the third threshold voltage of the first node G can be obtained by the following formula (3):
  • V G3 5+4*C2/(C1+C2) (3)
  • the driving transistor T1 continues to be turned on, the voltage of the second node S rises from the second threshold voltage V S2 to the fourth threshold voltage V S4 , and the light-emitting current of the light-emitting element D rises to the second threshold current I OLED1 1.5 ⁇ A, Thus, the light-emitting element D emits light.
  • the fourth threshold voltage at the second node S is not only positively correlated with the voltage of the power signal, but also positively correlated with the third threshold voltage at the first node G.
  • the dynamic power consumption I of the first data signal line and the second data signal line is positively correlated with the display frequency of the image, the capacitance, the voltage of the first data signal line, and the voltage of the second data signal line. Because the voltage of the first data signal in the embodiment of the present invention is greatly reduced, the voltage of the second data signal is also much lower than the voltage of the data signal of the existing 2T1C pixel driving circuit, and the storage capacitor C1 and the storage capacitor C2 are connected in series to make The total storage capacity is reduced compared to the storage capacity in the existing 2T1C pixel driving circuit, so that the dynamic power consumption I of the total data signal line is greatly reduced.
  • the driving method is also similar to the above driving method, except that the first storage capacitor C1 is not grounded, but connected to the second node S, so in the first When the voltage of a node G reaches the first threshold voltage V G1 , since a part of the voltage is coupled to the second node S through the first storage capacitor C1, the voltage at which the driving transistor T1 is turned on will be reduced.
  • the driving transistor T1 cannot be turned on, and it can only be turned on after the voltage of the first node G reaches the third threshold voltage V G3 , so the current of the second node S may rise very high instantaneously, which is not conducive to protecting the light-emitting element D's normal light.
  • the driving method of this embodiment is also an optional solution in the present invention, and the driving method in FIG. 3 is the most preferred solution.
  • the voltage of the first data signal and the voltage of the second data signal are obtained at the first node G.
  • the superposition of the voltage is the third threshold voltage V G3 , so that the voltage of the second node S is increased from the second threshold voltage V S2 to V S1 , so that the current I OLED of the light-emitting element D is increased from I OLED1 to I OLED2 to be sufficiently large.
  • the data voltage of the display panel can be greatly reduced, so that the dynamic power consumption can be reduced, and finally the goal of reducing the total power consumption is achieved, and the display performance of the display panel is improved.
  • the embodiment of the present invention also provides a display panel, which adopts the pixel driving circuit structure in the embodiment of the present invention, which can greatly reduce the data voltage of the display panel, thereby reducing dynamic power consumption, and finally achieving a reduction in total power consumption. Purpose, to improve the display performance of the display panel.

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Abstract

一种像素驱动电路及其驱动方法、显示面板。像素驱动电路包括第一数据输入模块（31）、第二数据输入模块（32）、显示驱动模块（33）和发光模块（34）；显示驱动模块（33）包括驱动晶体管（T1），发光模块（34）包括发光元件（D）。第一数据输入模块（31）用于将第一数据信号（Data1）耦合到第一节点（G）；第二数据输入模块（32）用于将第二数据信号（Data2）耦合到第一节点（G）。驱动晶体管（T1）由第一数据信号（Data1）和第二数据信号（Data2）耦合至第一节点（G）时在第一节点（G）产生的电位进行控制，并传输电源信号至第二节点（S）使发光元件（D）发光，能够降低动态功耗，提升显示面板的显示性能。

Description

像素驱动电路及其驱动方法、显示面板 技术领域
本发明涉及显示技术领域，特别涉及一种像素驱动电路及其驱动方法、显示面板。
背景技术
到目前为止，现有的显示面板更新迭代飞快，包括发光二极管(Light emitting diode，LED)显示面板、迷你发光二极管(Mini-Light emitting diode,Mini-LED)显示面板、有机发光二极管(Organic-Light emitting diode,OLED)显示面板以及有源矩阵有机发光二极管(Active Matrix organic light-emitting diode,AMOLED)。各种显示面板都需要通过像素驱动电路来驱动显示面板中的发光二极管发光来显示图像。
通用的像素驱动电路采用的是如图1所示的2T1C的像素驱动电路结构。由图1可知，现有的2T1C结构的像素驱动电路包括晶体管T1、晶体管T2、存储电容C、发光元件D、电源信号线、低电平信号线、扫描信号线以及数据信号线；其中，晶体管T1的栅极G1与晶体管T2的第一极相连，晶体管T1的第一极与电源信号线VDD相连，晶体管的T1的第二极与发光元件D的阳极相连；发光元件的阴极接地VSS；晶体管T2的栅极与扫描信号线相连，晶体管T2的第二极与数据信号线相连；存储电容C的一端与第一节点G相连，第一节点G与晶体管T1的栅极以及晶体管T2的第一极相连，存储电容C的另一端与第二节点S相连，第二节点S与晶体管T1的第二极以及低电平信号相连。
发光元件D的亮灭是通过显示面板的该像素驱动电路的驱动方法实现的，参见图2，图2为图1的像素驱动电路的驱动方法的第一时序图，该驱动方法包括：
通过数据信号线提供数据信号，通过扫描信号线提供扫描信号，通过低电平信号线提供低电平信号，通过电源信号线提供电源信号，其中在一帧图像的显示周期内，当扫描信号线提供高电平扫描信号，且数据信号线提供高电平数 据信号时，令晶体管T2打开，第一节点G获得第一高电位V g，然后令晶体管T1打开，因存储电容会存储部分电压，因此第二节点S获得低于第一高电位的第二高电位V S，发光元件因第二节点S的第二高电位V S和低电平线的低电位VSS之间的电压差所产生电流I OLED而发光，第二高电位V S。该2T1C像素电路在对AMOLED进行驱动时，数据信号线的动态功耗I可由下述公式(1)得到：
I＝fcV data 2                (1)
其中，I为数据信号线的动态功耗，f为图像的显示频率，c为电容量，V data为数据信号线的电压。
然而，传统的显示面板的像素驱动电路中，驱动发光元件D发光时需要达到较大的电流，例如发光元件D的电流为1.5μA，为此，数据信号线的高电平电压则需要输出较高的电压V data才能够提供给发光元件D充足的电流以使其发光，例如V data＝15V，根据动态功耗I的计算公式可知，这样导致显示面板的动态功耗较大，容易导致显示面板的相关器件温度上升较大，器件特性容易发生变化，以致显示画面出现显示反常现象，这样影响了显示面板的显示性能及其实用化。
技术问题
由于显示面板的动态功耗较大，以致显示画面出现显示反常现象，影响了显示面板的显示性能及其实用化。
技术解决方案
本发明提供一种像素驱动电路，所述像素驱动电路包括第一数据输入模块、第二数据输入模块、显示驱动模块和发光模块；
所述第一数据输入模块用于将第一数据信号耦合到第一节点；
所述第二数据输入模块用于将第二数据信号耦合到所述第一节点；
所述显示驱动模块包括驱动晶体管，所述驱动晶体管由所述第一数据信号和所述第二数据信号耦合至所述第一节点时在所述第一节点产生的电位进行控制，并用于传输电源信号至第二节点；
所述发光模块包括发光元件，所述发光元件的阳极连接所述第二节点，所述发光元件的阴极接地，用于在耦合至所述第二节点的电源信号的控制下产生工作电流并据此进行发光。
本发明另外提供一种像素驱动电路的驱动方法，包括：
提供像素驱动电路，所述像素驱动电路包括第一数据输入模块、第二数据输入模块，显示驱动模块和发光模块；
所述显示驱动模块包括驱动晶体管，所述驱动晶体管由所述第一数据信号和第二数据信号耦合至所述第一节点时在所述第一节点产生的电位进行控制；
所述发光模块包括发光元件，所述发光元件的阳极连接所述第二节点，所述发光元件的阴极接地；
所述驱动方法在一帧图像的显示周期内包括：
所述第一数据输入模块将所述第一数据信号耦合到所述第一节点；
所述第二数据输入模块将所述第二数据信号耦合到所述第一节点；
所述显示驱动模块将所述电源信号传输至所述第二节点；
所述发光模块在耦合至所述第二节点的电源信号的控制下产生工作电流并据此进行发光。
本发明还提供一种显示面板，其中，所述显示面板包括像素驱动电路，其中所述像素驱动电路包括第一数据输入模块、第二数据输入模块、显示驱动模块和发光模块；
所述第一数据输入模块用于将第一数据信号耦合到第一节点；
所述第二数据输入模块用于将第二数据信号耦合到所述第一节点；
所述显示驱动模块包括驱动晶体管，所述驱动晶体管由所述第一数据信号和所述第二数据信号耦合至所述第一节点时在所述第一节点产生的电位进行控制，并用于传输电源信号至第二节点；
所述发光模块包括发光元件，所述发光元件的阳极连接所述第二节点，所述发光元件的阴极接地，用于在耦合至所述第二节点的电源信号的控制下产生工作电流并据此进行发光。
有益效果
本发明通过第一数据输入模块将第一数据信号耦合到第一节点后，第二数据输入模块再将第二数据信号耦合到第二节点，这样第二节点的电压就变为第一数据信号的电压和第二数据信号的电压的叠加，且由于该电压大于驱动晶体管的栅极和源极之间的电压，这样驱动晶体管导通，电源信号耦合至第二节点，第二节点的电压与第一节点的电压以及驱动晶体管导通后传输过来的高电平电压成正相关，发光模块中的发光元件在第二节点的电源信号的控制下产生控制电流以使发光元件发光，这样因通过两个数据信号各自的低压叠加后变为足以使发光元件发光的电压，能够大幅降低显示面板的数据电压，从而能够降低动态功耗，最终达到降低总功耗的目的，提升了显示面板的显示性能。
附图说明
图1为现有的2T1C像素驱动电路的等效示意图；
图2为现有的2T1C像素驱动电路的驱动方法的第一时序图；
图3为本发明实施例中一个像素驱动电路的等效示意图；
图4为本发明实施例中另一个像素驱动电路的等效示意图；
图5为本发明实施例中一个像素驱动电路的驱动方法流程示意图；
图6为本发明实施例中一个像素驱动电路的驱动方法的第二时序图。
本发明的实施方式
本发明的首要目的是：通过在第一数据输入模块的基础上增加第二数据输入模块的单级补偿电路，驱动晶体管由第一数据信号和第二数据信号耦合至第一节点时在第一节点产生的电位进行控制，并传输电源信号至第二节点使发光元件发光，能够降低动态功耗，提升显示面板的显示性能。
下面将结合本发明实施例中的附图，对本发明所提供的各个示例性的实施例的技术方案进行清楚、完整地描述。在不冲突的情况下，下述各个实施例及其技术特征可以相互组合。
请参阅图3，图3为本发明实施例中一个像素驱动电路的等效示意图。
本发明实施例中提供一种像素驱动电路，该像素驱动电路用于驱动显示板发光，该像素驱动电路包括第一数据输入模块31、第二数据输入模块32、显示驱动模块33和发光模块34；
第一数据输入模块31用于将第一数据信号Data1耦合到第一节点G；
第二数据输入模块32用于将第二数据信号Data2耦合到第一节点G；
显示驱动模块33包括驱动晶体管T1，该驱动晶体管由第一数据信号和第二数据信号耦合至第一节点时在第一节点产生的电位进行控制，并用于传输电源信号至第二节点；
发光模块334包括发光元件D，发光元件D的阳极连接第二节点S，发光元件D的阴极接地，用于在耦合至第二节点S的电源信号的控制下产生工作电流并据此进行发光。
需要说明的是，本发明实施例中的驱动晶体管T1可以为P型晶体管，也可以为N型晶体管，具体此处不做限定。
需要说明的是，本发明实施例中的驱动晶体管T1可以为金属氧化物半导体场效应晶体管(Metal-oxide-semiconductor field-effect transistor，MOS管)，也可以为薄膜晶体管(Thin Film Transistor，TFT)，具体此处不做限定。
进一步地，在本发明实施例中的驱动晶体管T1为薄膜晶体管的情况下，薄膜晶体管可以为非晶硅薄膜晶体管，也可以为低温多晶硅薄膜晶体管，具体此处不做限定。
需要说明的是，本发明实施例中的发光元件可以为发光二极管LED，也可以为迷你发光二极管Mini-LED、有机发光二极管OLED或者有源矩阵有机发光二极管AMOLED，具体此处不做限定。
本发明实施例中的像素驱动电路，由于第一数据输入模块31将第一数据信号Data1耦合到第一节点G后，第二数据输入模块32再将第二数据信号Data2耦合到第二节点G，这样第二节点G的电压就变为第一数据信号Data1的电压和第二数据信号Data2的电压的叠加，且由于该电压大于驱动晶体管T1的栅极 和源极之间的阈值电压，这样驱动晶体管T1导通，电源信号耦合至第二节点S，第二节点S的电压与第一节点G的电压以及驱动晶体管T1导通后传输过来的高电平电压成正相关，发光模块中的发光元件D在第二节点S的电源信号的控制下产生控制电流而发光，这样因通过两个数据信号各自的低压叠加后变为足以使发光元件发光的电压，能够大幅降低显示面板的数据电压，从而能够降低动态功耗，最终达到降低总功耗的目的，提升了显示面板的显示性能。
实现本发明上述实施例的具体方案为以下两个实施例：
优选地，参见图3，实现本发明实施例中的一个像素驱动电路的具体方案为：
如前所述，像素驱动电路包括第一数据输入模块31、第二数据输入模块32、显示驱动模块33和发光模块34；
第一数据输入模块31包括：
第一晶体管T2，第一晶体管T2的第一极与第一节点G相连，第一晶体管T2的第二极接入第一数据信号Data1，第一晶体管T2的栅极G2接入第一扫描信号Scan1；
第一存储电容C1，第一存储电容C1的一端与第一节点G相连，第一存储电容C1的另一端与第二节点S相连。
第二数据输入模块32包括：
第二晶体管T3，第二晶体管T3的第一极与第三节点M相连，第二晶体管T3的第二极接入第二数据信号Data2，第二晶体管的栅极G3接入第二扫描信号Scan2；
第二存储电容C2，第二存储电容C2的一端与第三节点M相连，第二存储电容C2的另一端与第二节点S相连。
此外，显示驱动模块33中的驱动晶体管T1的第一极接入电源信号VDD，驱动晶体管T1的第二极与第二节点S相连，驱动晶体管T1的栅极与第一节点G相连。
需要说明的是，本发明实施例中的第一数据信号Data1可以由第一数据信号线提供，第一扫描信号Scan1可以由第一扫描信号线提供，第二数据信号Data2 可以由第二数据信号线提供，第二扫描信号Scan2可以由第二扫描信号线提供。
需要说明的是，本发明实施例中的驱动晶体管T1、第一晶体管T2和第二晶体管T3可以均为N型晶体管，也可以均为P型晶体管。
进一步地，当本实施例中的晶体管均为N型时，驱动晶体管T1的第一极、第一晶体管T2的第一极、第二晶体管T3的第一极均为漏极，而驱动晶体管T1的第二极、第一晶体管T2的第二极、第二晶体管T3的第二极均为源极。反之，当本实施例中的晶体管均为P型时，驱动晶体管T1的第一极、第一晶体管T2的第一极、第二晶体管T3的第一极均为源极，而驱动晶体管T1的第二极、第一晶体管T2的第二极、第二晶体管T3的第二极均为漏极。
本实施例中以N型晶体管为例对像素驱动电路以及其驱动方法进行描述。
以上是实现本发明实施例中的一个像素驱动电路的具体方案，以下参见图4，图4为本发明实施例中另一个像素驱动电路的等效示意图。
本发明实施例中提供的另一个像素驱动电路的具体方案为：
像素驱动电路包括第一数据输入模块41、第二数据输入模块42、显示驱动模块43和发光模块44；
第一数据输入模块41包括：
第一晶体管T2，第一晶体管T2的第一极与第一节点G相连，第一晶体管T2的第二极接入第一数据信号Data1，第一晶体管T2的栅极G2接入第一扫描信号Scan1；
第一存储电容C1，第一存储电容C1的一端与第一节点G相连，第一存储电容C1的另一端接地VSS。
第二数据输入模块42的结构与前述像素驱动电路中的第二数据输入模块32的结构类似，此处不再赘述。
显示驱动模块43的结构与前述像素驱动电路中的显示驱动模块42的结构类似，此处不再赘述。
基于上述像素驱动电路，本发明实施例还提供一种像素驱动方法，请参阅图5和图6，图5为本发明实施例中一个像素驱动电路的驱动方法流程示意图， 图6为本发明实施例中一个像素驱动电路的驱动方法的第二时序图。
本发明实施例中，基于图3和图4的像素驱动电路的驱动方法中，在一帧图像的显示周期内，包括如下步骤：
S501、提供一像素驱动电路；
具体请参阅前述图3和图4中描述的实施例。
S502、第一数据输入模块31将第一数据信号Data1耦合到第一节点G；
S503、第二数据输入模块32将第二数据信号Data2耦合到第一节点G；
S504、显示驱动模块33将电源信号VSS传输至第二节点S；
S505、发光模块34在耦合至第二节点S的电源信号VDD的控制下产生工作电流并据此进行发光。
本发明实施例中的像素驱动电路的驱动方法，由于通过对输入的第一数据信号的电压进行补偿，得到第一数据信号的电压和第二数据信号的电压的叠加，从而能够使发光元件得到足够大的电流而发光，这样因通过两个数据信号各自的低压叠加后变为足以使发光元件发光的电压，能够大幅降低显示面板的数据电压，从而能够降低动态功耗，最终达到降低总功耗的目的，提升了显示面板的显示性能。
下面参见图6和表1，针对前述图3中的像素驱动电路对基于该像素驱动电路的驱动方法进行说明。
表1为各个信号线传输的电压幅值。
表1
Figure PCTCN2020085003-appb-000001
本发明实施例中，可以通过第一数据信号线提供高电位的第一数据信号Data1或者低电位的第一数据信号Data1，可以通过第一扫描信号线提供高电位的第一扫描信号Scan1或者低电位的第一扫描信号Scan1，可以通过第二数据信号线提供高电位的第二数据信号Data1或者低电位的第二数据信号Data1，可以通过第二扫描信号线提供高电位的第二扫描信号Scan1或者低电位的第二扫描信号Scan1。
具体地，在第一预设时长N1前，第一晶体管T2接入第一扫描信号Scan1的第一高电位5V，第一晶体管T2导通，在第一预设时长N1内，第一数据信号Data1耦合至第一节点G，此时第一节点G的电压升至第一阈值电压V G1。由于第一阈值电压V G1大于驱动晶体管T1的栅极和源极之间的阈值电压，驱动晶体管T1导通，电源信号VDD耦合至第二节点S，第二节点的电压升至第二阈值电压V S1，发光元件D的电流I OLED略微抬升，升至第一阈值电流I OLED1。
需要说明的是，本发明实施例中，第二节点S处的第二阈值电压不仅与电源信号的电压成正相关，也与第一节点G处的第一阈值电压成正相关。
需要说明的是，本发明实施例中关于预设时长N1前以及预设时长N1内为高电位的第一扫描信号、预设时长N1内为高电位的第一数据信号均指的是脉冲信号。
接着，在第二预设时长N2内，第一扫描信号Scan1为低电位，第二扫描信号Scan2为高电位，于是第一晶体管T2关闭，第二晶体管T3导通，此时第二数据信号Data15V耦合至第三节点M，第三节点M的电压可以由1V变为5V，然后通过第二存储电容C2耦合至第一节点G，于是第一节点G的电压由第一阈值电压V G1升至第三阈值电压V G3。理论上而言，第一节点G电压的升值，即第三阈值电压V G3与第一阈值电压V G1的差值，可由以下公式(2)得到：
V G13＝4V*C2/(C1+C2)      (2)
也就是说，第一节点G的第三阈值电压可由以下公式(3)得到：
V G3＝5+4*C2/(C1+C2)      (3)
此时，驱动晶体管T1继续保持导通，第二节点S的电压由第二阈值电压V S2升至第四阈值电压V S4，发光元件D发光的电流升至第二阈值电流I OLED11.5μA，于是发光元件D发光。
需要说明的是，第二节点S处的第四阈值电压不仅与电源信号的电压成正相关，也与第一节点G处的第三阈值电压成正相关。
根据前述公式(1)可知，第一数据信号线和第二数据信号线的动态功耗I与图像的显示频率、电容量、第一数据信号线的电压以及第二数据信号线的电压成正相关，由于本发明实施例中第一数据信号的电压大幅降低，第二数据信号的电压也比现有的2T1C像素驱动电路的数据信号的电压低很多，并且存储电容C1和存储电容C2串联从而使得总的存储电容量比现有的2T1C像素驱动电路中的存储电容量有所减少，因此使得总的数据信号线的动态功耗I大幅减少。
本发明实施例中，若采用前述图4中的像素驱动电路结构，其驱动方法也与上述驱动方法类似，只是由于第一存储电容C1不是接地，而是与第二节点S连接，因此在第一节点G的电压达到第一阈值电压V G1时，由于会有一部分电压通过第一存储电容C1耦合到第二节点S处，于是令驱动晶体管T1导通的电压会有所降低，这样就有可能造成驱动晶体管T1无法导通，而在第一节点G的电压达到第三阈值电压V G3后才能够导通，于是第二节点S的电流有可能会瞬间抬升很高，不利于保护发光元件D的正常发光。但是，本实施例的驱动方法也是本发明中的一个可选方案，而图3中的驱动方法则是最优选方案。
本实施例中的像素驱动电路的驱动方法，由于通过对输入的第一数据信号的第一阈值电压V G1进行补偿，在第一节点G处得到第一数据信号的电压和第二数据信号的电压的叠加即第三阈值电压V G3，使第二节点S的电压由第二阈值电压V S2升至V S1，从而使发光元件D的电流I OLED由I OLED1升至I OLED2而得到足够大的电流而发光，这样既保护了发光元件D不会因突然升高的电流而被烧坏以致不能正常发光，而且因通过两个数据信号各自的低压叠加后变为足以使发光元件发光的电压，能够大幅降低显示面板的数据电压，从而能够降低动态功耗，最终达到降低总功耗的目的，提升了显示面板的显示性能。
本发明实施例还提供一种显示面板，该显示面板采用的是本发明实施例中的像素驱动电路结构，能够大幅降低显示面板的数据电压，从而降低动态功耗，最终达到降低总功耗的目的，提升了显示面板的显示性能。
尽管已经相对于一个或多个实现方式示出并描述了本发明，但是本领域技术人员基于对本说明书和附图的阅读和理解将会想到等价变型和修改。本发明包括所有这样的修改和变型，并且仅由所附权利要求的范围限制。特别地关于由上述组件执行的各种功能，用于描述这样的组件的术语旨在对应于执行所述组件的指定功能(例如其在功能上是等价的)的任意组件(除非另外指示)，即使在结构上与执行本文所示的本说明书的示范性实现方式中的功能的公开结构不等同。此外，尽管本说明书的特定特征已经相对于若干实现方式中的仅一个被公开，但是这种特征可以与如可以对给定或特定应用而言是期望和有利的其他实现方式的一个或多个其他特征组合。而且，就术语“包括”、“具有”、“含有”或其变形被用在具体实施方式或权利要求中而言，这样的术语旨在以与术语“包含”相似的方式包括。进一步地，应当理解的是，在本文中提及的“多个”是指两个或两个以上。对于本文中提及的步骤，其通过数字后缀仅仅是为了清晰表述实施例，便于理解，并不完全代表步骤执行的先后顺序，应当以逻辑关系的先后设定为思考。
以上所述仅为本发明的实施例，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，例如各实施例之间技术特征的相互结合，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (19)

  1. 一种像素驱动电路，其中，所述像素驱动电路包括第一数据输入模块、第二数据输入模块、显示驱动模块和发光模块；
    所述第一数据输入模块用于将第一数据信号耦合到第一节点；
    所述第二数据输入模块用于将第二数据信号耦合到所述第一节点；
    所述显示驱动模块包括驱动晶体管，所述驱动晶体管由所述第一数据信号和所述第二数据信号耦合至所述第一节点时在所述第一节点产生的电位进行控制，并用于传输电源信号至第二节点；
    所述发光模块包括发光元件，所述发光元件的阳极连接所述第二节点，所述发光元件的阴极接地，用于在耦合至所述第二节点的电源信号的控制下产生工作电流并据此进行发光。
  2. 根据权利要求1所述的像素驱动电路，其中，所述第一数据输入模块包括：
    第一晶体管，所述第一晶体管的第一极与所述第一节点相连，所述第一晶体管的第二极接入第一数据信号，所述第一晶体管的栅极接入第一扫描信号；
    第一存储电容，所述第一存储电容的一端与所述第一节点相连，所述第一存储电容的另一端接地。
  3. 根据权利要求2所述的像素驱动电路，其中，所述第二数据输入模块包括：
    第二晶体管，所述第二晶体管的第一极与第三节点相连，所述第二晶体管的第二极接入第二数据信号，所述第二晶体管的栅极接入第二扫描信号；
    第二存储电容，所述第二存储电容的一端与所述第三节点相连，所述第二存储电容的另一端与所述第一节点相连。
  4. 根据权利要求3所述的像素驱动电路，其中，所述驱动晶体管、所述第一晶体管、所述第二晶体管均为N型晶体管，或者，所述驱动晶体管、所述第一晶体管、所述第二晶体管均为P型晶体管。
  5. 根据权利要求1所述的像素驱动电路，其中，所述第一数据输入模块包括：
    第一晶体管，所述第一晶体管的第一极与第一节点相连，所述第一晶体管的第二极接入第一数据信号，所述第一晶体管的栅极接入第一扫描信号；
    第一存储电容，所述第一存储电容的一端与所述第一节点相连，所述第一存储电容的另一端与所述第二节点相连。
  6. 根据权利要求5所述的像素驱动电路，其中，所述第二数据输入模块包括：
    第二晶体管，所述第二晶体管的第一极与第三节点相连，所述第二晶体管的第二极接入第二数据信号，所述第二晶体管的栅极接入第二扫描信号；
    第二存储电容，所述第二存储电容的一端与所述第三节点相连，所述第二存储电容的另一端与所述第一节点相连。
  7. 根据权利要求6所述的像素驱动电路，其中，所述驱动晶体管、所述第一晶体管、所述第二晶体管均为N型晶体管，或者，所述驱动晶体管、所述第一晶体管、所述第二晶体管均为P型晶体管。
  8. 根据权利要求1所述的像素驱动电路，其中，所述驱动晶体管的第一极接入电源信号，所述驱动晶体管的第二极与所述第二节点相连，所述驱动晶体管的栅极与所述第一节点相连。
  9. 一种像素驱动电路的驱动方法，其中，包括：
    提供像素驱动电路，所述像素驱动电路包括第一数据输入模块、第二数据输入模块，显示驱动模块和发光模块；
    所述显示驱动模块包括驱动晶体管，所述驱动晶体管由所述第一数据信号和第二数据信号耦合至所述第一节点时在所述第一节点产生的电位进行控制；
    所述发光模块包括发光元件，所述发光元件的阳极连接所述第二节点，所述发光元件的阴极接地；
    所述驱动方法在一帧图像的显示周期内包括：
    所述第一数据输入模块将所述第一数据信号耦合到所述第一节点；
    所述第二数据输入模块将所述第二数据信号耦合到所述第一节点；
    所述显示驱动模块将所述电源信号传输至所述第二节点；
    所述发光模块在耦合至所述第二节点的电源信号的控制下产生工作电流并据此进行发光。
  10. 根据权利要求9所述的驱动方法，其中，所述第一数据输入模块包括：
    第一晶体管，所述第一晶体管的第一极与所述第一节点相连，所述第一晶体管的第二极接入所述第一数据信号，所述第一晶体管的栅极接入第一扫描信号；
    第一存储电容，所述第一存储电容的一端与所述第一节点相连，所述第一存储电容的另一端接地；
    其中，所述驱动方法包括：
    在第一预设时长前，所述第一晶体管接入所述第一扫描信号的第一高电位，所述第一晶体管导通，在所述第一预设时长内，所述第一数据信号耦合至所述第一节点，所述第一节点的电压升至第一阈值电压。
  11. 根据权利要求10所述的驱动方法，其中，所述第二数据输入模块包括：
    第二晶体管，所述第二晶体管的第一极与第三节点相连，所述第二晶体管的第二极接入第二数据信号，所述第二晶体管的栅极接入第二扫描信号；
    第二存储电容，所述第二存储电容的一端与所述第三节点相连，所述第二存储电容的另一端与所述第一节点相连；
    其中，所述驱动方法包括：
    在第二预设时长内，所述第一扫描信号为低电位，所述第二扫描信号为高电位，所述第一晶体管关闭，所述第二晶体管导通，所述第二数据信号耦合至所述第三节点，并通过所述第二存储电容耦合至所述第一节点，所述第一节点的电压由所述第一阈值电压升至第三阈值电压。
  12. 根据权利要求11所述的驱动方法，其中，所述驱动方法包括：
    在所述第一预设时长内，当所述第一节点的电压升至所述第一阈值电压时， 所述驱动晶体管导通，所述第二节点的电压升至第二阈值电压，所述发光元件的电流升至第一阈值电流，所述第二阈值电压与所述第一阈值电压以及所述电源信号的电压成正相关；
    在所述第二预设时长内，当所述第一节点的电压升至所述第三阈值电压时，所述驱动晶体管继续导通，所述第二节点的电压升至第四阈值电压，所述第四阈值电压与所述第二阈值电压以及所述电源信号成正相关，所述发光元件的电流升至第二阈值电流，令所述发光元件发光。
  13. 一种显示面板，其中，所述显示面板包括像素驱动电路，其中，所述像素驱动电路包括第一数据输入模块、第二数据输入模块、显示驱动模块和发光模块；
    所述第一数据输入模块用于将第一数据信号耦合到第一节点；
    所述第二数据输入模块用于将第二数据信号耦合到所述第一节点；
    所述显示驱动模块包括驱动晶体管，所述驱动晶体管由所述第一数据信号和所述第二数据信号耦合至所述第一节点时在所述第一节点产生的电位进行控制，并用于传输电源信号至第二节点；
    所述发光模块包括发光元件，所述发光元件的阳极连接所述第二节点，所述发光元件的阴极接地，用于在耦合至所述第二节点的电源信号的控制下产生工作电流并据此进行发光。
  14. 根据权利要求13所述的显示面板，其中，所述第一数据输入模块包括：
    第一晶体管，所述第一晶体管的第一极与所述第一节点相连，所述第一晶体管的第二极接入第一数据信号，所述第一晶体管的栅极接入第一扫描信号；
    第一存储电容，所述第一存储电容的一端与所述第一节点相连，所述第一存储电容的另一端接地。
  15. 根据权利要求14所述的显示面板，其中，所述第二数据输入模块包括：
    第二晶体管，所述第二晶体管的第一极与第三节点相连，所述第二晶体管的第二极接入第二数据信号，所述第二晶体管的栅极接入第二扫描信号；
    第二存储电容，所述第二存储电容的一端与所述第三节点相连，所述第二 存储电容的另一端与所述第一节点相连。
  16. 根据权利要求15所述的显示面板，其中，所述驱动晶体管、所述第一晶体管、所述第二晶体管均为N型晶体管，或者，所述驱动晶体管、所述第一晶体管、所述第二晶体管均为P型晶体管。
  17. 根据权利要求13所述的显示面板，其中，所述第一数据输入模块包括：
    第一晶体管，所述第一晶体管的第一极与第一节点相连，所述第一晶体管的第二极接入第一数据信号，所述第一晶体管的栅极接入第一扫描信号；
    第一存储电容，所述第一存储电容的一端与所述第一节点相连，所述第一存储电容的另一端与所述第二节点相连。
  18. 根据权利要求17所述的显示面板，其中，所述第二数据输入模块包括：
    第二晶体管，所述第二晶体管的第一极与第三节点相连，所述第二晶体管的第二极接入第二数据信号，所述第二晶体管的栅极接入第二扫描信号；
    第二存储电容，所述第二存储电容的一端与所述第三节点相连，所述第二存储电容的另一端与所述第一节点相连。
  19. 根据权利要求18所述的显示面板，其中，所述驱动晶体管、所述第一晶体管、所述第二晶体管均为N型晶体管，或者，所述驱动晶体管、所述第一晶体管、所述第二晶体管均为P型晶体管。
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113990247A (zh) * 2021-12-08 2022-01-28 深圳市华星光电半导体显示技术有限公司 像素驱动电路及显示装置

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111785201B (zh) * 2020-07-02 2021-09-24 深圳市华星光电半导体显示技术有限公司 一种像素驱动电路及其驱动方法、显示面板以及显示装置
CN112071261A (zh) * 2020-09-22 2020-12-11 禹创半导体(深圳)有限公司 一种micro LED的画素电路与驱动方法
CN116758865A (zh) * 2023-06-29 2023-09-15 重庆惠科金渝光电科技有限公司 显示面板及其驱动方法、电子设备

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140146028A1 (en) * 2012-11-29 2014-05-29 Yang-Hwa Choi Pixel, display device comprising the pixel and driving method of the display device
CN107705755A (zh) * 2017-11-20 2018-02-16 深圳市华星光电半导体显示技术有限公司 一种像素驱动电路、驱动方法及显示面板
CN110021265A (zh) * 2019-04-26 2019-07-16 上海天马微电子有限公司 一种像素电路及其驱动方法、显示装置及驱动方法
WO2020039291A1 (ja) * 2018-08-21 2020-02-27 株式会社半導体エネルギー研究所 表示装置および電子機器

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7224342B2 (en) * 2004-06-05 2007-05-29 Vastview Technology Inc. Method and device used for eliminating image overlap blurring phenomenon between frames in process of simulating CRT impulse type image display
JP5236324B2 (ja) 2008-03-19 2013-07-17 グローバル・オーエルイーディー・テクノロジー・リミテッド・ライアビリティ・カンパニー 表示パネル
TWI441154B (zh) 2011-08-30 2014-06-11 Au Optronics Corp 顯示裝置及其畫素電壓驅動方法
CN203376957U (zh) * 2013-07-30 2014-01-01 京东方科技集团股份有限公司 像素驱动电路和显示装置
KR102109191B1 (ko) * 2013-11-14 2020-05-12 삼성디스플레이 주식회사 유기전계발광 표시장치 및 그의 구동방법
US20190156748A1 (en) * 2017-11-20 2019-05-23 Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. Pixel driving circuit, driving method and display panel
CN109658868B (zh) * 2019-01-25 2020-11-27 北京大学深圳研究生院 加法器单元以及显示设备
CN109785800B (zh) * 2019-03-05 2020-12-22 北京大学深圳研究生院 一种微显示像素电路
WO2021026827A1 (zh) * 2019-08-14 2021-02-18 京东方科技集团股份有限公司 像素电路及其驱动方法、阵列基板及显示装置
KR20220020473A (ko) * 2020-08-11 2022-02-21 삼성디스플레이 주식회사 표시 장치

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140146028A1 (en) * 2012-11-29 2014-05-29 Yang-Hwa Choi Pixel, display device comprising the pixel and driving method of the display device
CN107705755A (zh) * 2017-11-20 2018-02-16 深圳市华星光电半导体显示技术有限公司 一种像素驱动电路、驱动方法及显示面板
WO2020039291A1 (ja) * 2018-08-21 2020-02-27 株式会社半導体エネルギー研究所 表示装置および電子機器
CN110021265A (zh) * 2019-04-26 2019-07-16 上海天马微电子有限公司 一种像素电路及其驱动方法、显示装置及驱动方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113990247A (zh) * 2021-12-08 2022-01-28 深圳市华星光电半导体显示技术有限公司 像素驱动电路及显示装置

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