WO2021136095A1 - Procédé et dispositif de réglage de retard temporel de liaison montante, station de base, et support de stockage - Google Patents

Procédé et dispositif de réglage de retard temporel de liaison montante, station de base, et support de stockage Download PDF

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Publication number
WO2021136095A1
WO2021136095A1 PCT/CN2020/139473 CN2020139473W WO2021136095A1 WO 2021136095 A1 WO2021136095 A1 WO 2021136095A1 CN 2020139473 W CN2020139473 W CN 2020139473W WO 2021136095 A1 WO2021136095 A1 WO 2021136095A1
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uplink
tas
base station
delay
calibration value
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PCT/CN2020/139473
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English (en)
Chinese (zh)
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阮俊冰
刘建青
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京信网络***股份有限公司
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Publication of WO2021136095A1 publication Critical patent/WO2021136095A1/fr

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W24/00—Supervisory, monitoring or testing arrangements
    • H04W24/02—Arrangements for optimising operational condition

Definitions

  • the present disclosure relates to the field of communication technologies, and in particular, to a method, device, base station, and storage medium for adjusting uplink delay.
  • the baseband processing unit in the base station can set the timing advance (Timing Advance, TA for short) of the UE, and control the UE to send uplink signals in advance according to the TA, so that After the uplink signal is transmitted, it arrives at the baseband processing unit at a designated time.
  • Timing Advance Timing Advance
  • the uplink signal sent by the UE based on the TA will cause propagation delay through spatial propagation, and the uplink signal will also be processed by the baseband processing unit. There will also be a certain hardware processing delay in the processing process. . That is to say, the uplink delay that the uplink signal passes when it is sent from the UE to the baseband processing unit includes the propagation delay and the hardware processing delay. Therefore, in the debugging process, in order to reduce the impact of the hardware processing on the uplink delay, the baseband processing unit usually sets a fixed delay calibration value to compensate, and determines the receiving boundary of the uplink signal according to the delay calibration value to ensure the uplink The block integrity of the signal.
  • the technical problem to be solved by the present disclosure is to solve the problems of the existing demodulation code performance degradation of data, which affects the normal reception of the uplink signal, and increases the debugging time and the research and development cost.
  • embodiments of the present disclosure provide a method, device, base station, and storage medium for adjusting uplink delay.
  • embodiments of the present disclosure provide a method for adjusting uplink delay, and the above method includes:
  • an embodiment of the present disclosure also provides an uplink delay adjustment device, and the foregoing device includes:
  • the receiving module is configured to receive the uplink signal sent by the user equipment UE in the current adjustment period
  • the adjustment module is configured to adjust the uplink delay of the uplink signal according to a preset processing delay calibration value; wherein the processing delay calibration value is obtained according to the historical UE timing advance TA monitored in the previous adjustment period.
  • embodiments of the present disclosure also provide a base station, including a memory and a processor, the memory stores a computer program, and the processor implements the steps of the uplink delay adjustment method when the computer program is executed by the processor.
  • the embodiments of the present disclosure also provide a computer-readable storage medium on which a computer program is stored, and the above-mentioned computer program is executed by a processor to implement the steps of the above-mentioned uplink delay adjustment method.
  • the base station receives the uplink signal sent by the user equipment UE in the current adjustment period; then, adjusts the uplink signal according to the preset processing delay calibration value
  • the processing delay calibration value is obtained according to the historical UE timing advance TA monitored in the last adjustment period. Since the processing delay calibration value is obtained based on the TA of the historical UE monitored in the last adjustment period, when the hardware processing delay of the base station fluctuates greatly, the base station can determine the accurate processing time through the TA of the historical UE.
  • Delay calibration value so as to adjust the uplink delay of the uplink signal received in the current adjustment period according to the accurate processing delay calibration value, so that when the adjusted uplink signal reaches the codec processing module in the baseband processing unit, it can be reduced.
  • Small fluctuations in the direction of negative delay are conducive to improving the receiving performance of the base station, making the debugging of the base station smoother, and reducing the debugging time and research and development costs.
  • FIG. 1 is an application environment diagram of an uplink delay adjustment method in an embodiment
  • FIG. 2 is a schematic flowchart of a method for adjusting uplink delay in an embodiment
  • FIG. 3 is a schematic flowchart of a method for adjusting uplink delay in another embodiment
  • FIG. 4 is a schematic flowchart of a method for adjusting uplink delay in another embodiment
  • FIG. 5 is a structural block diagram of an apparatus for adjusting uplink delay in an embodiment
  • FIG. 6 is a structural block diagram of a device for adjusting uplink delay in another embodiment
  • FIG. 7 is a structural block diagram of a device for adjusting uplink delay in another embodiment
  • Fig. 8 is an internal structure diagram of a base station in an embodiment.
  • the uplink delay adjustment method provided in this application can be applied to the application environment as shown in FIG. 1.
  • the UE 100 communicates with the base station 200 through the network through the network.
  • the UE 100 can be, but is not limited to, at least one type of personal computer, notebook computer, smart phone, tablet computer, and portable wearable device.
  • the base station 200 can be, but is not limited to, macro base stations, micro base stations, and small base stations. It is the base station (Base Transceiver Station, BTS) in Global System of Mobile communication (GSM) or Code Division Multiple Access (CDMA), or it can be Wideband Code Division Multiple Access (Wideband Code Division).
  • GSM Global System of Mobile communication
  • CDMA Code Division Multiple Access
  • Wideband Code Division Multiple Access Wideband Code Division Multiple Access
  • the base station (NodeB, NB for short) in Multiple Access (WCDMA for short) can also be an Evolutional Node B (eNB or eNodeB for short) in LTE, or a relay station or access point, or a base station in the future 5G network , Customer Premise Equipment (CPE), etc., are not limited here.
  • eNB or eNodeB for short Evolutional Node B
  • CPE Customer Premise Equipment
  • a method is provided, and the method is applied to the base station in FIG. 1 as an example for description, including:
  • S101 Receive an uplink signal sent by a user equipment UE in a current adjustment period.
  • the above adjustment period is a period set in the base station and used to adjust the processing delay calibration value
  • the above processing delay calibration value is used to adjust the uplink delay of the uplink signal.
  • the above adjustment period can be 5 minutes or 3 minutes, and can be adjusted according to the actual operating conditions of the base station, which is not limited here.
  • the aforementioned UE may be a mobile phone terminal or other communication equipment that accesses the base station, which is not limited here.
  • the above-mentioned uplink delay refers to the length of time between the uplink signal starting from the UE sending end and the baseband processing unit of the base station starting to perform inverse Fast Fourier Transform (IFFT) processing on the uplink signal.
  • IFFT inverse Fast Fourier Transform
  • the uplink signal sent by the UE propagates through space and will cause propagation delay, and then the uplink signal will be received by the antenna, radio frequency processing, etc., will produce a certain hardware link processing delay, and the programmable integrated circuit (Field Programmable Gate) in the fronthaul unit Array, FPGA for short) signal processing delay and power-on delay jitter error.
  • IFFT inverse Fast Fourier Transform
  • the UE After the base station configures time domain resources for the aforementioned UE through resource scheduling, the UE needs to send uplink signals in advance according to the uplink advance indicated by the base station, so that the uplink signals arrive at the baseband processing unit at the target time corresponding to the time domain resources. Due to the differences in the consistency of multiple hardware in different base station equipment, there are processing delay errors, as well as the signal processing delay and power-on delay jitter error of the fronthaul unit (FPGA).
  • the base station can set the processing delay calibration value to correct The uplink delay is calibrated; that is, the uplink delay of the uplink signal includes propagation delay, hardware processing delay, signal processing delay and power-on delay jitter error of the fronthaul unit (FPGA).
  • the hardware processing delay fluctuates greatly due to the inconsistency of hardware equipment, and the power-on delay jitter error of the fronthaul unit (FPGA); repeat the power-on process at the base station , There will be errors in the determination of the upstream signal boundary, and the tail data of the previous block of signal may be intercepted, resulting in a positive delay; or the head data of the following block of data may be intercepted, resulting in a negative delay.
  • the negative delay is large, some data blocks of the uplink signal cannot be processed normally, which reduces the receiving performance of the base station and affects the debugging progress of the base station.
  • the present application adjusts the above-mentioned processing delay calibration value through the historical UE timing advance TA monitored in the last adjustment period.
  • the base station may obtain the random access request received in the last adjustment period, and then obtain the timing advance TA of the historical UE according to the random access request, and then analyze and calculate the TA of the historical UE to obtain the above-mentioned processing delay calibration value.
  • the foregoing random access request may be multiple access requests sent by a historical UE to the base station, or may be sent by different historical UEs, which is not limited here.
  • the base station can perform statistical analysis on all TAs to obtain the processing delay calibration value; it can also perform statistical analysis on the processing delay calibration value after filtering the TA in combination with other parameters; it is not limited here. .
  • the base station when the base station obtains the processing delay calibration value according to the statistical analysis result, the base station may determine the adjustment amount to the processing delay calibration value according to the statistical analysis result, and then adjust the processing delay calibration value based on the current processing delay calibration value. Make adjustments; or, you can directly determine a new processing delay calibration value based on the statistical analysis results, which is not limited here.
  • the base station obtains the processing delay calibration value according to the TA monitored in the last adjustment period, so that the processing delay calibration value can more accurately adjust the uplink delay of the uplink signal.
  • the base station adjusts the uplink time delay of the uplink signal according to the processing delay calibration value, and can redefine the boundary of the uplink signal according to the processing delay calibration value to ensure the integrity of the current uplink signal block as much as possible and reduce the negative delay fluctuation size.
  • the base station receives the uplink signal sent by the user equipment UE in the current adjustment period; then, adjusts the uplink delay of the uplink signal according to the preset processing delay calibration value; where the processing delay calibration value is Obtained according to the historical UE timing advance TA monitored in the last adjustment period. Since the processing delay calibration value is obtained based on the TA of the historical UE monitored in the last adjustment period, when the hardware processing delay of the base station fluctuates greatly, the base station can determine the accurate processing time through the TA of the historical UE.
  • Delay calibration value so as to adjust the uplink delay of the uplink signal received in the current adjustment period according to the accurate processing delay calibration value, so that when the adjusted uplink signal reaches the codec processing module in the baseband processing unit, it can be reduced.
  • Small fluctuations in the direction of negative delay are conducive to improving the receiving performance of the base station, making the debugging of the base station smoother, and reducing the debugging time and research and development costs.
  • Fig. 3 is a schematic flowchart of a method for adjusting uplink delay in another embodiment.
  • This embodiment relates to a method for a base station to determine a processing delay calibration value.
  • the foregoing method also includes:
  • S201 Acquire the UE's timing advance TA and UE access quality information corresponding to each historical access request in the last adjustment period.
  • the base station when the base station determines the processing delay calibration value according to the TA, it may be determined in combination with the UE access quality information corresponding to the TA.
  • the foregoing UE access quality information may be the access power of the UE, or the bit error rate of the uplink signal corresponding to the UE, etc., which is not limited here.
  • the base station After receiving the random access request sent by the UE in the last adjustment period, the base station can determine the TA of the UE based on the random access request, and can measure the access quality information of the UE at the same time.
  • S202 Screen all the obtained TAs according to the UE access quality information, and obtain multiple candidate TAs that meet preset access requirements.
  • the base station may screen all TAs according to UE access quality information to obtain multiple candidate TAs that meet the access requirements. That is to say, when the base station considers that the UE access quality information meets the preset access requirements, the selected candidate TA can more accurately characterize the positive and negative deviation of the uplink delay. For example, in the last adjustment period corresponding to N random access requests, when the UE access quality information corresponding to random access request 1 meets the preset access requirements, the TA of the UE corresponding to random access request 1 is determined as a candidate TA.
  • the base station may perform screening based on one of the measurement results in the UE access quality information, for example, the access power of the UE, or combine multiple types of measurement results to perform screening. This is not limited.
  • the UE access quality information includes the received signal-to-noise ratio SNR and the received signal strength RSSI.
  • the base station may determine the TA corresponding to the UE access quality information as a candidate TA when the SNR is greater than the preset signal-to-noise ratio threshold and the RSSI is greater than the preset signal strength threshold.
  • S203 Determine a target TA based on the multiple candidate TAs, and adjust the currently stored processing delay calibration value according to the target TA.
  • the base station when the base station determines the target TA based on multiple candidate TAs, it can perform averaging processing on multiple candidate TAs, or perform weighted summation on multiple candidate TAs; in addition, the base station can also use multiple candidate TAs. On the basis of averaging, it is further compared with other values to determine the final target TA, which is not limited here.
  • the base station may also first count the number of candidate TAs, and when the number of candidate TAs is greater than a preset number threshold, then perform averaging processing on multiple candidate TAs.
  • the base station When the base station performs averaging processing on the multiple candidate TAs, it may perform a weighted average on the candidate TAs, or perform an arithmetic average on the candidate TAs, which is not limited here.
  • the base station may remove the largest TA and the smallest TA among multiple candidate TAs, and then calculate the average value of the remaining candidate TAs, and determine it as the target TA.
  • the base station may add a corresponding delay value to the currently stored processing delay calibration according to the target TA, or may determine different adjustment methods according to the size of the target TA, which is not limited here.
  • the base station when the base station determines the processing delay calibration value according to the TA of the UE monitored in the last adjustment period, it can screen all TAs based on the UE access quality information corresponding to the TA to obtain the candidate TA , And determine the processing delay calibration value according to the candidate TA, so that the processing delay calibration value can be more accurate and more adaptable to the current operating status of the base station.
  • Fig. 4 is a schematic flowchart of an uplink delay adjustment method in another embodiment. This embodiment relates to a method for a base station to adjust a currently stored processing delay calibration value according to a target TA. Based on the above embodiment, as shown in Fig. As shown in 4, the above S203 includes:
  • the TA reference value is determined according to the range of the processing delay caused by the base station processing the uplink signal in the historical period.
  • the base station when the base station adjusts the currently stored processing delay calibration value according to the target TA, it may subtract the target TA from the preset TA reference value to obtain the difference.
  • the aforementioned TA reference value is determined according to the range of change of processing delay generated by the base station processing the uplink signal in the historical period.
  • the base station When the difference between the target TA and the TA reference value is less than zero, the base station considers that the negative delay of the uplink signal in the last adjustment period fluctuates greatly, that is, the time when the uplink signal reaches the codec module falls within the indication of the base station The probability before the target time is relatively large; when the difference between the target TA and the TA reference value is greater than zero, the base station considers that the positive delay fluctuation of the uplink signal in the last adjustment period is large, that is, the uplink signal reaches the codec module The probability that the time falls after the target time indicated by the base station is greater.
  • the base station may adjust the currently stored processing delay calibration value according to the above difference. In one of the embodiments, the base station may subtract the above-mentioned difference from the currently stored processing delay calibration value, or may select different adjustment methods according to the positive and negative attributes of the difference, which is not limited here.
  • the base station may add the absolute value of the difference to the currently stored processing delay calibration value.
  • the base station may choose not to adjust the currently stored processing delay calibration value.
  • the TA reference value in the base station is determined based on the variation range of the processing delay caused by the processing of the uplink signal in the historical period, and the current stored value is calculated according to the difference between the target TA and the TA reference value.
  • the processing delay calibration value is adjusted so that the processing delay calibration value can be more in line with the processing delay fluctuations of multiple hardware devices in the base station, thereby more accurately adjusting the uplink delay of the uplink signal.
  • steps in the flowcharts of FIGS. 2-4 are displayed in sequence as indicated by the arrows, these steps are not necessarily executed in sequence in the order indicated by the arrows. Unless specifically stated in this article, the execution of these steps is not strictly limited in order, and these steps can be executed in other orders. Moreover, at least some of the steps in Figures 2-4 may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily executed at the same time, but can be executed at different times. These sub-steps or stages The order of execution does not necessarily need to be performed sequentially, but may be performed alternately or alternately with at least a part of other steps or sub-steps or stages of other steps.
  • an apparatus for adjusting uplink delay including: a receiving module 10 and an adjusting module 20, wherein:
  • the receiving module 10 is configured to receive the uplink signal sent by the user equipment UE in the current adjustment period
  • the adjustment module 20 is configured to adjust the uplink delay of the uplink signal according to a preset processing delay calibration value; wherein the processing delay calibration value is based on the historical UE timing advance monitored in the last adjustment period acquired.
  • the uplink delay adjustment device provided in the embodiment of the present application can implement the foregoing method embodiment, and its implementation principles and technical effects are similar, and details are not described herein again.
  • the foregoing apparatus further includes:
  • the obtaining module 30 is configured to obtain the timing advance TA and UE access quality information of the historical UE corresponding to each historical access request in the last adjustment period;
  • the screening module 40 is configured to screen all the obtained TAs according to the UE access quality information to obtain multiple candidate TAs that meet the preset access requirements;
  • the determining module 50 is configured to determine a target TA based on a plurality of candidate TAs, and adjust the currently stored processing delay calibration value according to the target TA.
  • the foregoing determining module 50 includes:
  • the calculation unit 501 is configured to calculate the difference between the target TA and a preset TA reference value; the TA reference value is determined according to the variation range of the processing delay generated by the base station processing the uplink signal in the historical period;
  • the adjusting unit 502 is configured to adjust the currently stored processing delay calibration value according to the difference.
  • the above-mentioned adjustment unit 502 is configured to: if the difference value is less than zero, add the absolute value of the difference value to the currently stored processing delay calibration value.
  • the above-mentioned determining module 50 is configured to: perform averaging processing on a plurality of candidate TAs to obtain a target TA.
  • the above-mentioned determining module 50 is configured to: when the number of candidate TAs is greater than a preset number threshold, perform averaging processing on multiple candidate TAs.
  • the above-mentioned determining module 50 is configured to remove the largest TA and the smallest TA among the multiple candidate TAs, and calculate the average value of the remaining candidate TAs.
  • the UE access quality information includes the received signal-to-noise ratio SNR and the received signal strength RSSI; the above-mentioned screening module 40 is configured to: when the SNR is greater than a preset signal-to-noise ratio threshold , And when the RSSI is greater than the preset signal strength threshold, the TA corresponding to the UE access quality information is determined as a candidate TA.
  • the uplink delay adjustment device provided in the embodiment of the present application can implement the foregoing method embodiment, and its implementation principles and technical effects are similar, and details are not described herein again.
  • Each module in the above-mentioned uplink delay adjustment device can be implemented in whole or in part by software, hardware and a combination thereof.
  • Each of the above modules may be embedded in the form of hardware or independent of the processor in the computer equipment, or may be stored in the memory of the computer equipment in the form of software, so that the processor can call and execute the operations corresponding to each of the above modules.
  • a base station is provided, and its internal structure diagram may be as shown in FIG. 8.
  • the base station includes a processor, a memory, a network interface, and a database connected by a system bus.
  • the processor of the base station is configured to provide calculation and control capabilities.
  • the memory of the base station includes a non-volatile storage medium and an internal memory.
  • the non-volatile storage medium stores an operating system, a computer program, and a database.
  • the internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage medium.
  • the base station's database is configured to store uplink delay adjustment data.
  • the network interface of the base station is configured to communicate with external terminals through a network connection. When the computer program is executed by the processor, an uplink delay adjustment method is realized.
  • FIG. 8 is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the base station to which the solution of the present application is applied.
  • the base station may include More or fewer components are shown, or some of the components are combined, or have different component arrangements.
  • a base station including a memory and a processor, a computer program is stored in the memory, and the processor implements the following steps when the processor executes the computer program:
  • the processor further implements the following steps when executing the computer program: acquiring the historical UE timing advance TA and UE access quality information corresponding to each historical access request in the last adjustment period; according to the UE access quality information All the obtained TAs are screened to obtain multiple candidate TAs that meet the preset access requirements; the target TA is determined based on the multiple candidate TAs, and the currently stored processing delay calibration value is adjusted according to the target TA.
  • the processor further implements the following steps when executing the computer program: calculating the difference between the target TA and the preset TA reference value; the TA reference value is based on the processing delay generated by the base station processing the uplink signal in the historical period The change range is determined; adjust the currently stored processing delay calibration value according to the difference.
  • the processor further implements the following steps when executing the computer program: if the difference is less than zero, the absolute value of the difference is added to the currently stored processing delay calibration value.
  • the processor further implements the following steps when executing the computer program: averaging multiple candidate TAs to obtain the target TA.
  • the processor further implements the following step when executing the computer program: in the case where the number of candidate TAs is greater than a preset number threshold, averaging processing is performed on a plurality of candidate TAs.
  • the processor further implements the following steps when executing the computer program: remove the largest TA and the smallest TA among the multiple candidate TAs, and calculate the average value of the remaining candidate TAs.
  • the UE access quality information includes the received signal-to-noise ratio SNR and the received signal strength RSSI; when the processor executes the computer program, the following steps are also implemented: when the SNR is greater than the preset signal-to-noise ratio threshold, and the RSSI is greater than the preset When the signal strength threshold is set, the TA corresponding to the UE access quality information is determined as the candidate TA.
  • a computer-readable storage medium on which a computer program is stored, and when the computer program is executed by a processor, the following steps are implemented:
  • the following steps are also implemented: obtaining the historical UE timing advance TA and UE access quality information corresponding to each historical access request in the last adjustment period; according to the UE access quality The information screens all the acquired TAs to obtain multiple candidate TAs that meet the preset access requirements; determines the target TA based on the multiple candidate TAs, and adjusts the currently stored processing delay calibration value according to the target TA.
  • the following steps are also implemented: calculating the difference between the target TA and the preset TA reference value; the TA reference value is based on the processing delay generated by the base station processing the uplink signal in the historical period The range of change is determined; adjust the currently stored processing delay calibration value according to the difference.
  • the following steps are further implemented: if the difference is less than zero, the absolute value of the difference is added to the currently stored processing delay calibration value.
  • the following steps are further implemented: performing average processing on multiple candidate TAs to obtain the target TA.
  • the following step is further implemented: in the case where the number of candidate TAs is greater than a preset number threshold, averaging processing is performed on multiple candidate TAs.
  • the following steps are further implemented: remove the largest TA and the smallest TA among the multiple candidate TAs, and calculate the average value of the remaining candidate TAs.
  • the UE access quality information includes the received signal-to-noise ratio SNR and the received signal strength RSSI; when the computer program is executed by the processor, the following steps are also implemented: when the SNR is greater than the preset signal-to-noise ratio threshold, and the RSSI is greater than When the preset signal strength threshold is used, the TA corresponding to the UE access quality information is determined as the candidate TA.
  • Non-volatile memory may include read only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory.
  • Volatile memory may include random access memory (RAM) or external cache memory.
  • RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous chain Channel (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.
  • the base station receives the uplink signal sent by the user equipment UE in the current adjustment period; then, adjusts the uplink time of the uplink signal according to the preset processing delay calibration value Delay; Among them, the processing delay calibration value is obtained according to the historical UE timing advance TA monitored in the last adjustment period. Since the processing delay calibration value is obtained based on the TA of the historical UE monitored in the last adjustment period, when the hardware processing delay of the base station fluctuates greatly, the base station can determine the accurate processing time through the TA of the historical UE.
  • Delay calibration value so as to adjust the uplink delay of the uplink signal received in the current adjustment period according to the accurate processing delay calibration value, so that when the adjusted uplink signal reaches the codec processing module in the baseband processing unit, it can be reduced.
  • Small fluctuations in the direction of negative delay are conducive to improving the receiving performance of the base station, making the debugging of the base station smoother, reducing the debugging time and research and development costs, and has strong industrial applicability.

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Abstract

La présente invention se rapporte à un procédé et à un dispositif de réglage de retard temporel de liaison montante, à une station de base, et à un support de stockage. La station de base reçoit, dans la période de réglage courante, un signal de liaison montante envoyé par un équipement utilisateur (UE), puis règle un retard temporel de liaison montante du signal de liaison montante selon une valeur d'étalonnage de retard temporel de traitement prédéfinie, la valeur d'étalonnage de retard temporel de traitement étant obtenue selon une avance temporelle (TA), surveillée dans la période de réglage précédente, d'un UE historique. L'adoption du procédé peut réduire la fluctuation du retard temporel de liaison montante du signal de liaison montante dans une direction de retard temporel négative, est bénéfique pour améliorer les performances de réception de la station de base, rend le débogage de la station de base plus lisse, et réduit la durée de débogage et les coûts de recherche et de développement.
PCT/CN2020/139473 2019-12-31 2020-12-25 Procédé et dispositif de réglage de retard temporel de liaison montante, station de base, et support de stockage WO2021136095A1 (fr)

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