WO2021136095A1

WO2021136095A1 - Uplink time delay adjusting method and device, base station, and storage medium

Info

Publication number: WO2021136095A1
Application number: PCT/CN2020/139473
Authority: WO
Inventors: 阮俊冰; 刘建青
Original assignee: 京信网络***股份有限公司
Priority date: 2019-12-31
Filing date: 2020-12-25
Publication date: 2021-07-08
Also published as: CN111182566B; CN111182566A

Abstract

The present invention relates to an uplink time delay adjusting method and device, a base station, and a storage medium. The base station receives, within the current adjustment period, an uplink signal sent by a user equipment (UE), and then adjusts an uplink time delay of the uplink signal according to a preset processing time delay calibration value, wherein the processing time delay calibration value is obtained according to a timing advance (TA), monitored within the previous adjustment period, of a historical UE. Adopting the method can reduce the fluctuation of the uplink time delay of the uplink signal in a negative time delay direction, is beneficial to improve the receiving performance of the base station, makes the debugging of the base station more smooth, and reduces the debugging time duration and research and development costs.

Description

上行时延的调整方法、装置、基站和存储介质Uplink delay adjustment method, device, base station and storage medium

本公开要求于2019年12月31日提交中国专利局、申请号为201911420967.4、发明名称为“上行时延的调整方法、装置、基站和存储介质”的中国专利申请的优先权，其全部内容通过引用结合在本公开中。This disclosure claims the priority of a Chinese patent application filed with the Chinese Patent Office on December 31, 2019, the application number is 201911420967.4, and the invention title is "Uplink Delay Adjustment Method, Apparatus, Base Station, and Storage Medium". The entire content is approved Reference is incorporated in this disclosure.

技术领域Technical field

本公开涉及通信技术领域，尤其涉及一种上行时延的调整方法、装置、基站和存储介质。The present disclosure relates to the field of communication technologies, and in particular, to a method, device, base station, and storage medium for adjusting uplink delay.

背景技术Background technique

目前，基于长期演进(long term evolution，简称LTE)或者新空口(new radio，简称NR)等通信技术均采用正交多址技术。为了控制不同终端(User Equipment，简称UE)的上行信号到达基站的时间，基站中的基带处理单元可以设定UE的定时提前量(TimingAdvance，简称TA)，控制UE根据TA提前发送上行信号，使得上行信号经过传输之后，在指定时刻到达基带处理单元。At present, communication technologies based on long term evolution (LTE for short) or new radio (NR for short) all use orthogonal multiple access technology. In order to control the time when the uplink signals of different terminals (User Equipment, UE for short) arrive at the base station, the baseband processing unit in the base station can set the timing advance (Timing Advance, TA for short) of the UE, and control the UE to send uplink signals in advance according to the TA, so that After the uplink signal is transmitted, it arrives at the baseband processing unit at a designated time.

在实际上传输过程中，UE基于TA发送的上行信号经过空间传播会产生传播时延，并且该上行信号也会经过基带处理单元进行处理，在该处理过程中也会存在一定的硬件处理时延。也就是说，上行信号在从UE发送至基带处理单元时所经过的上行时延包括了传播时延和硬件处理时延。因此在调试过程中，为了降低硬件处理过程对上行时延的影响，基带处理单元通常设置一个固定的时延校准值进行补偿，并根据该时延校准值确定上行信号的接收边界，来保证上行信号的块完整性。In the actual transmission process, the uplink signal sent by the UE based on the TA will cause propagation delay through spatial propagation, and the uplink signal will also be processed by the baseband processing unit. There will also be a certain hardware processing delay in the processing process. . That is to say, the uplink delay that the uplink signal passes when it is sent from the UE to the baseband processing unit includes the propagation delay and the hardware processing delay. Therefore, in the debugging process, in order to reduce the impact of the hardware processing on the uplink delay, the baseband processing unit usually sets a fixed delay calibration value to compensate, and determines the receiving boundary of the uplink signal according to the delay calibration value to ensure the uplink The block integrity of the signal.

但是，由于不同基站的硬件板一致性差异，存在硬件处理时延差异，或是前传单元中可编程集成电路(Field Programmable Gate Array，简称FPGA)的处理时延和上电时延抖动，都会导致上行信号的接收边界存在波动，影响数据块的完整性，从而使对数据的解调解码性能下降，影响到上行信号的正常接收，增加了调试时长以及研发成本。However, due to differences in the consistency of the hardware boards of different base stations, there are differences in hardware processing delays, or the processing delays and power-on delay jitter of the Field Programmable Gate Array (FPGA) in the fronthaul unit. The reception boundary of the uplink signal fluctuates, which affects the integrity of the data block, thereby degrading the demodulation and decoding performance of the data, affecting the normal reception of the uplink signal, and increasing the debugging time and research and development costs.

发明内容Summary of the invention

(一)要解决的技术问题(1) Technical problems to be solved

本公开要解决的技术问题是解决现有的对数据的解调码性能下降，影响上行信号的正常接收，增加了调试时长以及研发成本的问题。The technical problem to be solved by the present disclosure is to solve the problems of the existing demodulation code performance degradation of data, which affects the normal reception of the uplink signal, and increases the debugging time and the research and development cost.

(二)技术方案(2) Technical solution

为了解决上述技术问题，本公开实施例提供了一种上行时延的调整方法、装置、基站和存储介质。In order to solve the foregoing technical problems, embodiments of the present disclosure provide a method, device, base station, and storage medium for adjusting uplink delay.

第一方面，本公开实施例提供了一种上行时延的调整方法，上述方法包括：In the first aspect, embodiments of the present disclosure provide a method for adjusting uplink delay, and the above method includes:

在当前调整周期内接收用户设备UE发送的上行信号；Receive the uplink signal sent by the user equipment UE in the current adjustment period;

根据预设的处理时延校准值调整上行信号的上行时延；其中，处理时延校准值为根据上一调整周期内监测到的历史UE的定时提前量TA获得的。Adjust the uplink delay of the uplink signal according to the preset processing delay calibration value; wherein the processing delay calibration value is obtained according to the historical UE timing advance TA monitored in the last adjustment period.

第二方面，本公开实施例还提供了一种上行时延的调整装置，上述装置包括：In the second aspect, an embodiment of the present disclosure also provides an uplink delay adjustment device, and the foregoing device includes:

接收模块，配置为在当前调整周期内接收用户设备UE发送的上行信号；The receiving module is configured to receive the uplink signal sent by the user equipment UE in the current adjustment period;

调整模块，配置为根据预设的处理时延校准值调整上行信号的上行时延；其中，处理时延校准值为根据上一调整周期内监测到的历史UE的定时提前量TA获得的。The adjustment module is configured to adjust the uplink delay of the uplink signal according to a preset processing delay calibration value; wherein the processing delay calibration value is obtained according to the historical UE timing advance TA monitored in the previous adjustment period.

第三方面，本公开实施例还提供了一种基站，包括存储器和处理器，存储器存储有计算机程序，上述处理器执行计算机程序时实现上述上行时延的调整方法的步骤。In a third aspect, embodiments of the present disclosure also provide a base station, including a memory and a processor, the memory stores a computer program, and the processor implements the steps of the uplink delay adjustment method when the computer program is executed by the processor.

第四方面，本公开实施例还提供了一种计算机可读存储介质，其上存储有计算机程序，上述计算机程序被处理器执行时实现上述上行时延的调整方法的步骤。In a fourth aspect, the embodiments of the present disclosure also provide a computer-readable storage medium on which a computer program is stored, and the above-mentioned computer program is executed by a processor to implement the steps of the above-mentioned uplink delay adjustment method.

(三)有益效果(3) Beneficial effects

本公开实施例提供的上述技术方案与现有技术相比具有如下优点：Compared with the prior art, the above-mentioned technical solutions provided by the embodiments of the present disclosure have the following advantages:

本公开实施例提供的上述上行时延的调整方法、装置、基站和存储介质，基站在当前调整周期内接收用户设备UE发送的上行信号；然后，根据预设的处理时延校准值调整上行信号的上行时延；其中，处理时延校准值为根据上一调整周期内监测到的历史UE的定时提前量TA获得的。由于处理时延校准值为根据上一调整周期内监测到的历史UE的TA获得的，因此，当基站的硬件处理时延存在较大波动时，基站可以通过历史UE的TA确定准确的处理时延校准值，从而根据准确的处理时延校准值对当前调整周期中接收到的上行信号的上行时延进行调整，使得调整后的上行信号到达基带处理单元中的编解码处理模块时，可以减小在负时延方向上的波动，有利于提升基站的接收性能，使得基站的调试更加顺利，降低调试时长以及研发成本。According to the above-mentioned uplink delay adjustment method, device, base station and storage medium provided by the embodiments of the present disclosure, the base station receives the uplink signal sent by the user equipment UE in the current adjustment period; then, adjusts the uplink signal according to the preset processing delay calibration value Wherein, the processing delay calibration value is obtained according to the historical UE timing advance TA monitored in the last adjustment period. Since the processing delay calibration value is obtained based on the TA of the historical UE monitored in the last adjustment period, when the hardware processing delay of the base station fluctuates greatly, the base station can determine the accurate processing time through the TA of the historical UE. Delay calibration value, so as to adjust the uplink delay of the uplink signal received in the current adjustment period according to the accurate processing delay calibration value, so that when the adjusted uplink signal reaches the codec processing module in the baseband processing unit, it can be reduced. Small fluctuations in the direction of negative delay are conducive to improving the receiving performance of the base station, making the debugging of the base station smoother, and reducing the debugging time and research and development costs.

附图说明Description of the drawings

图1为一个实施例中上行时延的调整方法的应用环境图；FIG. 1 is an application environment diagram of an uplink delay adjustment method in an embodiment;

图2为一个实施例中上行时延的调整方法的流程示意图；FIG. 2 is a schematic flowchart of a method for adjusting uplink delay in an embodiment;

图3为另一个实施例中上行时延的调整方法的流程示意图；FIG. 3 is a schematic flowchart of a method for adjusting uplink delay in another embodiment;

图4为另一个实施例中上行时延的调整方法的流程示意图；4 is a schematic flowchart of a method for adjusting uplink delay in another embodiment;

图5为一个实施例中上行时延的调整装置的结构框图；FIG. 5 is a structural block diagram of an apparatus for adjusting uplink delay in an embodiment;

图6为另一个实施例中上行时延的调整装置的结构框图；FIG. 6 is a structural block diagram of a device for adjusting uplink delay in another embodiment;

图7为另一个实施例中上行时延的调整装置的结构框图；FIG. 7 is a structural block diagram of a device for adjusting uplink delay in another embodiment;

图8为一个实施例中基站的内部结构图。Fig. 8 is an internal structure diagram of a base station in an embodiment.

具体实施方式Detailed ways

本申请提供的上行时延的调整方法，可以应用于如图1所示的应用环境中。其中，UE100通过网络与基站200通过网络进行通信。其中，UE100可以但不限于是至少一种个人计算机、笔记本电脑、智能手机、平板电脑和便携式可穿戴设备，上述基站200可以但不限于宏基站、微基站以及小基站等类型的基站设备，可以是全球移动通讯(Global System ofMobile communication，简称GSM)或码分多址(Code Division Multiple Access，简称CDMA)中的基站(Base Transceiver Station，简称BTS)，也可以是宽带码分多址(WidebandCode Division Multiple Access，简称WCDMA)中的基站(NodeB，简称NB)，还可以是LTE中的演进型基站(Evolutional Node B，简称eNB或eNodeB)，或者中继站或接入点，或者未来5G网络中的基站、客户前置设备(Customer Premise Equipment，简称CPE)等，在此并不限定。The uplink delay adjustment method provided in this application can be applied to the application environment as shown in FIG. 1. Among them, the UE 100 communicates with the base station 200 through the network through the network. Among them, the UE 100 can be, but is not limited to, at least one type of personal computer, notebook computer, smart phone, tablet computer, and portable wearable device. The base station 200 can be, but is not limited to, macro base stations, micro base stations, and small base stations. It is the base station (Base Transceiver Station, BTS) in Global System of Mobile communication (GSM) or Code Division Multiple Access (CDMA), or it can be Wideband Code Division Multiple Access (Wideband Code Division). The base station (NodeB, NB for short) in Multiple Access (WCDMA for short) can also be an Evolutional Node B (eNB or eNodeB for short) in LTE, or a relay station or access point, or a base station in the future 5G network , Customer Premise Equipment (CPE), etc., are not limited here.

在一个实施例中，如图2所示，提供了一种方法，以该方法应用于图1中的基站为例进行说明，包括：In an embodiment, as shown in FIG. 2, a method is provided, and the method is applied to the base station in FIG. 1 as an example for description, including:

S101、在当前调整周期内接收用户设备UE发送的上行信号。S101. Receive an uplink signal sent by a user equipment UE in a current adjustment period.

其中，上述调整周期为基站中设定的，用于调整处理时延校准值的周期，上述处理时延校准值用于调整上行信号的上行时延。Wherein, the above adjustment period is a period set in the base station and used to adjust the processing delay calibration value, and the above processing delay calibration value is used to adjust the uplink delay of the uplink signal.

上述调整周期可以是5分钟，也可以是3分钟，可以根据基站的实际运行情况进行调整，在此不做限定。The above adjustment period can be 5 minutes or 3 minutes, and can be adjusted according to the actual operating conditions of the base station, which is not limited here.

上述UE可以是手机终端，也可以是接入基站的其它通信设备，在此不做限定。The aforementioned UE may be a mobile phone terminal or other communication equipment that accesses the base station, which is not limited here.

S102、根据预设的处理时延校准值调整上行信号的上行时延；其中，处理时延校准值为根据上一调整周期内监测到的历史UE的定时提前量TA获得的。S102. Adjust the uplink delay of the uplink signal according to a preset processing delay calibration value; wherein the processing delay calibration value is obtained according to the historical UE timing advance TA monitored in the last adjustment period.

其中，上述上行时延是指上行信号从UE发送端开始，至基站的基带处理单元对上行信号开始进行快速傅里叶逆变换(Inverse Fast Fourier Transform，简称IFFT)处理之间的时长。UE发送的上行信号经过空间传播会产生传播时延，然后上行信号经过天线接收、射频处理等过程中，会产生一定的硬件链路处理时延，以及前传单元中可编程集成电路(Field Programmable Gate Array，简称FPGA)的信号处理时延和上电时延抖动误差。The above-mentioned uplink delay refers to the length of time between the uplink signal starting from the UE sending end and the baseband processing unit of the base station starting to perform inverse Fast Fourier Transform (IFFT) processing on the uplink signal. The uplink signal sent by the UE propagates through space and will cause propagation delay, and then the uplink signal will be received by the antenna, radio frequency processing, etc., will produce a certain hardware link processing delay, and the programmable integrated circuit (Field Programmable Gate) in the fronthaul unit Array, FPGA for short) signal processing delay and power-on delay jitter error.

基站通过资源调度为上述UE配置了时域资源之后，UE需要按照基站指示的上行提前量提前发送上行信号，使得上行信号按照时域资源对应的目标时刻到达基带处理单元。由于不同的基站设备中多个硬件一致性差异，存在处理时延误差，以及前传单元(FPGA)对信号的处理时延和上电时延抖动误差，基站可以通过设置处理时延校准值以对上行时延进行校准；也就是说上行信号的上行时延包括传播时延、硬件处理时延以及前传单元(FPGA)对信号的处理时延和上电时延抖动误差。After the base station configures time domain resources for the aforementioned UE through resource scheduling, the UE needs to send uplink signals in advance according to the uplink advance indicated by the base station, so that the uplink signals arrive at the baseband processing unit at the target time corresponding to the time domain resources. Due to the differences in the consistency of multiple hardware in different base station equipment, there are processing delay errors, as well as the signal processing delay and power-on delay jitter error of the fronthaul unit (FPGA). The base station can set the processing delay calibration value to correct The uplink delay is calibrated; that is, the uplink delay of the uplink signal includes propagation delay, hardware processing delay, signal processing delay and power-on delay jitter error of the fronthaul unit (FPGA).

在上述处理时延校准值为固定值的情况下，由于硬件设备的不一致性带来硬件处理时延波动较大，以及前传单元(FPGA)的上电时延抖动误差；在基站重复上电过程中，上行信号边界的确定会存在误差，可能会截取到前一块信号的尾部数据，产生正时延；也可能会截取到后一块数据的头部数据，产生负时延。当负时延较大时，会导致部分上行信号的数据块不能被正常处理，降低基站的接收性能，影响基站的调试进度。In the case of the above-mentioned processing delay calibration value being a fixed value, the hardware processing delay fluctuates greatly due to the inconsistency of hardware equipment, and the power-on delay jitter error of the fronthaul unit (FPGA); repeat the power-on process at the base station , There will be errors in the determination of the upstream signal boundary, and the tail data of the previous block of signal may be intercepted, resulting in a positive delay; or the head data of the following block of data may be intercepted, resulting in a negative delay. When the negative delay is large, some data blocks of the uplink signal cannot be processed normally, which reduces the receiving performance of the base station and affects the debugging progress of the base station.

因此，本申请通过上一调整周期内监测到的历史UE的定时提前量TA，对上述处理时延校准值进行调整。基站可以获取上一调整周期内接收到的随机接入请求，然后根据随机接入请求获取历史UE的定时提前TA，然后对历史UE的TA进行分析计算，获得上述处理时延校准值。Therefore, the present application adjusts the above-mentioned processing delay calibration value through the historical UE timing advance TA monitored in the last adjustment period. The base station may obtain the random access request received in the last adjustment period, and then obtain the timing advance TA of the historical UE according to the random access request, and then analyze and calculate the TA of the historical UE to obtain the above-mentioned processing delay calibration value.

其中，上述随机接入请求可以是一个历史UE向基站发送的多次接入请求，也可以是不同历史UE发送的，在此不做限定。The foregoing random access request may be multiple access requests sent by a historical UE to the base station, or may be sent by different historical UEs, which is not limited here.

在其中一个实施例中，基站可以对所有的TA进行统计分析，获得处理时延校准值；也可以结合其它参数对TA进行筛选之后，再进行统计分析处理时延校准值；在此不做限定。In one of the embodiments, the base station can perform statistical analysis on all TAs to obtain the processing delay calibration value; it can also perform statistical analysis on the processing delay calibration value after filtering the TA in combination with other parameters; it is not limited here. .

在其中一个实施例中，基站在根据统计分析结果获得处理时延校准值时，可以根据统计分析结果确定对处理时延校准值的调整量，然后在当前处理时延校准值的基础上对其进行调整；或者，也可以根据统计分析结果直接确定一个新的处理时延校准值，在此不做限定。基站根据上一调整周期内监测到的TA获得处理时延校准值，可以使处理时延校准值能更准确地对上行信号的上行时延进行调整。In one of the embodiments, when the base station obtains the processing delay calibration value according to the statistical analysis result, the base station may determine the adjustment amount to the processing delay calibration value according to the statistical analysis result, and then adjust the processing delay calibration value based on the current processing delay calibration value. Make adjustments; or, you can directly determine a new processing delay calibration value based on the statistical analysis results, which is not limited here. The base station obtains the processing delay calibration value according to the TA monitored in the last adjustment period, so that the processing delay calibration value can more accurately adjust the uplink delay of the uplink signal.

基站在根据处理时延校准值调整上行信号的上行时延时，可以根据处理时延校准值对上行信号的边界进行重新界定，尽可能保证当前上行信号块的完整性，减小负时延波动大小。The base station adjusts the uplink time delay of the uplink signal according to the processing delay calibration value, and can redefine the boundary of the uplink signal according to the processing delay calibration value to ensure the integrity of the current uplink signal block as much as possible and reduce the negative delay fluctuation size.

上述上行时延的调整方法，基站在当前调整周期内接收用户设备UE发送的上行信号；然后，根据预设的处理时延校准值调整上行信号的上行时延；其中，处理时延校准值为根据上一调整周期内监测到的历史UE的定时提前量TA获得的。由于处理时延校准值为根据上一调整周期内监测到的历史UE的TA获得的，因此，当基站的硬件处理时延存在较大波动时，基站可以通过历史UE的TA确定准确的处理时延校准值，从而根据准确的处理时延校准值对当前调整周期中接收到的上行信号的上行时延进行调整，使得调整后的上行信号到达基带处理单元中的编解码处理模块时，可以减小在负时延方向上的波动，有利于提升基站的接收性能，使得基站的调试更加顺利，降低调试时长以及研发成本。In the above uplink delay adjustment method, the base station receives the uplink signal sent by the user equipment UE in the current adjustment period; then, adjusts the uplink delay of the uplink signal according to the preset processing delay calibration value; where the processing delay calibration value is Obtained according to the historical UE timing advance TA monitored in the last adjustment period. Since the processing delay calibration value is obtained based on the TA of the historical UE monitored in the last adjustment period, when the hardware processing delay of the base station fluctuates greatly, the base station can determine the accurate processing time through the TA of the historical UE. Delay calibration value, so as to adjust the uplink delay of the uplink signal received in the current adjustment period according to the accurate processing delay calibration value, so that when the adjusted uplink signal reaches the codec processing module in the baseband processing unit, it can be reduced. Small fluctuations in the direction of negative delay are conducive to improving the receiving performance of the base station, making the debugging of the base station smoother, and reducing the debugging time and research and development costs.

图3为另一个实施例中上行时延的调整方法的流程示意图，本实施例涉及基站确定处理时延校准值的一种方式，在上述实施例的基础上，如图3所示，上述方法还包括：Fig. 3 is a schematic flowchart of a method for adjusting uplink delay in another embodiment. This embodiment relates to a method for a base station to determine a processing delay calibration value. On the basis of the foregoing embodiment, as shown in Fig. 3, the foregoing method Also includes:

S201、获取上一调整周期内每个历史接入请求对应的UE的定时提前TA以及UE接入质量信息。S201: Acquire the UE's timing advance TA and UE access quality information corresponding to each historical access request in the last adjustment period.

在其中一个实施例中，基站在根据TA确定处理时延校准值时，可以结合TA对应的UE接入质量信息来确定。其中，上述UE接入质量信息可以是UE的接入功率，也可以是UE对应的上行信号的误码率等，在此不做限定。In one of the embodiments, when the base station determines the processing delay calibration value according to the TA, it may be determined in combination with the UE access quality information corresponding to the TA. Wherein, the foregoing UE access quality information may be the access power of the UE, or the bit error rate of the uplink signal corresponding to the UE, etc., which is not limited here.

基站在上一调整周期中，接收到UE发送的随机接入请求之后，可以基于随机接入请求确定UE的TA，同时可以对UE的接入质量信息进行测量。After receiving the random access request sent by the UE in the last adjustment period, the base station can determine the TA of the UE based on the random access request, and can measure the access quality information of the UE at the same time.

S202、根据UE接入质量信息对获取的所有TA进行筛选，获得满足预设接入要求的多个候选TA。S202: Screen all the obtained TAs according to the UE access quality information, and obtain multiple candidate TAs that meet preset access requirements.

在其中一个实施例中，基站可以根据UE接入质量信息对所有TA进行筛选，以获得满足接入要求的多个候选TA。也就是说，基站认为UE接入质量信息满足预设接入要求时，所筛选出的候选TA可以更准确地表征上行时延的正负偏差。例如，在上一调整周期中对应N个随机接入请求，随机接入请求1对应的UE接入质量信息满足预设接入要求时，则确定随机接入请求1对应的UE的TA为候选TA。In one of the embodiments, the base station may screen all TAs according to UE access quality information to obtain multiple candidate TAs that meet the access requirements. That is to say, when the base station considers that the UE access quality information meets the preset access requirements, the selected candidate TA can more accurately characterize the positive and negative deviation of the uplink delay. For example, in the last adjustment period corresponding to N random access requests, when the UE access quality information corresponding to random access request 1 meets the preset access requirements, the TA of the UE corresponding to random access request 1 is determined as a candidate TA.

在其中一个实施例中，基站可以根据UE接入质量信息中的其中一个测量结果，例如UE的接入功率，来进行筛选，也可以结合多种类型的测量结果共同筛选，对于上述筛选方式在此不做限定。In one of the embodiments, the base station may perform screening based on one of the measurement results in the UE access quality information, for example, the access power of the UE, or combine multiple types of measurement results to perform screening. This is not limited.

可选地，UE接入质量信息包括接收信噪比SNR，以及接收信号强度RSSI。基站可以在SNR大于预设的信噪比阈值，且RSSI大于预设的信号强度阈值时，将UE接入质量信息对应的TA确定为候选TA。Optionally, the UE access quality information includes the received signal-to-noise ratio SNR and the received signal strength RSSI. The base station may determine the TA corresponding to the UE access quality information as a candidate TA when the SNR is greater than the preset signal-to-noise ratio threshold and the RSSI is greater than the preset signal strength threshold.

S203、基于多个候选TA确定目标TA，并根据目标TA调整当前存储的处理时延校准值。S203: Determine a target TA based on the multiple candidate TAs, and adjust the currently stored processing delay calibration value according to the target TA.

在其中一个实施例中，基站根据多个候选TA确定目标TA时，可以对多个候选TA进行平均处理，也可以对多个候选TA进行加权求和；另外，基站还可以在多个候选TA进行平均的基础上进一步与其它值进行比较，确定最终的目标TA，在此不做限定。In one of the embodiments, when the base station determines the target TA based on multiple candidate TAs, it can perform averaging processing on multiple candidate TAs, or perform weighted summation on multiple candidate TAs; in addition, the base station can also use multiple candidate TAs. On the basis of averaging, it is further compared with other values to determine the final target TA, which is not limited here.

可选地，基站还可以先统计候选TA的数量，当候选TA的数量大于预设数量阈值的情况下，再对多个候选TA进行平均处理。Optionally, the base station may also first count the number of candidate TAs, and when the number of candidate TAs is greater than a preset number threshold, then perform averaging processing on multiple candidate TAs.

基站在对上述多个候选TA进行平均处理时，可以对候选TA进行加权平均，也可以对候选TA进行算术平均，在此不作限定。When the base station performs averaging processing on the multiple candidate TAs, it may perform a weighted average on the candidate TAs, or perform an arithmetic average on the candidate TAs, which is not limited here.

可选地，基站可以去掉多个候选TA中的最大TA和最小TA，然后计算剩余候选TA的平均值，确定为目标TA。Optionally, the base station may remove the largest TA and the smallest TA among multiple candidate TAs, and then calculate the average value of the remaining candidate TAs, and determine it as the target TA.

在确定了目标TA之后，可以根据目标TA在当前存储的处理时延校准值上进行调整。其中，基站可以根据目标TA，在当前存储的处理时延校准上增加相应的时延值，也可以根据目标TA的大小，确定不同的调整方式，在此不做限定。After the target TA is determined, adjustments can be made on the currently stored processing delay calibration value according to the target TA. Among them, the base station may add a corresponding delay value to the currently stored processing delay calibration according to the target TA, or may determine different adjustment methods according to the size of the target TA, which is not limited here.

上述上行时延的调整方法，基站在根据上一调整周期内监测到的UE的TA确定处理时延校准值时，可以根据TA对应的UE接入质量信息对所有的TA进行筛选获得的候选TA，并根据候选TA确定处理时延校准值，使得处理时延校准值可以更准确，更能适应当前基站的运行状态。In the above uplink delay adjustment method, when the base station determines the processing delay calibration value according to the TA of the UE monitored in the last adjustment period, it can screen all TAs based on the UE access quality information corresponding to the TA to obtain the candidate TA , And determine the processing delay calibration value according to the candidate TA, so that the processing delay calibration value can be more accurate and more adaptable to the current operating status of the base station.

图4为另一个实施例中上行时延的调整方法的流程示意图，本实施例涉及基站根据目标TA调整当前存储的处理时延校准值的一种方式，在上述实施例的基础上，如图4所示，上述S203包括：Fig. 4 is a schematic flowchart of an uplink delay adjustment method in another embodiment. This embodiment relates to a method for a base station to adjust a currently stored processing delay calibration value according to a target TA. Based on the above embodiment, as shown in Fig. As shown in 4, the above S203 includes:

S301、计算目标TA与预设的TA参考值的差值；TA参考值根据基站对历史周期内上行信号进行处理产生的处理时延的变化范围确定。S301. Calculate the difference between the target TA and a preset TA reference value; the TA reference value is determined according to the range of the processing delay caused by the base station processing the uplink signal in the historical period.

在其中一个实施例中，基站根据目标TA调整当前存储的处理时延校准值时，可以将目标TA与预设的TA参考值进行相减，获得差值。其中，上述TA参考值为根据基站对历史周期内上行信号进行处理，产生的处理时延的变化范围确定的。In one of the embodiments, when the base station adjusts the currently stored processing delay calibration value according to the target TA, it may subtract the target TA from the preset TA reference value to obtain the difference. Wherein, the aforementioned TA reference value is determined according to the range of change of processing delay generated by the base station processing the uplink signal in the historical period.

当目标TA与TA参考值的差值小于零时，基站认为上一调整周期内上行信号的上行时延中负时延波动较大，也就是上行信号达到编解码模块的时间落在基站指示的目标时刻之前的概率较大；当目标TA与TA参考值的差值大于零时，基站认为上一调整周期内上行信号的上行时延中正时延波动较大，也就是上行信号达到编解码模块的时间落在基站指示的目标时刻之后的概率较大。When the difference between the target TA and the TA reference value is less than zero, the base station considers that the negative delay of the uplink signal in the last adjustment period fluctuates greatly, that is, the time when the uplink signal reaches the codec module falls within the indication of the base station The probability before the target time is relatively large; when the difference between the target TA and the TA reference value is greater than zero, the base station considers that the positive delay fluctuation of the uplink signal in the last adjustment period is large, that is, the uplink signal reaches the codec module The probability that the time falls after the target time indicated by the base station is greater.

S302、根据差值调整当前存储的处理时延校准值。S302: Adjust the currently stored processing delay calibration value according to the difference.

在其中一个实施例中，基站可以根据上述差值对当前存储的处理时延校准值进行调整。在其中一个实施例中，基站可以在当前存储的处理时延校准值的基础上减去上述差值，也可以根据差值的正负属性，选择不同的调整方式，在此不做限定。In one of the embodiments, the base station may adjust the currently stored processing delay calibration value according to the above difference. In one of the embodiments, the base station may subtract the above-mentioned difference from the currently stored processing delay calibration value, or may select different adjustment methods according to the positive and negative attributes of the difference, which is not limited here.

可选地，若差值小于零，则基站可以在当前存储的处理时延校准值上增加差值的绝对值。相应地，若差值大于等于零，为了避免负时延方向上波动较大，基站可以选择不对当前存储的处理时延校准值进行调整。Optionally, if the difference is less than zero, the base station may add the absolute value of the difference to the currently stored processing delay calibration value. Correspondingly, if the difference is greater than or equal to zero, in order to avoid large fluctuations in the negative delay direction, the base station may choose not to adjust the currently stored processing delay calibration value.

上述上行时延的调整方法，由于基站中的TA参考值是基于历史周期内上行信号进行处理产生的处理时延的变化范围确定的，并根据目标TA与TA参考值的差值对当前存储的处理时延校准值进行调整，使得处理时延校准值可以更符合基站中的多个硬件设备的处理时延波动情况，从而更准确地对上行信号的上行时延进行调整。In the above-mentioned uplink delay adjustment method, the TA reference value in the base station is determined based on the variation range of the processing delay caused by the processing of the uplink signal in the historical period, and the current stored value is calculated according to the difference between the target TA and the TA reference value. The processing delay calibration value is adjusted so that the processing delay calibration value can be more in line with the processing delay fluctuations of multiple hardware devices in the base station, thereby more accurately adjusting the uplink delay of the uplink signal.

应该理解的是，虽然图2-4的流程图中的多个步骤按照箭头的指示依次显示，但是这些步骤并不是必然按照箭头指示的顺序依次执行。除非本文中有明确的说明，这些步骤的执行并没有严格的顺序限制，这些步骤可以以其它的顺序执行。而且，图2-4中的至少一部分步骤可以包括多个子步骤或者多个阶段，这些子步骤或者阶段并不必然是在同一时刻执行完成，而是可以在不同的时刻执行，这些子步骤或者阶段的执行顺序也不用必然的依次进行，而是可以与其它步骤或者其它步骤的子步骤或者阶段的至少一部分轮流或者交替地执行。It should be understood that, although multiple steps in the flowcharts of FIGS. 2-4 are displayed in sequence as indicated by the arrows, these steps are not necessarily executed in sequence in the order indicated by the arrows. Unless specifically stated in this article, the execution of these steps is not strictly limited in order, and these steps can be executed in other orders. Moreover, at least some of the steps in Figures 2-4 may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily executed at the same time, but can be executed at different times. These sub-steps or stages The order of execution does not necessarily need to be performed sequentially, but may be performed alternately or alternately with at least a part of other steps or sub-steps or stages of other steps.

在一个实施例中，如图5所示，提供了一种上行时延的调整装置，包括：接收模块10和调整模块20，其中：In one embodiment, as shown in FIG. 5, an apparatus for adjusting uplink delay is provided, including: a receiving module 10 and an adjusting module 20, wherein:

接收模块10，配置为在当前调整周期内接收用户设备UE发送的上行信号；The receiving module 10 is configured to receive the uplink signal sent by the user equipment UE in the current adjustment period;

调整模块20，配置为根据预设的处理时延校准值调整所述上行信号的上行时延；其中，所述处理时延校准值为根据上一调整周期内监测到的历史UE的定时提前量获得的。The adjustment module 20 is configured to adjust the uplink delay of the uplink signal according to a preset processing delay calibration value; wherein the processing delay calibration value is based on the historical UE timing advance monitored in the last adjustment period acquired.

本申请实施例提供的上行时延的调整装置，可以实现上述方法实施例，其实现原理和技术效果类似，在此不再赘述。The uplink delay adjustment device provided in the embodiment of the present application can implement the foregoing method embodiment, and its implementation principles and technical effects are similar, and details are not described herein again.

在一个实施例中，在上述实施例的基础上，如图6所示，上述装置还包括：In an embodiment, on the basis of the foregoing embodiment, as shown in FIG. 6, the foregoing apparatus further includes:

获取模块30，配置为获取上一调整周期内每个历史接入请求对应的历史UE的定时提前TA以及UE接入质量信息；The obtaining module 30 is configured to obtain the timing advance TA and UE access quality information of the historical UE corresponding to each historical access request in the last adjustment period;

筛选模块40，配置为根据UE接入质量信息对获取的所有TA进行筛选，获得满足预设接入要求的多个候选TA；The screening module 40 is configured to screen all the obtained TAs according to the UE access quality information to obtain multiple candidate TAs that meet the preset access requirements;

确定模块50，配置为基于多个候选TA确定目标TA，并根据目标TA调整当前存储的处理时延校准值。The determining module 50 is configured to determine a target TA based on a plurality of candidate TAs, and adjust the currently stored processing delay calibration value according to the target TA.

在一个实施例中，在上述实施例的基础上，如图7所示，上述确定模块50包括：In an embodiment, on the basis of the foregoing embodiment, as shown in FIG. 7, the foregoing determining module 50 includes:

计算单元501，配置为计算目标TA与预设的TA参考值的差值；TA参考值根据基站对历史周期内上行信号进行处理产生的处理时延的变化范围确定；The calculation unit 501 is configured to calculate the difference between the target TA and a preset TA reference value; the TA reference value is determined according to the variation range of the processing delay generated by the base station processing the uplink signal in the historical period;

调整单元502，配置为根据差值调整当前存储的处理时延校准值。The adjusting unit 502 is configured to adjust the currently stored processing delay calibration value according to the difference.

在一个实施例中，在上述实施例的基础上，上述调整单元502是配置为：若差值小于零，则在当前存储的处理时延校准值上增加差值的绝对值。In one embodiment, on the basis of the above-mentioned embodiment, the above-mentioned adjustment unit 502 is configured to: if the difference value is less than zero, add the absolute value of the difference value to the currently stored processing delay calibration value.

在一个实施例中，在上述实施例的基础上，上述确定模块50是配置为：对多个候选TA进行平均处理，获得目标TA。In one embodiment, on the basis of the above-mentioned embodiment, the above-mentioned determining module 50 is configured to: perform averaging processing on a plurality of candidate TAs to obtain a target TA.

在一个实施例中，在上述实施例的基础上，上述确定模块50是配置为：在候选TA的数量大于预设数量阈值的情况下，对多个候选TA进行平均处理。In one embodiment, on the basis of the above-mentioned embodiment, the above-mentioned determining module 50 is configured to: when the number of candidate TAs is greater than a preset number threshold, perform averaging processing on multiple candidate TAs.

在一个实施例中，在上述实施例的基础上，上述确定模块50是配置为：去掉多个候选TA中的最大TA和最小TA，计算剩余候选TA的平均值。In one embodiment, on the basis of the above-mentioned embodiment, the above-mentioned determining module 50 is configured to remove the largest TA and the smallest TA among the multiple candidate TAs, and calculate the average value of the remaining candidate TAs.

在一个实施例中，在上述实施例的基础上，UE接入质量信息包括接收信噪比SNR，以及接收信号强度RSSI；上述筛选模块40是配置为：在SNR大于预设的信噪比阈值，且RSSI大于预设的信号强度阈值时，将UE接入质量信息对应的TA确定为候选TA。In one embodiment, on the basis of the above-mentioned embodiment, the UE access quality information includes the received signal-to-noise ratio SNR and the received signal strength RSSI; the above-mentioned screening module 40 is configured to: when the SNR is greater than a preset signal-to-noise ratio threshold , And when the RSSI is greater than the preset signal strength threshold, the TA corresponding to the UE access quality information is determined as a candidate TA.

关于上行时延的调整装置的具体限定可以参见上文中对于上行时延的调整方法的限定，在此不再赘述。上述上行时延的调整装置中的每个模块可全部或部分通过软件、硬件及其组合来实现。上述每个模块可以硬件形式内嵌于或独立于计算机设备中的处理器中，也可以以软件形式存储于计算机设备中的存储器中，以便于处理器调用执行以上每个模块对应的操作。For the specific definition of the uplink delay adjustment device, please refer to the above definition of the uplink delay adjustment method, which will not be repeated here. Each module in the above-mentioned uplink delay adjustment device can be implemented in whole or in part by software, hardware and a combination thereof. Each of the above modules may be embedded in the form of hardware or independent of the processor in the computer equipment, or may be stored in the memory of the computer equipment in the form of software, so that the processor can call and execute the operations corresponding to each of the above modules.

在一个实施例中，提供了一种基站，其内部结构图可以如图8所示。该基站包括通过***总线连接的处理器、存储器、网络接口和数据库。其中，该基站的处理器配置为提供计算和控制能力。该基站的存储器包括非易失性存储介质、内存储器。该非易失性存储介质存储有操作***、计算机程序和数据库。该内存储器为非易失性存储介质中的操作***和计算机程序的运行提供环境。该基站的数据库配置为存储上行时延的调整数据。该基站的网络接口配置为与外部的终端通过网络连接通信。该计算机程序被处理器执行时以实现一种上行时延的调整方法。In one embodiment, a base station is provided, and its internal structure diagram may be as shown in FIG. 8. The base station includes a processor, a memory, a network interface, and a database connected by a system bus. Among them, the processor of the base station is configured to provide calculation and control capabilities. The memory of the base station includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program, and a database. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage medium. The base station's database is configured to store uplink delay adjustment data. The network interface of the base station is configured to communicate with external terminals through a network connection. When the computer program is executed by the processor, an uplink delay adjustment method is realized.

本领域技术人员可以理解，图8中示出的结构，仅仅是与本申请方案相关的部分结构的框图，并不构成对本申请方案所应用于其上的基站的限定，基站可以包括比图中所示更多或更少的部件，或者组合部分部件，或者具有不同的部件布置。Those skilled in the art can understand that the structure shown in FIG. 8 is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the base station to which the solution of the present application is applied. The base station may include More or fewer components are shown, or some of the components are combined, or have different component arrangements.

在一个实施例中，提供了一种基站，包括存储器和处理器，存储器中存储有计算机程序，该处理器执行计算机程序时实现以下步骤：In one embodiment, a base station is provided, including a memory and a processor, a computer program is stored in the memory, and the processor implements the following steps when the processor executes the computer program:

在一个实施例中，处理器执行计算机程序时还实现以下步骤：获取上一调整周期内每个历史接入请求对应的历史UE的定时提前TA以及UE接入质量信息；根据UE接入质量信息对获取的所有TA进行筛选，获得满足预设接入要求的多个候选TA；基于多个候选TA确定目标TA，并根据目标TA调整当前存储的处理时延校准值。In one embodiment, the processor further implements the following steps when executing the computer program: acquiring the historical UE timing advance TA and UE access quality information corresponding to each historical access request in the last adjustment period; according to the UE access quality information All the obtained TAs are screened to obtain multiple candidate TAs that meet the preset access requirements; the target TA is determined based on the multiple candidate TAs, and the currently stored processing delay calibration value is adjusted according to the target TA.

在一个实施例中，处理器执行计算机程序时还实现以下步骤：计算目标TA与预设的TA参考值的差值；TA参考值根据基站对历史周期内上行信号进行处理产生的处理时延的变化范围确定；根据差值调整当前存储的处理时延校准值。In one embodiment, the processor further implements the following steps when executing the computer program: calculating the difference between the target TA and the preset TA reference value; the TA reference value is based on the processing delay generated by the base station processing the uplink signal in the historical period The change range is determined; adjust the currently stored processing delay calibration value according to the difference.

在一个实施例中，处理器执行计算机程序时还实现以下步骤：若差值小于零，则在当前存储的处理时延校准值上增加差值的绝对值。In one embodiment, the processor further implements the following steps when executing the computer program: if the difference is less than zero, the absolute value of the difference is added to the currently stored processing delay calibration value.

在一个实施例中，处理器执行计算机程序时还实现以下步骤：对多个候选TA进行平均处理，获得目标TA。In an embodiment, the processor further implements the following steps when executing the computer program: averaging multiple candidate TAs to obtain the target TA.

在一个实施例中，处理器执行计算机程序时还实现以下步骤：在候选TA的数量大于预设数量阈值的情况下，对多个候选TA进行平均处理。In an embodiment, the processor further implements the following step when executing the computer program: in the case where the number of candidate TAs is greater than a preset number threshold, averaging processing is performed on a plurality of candidate TAs.

在一个实施例中，处理器执行计算机程序时还实现以下步骤：去掉多个候选TA中的最大TA和最小TA，计算剩余候选TA的平均值。In an embodiment, the processor further implements the following steps when executing the computer program: remove the largest TA and the smallest TA among the multiple candidate TAs, and calculate the average value of the remaining candidate TAs.

在一个实施例中，UE接入质量信息包括接收信噪比SNR，以及接收信号强度RSSI；处理器执行计算机程序时还实现以下步骤：在SNR大于预设的信噪比阈值，且RSSI大于预设的信号强度阈值时，将UE接入质量信息对应的TA确定为候选TA。In one embodiment, the UE access quality information includes the received signal-to-noise ratio SNR and the received signal strength RSSI; when the processor executes the computer program, the following steps are also implemented: when the SNR is greater than the preset signal-to-noise ratio threshold, and the RSSI is greater than the preset When the signal strength threshold is set, the TA corresponding to the UE access quality information is determined as the candidate TA.

本实施例提供的基站，其实现原理和技术效果与上述方法实施例类似，在此不再赘述。The implementation principles and technical effects of the base station provided in this embodiment are similar to the foregoing method embodiments, and will not be repeated here.

在一个实施例中，提供了一种计算机可读存储介质，其上存储有计算机程序，计算机程序被处理器执行时实现以下步骤：In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored, and when the computer program is executed by a processor, the following steps are implemented:

在一个实施例中，计算机程序被处理器执行时还实现以下步骤：获取上一调整周期内每个历史接入请求对应的历史UE的定时提前TA以及UE接入质量信息；根据UE接入质量信息对获取的所有TA进行筛选，获得满足预设接入要求的多个候选TA；基于多个候选TA确定目标TA，并根据目标TA调整当前存储的处理时延校准值。In one embodiment, when the computer program is executed by the processor, the following steps are also implemented: obtaining the historical UE timing advance TA and UE access quality information corresponding to each historical access request in the last adjustment period; according to the UE access quality The information screens all the acquired TAs to obtain multiple candidate TAs that meet the preset access requirements; determines the target TA based on the multiple candidate TAs, and adjusts the currently stored processing delay calibration value according to the target TA.

在一个实施例中，计算机程序被处理器执行时还实现以下步骤：计算目标TA与预设的TA参考值的差值；TA参考值根据基站对历史周期内上行信号进行处理产生的处理时延的变化范围确定；根据差值调整当前存储的处理时延校准值。In one embodiment, when the computer program is executed by the processor, the following steps are also implemented: calculating the difference between the target TA and the preset TA reference value; the TA reference value is based on the processing delay generated by the base station processing the uplink signal in the historical period The range of change is determined; adjust the currently stored processing delay calibration value according to the difference.

在一个实施例中，计算机程序被处理器执行时还实现以下步骤：若差值小于零，则在当前存储的处理时延校准值上增加差值的绝对值。In one embodiment, when the computer program is executed by the processor, the following steps are further implemented: if the difference is less than zero, the absolute value of the difference is added to the currently stored processing delay calibration value.

在一个实施例中，计算机程序被处理器执行时还实现以下步骤：对多个候选TA进行平均处理，获得目标TA。In one embodiment, when the computer program is executed by the processor, the following steps are further implemented: performing average processing on multiple candidate TAs to obtain the target TA.

在一个实施例中，计算机程序被处理器执行时还实现以下步骤：在候选TA的数量大于预设数量阈值的情况下，对多个候选TA进行平均处理。In one embodiment, when the computer program is executed by the processor, the following step is further implemented: in the case where the number of candidate TAs is greater than a preset number threshold, averaging processing is performed on multiple candidate TAs.

在一个实施例中，计算机程序被处理器执行时还实现以下步骤：去掉多个候选TA中的最大TA和最小TA，计算剩余候选TA的平均值。In one embodiment, when the computer program is executed by the processor, the following steps are further implemented: remove the largest TA and the smallest TA among the multiple candidate TAs, and calculate the average value of the remaining candidate TAs.

在一个实施例中，UE接入质量信息包括接收信噪比SNR，以及接收信号强度RSSI；计算机程序被处理器执行时还实现以下步骤：在SNR大于预设的信噪比阈值，且RSSI大于预设的信号强度阈值时，将UE接入质量信息对应的TA确定为候选TA。In one embodiment, the UE access quality information includes the received signal-to-noise ratio SNR and the received signal strength RSSI; when the computer program is executed by the processor, the following steps are also implemented: when the SNR is greater than the preset signal-to-noise ratio threshold, and the RSSI is greater than When the preset signal strength threshold is used, the TA corresponding to the UE access quality information is determined as the candidate TA.

本实施例提供的计算机可读存储介质，其实现原理和技术效果与上述方法实施例类似，在此不再赘述。The implementation principles and technical effects of the computer-readable storage medium provided in this embodiment are similar to those in the foregoing method embodiments, and will not be repeated here.

本领域普通技术人员可以理解实现上述实施例方法中的全部或部分流程，是可以通过计算机程序来指令相关的硬件来完成，所述的计算机程序可存储于一非易失性计算机可读取存储介质中，该计算机程序在执行时，可包括如上述每个方法的实施例的流程。其中，本申请所提供的每个实施例中所使用的对存储器、存储、数据库或其它介质的任何引用，均可包括非易失性和易失性存储器中的至少一种。非易失性存储器可包括只读存储器(ROM)、可编程ROM(PROM)、电可编程ROM(EPROM)、电可擦除可编程ROM(EEPROM)或闪存。易失性存储器可包括随机存取存储器(RAM)或者外部高速缓冲存储器。作为说明而非局限，RAM以多种形式可得，诸如静态RAM(SRAM)、动态RAM(DRAM)、同步DRAM(SDRAM)、双数据率SDRAM(DDRSDRAM)、增强型SDRAM(ESDRAM)、同步链路(Synchlink)DRAM(SLDRAM)、存储器总线(Rambus)直接RAM(RDRAM)、直接存储器总线动态RAM(DRDRAM)、以及存储器总线动态RAM(RDRAM)等。A person of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be implemented by instructing relevant hardware through a computer program. The computer program can be stored in a non-volatile computer readable storage. In the medium, when the computer program is executed, it may include the flow of the embodiment of each method described above. Wherein, any reference to memory, storage, database, or other media used in each embodiment provided in this application may include at least one of non-volatile and volatile memory. Non-volatile memory may include read only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. As an illustration and not a limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous chain Channel (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.

工业实用性Industrial applicability

本公开提供的上行时延的调整方法、装置、基站和存储介质，基站在当前调整周期内接收用户设备UE发送的上行信号；然后，根据预设的处理时延校准值调整上行信号的上行时延；其中，处理时延校准值为根据上一调整周期内监测到的历史UE的定时提前量TA获得的。由于处理时延校准值为根据上一调整周期内监测到的历史UE的TA获得的，因此，当基站的硬件处理时延存在较大波动时，基站可以通过历史UE的TA确定准确的处理时延校准值，从而根据准确的处理时延校准值对当前调整周期中接收到的上行信号的上行时延进行调整，使得调整后的上行信号到达基带处理单元中的编解码处理模块时，可以减小在负时延方向上的波动，有利于提升基站的接收性能，使得基站的调试更加顺利，降低调试时长以及研发成本，具有很强的工业实用性。According to the method, device, base station and storage medium for adjusting the uplink delay provided by the present disclosure, the base station receives the uplink signal sent by the user equipment UE in the current adjustment period; then, adjusts the uplink time of the uplink signal according to the preset processing delay calibration value Delay; Among them, the processing delay calibration value is obtained according to the historical UE timing advance TA monitored in the last adjustment period. Since the processing delay calibration value is obtained based on the TA of the historical UE monitored in the last adjustment period, when the hardware processing delay of the base station fluctuates greatly, the base station can determine the accurate processing time through the TA of the historical UE. Delay calibration value, so as to adjust the uplink delay of the uplink signal received in the current adjustment period according to the accurate processing delay calibration value, so that when the adjusted uplink signal reaches the codec processing module in the baseband processing unit, it can be reduced. Small fluctuations in the direction of negative delay are conducive to improving the receiving performance of the base station, making the debugging of the base station smoother, reducing the debugging time and research and development costs, and has strong industrial applicability.

Claims

一种上行时延的调整方法，包括：An uplink delay adjustment method includes:

在当前调整周期内接收用户设备UE发送的上行信号；Receive the uplink signal sent by the user equipment UE in the current adjustment period;

根据预设的处理时延校准值调整所述上行信号的上行时延；其中，所述处理时延校准值为根据上一调整周期内监测到的历史UE的定时提前量TA获得的。Adjust the uplink delay of the uplink signal according to a preset processing delay calibration value; wherein the processing delay calibration value is obtained according to the historical UE timing advance TA monitored in the previous adjustment period.
根据权利要求1所述的上行时延的调整方法，还包括：The method for adjusting uplink delay according to claim 1, further comprising:

获取上一调整周期内每个历史接入请求对应的历史UE的定时提前TA以及UE接入质量信息；Acquiring the historical UE timing advance TA and UE access quality information corresponding to each historical access request in the last adjustment period;

根据所述UE接入质量信息对获取的所有TA进行筛选，获得满足预设接入要求的多个候选TA；Screening all the obtained TAs according to the UE access quality information to obtain multiple candidate TAs meeting preset access requirements;

基于所述多个候选TA确定目标TA，并根据所述目标TA调整当前存储的处理时延校准值。The target TA is determined based on the multiple candidate TAs, and the currently stored processing delay calibration value is adjusted according to the target TA.
根据权利要求2所述的上行时延的调整方法，其中，所述根据所述目标TA调整当前存储的处理时延校准值，包括：The method for adjusting the uplink delay according to claim 2, wherein the adjusting the currently stored processing delay calibration value according to the target TA comprises:

计算所述目标TA与预设的TA参考值的差值；所述TA参考值根据基站对历史周期内上行信号进行处理产生的处理时延的变化范围确定；Calculate the difference between the target TA and a preset TA reference value; the TA reference value is determined according to the variation range of the processing delay generated by the base station processing the uplink signal in the historical period;

根据所述差值调整当前存储的处理时延校准值。Adjust the currently stored processing delay calibration value according to the difference.
根据权利要求3所述的上行时延的调整方法，其中，所述根据所述差值调整当前存储的处理时延校准值，包括：The method for adjusting the uplink delay according to claim 3, wherein the adjusting the currently stored processing delay calibration value according to the difference value comprises:

若所述差值小于零，则在所述当前存储的处理时延校准值上增加所述差值的绝对值。If the difference is less than zero, the absolute value of the difference is added to the currently stored processing delay calibration value.
根据权利要求2-4任一项所述的上行时延的调整方法，其中，所述基于所述多个候选TA确定目标TA，包括：The method for adjusting uplink delay according to any one of claims 2-4, wherein the determining a target TA based on the multiple candidate TAs comprises:

对所述多个候选TA进行平均处理，获得目标TA。The multiple candidate TAs are averaged to obtain the target TA.
根据权利要求5所述的上行时延的调整方法，其中，所述对所述多个候选TA进行平均处理，包括：The method for adjusting the uplink delay according to claim 5, wherein the averaging processing on the plurality of candidate TAs comprises:

在所述候选TA的数量大于预设数量阈值的情况下，对所述多个候选TA进行平均处理。In a case where the number of candidate TAs is greater than a preset number threshold, averaging processing is performed on the plurality of candidate TAs.
根据权利要求6所述的上行时延的调整方法，其中，所述对所述多个候选TA进行平均处理，包括：The method for adjusting uplink delay according to claim 6, wherein the averaging processing on the plurality of candidate TAs comprises:

去掉所述多个候选TA中的最大TA和最小TA，计算剩余候选TA的平均值。Remove the largest TA and the smallest TA among the multiple candidate TAs, and calculate the average value of the remaining candidate TAs.
根据权利要求2-4任一项所述的上行时延的调整方法，其中，所述UE接入质量信息包括接收信噪比SNR，以及接收信号强度RSSI；所述根据所述UE接入质量信息对获取的所有TA进行筛选，获得满足预设接入要求的多个候选TA，包括：The method for adjusting uplink delay according to any one of claims 2-4, wherein the UE access quality information includes received signal-to-noise ratio (SNR) and received signal strength RSSI; The information screens all the obtained TAs to obtain multiple candidate TAs that meet the preset access requirements, including:

在所述SNR大于预设的信噪比阈值，且所述RSSI大于预设的信号强度阈值时，将所述UE接入质量信息对应的TA确定为候选TA。When the SNR is greater than a preset signal-to-noise ratio threshold, and the RSSI is greater than a preset signal strength threshold, the TA corresponding to the UE access quality information is determined as a candidate TA.
一种上行时延的调整装置，包括：An uplink delay adjustment device, including:

接收模块，配置为在当前调整周期内接收用户设备UE发送的上行信号；The receiving module is configured to receive the uplink signal sent by the user equipment UE in the current adjustment period;

调整模块，配置为根据预设的处理时延校准值调整所述上行信号的上行时延；其中，所述处理时延校准值为根据上一调整周期内监测到的历史UE的定时提前量TA获得的。The adjustment module is configured to adjust the uplink delay of the uplink signal according to a preset processing delay calibration value; wherein the processing delay calibration value is based on the historical UE timing advance TA monitored in the last adjustment period acquired.
一种基站，包括存储器和处理器，所述存储器存储有计算机程序，其中，所述处理器执行所述计算机程序时实现权利要求1至8中任一项所述方法的步骤。A base station, comprising a memory and a processor, the memory storing a computer program, wherein the processor implements the steps of the method according to any one of claims 1 to 8 when the computer program is executed by the processor.
一种计算机可读存储介质，其上存储有计算机程序，其中，所述计算机程序被处理器执行时实现权利要求1至8中任一项所述的方法的步骤。A computer-readable storage medium having a computer program stored thereon, wherein the computer program implements the steps of the method according to any one of claims 1 to 8 when the computer program is executed by a processor.