WO2021103203A1 - 一种显示面板及电子装置 - Google Patents

一种显示面板及电子装置 Download PDF

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Publication number
WO2021103203A1
WO2021103203A1 PCT/CN2019/126089 CN2019126089W WO2021103203A1 WO 2021103203 A1 WO2021103203 A1 WO 2021103203A1 CN 2019126089 W CN2019126089 W CN 2019126089W WO 2021103203 A1 WO2021103203 A1 WO 2021103203A1
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Prior art keywords
thin film
film transistor
sub
electrode
sharing
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PCT/CN2019/126089
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English (en)
French (fr)
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易宁波
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深圳市华星光电半导体显示技术有限公司
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Priority to US16/625,219 priority Critical patent/US11217607B2/en
Publication of WO2021103203A1 publication Critical patent/WO2021103203A1/zh

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/13624—Active matrix addressed cells having more than one switching element per pixel
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors

Definitions

  • the present invention relates to the field of display technology, in particular to a display panel and an electronic device.
  • the pixel structure of the display panel is changed from 4 display domains to 8 display domains, and how to improve the role of large viewing angle has become a research hotspot.
  • each pixel is divided into a main pixel area and a sub-pixel area. It is usually necessary to separately make a sharing electrode in the 8-display domain pixels, and the drain of the sharing thin film transistor is connected to the sharing electrode, so that the sub-pixels are connected through the sharing electrode. The charge of the area is shared to change the brightness of the sub-pixel area and the main pixel area, and improve the problem of large-view role deviation.
  • the existing sharing electrode is located in the opening area, so the opening ratio is reduced.
  • the object of the present invention is to provide a display panel and an electronic device that can increase the aperture ratio.
  • the present invention provides a display panel including a plurality of data lines and a plurality of scan lines, and a plurality of pixels defined by the data lines and the scan lines; the pixels include:
  • the main pixel area includes a common electrode portion and a first pixel electrode; the common electrode portion includes a sharing electrode; the voltage of the sharing electrode is a fixed value;
  • the sub-pixel area includes a second common electrode and a second pixel electrode, the sub-pixel area further includes a sub-driving thin film transistor and a sharing thin film transistor, the drain of the sharing thin film transistor is connected to the sharing electrode, and the sharing thin film The source of the transistor is connected to the drain of the sub-driving thin film transistor, so that the voltage of the sub-pixel area is different from the voltage of the main pixel area.
  • the present invention also provides an electronic device, which includes the above-mentioned display panel.
  • the display panel and the electronic device of the present invention include pixels.
  • the pixels include a main pixel area, including a common electrode portion and a first pixel electrode; the common electrode portion includes a sharing electrode; the voltage of the sharing electrode is a fixed value; the sub-pixel area , Including a second common electrode and a second pixel electrode, the sub-pixel area further includes a sub-driving thin film transistor and a sharing thin film transistor, the drain of the sharing thin film transistor is connected to the sharing electrode, and the source of the sharing thin film transistor
  • the electrode is connected to the drain of the sub-driving thin film transistor, so that the voltage of the sub-pixel area is different from the voltage of the main pixel area; the existing first common electrode is improved to form a sharing electrode, which makes sharing The electrode is located in the non-opening area, which improves the opening ratio.
  • FIG. 1 is a schematic diagram of the first structure of an existing display panel
  • FIG. 2 is a schematic diagram of a second structure of an existing display panel
  • FIG. 3 is a schematic diagram of the structure of a display panel according to the first embodiment of the present invention.
  • FIG. 4 is a schematic diagram of the structure of the display panel according to the second embodiment of the present invention.
  • the existing display panel includes data lines 11 and scan lines 12 and pixels defined by the data lines 11 and scan lines 12.
  • the pixel includes a main pixel area 101 and a sub-pixel area 102.
  • the main pixel area 101 includes a first common electrode 13 and a first pixel electrode 14, the main pixel area 101 also includes a main driving thin film transistor T1, and the sub-pixel area 102 includes a second common electrode 15.
  • the sub-pixel area 102 also includes a sub-driving thin film transistor T2 and a sharing thin film transistor T3, the gate of the main driving thin film transistor T1 and the gate of the sub-driving thin film transistor T2, and the gate and scanning of the sharing thin film transistor T3 Line 12 is connected, the source of the main driving thin film transistor T1 and the source of the second thin film transistor T2 are both connected to the data line 11; the drain of the sub driving thin film transistor T2 is respectively connected to the second pixel electrode 16 and the source of the sharing thin film transistor T3 are connected, and the drain of the sharing thin film transistor T3 is connected to the sharing electrode 17.
  • the pixel size is restricted by the limitation of the panel size, and the sharing electrode cannot be introduced in the pixel design of the panel.
  • the horizontal sub-pixels reach 81um, and there is enough space to introduce the sharing electrode in the first metal layer; but as shown in Figure 2, such as 75 inches of 8K In the display panel, the sub-pixel size is only about 71um. Due to process and material limitations, it is impossible to introduce a shared electrode in the first metal layer separately, and only the drain of the third thin film transistor can be connected to the common electrode.
  • FIGS. 3 and 4 are schematic diagrams of the structure of the display panel in the first embodiment of the present invention.
  • the display panel of this embodiment includes a plurality of data lines 11 and a plurality of scan lines 12, and a plurality of pixels defined by the data lines 11 and the scan lines 12;
  • FIG. 3 takes a single pixel as an example Be explained.
  • the pixels include: a main pixel area 101 and a sub-pixel area 102.
  • the main pixel area 101 includes a common electrode part 20 and a first pixel electrode 14.
  • the common electrode part 20 includes a first common electrode 21 and a sharing electrode 22.
  • the first common electrode 21 and the sharing electrode 22 are spaced apart.
  • the sharing electrode 22 is close to the sub-pixel area 102, and the first common electrode 21 is located on the sharing electrode 22.
  • the sharing electrode is close to the sub-pixel area. Area, can also reduce the length of the connection line between the sharing thin film transistor and the sharing electrode, avoiding a large voltage loss, thereby improving the display quality.
  • the sharing electrode 22 is located on one side of the periphery of the first pixel electrode 14, and the first common electrode 21 is located on the periphery of the first pixel electrode 14. On the remaining side.
  • the sharing electrode 22 is located on the lower side of the first pixel electrode 14, and the first common electrode 21 is located on the left and right sides and the upper side of the first pixel electrode 14.
  • the voltage of the sharing electrode 22 is a fixed value, or the voltage of the sharing electrode 22 is constant.
  • the sharing electrode 22 is continuously connected to a constant voltage.
  • the sharing electrode 22 can be separately powered by an external constant voltage power supply.
  • the main pixel area 101 may further include a main driving thin film transistor T1, and the drain of the main driving thin film transistor T1 is connected to the first pixel electrode 14.
  • the sub-pixel area 102 includes a second common electrode 15 and a second pixel electrode 16.
  • the second common electrode 15 surrounds the periphery of the second pixel electrode 16.
  • the second common electrode 15 includes a third sub-portion 151 that covers the drain of the sub-driving thin film transistor T2 and the source of the sharing thin film transistor T3.
  • the third sub-portion 151 is a portion located above the second pixel electrode 16.
  • the second common electrode 15 further includes a fourth sub-portion (not shown in the figure), and the fourth sub-portion is located on the left and right sides and the lower side of the second pixel electrode 16. It is understandable that both the shape of the first pixel electrode 14 and the second pixel electrode 16 can be a "m" shape, and of course they can also have other shapes.
  • the sub-pixel area 102 further includes a sub-driving thin film transistor T2 and a sharing thin film transistor T3.
  • the drain of the sharing thin film transistor T3 is connected to the sharing electrode 22, and the source of the sharing thin film transistor T3 is connected to the sub driving
  • the drain of the thin film transistor T2 is connected, so that the voltage of the sub-pixel area 102 and the voltage of the main pixel area 101 are different, so that the brightness of the two is different, thereby avoiding a large visual deviation.
  • the gate of the main driving thin film transistor T1, the gate of the sub-driving thin film transistor T2, and the gate of the sharing thin film transistor T3 are all connected to the scan line 12;
  • the source of the main driving thin film transistor T1 and the source of the second thin film transistor T2 are both connected to the data line 11;
  • the drain of the sub-driving thin film transistor T2 is respectively connected to the second pixel electrode 16 and the source of the sharing thin film transistor T3.
  • the common electrode portion 20 and the gate of the main driving thin film transistor T1, the gate of the sub-driving thin film transistor T2, and the gate of the sharing thin film transistor T3 are located in the same metal layer.
  • the gate of the main driving thin film transistor T1, the gate of the sub-driving thin film transistor T2, and the gate of the sharing thin film transistor T3 are all located in the first metal layer, and the common electrode portion 20 is also located in the first metal layer.
  • the metal layer simplifies the manufacturing process and can also reduce the thickness of the display panel.
  • the sharing electrode 22 covers the drain of the main driving thin film transistor T1 and the drain of the sharing thin film transistor T3.
  • the existing first common electrode is divided to form the common electrode of the sharing electrode and the main pixel area, so that the sharing electrode is located in the non-opening area, the aperture ratio is improved, and the common electrode can be prevented from being connected to the sharing thin film transistor.
  • the voltage of the common electrode is prevented from fluctuating, the charge of the storage capacitor is prevented from fluctuating, the crosstalk of the display panel is avoided, and the display image quality is improved.
  • FIG. 4 is a schematic structural diagram of a display panel according to the second embodiment of the present invention.
  • the difference between the display panel of this embodiment and the previous embodiment is that the common electrode part of this embodiment only includes the sharing electrode 22.
  • the sharing electrode 22 includes a first sub-portion 221 and a second sub-portion 222, the first sub-portion 221 is close to the sub-pixel area 102; the second sub-portion 222 is located in the first sub-portion 221 on both sides.
  • the first sub-portion 221 is located below the first pixel electrode 14, and the second sub-portion 222 is located on the left and right sides of the first pixel electrode 14.
  • the storage capacitor of the main pixel area in this embodiment is formed by the sharing electrode 22 and the first pixel electrode 14.
  • first sub-parts 221 may be arranged in a first direction, and the second sub-parts 222 are arranged in a second direction, and the first direction is perpendicular to the second direction.
  • first sub-portions 221 are arranged in a horizontal direction, and the second sub-portions 222 are arranged in a vertical direction.
  • the sharing electrode is formed, so that the sharing electrode is located in the non-opening area, thereby increasing the aperture ratio; in addition, since the sharing electrode is continuously connected to a constant voltage, the charge shares the voltage to the sharing electrode The impact is small, and the charge of the storage capacitor can be prevented from fluctuating, thereby avoiding crosstalk on the display panel, and improving the display quality.
  • the present invention also provides an electronic device, which includes any one of the above-mentioned display panels, and the electronic device may be a mobile phone, a tablet computer, or other equipment.
  • the display panel and the electronic device of the present invention include pixels.
  • the pixels include a main pixel area, including a common electrode portion and a first pixel electrode; the common electrode portion includes a sharing electrode; the voltage of the sharing electrode is a fixed value; the sub-pixel area , Including a second common electrode and a second pixel electrode, the sub-pixel area further includes a sub-driving thin film transistor and a sharing thin film transistor, the drain of the sharing thin film transistor is connected to the sharing electrode, and the source of the sharing thin film transistor
  • the electrode is connected to the drain of the sub-driving thin film transistor, so that the voltage of the sub-pixel area is different from the voltage of the main pixel area; due to the improvement of the existing first common electrode, a sharing electrode is formed, thereby making The sharing electrode is located in the non-opening area, which improves the opening rate.

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Abstract

一种显示面板及电子装置，显示面板包括：像素包括：主像素区（101），包括公共电极部（20），公共电极部（20）包括分享电极（22）；分享电极（22）的电压为固定值；子像素区（102），包括子驱动薄膜晶体管（T2）和分享薄膜晶体管（T3），分享薄膜晶体管（T3）的漏极与分享电极（22）连接，分享薄膜晶体管（T3）的源极与子驱动薄膜晶体管（T2）的漏极连接。

Description

一种显示面板及电子装置 技术领域
本发明涉及显示技术领域，特别是涉及一种显示面板及电子装置。
 背景技术
为了改善观看视角，显示面板的像素结构由4个显示畴转向8个显示畴，而如何改善大视角色偏成了研究的热点。
为了改善大视角色偏，每个像素划分为主像素区和子像素区，通常需要在8显示畴像素中单独制作分享电极，分享薄膜晶体管的漏极与分享电极连接，从而通过分享电极对子像素区的电荷进行分享，以改变子像素区和主像素区的亮度，改善大视角色偏问题。
 技术问题
但是现有的分享电极位于开口区内，因此降低了开口率。
因此，有必要提供一种显示面板及电子装置，以解决现有技术所存在的问题。
 技术解决方案
本发明的目的在于提供一种显示面板及电子装置，能够提高开口率。
为解决上述技术问题，本发明提供一种显示面板，所述显示面板包括多条数据线和多条扫描线以及由所述数据线和所述扫描线限定的多个像素；所述像素包括：
主像素区，包括公共电极部和第一像素电极；所述公共电极部包括分享电极；所述分享电极的电压为固定值；
子像素区，包括第二公共电极和第二像素电极，所述子像素区还包括子驱动薄膜晶体管和分享薄膜晶体管，所述分享薄膜晶体管的漏极与所述分享电极连接，所述分享薄膜晶体管的源极与所述子驱动薄膜晶体管的漏极连接，以使所述子像素区的电压和所述主像素区的电压不同。
本发明还提供一种电子装置，其包括上述显示面板。
 有益效果
本发明的显示面板及电子装置，包括像素，像素包括主像素区，包括公共电极部和第一像素电极；所述公共电极部包括分享电极；所述分享电极的电压为固定值；子像素区，包括第二公共电极和第二像素电极，所述子像素区还包括子驱动薄膜晶体管和分享薄膜晶体管，所述分享薄膜晶体管的漏极与所述分享电极连接，所述分享薄膜晶体管的源极与所述子驱动薄膜晶体管的漏极连接，以使所述子像素区的电压和所述主像素区的电压不同；由于对现有的第一公共电极进行改进形成分享电极，从而使得分享电极位于非开口区，提高了开口率。
 附图说明
图1为现有显示面板的第一种结构示意图；
图2为现有显示面板的第二种结构示意图；
图3为本发明实施例一的显示面板的结构示意图；
图4为本发明实施例二的显示面板的结构示意图。
 本发明的实施方式
以下各实施例的说明是参考附加的图式，用以例示本发明可用以实施的特定实施例。本发明所提到的方向用语，例如「上」、「下」、「前」、「后」、「左」、「右」、「内」、「外」、「侧面」等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本发明，而非用以限制本发明。在图中，结构相似的单元是以相同标号表示。
如图1所示，现有的显示面板包括数据线11和扫描线12以及由数据线11和扫描线12限定形成的像素。像素包括主像素区101和子像素区102，主像素区101包括第一公共电极13和第一像素电极14，主像素区101还包括主驱动薄膜晶体管T1，子像素区102包括第二公共电极15和第二像素电极16，子像素区102还包括子驱动薄膜晶体管T2和分享薄膜晶体管T3，主驱动薄膜晶体管T1的栅极和子驱动薄膜晶体管T2的栅极以及分享薄膜晶体管T3的栅极与扫描线12连接，所述主驱动薄膜晶体管T1的源极和所述第二薄膜晶体管T2的源极均与所述数据线11连接；所述子驱动薄膜晶体管T2的漏极分别与第二像素电极16以及所述分享薄膜晶体管T3的源极连接，所述分享薄膜晶体管T3的漏极与分享电极17连接。
随着解析度不断地提高，受面板尺寸的限制，像素大小得到了限制，在面板像素设计中无法引入分享电极。比如在85英寸的8K（7680*4320）的解析度下，亚像素的横向达到81um，有足够的空间在第一金属层中引入分享电极；但是如图2所示，比如在75英寸的8K显示面板中，亚像素尺寸只有71um左右，由于制程和材料的限制，没法在第一金属层中单独引入分享电极，只能将第三薄膜晶体管的漏极连接至公共电极。虽然这种设计可以改善视角，但是由于公共电极的电压出现波动，导致存储电容的电荷出现波动，从而导致显示面板出现串扰，影响了显示画质。当然在65英寸以及更小尺寸的8K面板中，将面临同样的问题。
请参照图3和4，本发明实施例一的显示面板的结构示意图。
如图3所示，本实施例的显示面板包括多条数据线11和多条扫描线12以及由所述数据线11和所述扫描线12限定的多个像素；图3以单个像素为例进行说明。
所述像素包括：主像素区101和子像素区102。
主像素区101包括公共电极部20和第一像素电极14。所述公共电极部20包括第一公共电极21和分享电极22。所述第一公共电极21与所述分享电极22之间间隔设置。
在一实施方式中，为了简化制程工艺，提高生产效率，所述分享电极22靠近所述子像素区102，所述第一公共电极21位于所述分享电极22上，此外由于分享电极靠近子像素区，还可以减小分享薄膜晶体管与分享电极之间的连接线的长度，避免电压损耗较大，进而提高了显示质量。
在一实施方式中，为了进一步提高显示质量，所述分享电极22位于所述第一像素电极14的周缘中的其中一侧，所述第一公共电极21位于所述第一像素电极14的周缘中的其余侧。比如分享电极22位于所述第一像素电极14的下侧，所述第一公共电极21位于所述第一像素电极14的左右侧和上侧。
其中所述分享电极22的电压为固定值，或者说所述分享电极22的电压是恒定的，优选地分享电极22持续接入恒定的电压。比如可以在通过外界的恒压电源单独给分享电极22供电。
所述主像素区101还可包括主驱动薄膜晶体管T1，所述主驱动薄膜晶体管T1的漏极与第一像素电极14连接。
子像素区102包括第二公共电极15和第二像素电极16，其中第二公共电极15围绕在第二像素电极16的周缘，在一实施方式中，为了避免影响开口率，所述第二公共电极15包括第三子部151，所述第三子部151覆盖所述子驱动薄膜晶体管T2的漏极以及所述分享薄膜晶体管T3的源极。第三子部151为位于第二像素电极16上方的部分。所述第二公共电极15还包括第四子部（图中未示出），第四子部位于第二像素电极16的左右侧和下侧。可以理解的，第一像素电极14和第二像素电极16的形状都可以为“米”字形，当然还可为其他形状。
所述子像素区102还包括子驱动薄膜晶体管T2和分享薄膜晶体管T3，所述分享薄膜晶体管T3的漏极与所述分享电极22连接，所述分享薄膜晶体管T3的源极与所述子驱动薄膜晶体管T2的漏极连接，以使所述子像素区102的电压和所述主像素区101的电压不同，从而使得两者的亮度不同，从而避免大视角色偏。
所述主驱动薄膜晶体管T1的栅极、所述子驱动薄膜晶体管T2的栅极以及所述分享薄膜晶体管T3的栅极均与所述扫描线12连接；
所述主驱动薄膜晶体管T1的源极和所述第二薄膜晶体管T2的源极均与所述数据线11连接；
所述子驱动薄膜晶体管T2的漏极分别与第二像素电极16以及所述分享薄膜晶体管T3的源极连接。
其中，所述公共电极部20与所述主驱动薄膜晶体管T1的栅极、所述子驱动薄膜晶体管T2的栅极以及所述分享薄膜晶体管T3的栅极位于同一金属层。比如，所述主驱动薄膜晶体管T1的栅极、所述子驱动薄膜晶体管T2的栅极以及所述分享薄膜晶体管T3的栅极均位于第一金属层，所述公共电极部20也位于第一金属层，从而简化制程工艺，此外还可减小显示面板的厚度。
为了提高连接的可靠性以及避免影响开口率，所述分享电极22覆盖所述主驱动薄膜晶体管T1的漏极以及所述分享薄膜晶体管T3的漏极。
由于对现有的第一公共电极进行分割，形成分享电极和主像素区的公共电极，从而使得分享电极位于非开口区，因此提高了开口率，此外可以避免公共电极与分享薄膜晶体管连接，从而避免公共电极的电压出现波动，防止存储电容的电荷出现波动，避免显示面板出现串扰，提高了显示画质。
请参照图4，图4为本发明实施例二的显示面板的结构示意图。
如图4所示，本实施例的显示面板与上一实施例的区别在于：本实施例的公共电极部仅包括所述分享电极22。
具体地，所述分享电极22包括第一子部221和第二子部222，所述第一子部221靠近所述子像素区102；所述第二子部222位于所述第一子部221的两侧。比如所述第一子部221位于第一像素电极14的下方，所述第二子部222位于第一像素电极14的左右两侧。可以理解的，本实施例的主像素区的存储电容由分享电极22与第一像素电极14形成得到。
其中，所述第一子部221可沿第一方向排布，所述第二子部222沿第二方向排布，所述第一方向与所述第二方向垂直。比如所述第一子部221沿水平方向排布，所述第二子部222沿竖直方向排布。
由于对现有的第一公共电极进行改进，形成分享电极，从而使得分享电极位于非开口区，因此提高了开口率；此外由于分享电极持续接入恒定的电压，因此电荷分享对分享电极的电压影响较小，能够避免存储电容的电荷出现波动，进而避免显示面板出现串扰，提高了显示画质。
本发明还提供一种电子装置，其包括上述任意一种显示面板，该电子装置可以为手机、平板电脑等设备。
本发明的显示面板及电子装置，包括像素，像素包括主像素区，包括公共电极部和第一像素电极；所述公共电极部包括分享电极；所述分享电极的电压为固定值；子像素区，包括第二公共电极和第二像素电极，所述子像素区还包括子驱动薄膜晶体管和分享薄膜晶体管，所述分享薄膜晶体管的漏极与所述分享电极连接，所述分享薄膜晶体管的源极与所述子驱动薄膜晶体管的漏极连接,以使所述子像素区的电压和所述主像素区的电压不同；由于对现有的第一公共电极进行改进，形成分享电极，从而使得分享电极位于非开口区，提高了开口率。
综上所述，虽然本发明已以优选实施例揭露如上，但上述优选实施例并非用以限制本发明，本领域的普通技术人员，在不脱离本发明的精神和范围内，均可作各种更动与润饰，因此本发明的保护范围以权利要求界定的范围为准。

Claims (18)

  1. 一种显示面板，其包括多条数据线和多条扫描线以及由所述数据线和所述扫描线限定的多个像素；所述像素包括：
    主像素区，包括公共电极部和第一像素电极；所述公共电极部包括分享电极；所述分享电极的电压为固定值；
    子像素区，包括第二公共电极和第二像素电极，所述子像素区还包括子驱动薄膜晶体管和分享薄膜晶体管，所述分享薄膜晶体管的漏极与所述分享电极连接，所述分享薄膜晶体管的源极与所述子驱动薄膜晶体管的漏极连接，以使所述子像素区的电压和所述主像素区的电压不同。
  2. 根据权利要求1所述的显示面板，其中
    所述公共电极部还包括第一公共电极，所述第一公共电极与所述分享电极之间间隔设置，所述分享电极靠近所述子像素区，所述第一公共电极位于所述分享电极上。
  3. 根据权利要求2所述的显示面板，其中
    所述分享电极位于所述第一像素电极的周缘中的其中一侧，所述第一公共电极位于所述第一像素电极的周缘中的其余侧。
  4. 根据权利要求1所述的显示面板，其中
    所述分享电极包括第一子部和第二子部，所述第一子部靠近所述子像素区；所述第二子部位于所述第一子部的两侧。
  5. 根据权利要求4所述的显示面板，其中
    所述第一子部沿第一方向排布，所述第二子部沿第二方向排布，所述第一方向与所述第二方向垂直。
  6. 根据权利要求1所述的显示面板，其中
    所述主像素区还包括主驱动薄膜晶体管，所述主驱动薄膜晶体管的漏极与所述第一像素电极连接；
    所述主驱动薄膜晶体管的栅极、所述子驱动薄膜晶体管的栅极以及所述分享薄膜晶体管的栅极均与所述扫描线连接；
    所述主驱动薄膜晶体管的源极和所述第二薄膜晶体管的源极均与所述数据线连接；
    所述子驱动薄膜晶体管的漏极分别与所述第二像素电极以及所述分享薄膜晶体管的源极连接。
  7. 根据权利要求6所述的显示面板，其中
    所述公共电极部与所述主驱动薄膜晶体管的栅极、所述子驱动薄膜晶体管的栅极以及所述分享薄膜晶体管的栅极位于同一金属层。
  8. 根据权利要求6所述的显示面板，其中
    所述分享电极覆盖所述主驱动薄膜晶体管的漏极以及所述分享薄膜晶体管的漏极。
  9. 根据权利要求1所述的显示面板，其中
    所述第二公共电极包括第三子部，所述第三子部覆盖所述子驱动薄膜晶体管的漏极以及所述分享薄膜晶体管的源极。
  10. 一种电子装置，其包括显示面板，其包括多条数据线和多条扫描线以及由所述数据线和所述扫描线限定的多个像素；所述像素包括：
    主像素区，包括公共电极部和第一像素电极；所述公共电极部包括分享电极；所述分享电极的电压为固定值；
    子像素区，包括第二公共电极和第二像素电极，所述子像素区还包括子驱动薄膜晶体管和分享薄膜晶体管，所述分享薄膜晶体管的漏极与所述分享电极连接，所述分享薄膜晶体管的源极与所述子驱动薄膜晶体管的漏极连接，以使所述子像素区的电压和所述主像素区的电压不同。
  11. 根据权利要求10所述的电子装置，其中
    所述公共电极部还包括第一公共电极，所述第一公共电极与所述分享电极之间间隔设置，所述分享电极靠近所述子像素区，所述第一公共电极位于所述分享电极上。
  12. 根据权利要求11所述的电子装置，其中
    所述分享电极位于所述第一像素电极的周缘中的其中一侧，所述第一公共电极位于所述第一像素电极的周缘中的其余侧。
  13. 根据权利要求10所述的电子装置，其中
    所述分享电极包括第一子部和第二子部，所述第一子部靠近所述子像素区；所述第二子部位于所述第一子部的两侧。
  14. 根据权利要求13所述的电子装置，其中
    所述第一子部沿第一方向排布，所述第二子部沿第二方向排布，所述第一方向与所述第二方向垂直。
  15. 根据权利要求10所述的电子装置，其中
    所述主像素区还包括主驱动薄膜晶体管，所述主驱动薄膜晶体管的漏极与所述第一像素电极连接；
    所述主驱动薄膜晶体管的栅极、所述子驱动薄膜晶体管的栅极以及所述分享薄膜晶体管的栅极均与所述扫描线连接；
    所述主驱动薄膜晶体管的源极和所述第二薄膜晶体管的源极均与所述数据线连接；
    所述子驱动薄膜晶体管的漏极分别与所述第二像素电极以及所述分享薄膜晶体管的源极连接。
  16. 根据权利要求15所述的电子装置，其中
    所述公共电极部与所述主驱动薄膜晶体管的栅极、所述子驱动薄膜晶体管的栅极以及所述分享薄膜晶体管的栅极位于同一金属层。
  17. 根据权利要求15所述的电子装置，其中
    所述分享电极覆盖所述主驱动薄膜晶体管的漏极以及所述分享薄膜晶体管的漏极。
  18. 根据权利要求10所述的电子装置，其中
    所述第二公共电极包括第三子部，所述第三子部覆盖所述子驱动薄膜晶体管的漏极以及所述分享薄膜晶体管的源极。
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CN110308597A (zh) * 2019-07-23 2019-10-08 深圳市华星光电半导体显示技术有限公司 显示面板及显示装置

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