WO2020206977A1 - 显示面板及其制备方法和半导体结构 - Google Patents

显示面板及其制备方法和半导体结构 Download PDF

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Publication number
WO2020206977A1
WO2020206977A1 PCT/CN2019/112618 CN2019112618W WO2020206977A1 WO 2020206977 A1 WO2020206977 A1 WO 2020206977A1 CN 2019112618 W CN2019112618 W CN 2019112618W WO 2020206977 A1 WO2020206977 A1 WO 2020206977A1
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Prior art keywords
film layer
display panel
partition
layer
substrate
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PCT/CN2019/112618
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English (en)
French (fr)
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唐静
楼均辉
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昆山国显光电有限公司
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Publication of WO2020206977A1 publication Critical patent/WO2020206977A1/zh
Priority to US17/345,803 priority Critical patent/US11925070B2/en

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1216—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/17—Passive-matrix OLED displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/17—Passive-matrix OLED displays
    • H10K59/173—Passive-matrix OLED displays comprising banks or shadow masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00—Constructional details relating to the organic devices covered by this subclass
    • H10K2102/301—Details of OLEDs
    • H10K2102/341—Short-circuit prevention
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/40—Thermal treatment, e.g. annealing in the presence of a solvent vapour

Definitions

  • This application relates to the field of display technology, and in particular to a display panel, a manufacturing method thereof, and a semiconductor structure.
  • a display panel including a semiconductor structure, and the semiconductor structure includes:
  • a partition structure the partition structure is disposed on the substrate, and is used to partition the film layer located above the partition structure;
  • the partition structure at least includes a base film layer and a partition film layer stacked in sequence; wherein the partition film layer covers the base film layer, and at least one side of the partition film layer protrudes from the base film The side of the layer and the end of the barrier film layer have a warped structure.
  • At least one side edge of the barrier film layer of the barrier structure protrudes from the side edge of the base film layer, and the end of the barrier film layer has a warped structure.
  • a warped structure is formed at the end of the barrier film layer, so that the height of the gap between the lower surface of the end of the barrier film layer and the substrate is greater than the thickness of the base film layer, which can effectively realize the film layer above the barrier structure. The isolation effect of the film will not cause the adjacent structures that need to be isolated in the same film layer to be connected, and the working stability of the semiconductor structure is improved.
  • a method for manufacturing a display panel including:
  • the partition structure at least includes a base film layer and a partition film layer laminated in sequence; the partition film layer covers the base film layer, and at least one side of the partition film layer extends from the base film layer The surface; the end of the barrier film is a warped structure.
  • the embodiment of the present application also provides a semiconductor structure, including:
  • a partition structure the partition structure is disposed on the substrate, and is used to partition the film layer located above the partition structure;
  • the partition structure at least includes a base film layer and a partition film layer stacked in sequence; wherein the partition film layer covers the base film layer, and at least one side of the partition film layer protrudes from the base film The side of the layer and the end of the barrier film layer have a warped structure.
  • the provided semiconductor structure or the partition structure of the display panel is a composite film layer structure, including a base film layer and a partition film layer stacked in sequence, and the base film layer and the partition film layer are Steps can be formed between them, and the ends of the barrier film have a warped structure, so that the height of the gap between the lower surface of the end of the barrier film and the substrate is greater than the thickness of the base film, ensuring that the film that needs to be isolated can be very It is well separated by the partition structure, so that adjacent structures that need to be partitioned by the same film layer are not connected, so that the semiconductor structure or the display panel can work stably.
  • a process that can realize the patterning of the film layer is also provided.
  • the patterning or isolation of the film layer can be realized only through the process of film formation-photolithography patterning-etching-curing process, without repeating and recycling the process.
  • FIG. 1 is a schematic structural diagram of a display panel of an embodiment
  • FIG. 2 is a schematic structural diagram of a partition structure provided with a tilted structure according to an embodiment
  • Fig. 3 is a schematic structural diagram of a partition structure of an embodiment
  • FIG. 4 is a schematic diagram of a modified structure of the partition structure of the embodiment in FIG. 3;
  • FIG. 5 is a schematic view of a modified structure of the partition structure of the embodiment in FIG. 3;
  • FIG. 6 is a cross-sectional view of an AMOLED display panel according to an embodiment
  • FIG. 7 is a schematic structural diagram of a display terminal according to an embodiment
  • FIG. 8 is a schematic structural diagram of the display screen shown in FIG. 7;
  • FIG. 9 is a schematic structural diagram of the composite display screen shown in FIG. 8.
  • FIG. 10 is a schematic flowchart of a manufacturing method of a display panel according to an embodiment
  • 11A-11E are a flowchart of an embodiment of preparing a partition structure with a warped structure.
  • planar schematic view refers to a drawing when the target portion is viewed from above
  • cross-sectional schematic view refers to a drawing when a cross-section taken by cutting the target portion vertically is viewed from the side.
  • OLED display panels can be divided into PMOLED (Passive Matrix OLED, passive matrix organic light-emitting diode) display panels and AMOLED (Active Matrix OLED, active matrix organic light-emitting diode) display panels.
  • PMOLED Passive Matrix OLED, passive matrix organic light-emitting diode
  • AMOLED Active Matrix OLED, active matrix organic light-emitting diode
  • a PMOLED display panel forms a matrix with cathodes and anodes, and illuminates the pixels in the array in a scanning manner. Each pixel is operated in a short pulse mode to emit light with instant high brightness.
  • TFT Thin Film Transistor
  • a PMOLED display panel needs to form an isolation barrier between two adjacent rows and two adjacent columns through a photolithography process to avoid connection between the cathodes of two adjacent rows and two adjacent columns, resulting in a short circuit.
  • the inventor’s research found that in the process of forming the cathode layer by sputtering, because the moving direction of the metal atoms is not fixed, the cathode layer will also be formed on the side wall of the isolation wall, and the formed cathode layer adheres to the side wall of the isolation wall.
  • the attachment is relatively good, and it is not easy to fall off, so that the cathode layer on the isolation barrier is connected with the cathode layer on the light-emitting layer as a whole, which causes the cathodes of adjacent rows and adjacent columns to short-circuit.
  • the height of the isolation barrier needs to be the same as the height of the support layer used to support the mask (generally about 2.5 ⁇ m) due to the shadow effect of vapor deposition.
  • Isolation walls in related designs are usually formed by photolithography technology.
  • the inverted trapezoidal isolation walls in related designs cannot have a small side wall inclination angle, which will be further increased.
  • the difficulty of cathode blocking is increased, which is not conducive to the realization of a full-screen normal display.
  • the cathode isolation structure is a cathode isolation column, and the display device becomes thinner and thinner, which limits the height of the cathode isolation column, which in turn prevents the cathode isolation column from blocking the cathodes, resulting in a short circuit between adjacent cathodes.
  • a composite screen for example, a composite screen with an integrated AMOLED display panel and a PMOLED display panel, in order to facilitate the subsequent AMOLED display panel process, the height of the cathode isolation column in the PMOLED display panel will be further limited.
  • indium tin oxide can be used in the integrated composite screen instead of Mg or Ag as the cathode of the PMOLED display panel, and the material of the cathode spacer can be organic glue.
  • the ITO film is prepared by physical vapor deposition (PVD)
  • PVD physical vapor deposition
  • the sidewall of the cathode spacer will also be attached with the ITO film.
  • the ITO film attached to the sidewall will be adjacent to the adjacent cathode, so that the adjacent cathodes are formed by the ITO film attached to the sidewall of the cathode isolation column and the ITO film covering the upper surface of the cathode isolation column.
  • the metal film layer in turn causes the cathode to be short-circuited, so that the cathode isolation column in the related art has a poor effect of blocking the cathode, which increases the risk of connecting adjacent cathodes in the PMOLED display panel.
  • AMOLED display panels there are a large number of wiring layers, such as scan lines, data lines, etc., in the display panel.
  • traces are generally realized through a series of complex multi-process processes such as film formation-photolithography patterning-etching-stripping and stripping, and each layer of patterning needs to be repeated and recycled.
  • complex processes it is difficult to efficiently achieve some special process or graphical requirements.
  • the embodiment of the present application creatively proposes a process that can realize the patterning of the film layer, and the patterning of the film layer can be realized only through the process of film formation-photolithography patterning-etching-curing process. It is not necessary to repeat and recycle a series of complex multi-process processes such as film formation-photolithography patterning-etching-stripping.
  • the embodiment of the present application creatively proposes a structure that realizes film separation or patterning, which can realize the separation or patterning of the film layer that needs to be separated or patterned in a semiconductor structure or a display panel.
  • a cathode blocking structure with a warped structure at the end is formed on the pixel definition layer to further improve the effect of blocking the cathode.
  • the height of the cathode isolation column can be reduced or maintained, so that the prepared display panel has better display performance and thinner thickness.
  • patterning or isolation of other film layers such as metal wiring layers can be realized.
  • a semiconductor structure in one embodiment, includes a substrate and a partition structure provided on the substrate.
  • FIG. 2 is a schematic diagram of a partition structure provided with a warped structure according to an embodiment.
  • the partition structure 14 is used to partition the film layer above it.
  • the partition structure 14 at least includes a base film layer 141 and a partition film layer 142 stacked in sequence.
  • the barrier film layer 142 covers the base film layer 141, and at least one side of the barrier film layer 142 protrudes from the side of the base film layer 141, and the end of the barrier film layer 142 is a warped structure 1421.
  • the height of the gap between the lower surface of the end of the barrier film layer 142 and the substrate is greater than the thickness of the base film layer 141.
  • the end of the semiconductor structure disclosed in this embodiment is designed with a warped structure, which can be applied to thin film transistors or chips or any other structure that needs to be separated by a film.
  • the application scenario is not limited. In the following embodiments, only the application of the semiconductor structure in the manufacturing process of the display panel is taken as an example for description.
  • a display panel which includes a substrate, and a partition structure 14 disposed on the substrate, so as to isolate or pattern the film layer above the partition structure 14.
  • the display panel may include a substrate 10, a first electrode or anode 11, a pixel defining layer 12, a light emitting layer 13, a partition structure 14, and a second electrode or cathode 16 and other components.
  • the substrate 10 may be a single-layer rigid substrate, such as a glass substrate, a quartz substrate, or a plastic substrate; the substrate 10 may also be a single-layer flexible substrate, such as a PI film (Polyimide film).
  • a corresponding functional layer such as a buffer layer (BL, Buffer Layer) is prepared on the substrate 10.
  • the substrate 10 may have a composite film structure.
  • the substrate 10 may include a glass substrate, a PI layer, a buffer layer (BL), etc., which are sequentially stacked.
  • the anode 11 as the first electrode described above is provided on the substrate 10.
  • the pixel defining layer 12 covers the exposed surface of the substrate 10 and a part of the upper surface of the anode 11.
  • the light-emitting layer 13 can penetrate the pixel defining layer 12 and cover the exposed surface of the anode 11.
  • the partition structure 14 may be arranged on the upper surface of the pixel definition layer 12 adjacent to the light-emitting layer 13, and the cathode 16 may be formed on the light-emitting layer 13.
  • the cathode 16 when the cathode 16 is formed, a layer of the same material as that of the cathode 16 will inevitably be formed on the partition structure 14, but because the partition structure has a warped structure, that is, the lower end of the partition film layer The height of the gap between the surface and the substrate is greater than the thickness of the base film layer, thereby effectively reducing the probability of depositing cathode material on the partition structure and reducing the thickness of the deposited cathode material. At the same time, it can effectively isolate adjacent cathodes and prevent them from being connected and causing short circuits. phenomenon.
  • the above-mentioned partition structure 14 is a composite film structure, so the partition structure 14 can be a double-layer film structure or a multilayer film structure, which can be specifically set according to actual needs.
  • the double-layer structure as an example, in which the barrier film layer 142 covers and protrudes from the base film layer 141, the end of the barrier film layer 142 is a warped structure 1421, and the warped structure 1421 may have the shape shown in FIG. It can have other warped shapes, as long as the partition structure 14 can separate the film layer located thereon and the film layer located on the side of the partition structure 14 formed in the same deposition step.
  • the upper cathode layer can be separated into mutually isolated cathodes.
  • the above-mentioned isolation structure separates the cathode layer into several mutually isolated regions, thereby effectively avoiding continuous film layers between the cathodes and causing short circuits to improve the display performance and reliability of the display panel.
  • the ends of the partition structure can be formed with different shapes, sizes, and angles of warping structures according to actual process requirements. .
  • At least one end of the barrier film in the barrier structure has a warped structure.
  • both ends of the barrier film may also have a warped structure.
  • the warping structure can be set according to the actual structure requirements to ensure the partition effect between the film layers.
  • the distance between the highest point of the lower surface of the barrier film layer and the upper surface of the pixel definition layer is 300 nm-450 nm.
  • the specific embodiment is shown in FIG. 1, the distance between the highest point A of the lower surface of the partition film layer 142 and the plane where the upper surface 121 of the pixel definition layer 12 is located is 300nm-450nm, and the upper surface 121 of the pixel definition layer 12 is The pixel defines the contact surface between the layer 12 and the cathode 16.
  • the distance between the highest point A of the lower surface of the barrier film layer 142 and the plane where the upper surface 121 of the pixel definition layer 12 is located may also be 350 nm, 400 nm, or 450 nm.
  • the distance between the highest point of the lower surface of the partition film and the plane of the upper surface of the pixel definition layer can be set according to the thickness of the film layer that needs to be patterned or partitioned in the actual semiconductor structure or the display panel structure to ensure effective implementation The partition of the film layer above the partition structure.
  • the partition structure 14 may include a base film layer 141 and a partition film layer 142, and the base film layer 141 and the partition film layer 142 are sequentially stacked in a direction away from the upper surface of the substrate 10, wherein the base film layer 141 For the inorganic film layer.
  • the thickness of the inorganic film layer is in the range of 50nm-150nm.
  • the inventors selected the thickness of the inorganic film layer to be 70nm, 90nm, 100nm, and 120nm as the base film to prepare the partition structure. After verification on the actual process It is found that the partition structure formed by the inorganic film layer of the above thickness can better realize the partition of the cathode, and can ensure the display reliability of the display panel.
  • those skilled in the art when preparing the partition structure, those skilled in the art can choose an inorganic film layer with a smaller thickness as the basic film layer to form the partition structure. The specific selected thickness can be determined according to the actual process and application scenarios.
  • the material of the inorganic film layer may be a transparent inorganic material
  • the transparent inorganic material includes indium tin oxide, indium zinc oxide, silver-doped indium tin oxide, silver-doped indium zinc oxide, indium Materials such as gallium zinc oxide, indium tin oxide, or aluminum-doped zinc oxide.
  • the light transmittance of the transparent inorganic material may be greater than 70%, so as to ensure the light-sensing effect of the photosensitive device such as a camera arranged under the transparent display panel, and achieve a better shooting effect.
  • the light transmittance can also be other values, for example, the light transmittance is 80% or 90%, to ensure the light transmittance of the transparent display panel and improve the photosensitive effect of the photosensitive device under the screen. To achieve full display.
  • other film layers of the display panel can also be made of transparent materials.
  • the transparent material used when preparing the first electrode and/or the second electrode includes at least one of indium tin oxide, indium zinc oxide, silver-doped indium tin oxide, and silver-doped indium zinc oxide.
  • the transparent material used in the preparation of the first electrode and/or the second electrode adopts silver-doped indium tin oxide or silver-doped indium zinc oxide to ensure the high light transmittance of the display panel.
  • the resistance of the first electrode and/or the second electrode is reduced.
  • the inorganic film layer can also be a non-transparent material, which can be set according to actual process requirements.
  • the barrier film layer is an organic film layer or an inorganic film layer.
  • the barrier film layer is an organic film layer, as shown in FIG. 2, the barrier film layer 142 covers and extends over the upper surface of the base film layer 141, and can be formed on the end of the barrier film layer 142 through different patterning processes.
  • Warped structure 1421 The partition structure with a warped structure can effectively partition the film layer located above the partition structure, such as a cathode prepared on the partition structure, to avoid short-circuiting of adjacent cathodes.
  • the thickness of the organic film layer ranges from 1um to 2um.
  • the inventors used the thicknesses of the organic film layer to be 1.2um, 1.4um, 1.6um, and 1.8um respectively for experimental verification, and found that in the actual process,
  • the partition structure formed by using the organic film layer of the above thickness as the partition film layer can better realize the partition of the cathode and ensure the display effect of the display panel.
  • those skilled in the art can select an organic film layer with a smaller thickness while realizing the separation of the cathode and ensuring the display effect of the display panel.
  • the material of the organic film layer is transparent organic glue.
  • the transparent organic glue can be photosensitive polyimide, or other transparent or non-transparent organic glues, and the material can be specifically selected according to specific process requirements and application scenarios, which is not limited.
  • FIG. 3 is a schematic structural diagram of a partition structure in an embodiment
  • FIG. 4 is a schematic structural diagram of a partition structure in another embodiment.
  • the partition film layer 142 is an inorganic film layer
  • the partition film layer 142 covers and protrudes from the upper surface of the base film layer 141.
  • the height of the gap between the lower surface of the end of the barrier film layer 142 and the lower surface of the base film layer 141 is equal to the thickness of the base film layer 141.
  • the selective etching ratio between the base film layer 141 and the barrier film layer 142 is greater than 1, for example, 3, 5, or 10, etc., so that the barrier film layer 142 is covered and extended by an etching process (such as wet etching) ⁇ Basic film layer 141.
  • the barrier film layer 142 is an inorganic film layer
  • the base film layer may be etched by dry etching or wet etching.
  • the thickness of the laminated layer of the partition structure can be set in the range of 1.6um-2.6um, which can realize the patterning or partition of the film layer.
  • the blocking film layer is made of inorganic material, the effect of isolating water and oxygen can also be achieved to ensure the display effect of the display panel.
  • the material of the base film layer includes indium tin oxide, indium zinc oxide, silver-doped indium tin oxide, silver-doped indium zinc oxide, indium gallium zinc oxide, indium tin oxide, aluminum Doped zinc oxide, silicon nitride, or silicon oxide and other materials.
  • the materials of the aforementioned base film layer 141 and the barrier film layer 142 may be the same or different.
  • the base film layer 141 and the barrier film layer 142 are made of the same material, for example, the base film layer 141 and the barrier film layer 142 are made of negative photoresist, which can effectively reduce the process difficulty and cost.
  • FIG. 5 is a schematic structural view of the partition structure of an embodiment.
  • the partition structure may also be composed of the third film layer 15, the base film layer 141 and the partition film layer 142, that is, the In the direction of the upper surface of the substrate 10, the third film layer 15, the base film layer 141, and the barrier film layer 142 are sequentially stacked to form a barrier structure 14 as shown in FIG. 5.
  • a recessed area is formed on the side of the base film layer 141 relative to the side of the third film layer 15 and the barrier film layer 142 by using the difference in the etching rate between the film layer materials;
  • a warped structure 1421 is formed at the end of the partition film layer 142 through different patterning processes to improve the effect of the partition structure separating the film layer located on it, such as blocking the cathode. Effect to ensure the display effect of the display panel.
  • the specific patterning process refer to the following specific embodiments.
  • the isolation structure can also be used to isolate the wiring material layer to form a plurality of wires insulated from each other.
  • a pixel circuit layer and wiring connected to the pixel circuit are formed on a substrate, including scan lines, data lines, and border wiring.
  • the wiring material layer can be separated by the partition structure to form multiple wirings that are mutually insulated.
  • the specific partition structure refer to the above-mentioned embodiment, which will not be repeated here. It should be noted that the application scenarios of the partition structure are different. The thickness of the film structure, the distance between the highest point of the lower surface of the partition film and the plane where the lower surface of the base film is located, and other parameters can vary with different application scenarios.
  • the pixel circuit here can be a conventional AMOLED display panel pixel circuit, such as a circuit including 1 thin film transistor (1T circuit), a circuit including 2 thin film transistors and a capacitor (2T1C circuit), and 3 thin film transistors. And 1 capacitor circuit (3T1C circuit), circuit including 3 thin film transistors and 2 capacitors (3T2C circuit), circuit including 7 thin film transistors and 1 capacitor (7T1C circuit), or including 7 thin film transistors and Circuit with 2 capacitors (7T2C circuit). This will not be described in detail.
  • the pixel circuit can also be an AMOLED display panel with only one thin film transistor.
  • FIG. 6 is a cross-sectional view of an AMOLED display panel according to an embodiment.
  • the AMOLED display panel includes a substrate 710 and a pixel circuit 720 (that is, a TFT array) disposed on the substrate 710.
  • the pixel circuit 720 is provided with a first electrode layer.
  • the first electrode layer includes a plurality of first electrodes 730.
  • the first electrode 730 corresponds to the pixel circuit 720 one to one.
  • the first electrode 730 here is an anode.
  • the AMOLED display panel further includes a pixel definition layer 740 disposed on the first electrode 730.
  • the pixel defining layer 740 has a plurality of openings, and a light-emitting structure layer 750 is disposed in the openings to form a plurality of sub-pixels.
  • the sub-pixels correspond to the first electrodes 730 one-to-one.
  • a second electrode 760 is provided above the light emitting structure layer 750, and the second electrode 760 is a cathode.
  • the cathode is a surface electrode, that is, a whole surface electrode formed of a whole surface electrode material.
  • the pixel circuit is provided with scan lines, data lines, and TFT switching elements. Both the scan line and the data line are connected to the TFT switching element.
  • the present application also provides a display terminal.
  • the display terminal may include a device body 52 and a display screen 54.
  • the display screen 54 covers the device body 52 and is connected to the device body 52, and the display screen 54 can be provided with a main screen body 542 area and a sub screen body 544 area. Both the main screen body 542 and the sub screen body 544 can be used to display static or dynamic images.
  • the sub-screen body 544 is a transparent display screen, under which photosensitive devices such as a camera 526 and a light sensor can be arranged.
  • the above-mentioned display screen 54 includes an integrated main screen body 542 and a secondary screen body 544.
  • the main screen body 542 can be an AMOLED display panel
  • the secondary screen body 544 can be a PMOLED display panel or an AMOLED display panel.
  • the pixel circuit in the AMOLED display panel only includes a switching element (that is, a driving TFT) without a capacitor structure.
  • the secondary screen body 544 is a PMOLED display panel
  • the secondary screen body 544 may be provided with the display panel described in any embodiment of the present application, such as those described in any embodiment corresponding to FIGS. 1-5
  • the partition structure further enhances the effect of the partition structure to partition the cathodes, avoiding the short circuit of adjacent cathodes and affecting the display performance and effect of the display terminal, so as to improve the display performance and effect of the composite screen.
  • the main screen body 542 may be an AMOLED display panel
  • the auxiliary screen body 544 may be an AMOLED display panel.
  • the wiring material layers in the main screen body 542 and the auxiliary screen body 544 may be provided with any of the embodiments in this application
  • the said partition structure further enhances the patterning or partition effect of the film layer (such as the wiring material layer) located above the partition structure.
  • the above-mentioned display terminal may be an electronic device with a display screen, such as a mobile phone, a computer, a smart watch, and a smart bracelet.
  • the sub-screen 544 in order to increase the amount of light collected by the photosensitive device through the aforementioned sub-screen 544, the sub-screen 544 can be in a non-display state when the photosensitive device is working, so as to increase the transparency of the sub-screen 544.
  • the light rate improves the performance of the photosensitive device to collect external light.
  • the sub-screen body 544 is in a display state, so as to increase the screen-to-body ratio and realize a truly comprehensive display.
  • FIG. 10 is a schematic flowchart of a method for manufacturing a display panel according to an embodiment
  • FIGS. 11A-11E are A flowchart of an embodiment of preparing a partition structure with a warped structure.
  • a composite display with an integrated AMOLED display panel and PMOLED display panel is proposed, and both display areas can be used to display static or dynamic images.
  • the PMOLED display panel is a transparent display panel, and a photosensitive device such as a camera or a light sensor can be arranged under the transparent display panel. When the photosensitive device is not working, the transparent display panel is used to display pictures normally, and when the photosensitive device such as a camera needs to take pictures, the transparent display panel is in a non-display state to ensure the normal operation of the photosensitive device.
  • the process of forming the cathode by sputtering In the isolation barrier the cathode material and the cathode on the light-emitting layer are connected as a whole, which causes the cathodes of adjacent rows and columns to be short-circuited; when using PVD to prepare indium tin oxide (ITO) cathodes, because the ITO cathode material is in The cathode isolation column (such as organic glue) has better step coverage.
  • ITO indium tin oxide
  • the AMOLED display panel in the composite display limits the height of the cathode isolation column (generally about 2.5 ⁇ m), which will cause the cathode isolation column
  • the cathode blocking effect is not good.
  • the present application creatively provides a method for preparing a display panel, which can be applied to the patterning or blocking of the film layer in the preparation of the display panel and the display panel described in any of the above embodiments. include:
  • step S01 a substrate is provided, and a first electrode, a pixel definition layer with pixel openings, and a light-emitting layer are provided on the substrate.
  • the substrate here can be a single-layer rigid substrate, such as a glass substrate, a quartz substrate, or a plastic substrate.
  • the substrate can also be a single-layer flexible substrate, such as a PI film, and then a corresponding functional layer, such as a buffer layer (BL), etc., is prepared on the substrate.
  • the substrate here can be a multi-layer rigid substrate or a multi-layer flexible substrate.
  • a multi-layer flexible substrate can include a glass substrate, a PI layer, a buffer layer (BL), etc., which are stacked in sequence, and specifically can be used in sequence such as double
  • the above-mentioned substrate is prepared by processes such as a layer PI process and a three-layer film process.
  • the substrate here can be a substrate of a PMOLED display panel or an AMOLED display panel, or a substrate of a composite display with an integrated AMOLED display panel and a PMOLED display panel.
  • the integrated display panel AMOLED display panel and PMOLED display panel can share the same substrate. That is, it is formed in the same process, which can simplify the manufacturing process of the composite screen.
  • the specific structure of the composite screen can be set according to its application scenario, which is not described in detail.
  • a first electrode layer film is prepared on the substrate 10, and the first electrode at this time is the anode.
  • the first electrode film is etched and patterned to form a plurality of first electrodes 11.
  • a pixel definition layer (PDL) 12 is prepared on the first electrode.
  • the pixel definition layer 12 has a pixel opening and exposes the first electrode 11.
  • An organic light-emitting material is evaporated in the pixel opening to form a light-emitting layer 13, and the light-emitting layer 13 is in contact with the first electrode 11.
  • a pixel circuit is also provided on the substrate 10.
  • the pixel circuit is a 2T1C circuit, a 3T1C circuit, a 3T2C circuit, a 7T1C circuit, or a 7T2C circuit.
  • the conventional pixel circuit structure can also be the above-mentioned structure with only one transistor and no capacitor. ⁇ pixel circuit structure.
  • Step S02 preparing a first inorganic film layer film and a second organic film layer film stacked in sequence.
  • the indium tin oxide (ITO) film as the first inorganic film layer film can also be other inorganic materials, which is not limited.
  • the first inorganic film layer covers the pixel definition layer and the light emitting layer, and a second organic film layer film is formed on the first inorganic film layer film.
  • an ITO film is prepared on the pixel defining layer 12 and the light emitting layer 13 as the first inorganic film layer film 1411, and the first inorganic film layer film 1411 covers the upper surface of the pixel defining layer 12 and the light emitting layer 13
  • the upper surface of the ITO film is coated with organic glue on the entire surface as the second organic film layer film 1422.
  • the organic glue here includes transparent or non-transparent organic glue such as photosensitive polyimide.
  • step S03 the second organic film layer is patterned to form a second organic film layer, wherein during the patterning process, the second organic film layer material is not cured.
  • the excess organic glue may be removed by, for example, an ashing process to form the second organic film layer 1423.
  • Step S04 using the second organic film layer 1423 as a mask, the first inorganic film layer is etched to form the base film layer 141.
  • the ITO film as the first inorganic film layer film 1411 is wet-etched. Since the second organic film layer 1423 has certain corrosion resistance to the above-mentioned wet etching solution, and at the same time, after the over-etching (ie side etching) treatment is continued, a groove is formed on the sidewall of the ITO film layer, wherein ,
  • the cutting depth of the groove can be 1 ⁇ m-2.5 ⁇ m. In other optional embodiments, the cutting depth of the groove may be 1.5 ⁇ m, 2 ⁇ m, etc., and the cutting depth of the groove may be set according to the process parameters of the specific application.
  • an etching barrier film (not shown in the figure) is prepared on the side of the first inorganic film layer film 1411 close to the substrate, and the etching barrier film covers the pixel defining layer 12 and the light emitting layer 13.
  • the first inorganic film is etched by the wet method, since the second organic film 1422 and the etching barrier film have certain corrosion resistance to the above wet etching solution (the etching barrier film and the first The etching selection ratio between the inorganic film layers 1411 is less than 1), so the film layers such as the pixel definition layer 12 and the light emitting layer 13 located under the etching barrier film can be effectively protected from the wet etching.
  • Etching to remove excess etching barrier film for example, etching to remove the etching barrier film located on the light-emitting layer 13 and partly on the pixel defining layer 12, that is, the second organic film layer 1421 and the base film layer 141 are Mask, remove the remaining part of the etching stop film to form an etching stop layer.
  • the above-mentioned etching stop layer, ITO layer (base film layer 141) and organic glue layer (second organic film layer 1423) are sequentially stacked.
  • Step S05 curing the second organic film layer to form a warped structure at the end of the second organic film layer, and the base film layer and the barrier film layer with the warped structure at the end are sequentially stacked to form the barrier structure.
  • the second organic film layer 1423 is cured, which can be cured by baking.
  • the second organic film layer 1423 A warped structure 1421 is formed at the end of the film to form a barrier film 142, and then a barrier structure 14 in which a base film 141 and a barrier film 142 with a warped structure at the end are sequentially stacked.
  • the shape and height of the warping structure at the end of the barrier film layer are affected by specific baking and curing parameters, and the corresponding parameters can be set according to the requirements of the actual application.
  • Step S06 a second electrode layer is prepared on the partition structure, and the partition structure partitions the second electrode layer into mutually insulated second electrodes.
  • the subsequent second electrode layer that is, the deposition of the cathode layer
  • the coverage of the second electrode layer on the surface of the partition structure 14 can be effectively reduced, that is, the partition structure with the warped structure at the end can effectively isolate the second electrode layer as described above. Isolated second electrode structure.
  • the partition structure formed by the inorganic layer (ie, ITO) and the organic glue layer is used, and the warped structure is formed at the end of the organic glue, thereby effectively improving the subsequent film The probability of layer patterning or partitioning.

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Abstract

一种显示面板，包括一种半导体结构，所述半导体结构包括基板（10）；隔断结构（14），设置在基板（10）上，用于隔断位于其上方的膜层；该隔断结构（14）至少包括依次层叠设置的基础膜层（141）和隔断膜层（142）；隔断膜层（142）覆盖基础膜层（141），所述隔断膜层（142）的至少一个侧边凸出于基础膜层（141）的侧边，隔断膜层（142）的端部为翘曲结构（1421）。

Description

显示面板及其制备方法和半导体结构
相关申请的交叉引用
本申请要求于2019年4月12日提交中国专利局，申请号为201910296126.0，申请名称为“半导体结构、显示面板及其制备方法和显示终端”的中国专利申请的优先权,在此将其全文引入作为参考。
技术领域
本申请涉及显示技术领域，特别是涉及一种显示面板及其制备方法和半导体结构。
背景技术
随着电子设备的快速发展，用户对屏占比的要求越来越高，使得电子设备的全面屏显示受到业界越来越多的关注。
传统的电子设备如手机、平板电脑等，由于需要集成诸如前置摄像头、听筒以及红外感应元件等，故而可通过在显示屏上开槽(Notch)。在开槽区域设置摄像头、听筒以及红外感应元件等，但开槽区域并不用来显示画面，如相关技术中的刘海屏。或者采用在屏幕上开孔的方式。对于实现摄像功能的电子设备来说，外界光线可通过屏幕上的开孔处进入位于屏幕下方的感光元件。但是这些电子设备均不是真正意义上的全面屏，并不能在整个屏幕的各个区域均进行显示，如在摄像头区域不能显示画面。
发明内容
基于此，有必要针对上述技术问题提供了一种半导体结构、显示面板及其制备方法和显示终端，从真正意义提高屏占比，实现真正的全面屏显示。
本申请实施例的第一方面，提供了一种显示面板，包括一种半导体结构，所述半导体结构包括：
基板；
隔断结构，所述隔断结构设置在所述基板上，用于隔断位于所述隔断结构上方的膜层；
所述隔断结构至少包括依次层叠设置的基础膜层和隔断膜层；其中，所述隔断膜层覆盖所述基础膜层，且所述隔断膜层的至少一个侧边伸出于所述基础膜层的侧边，所述隔断膜层的端部为翘曲结构。
隔断结构的隔断膜层的至少一个侧边凸出于基础膜层的侧边，且隔断膜层的端部为翘曲结构。也就是说，在隔断膜层的端部形成翘曲结构，使隔断膜层的端部的下表面与基板间的空隙高度，大于基础膜层的厚度，能够有效实现位于隔断结构上方的膜层的隔断效果，不至于使得同一膜层需要隔断的相邻结构发生联结，提高半导体结构的工作稳定性。
本申请的另一方面，还提供一种显示面板的制备方法包括：
提供基板；
在所述基板上形成隔断结构，隔断位于所述隔断结构上方的膜层；
其中，所述隔断结构至少包括依次层叠的基础膜层和隔断膜层；所述隔断膜层覆盖所述基础膜层，且所述隔断膜层的至少一个侧边伸出于所述基础膜层的表面；所述隔断膜层的端部为翘曲结构。
本申请的实施例还提供了一种半导体结构，包括：
基板；
隔断结构，所述隔断结构设置在所述基板上，用于隔断位于所述隔断结构上方的膜层；
所述隔断结构至少包括依次层叠设置的基础膜层和隔断膜层；其中，所述隔断膜层覆盖所述基础膜层，且所述隔断膜层的至少一个侧边伸出于所述基础膜层的侧边，所述隔断膜层的端部为翘曲结构。
在上述显示面板及其制备方法和半导体结构中，提供的半导体结构或显示面板的隔断结构是复合膜层结构，包括依次堆叠的基础膜层和隔断膜层，并且基础膜层和隔断膜层之间可以形成台阶，且隔断膜层的端部为翘曲结构，使隔断膜层的端部的下表面与基板间的空隙高度，大于基础膜层的厚度，保证了需要隔断的膜层能够很好地被隔断结构隔断，不至于使得同一膜层需要隔断的相邻结构发生联结，从而能够使得半导体结构或显示面板稳定工作。此外，还提供了一种能够实现膜层图形化的工艺过程，仅通过成膜-光刻图形化-刻蚀-固化工艺制程就可实现膜层的图形化或隔断，无需重复、循环采用成膜-光刻图形化-刻蚀-去胶剥离等一系列复杂的多道工艺制程来实现。对于一些特殊工艺或图形化能够高效地实现。
附图说明
图1是一实施例的显示面板的结构示意图；
图2是一实施例的设置翘起结构的隔断结构的结构示意图；
图3是一实施例的隔断结构的结构示意图；
图4是图3实施例的隔断结构的变形结构示意图；
图5是图3实施例的隔断结构的变形结构示意图；
图6是一实施例的AMOLED显示面板的剖视图；
图7是一实施例的显示终端的结构示意图；
图8是图7中所示显示屏的结构示意图；
图9是图8中所示复合显示屏的结构示意图；
图10是一实施例的显示面板的制备方法的流程示意图；
图11A-11E是一实施例的制备具有翘曲结构的隔断结构的流程图。
具体实施方式
为了便于理解本申请，下面将参照相关附图对本申请进行更全面的描述。附图中给出了本申请的较佳的实施例。但是，本申请可以以许多不同的形式来实现，并不限于本文所描述的实施例。相反地，提供这些实施例的目的是使对本申请的公开内容的理解更加透彻全面。
此外，在说明书中，短语“平面示意图”是指当从上方观察目标部分时的附图，短语“截面示意图”是指从侧面观察通过竖直地切割目标部分截取的剖面时的附图。
针对摄像头区域不能显示画面的问题，发明人研发了一种显示面板，其通过在开槽区域设置透明显示面板的方式来实现电子设备的全面屏显示。根据驱动方式的不同，OLED显示面板可以分为PMOLED(Passive Matrix OLED，被动矩阵有机发光二极管)显示面板和AMOLED(Active Matrix OLED，主动矩阵有机发光二极管)显示面板两种。以PMOLED显示面板为例，PMOLED显示阵列的同一行显示单元的同一性质电极是共用的，并且同一列显示单元同一性质电极也是共用的。具体而言，PMOLED显示面板是以阴极、阳极构成矩阵，以扫描方式点亮阵列中的像素，每个像素都是操作在短脉冲模式下，为瞬间高亮度发光。研究发现，由于PMOLED显示面板无薄膜晶体管TFT(Thin Film Transistor)背板和金属走线，使得光线透过率高，而可以被应用于前述的透明显示面板。
通常，PMOLED显示面板需要通过光刻工艺形成位于相邻两行、相邻两列之间的隔离挡墙，以避免相邻的两行、相邻两列的阴极之间发生联结，导致短路。发明人研究发现，溅射形成阴极层的过程中，由于金属原子的移动方向不定，使隔离挡墙的侧壁上也会形成阴极层，而且形成的阴极层与隔离挡墙的侧壁的粘附性比较好，不易脱落，从而使隔离挡墙上阴极层与发光层上的阴极层连接为一体，导致相邻的行、相邻的列的阴极发生短路。同时，在蒸镀形成其他结构膜层时，由于考虑到蒸镀的阴影效应，隔离挡墙的高度需与用于支撑掩膜板的支撑层的高度相同(一般为2.5μm左右)。相关设计中隔离挡墙通常采用 光刻技术形成，由于受限于隔离墙高度、材料及设备，例如相关设计中的倒梯形的隔离挡墙的侧壁倾斜角度无法做到较小，会进一步加大了阴极阻断的难度，不利于实现全面屏正常显示。
对PMOLED显示面板而言，阴极隔断结构为阴极隔离柱，显示器件越来越薄，会限制阴极隔离柱的高度，进而会使得阴极隔离柱不能隔断阴极，导致相邻阴极短路。当采用复合屏时，例如采用AMOLED显示面板和PMOLED显示面板一体化设计的复合屏，为了利于后续AMOLED显示面板工艺的进行，会进一步的限制PMOLED显示面板中阴极隔离柱的高度。
另外，一体化复合屏中可采用氧化铟锡(indium tin oxide，以下简称ITO)来代替Mg或Ag作为PMOLED显示面板的阴极，阴极隔离柱的材质可为有机胶。在采用物理气相沉积(physical vapor deposition，以下简称PVD)制备ITO薄膜时，由于ITO薄膜在有机胶上具有较好的台阶覆盖性，会使得阴极隔离柱的侧壁也会附着有ITO薄膜。而该附着在侧壁的ITO薄膜会与邻近的阴极相邻，从而使得相邻的阴极之间通过附着在阴极隔离柱侧壁的ITO薄膜和覆盖在阴极隔离柱上表面的ITO薄膜形成连续的金属膜层，进而导致阴极短路，使相关技术中的阴极隔离柱的隔断阴极的效果不佳，会增大PMOLED显示面板中相邻阴极连接的风险。
此外，对于AMOLED显示面板，在其显示面板中存在大量的走线层，如扫描线、数据线等。在形成上述走线时，一般都是通过成膜-光刻图形化-刻蚀-去胶剥离等一系列复杂的多道工艺制程来实现的，且每层图形化均需要重复、循环采用该套复杂流程，很难高效地实现一些特殊工艺或图形化需求。
为了解决上述的问题，本申请的实施例中创造性的提出一种能够实现膜层图形化的工艺过程，仅通过成膜-光刻图形化-刻蚀-固化工艺制程就可实现膜层的图形化或隔断，无需重复、循环采用成膜-光刻图形化-刻蚀-去胶剥离等一系列复杂的多道工艺制程。此外，本申请的实施例中创造性的提出一种实现膜层隔断或图形化的结构，可实现半导体结构或显示面板中需要隔断或图形化的膜层的隔断或图形化。如在显示面板中，通过在像素定义层上形成端部具有翘曲结构的阴极隔断结构，以进一步提升隔断阴极的效果。同时，还可减小或保持阴极隔离柱的高度，使得所制备的显示面板具有更好的显示性能及更薄的厚度。或者，通过该图形化工艺来实现其他膜层例如金属走线层的图形化或是隔断。
在一实施例中提供一种半导体结构，所述半导体结构包括基板和设置在基板上的隔断结构。如图2所示，图2是一实施例的设置有翘曲结构的隔断结构示意图。所述隔断结构 14用于隔断位于其上方的膜层。其中，隔断结构14至少包括依次层叠设置的基础膜层141和隔断膜层142。隔断膜层142覆盖基础膜层141，并且隔断膜层142的至少一个侧边凸出于基础膜层141的侧边，且隔断膜层142的端部为翘曲结构1421。也就是说，隔断膜层142的端部的下表面与基板间的空隙高度，大于基础膜层141的厚度。
本领域技术人员可以理解，本实施例公开的半导体结构中的端部为翘曲结构的设计，可以应用于薄膜晶体管或芯片或其他任一需要实现膜层隔断的结构中，本实施例对其应用场景不做限定。下面实施例中仅以该半导体结构在显示面板制备过程中的应用为例进行说明。
在一实施例中还提供一种显示面板，该显示面板包括基板，设置在基板上的隔断结构14，以使位于隔断结构14上方的膜层的隔断或图形化。如图1所示，具体的，该显示面板可包括基板10、第一电极即阳极11、像素定义层12、发光层13、隔断结构14和第二电极即阴极16等部件。
在一实施例中，基板10可以为单层的刚性基板，如玻璃基板、石英基板或者塑料基板等；基板10也可为单层的柔性基板，如PI薄膜(Polyimide film)等。在所述基板10上制备相应的功能层，如缓冲层(BL，Buffer Layer)等。或者所述基板10可为复合膜层结构，例如所述基板10可包括依次层叠设置的玻璃基板、PI层、缓冲层(BL)等。上述的第一电极即阳极11设置在基板10之上。像素定义层12覆盖基板10暴露的表面以及阳极11的部分上表面。发光层13则可贯穿该像素定义层12并覆盖阳极11的暴露的表面。隔断结构14可设置在像素定义层12的上表面临近发光层13的位置，阴极16可形成在发光层13之上。
应当理解，在形成阴极16时，隔断结构14上也会不可避免的形成与阴极16的材料相同的层，但是由于该隔断结构具有翘曲结构，也就是说，隔断膜层的端部的下表面与基板间的空隙高度大于基础膜层的厚度，从而有效减小隔断结构上沉积阴极材料的机率和减小沉积的阴极材料的厚度，同时能够有效隔断相邻阴极，防止其发生联结导致短路现象。
参照图1，上述的隔断结构14为复合膜层结构，故隔断结构14可为双层膜层结构或多层膜层结构，具体可根据实际需求而设定。以双层结构为例，其中隔断膜层142覆盖并伸出基础膜层141，隔断膜层142的端部为翘曲结构1421，所述翘曲结构1421可为图1所示的形状，也可为其他的翘曲形状，只要该隔断结构14能够隔断位于其上的膜层与位于所述隔断结构14侧方的在同一沉积步骤中形成的膜层即可，如用于将位于发光层之上的阴极层隔断为相互隔离的阴极即可。换言之，在制备形成阴极时，上述的隔断结构将阴 极层隔断成若干个相互隔离的区域，进而有效避免阴极之间出现连续的膜层而造成短路，以提升显示面板的显示性能和可靠性。
在一个实施例中，如图1-2所示，为了进一步提升隔断结构隔断阴极的效果，可根据实际工艺需求在上述的隔断结构的端部形成不同形状，不同尺寸，不同角度的翘曲结构。
在一个实施例中，隔断结构中隔断膜层的至少一个端部为翘曲结构，当然，隔断膜层的两个端部也可均为翘曲结构。具体可根据实际结构需求设置翘曲结构，以保证膜层间的隔断效果。
在一个实施例中，隔断膜层下表面的最高点与像素定义层的上表面之间的间距为300nm-450nm。具体实施例如图1所示，隔断膜层142下表面的最高点A点相对于像素定义层12的上表面121所在的平面之间的距离为300nm-450nm，像素定义层12的上表面121为像素定义层12与阴极16之间的接触面。在其他实施例中，隔断膜层142下表面的最高点A点相对于像素定义层12的上表面121所在的平面之间的距离也可为350nm、400nm、或者450nm等。可根据实际半导体结构或显示面板结构中需要图形化或隔断的膜层的厚度设置隔断膜层下表面的最高点相对于像素定义层的上表面所在的平面之间的距离，以保证能够有效实现位于隔断结构上方的膜层的隔断。
参照图2，隔断结构14可包括基础膜层141和隔断膜层142，且该基础膜层141和隔断膜层142在沿远离上述基板10的上表面的方向依次层叠设置，其中基础膜层141为无机膜层。
在一实施例中，该无机膜层的厚度范围为50nm-150nm，发明人分别选取无机膜层的厚度为70nm、90nm、100nm和120nm作为基础膜层制备隔断结构，通过在实际工艺上验证后发现上述厚度的无机膜层形成的隔断结构，均能够较好的实现阴极的隔断，可以保证显示面板的显示可靠性。本领域技术人员为实现显示面板的轻薄化，在制备隔断结构时，可选择厚度较小的无机膜层作为基础膜层，以形成隔断结构。具体选择的厚度可根据实际工艺和应用场景确定。
在一实施例中，所述无机膜层的材料可以是透明无机材料，所述透明无机材料包括氧化铟锡、氧化铟锌、掺杂银的氧化铟锡、掺杂银的氧化铟锌、铟镓锌氧化物、铟锡氧化物、或铝掺杂的氧化锌等材料。所述透明无机材料的透光率可大于70％，以保证设置在透明显示面板下方的感光器件如摄像头的感光效果，实现较佳的拍摄效果。当然，在保证感光器件感光效果的同时，透光率也可为其他值，例如透光率为80％或90％，以保证透明显示面板的透光率，提高屏下感光器件的感光效果，以实现全面显示。此时，显示面板的其他膜 层也可设置为透明材料。在一实施例中，在制备第一电极和/或第二电极时采用的透明材料包括氧化铟锡、氧化铟锌、掺杂银的氧化铟锡和掺杂银的氧化铟锌中的至少一种。在一实施例中，在制备第一电极和/或第二电极采用的透明材料采用掺杂银的氧化铟锡或者掺杂银的氧化铟锌，以在保证显示面板的高透光率的基础上，减小第一电极和/或所述第二电极的电阻。当然，该无机膜层也可以为非透明的材料，可根据实际工艺要求设定。
在一实施例中，所述隔断膜层为有机膜层或无机膜层。当隔断膜层为有机膜层时，如图2所示，该隔断膜层142覆盖并伸出基础膜层141的上表面，通过不同的图形化工艺过程可在隔断膜层142的端部形成翘曲结构1421。具有翘曲结构的隔断结构，能够有效隔断位于隔断结构上方的膜层，如在隔断结构上制备的阴极，避免相邻的阴极短接。
在一实施例中，所述有机膜层的厚度范围为1um-2um，发明人分别采用有机膜层的厚度为1.2um、1.4um、1.6um、1.8um进行试验验证，发现在实际工艺中，采用上述厚度的有机膜层作为隔断膜层形成的隔断结构，均能够较好的实现阴极的隔断，保证显示面板的显示效果。本领域技术人员为了实现显示面板轻薄化，可在实现阴极的隔断，保证显示面板的显示效果的同时选择厚度较小的有机膜层。
在一实施例中，有机膜层的材料为透明有机胶。优选地，该透明有机胶可为光敏聚酰亚胺，或是其他透明或非透明有机胶，可根据具体工艺要求和应用场景具体选择材质，对此不做限定。
图3是一实施例的隔断结构的结构示意图，图4是又一实施例中的隔断结构的结构示意图，如图3和图4所示，隔断膜层142为无机膜层，该隔断膜层142覆盖并伸出基础膜层141的上表面。此时，隔断膜层142端部的下表面与基础膜层141的下表面之间的空隙高度，等于基础膜层141的厚度。上述基础膜层141与隔断膜层142之间的选择刻蚀比大于1，比如可以为3、5或10等，使得通过刻蚀工艺(如湿法刻蚀)使隔断膜层142覆盖并伸出基础膜层141。当隔断膜层142为无机膜层时，可通过干法刻蚀，或者通过湿法刻蚀基础膜层膜材。隔断结构的叠层厚度范围可设置在1.6um-2.6um，能够实现膜层的图形化或隔断。进一步的，隔断膜层为无机材质时，也能够实现隔绝水氧的效果，以保证显示面板的显示效果。
在一实施例中，所述基础膜层的材料包括氧化铟锡、氧化铟锌、掺杂银的氧化铟锡、掺杂银的氧化铟锌、铟镓锌氧化物、铟锡氧化物、铝掺杂的氧化锌、氮化硅、或氧化硅等材料。其中，上述的基础膜层141和隔断膜层142的材质可相同或不同。当基础膜层141和隔断膜层142的材质相同时，例如该基础膜层141和隔断膜层142的材质均为负性光刻 胶，能够有效降低工艺难度及成本。
图5是一实施例的隔断结构的结构示意图，如图5所示，在一实施例中，隔断结构还可由第三膜层15、基础膜层141和隔断膜层142构成，即在沿远离上述基板10的上表面的方向上，上述的第三膜层15、基础膜层141和隔断膜层142依次叠置而构成如图5所示的隔断结构14。在刻蚀隔断膜层141时，利用膜层材料之间所存在的刻蚀速率差异，在基础膜层141的侧边相对于第三膜层15和隔断膜层142的侧边形成凹陷区；或当隔断膜层为有机膜层时，通过不同的图形化工艺过程使隔断膜层142的端部形成翘曲结构1421，以提升隔断结构隔断位于其上的膜层的效果，如隔断阴极的效果，以保证显示面板的显示效果。具体图形化工艺过程参考下述具体实施例。
在一实施例中，隔断结构也可用于走线材料层的隔断，以形成相互绝缘的多条走线。具体的，以AMOLED显示面板为例，在基板上形成像素电路层以及与像素电路相连的走线，包括扫描线、数据线和边框走线。可通过隔断结构隔断走线材料层，以形成相互绝缘的多条走线。具体隔断结构参照上述实施例，在此不做赘述。需要说明的是，隔断结构的应用场景不同，其膜层结构的厚度，隔断膜层下表面的最高点相对于基础膜层下表面所在的平面之间的间距等参数可随应用场景的不同而变化，以实现位于隔断结构上方膜层的隔断。此处的像素电路可以为常规的AMOLED显示面板的像素电路，如包括1个薄膜晶体管的电路(1T电路)、包括2个薄膜晶体管和1个电容的电路(2T1C电路)、包括3个薄膜晶体管和1个电容的电路(3T1C电路)、包括3个薄膜晶体管和2个电容的电路(3T2C电路)、包括7个薄膜晶体管和1个电容的电路(7T1C电路)、或包括7个薄膜晶体管和2个电容的电路(7T2C电路)。对此不做详细描述。像素电路也可为仅有一个薄膜晶体管的AMOLED显示面板。
图6为一实施例的AMOLED显示面板的剖视图。如图6所示，所述AMOLED显示面板包括基板710以及设置于基板710上的像素电路720(也即TFT阵列)。像素电路720上设置有第一电极层。第一电极层包括多个第一电极730。第一电极730与像素电路720一一对应。此处的第一电极730为阳极。所述AMOLED显示面板还包括像素定义层740，设置于第一电极730上。像素定义层740上具有多个开口，开口内设置有发光结构层750，以形成多个子像素。子像素与第一电极730一一对应。发光结构层750的上方设置有第二电极760，第二电极760为阴极。所述阴极为面电极，也就是由整面的电极材料形成的整面电极。像素电路中设置有扫描线、数据线和TFT开关元件。扫描线和数据线均与TFT开关元件连接。扫描线控制TFT开关元件的开启和关闭，数据线在像素开启时，为第一电 极730提供驱动电流，以控制子像素发光。在一实施例中本申请还提供了一种显示终端，如图7-9所示，该显示终端可包括设备本体52和显示屏54。显示屏54覆盖在设备本体52上并与设备本体52相互连接，且显示屏54上可开设有主屏体542区域和副屏体544区域。主屏体542和副屏体544均可用于显示静态或动态画面。其中副屏体544为透明显示屏，其下可设置有诸如摄像头526及光线传感器等感光器件。
参见图8，上述显示屏54包括一体化的主屏体542和副屏体544，主屏体542可为AMOLED显示面板，而副屏体544可为PMOLED显示面板或AMOLED显示面板。AMOLED显示面板中的像素电路仅包含一个开关元件(即驱动TFT)而无电容结构。当副屏体544为PMOLED显示面板时，该副屏体544中可设置有本申请中任一实施例所述显示面板，即可通过诸如图1-5所对应的任一实施例所述的隔断结构，来进一步提升隔断结构隔断阴极的效果，避免相邻阴极出现短接而影响显示终端的显示性能及效果，以提升复合屏的显示性能及效果。
在一实施例中，主屏体542可为AMOLED显示面板，副屏体544可为AMOLED显示面板，该主屏体542和副屏体544中的走线材料层可设置有本申请中任一实施例的所述隔断结构，来进一步提升位于隔断结构上方的膜层(如走线材料层)的图形化或隔断的效果。
在一实施例中，上述的显示终端可为手机、电脑、智能手表、智能手环等具有显示屏的电子设备。另外，如图9所示，为了提升感光器件透过上述的副屏体544所采集光线的数量，可在感光器件工作时使得副屏体544处于非显示状态，以提升副屏体544的透光率，进而提升感光器件采集外部光线的性能。在感光器件不工作时使得副屏体544处于显示状态，以提高屏占比，实现真正的全面显示。
在一实施例中，本申请还提供了一种显示面板的制备方法，如图10、11A-11E所示，图10是一实施例的显示面板的制备方法的流程示意图，图11A-11E是一个实施例的制备具有翘曲结构的隔断结构的流程图。针对目前提高屏占比，实现全面屏显示的问题，提出一种具有一体化的AMOLED显示面板和PMOLED显示面板的复合显示屏，其中两个显示区均可用于显示静态或动态画面。PMOLED显示面板为透明显示面板，所述透明显示面板下可设置如摄像头或光线传感器等感光器件。当感光器件不工作时，该透明显示面板用于正常显示画面，而当感光器件如摄像头需要拍摄画面时，该透明显示面板处于非显示状态，以保证感光器件的正常工作。
针对显示面板中膜层的图形化，具体如PMOLED显示面板的阴极隔断结构，以及目 前具有一体化的AMOLED显示面板和PMOLED显示面板的复合显示屏中的阴极隔断结构，在溅射形成阴极的过程中，隔离挡墙上阴极材料与发光层上的阴极连接为一体，进而导致相邻的行、列的阴极发生短路；在采用诸如PVD制备氧化铟锡(ITO)阴极时，由于ITO阴极材料在阴极隔离柱(如有机胶)上具有较好的台阶覆盖性，同时复合显示屏中的AMOLED显示面板又限制了上述阴极隔离柱的高度(一般为2.5μm左右)，进而会造成该阴极隔离柱的阴极隔断效果不佳，本申请创造性的提供了一种显示面板的制备方法，可应用于制备显示面板中膜层图形化或隔断以及上述任一实施例中所述的显示面板，该方法可包括：
步骤S01，提供基板，在基板上设置有第一电极、具有像素开口的像素定义层以及发光层。
此处的基板可以为单层的刚性基板，如玻璃基板、石英基板或者塑料基板等。基板也可为单层的柔性基板，如PI薄膜等，之后在此基板上制备相应的功能层，如缓冲层(BL)等。或者此处的基板可为多层的刚性基板或多层的柔性基板，例如多层的柔性基板可包括依次层叠设置的玻璃基板、PI层、缓冲层(BL)等，具体可依次通过诸如双层PI工艺、三层膜工艺等工艺制备上述的基板。此为制备显示面板的常规工艺，对此不做详细描述。当然，此处的基板可为PMOLED显示面板或AMOLED显示面板的衬底，也可为具有一体化的AMOLED显示面板和PMOLED显示面板的复合显示屏的衬底，此时，一体化的显示面板中的AMOLED显示面板与PMOLED显示面板可共用同一衬底。也即是在同一工艺中形成，从而可简化复合屏的制备工艺流程。
复合屏的具体结构可根据其应用场景进行设置，对此不做详细描述。
如图11A所示，在上述基板10上制备第一电极层薄膜，此时的第一电极即为阳极，对第一电极薄膜进行刻蚀图形化，形成多个第一电极11。在第一电极上制备像素定义层(PDL)12，像素定义层12具有像素开口，并暴露第一电极11。在像素开口中蒸镀有机发光材料，形成发光层13，发光层13与第一电极11接触。对于AMOLED显示面板，基板10上还设置有像素电路，像素电路为2T1C电路、3T1C电路、3T2C电路、7T1C电路、或7T2C电路常规像素电路结构，也可为上述的仅设置有一个晶体管而无电容的像素电路结构。
步骤S02，制备依次层叠设置的第一无机膜层薄膜和第二有机膜层薄膜。
制备
Figure PCTCN2019112618-appb-000001
的氧化铟锡(ITO)薄膜作为第一无机膜层薄膜，也可为其他无机材料，对此不做限定。第一无机膜层薄膜覆盖像素定义层和发光层，在该第一无机膜层薄 膜上涂覆形成第二有机膜层薄膜。
例如，如图11B所示，在像素定义层12和发光层13上制备ITO薄膜作为第一无机膜层薄膜1411，第一无机膜层薄膜1411覆盖上述像素定义层12的上表面和发光层13的上表面；在该ITO薄膜上整面涂敷有机胶作为第二有机膜层薄膜1422。此处的有机胶包括光敏聚酰亚胺等透明或非透明有机胶。
步骤S03，图形化第二有机膜层薄膜形成第二有机膜层，其中图形化过程中，不对第二有机膜层材料进行固化。
如图11C所示，可通过曝光、显影工艺后，采用诸如灰化工艺去除多余的有机胶，以形成第二有机膜层1423。
步骤S04，以第二有机膜层1423为掩膜，刻蚀第一无机膜层薄膜，以形成基础膜层141。
如图11D所示，以上述的第二有机膜层1423为掩膜，对作为第一无机膜层薄膜1411的ITO薄膜进行湿法刻蚀。由于第二有机膜层1423对于上述的湿法刻蚀溶液均具有一定的抗腐蚀性，同时继续过刻蚀(即侧刻蚀)处理后，在ITO薄膜层的侧壁上形成凹槽，其中，该凹槽的切入深度可为1μm-2.5μm。在其他可选的实施例中，凹槽的切入深度可为1.5μm、2μm等，该凹槽的切入深度可根据具体应用时的工艺参数进行设定。
在一实施例中，在第一无机膜层薄膜1411靠近基板的一侧制备刻蚀阻挡薄膜(图中未示出)，所述刻蚀阻挡薄膜覆盖像素定义层12和发光层13。在利用湿法刻蚀第一无机膜层薄膜时，由于第二有机膜层薄膜1422和刻蚀阻挡薄膜对于上述的湿法刻蚀溶液均具有一定的抗腐蚀性(刻蚀阻挡薄膜与第一无机膜层薄膜1411之间的刻蚀选择比小于1)，故而能够有效保护位于刻蚀阻挡薄膜下方的像素定义层12和发光层13等膜层不受该湿法刻蚀的影响。刻蚀去除多余的刻蚀阻挡薄膜，例如刻蚀去除位于发光层13之上以及部分位于像素定义层12之上的刻蚀阻挡薄膜，即以上述第二有机膜层1421和基础膜层141为掩膜，去除其余部分的刻蚀阻挡薄膜，形成刻蚀阻挡层。其中，上述的刻蚀阻挡层、ITO层(基础膜层141)和有机胶层(第二有机膜层1423)依次叠置。
步骤S05，固化第二有机膜层，以在第二有机膜层的端部形成翘曲结构，基础膜层以及端部具有翘曲结构的隔断膜层依次叠置，以形成隔断结构。
如图11E所示，对上述第二有机膜层1423进行固化，可通过烘烤的方式固化，通过控制烘烤固化的退火温度、退火时间、升温速率等工艺参数，在第二有机膜层1423的端部形成翘曲结构1421，以形成隔断膜层142，进而形成基础膜层141以及端部具有翘曲结 构的隔断膜层142依次叠置的隔断结构14。其中，隔断膜层的端部的翘曲结构的形状，翘起高度等受具体烘烤固化参数的影响，可根据实际应用的要求进行相应的参数设定。
步骤S06，在隔断结构上制备第二电极层，所述隔断结构将第二电极层隔断为相互绝缘的第二电极。
基于上述图11E中所形成的隔断结构14继续制备后续的第二电极层，即阴极层的沉积。由于翘曲结构1421的存在，进而能够有效降低第二电极层在隔断结构14的表面上的覆盖特性，即该端部具有翘曲结构的隔断结构能够有效的将上述的第二电极层隔断为相互隔离的第二电极结构。
在上述显示面板的制备方法的实施例中，通过利用无机层(即ITO)和有机胶等复合膜层所构成的隔断结构，并在有机胶的端部形成翘曲结构，从而有效提升后续膜层图形化或隔断的概率。
以上所述实施例的各技术特征可以进行任意的组合，为使描述简洁，未对上述实施例中的各个技术特征所有可能的组合都进行描述，然而，只要这些技术特征的组合不存在矛盾，都应当认为是本说明书记载的范围。
以上所述实施例仅表达了本申请的几种实施方式，其描述较为具体和详细，但并不能因此而理解为对申请专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本申请构思的前提下，还可以做出若干变形和改进，这些都属于本申请的保护范围。因此，本申请专利的保护范围应以所附权利要求为准。

Claims (19)

  1. 一种显示面板，包括一种半导体结构，所述半导体结构包括：
    基板；
    隔断结构，所述隔断结构设置在所述基板上，用于隔断位于所述隔断结构上方的膜层；
    所述隔断结构至少包括依次层叠设置的基础膜层和隔断膜层；其中，所述隔断膜层覆盖所述基础膜层，且所述隔断膜层的至少一个侧边延伸出所述基础膜层的侧边，所述隔断膜层的端部为翘曲结构。
  2. 根据权利要求1所述的显示面板，其中，所述显示面板还包括：
    设置于所述基板上的第一电极；
    设置于所述第一电极上的像素定义层，其中，所述像素定义层上包括多个像素开口，所述像素开口内形成有与所述第一电极接触的发光层；
    其中所述隔断结构为第一隔断结构；所述第一隔断结构设置于所述像素定义层上，用于隔断第二电极材料层，以形成相互绝缘的多个第二电极；所述第二电极位于所述发光层上。
  3. 根据权利要求1所述的显示面板，其中，所述显示面板还包括：
    走线，所述走线形成于所述基板上；
    其中所述隔断结构为第二隔断结构，所述第二隔断结构设置于所述基板上，用于隔断走线材料层，以形成相互绝缘的多条所述走线。
  4. 根据权利要求2或3所述的显示面板，其中，所述隔断膜层的至少一个端部为翘曲结构。
  5. 根据权利要求2或3所述的显示面板，其中，所述隔断膜层下表面的最高点与所述像素定义层的上表面之间的间距为300nm-450nm。
  6. 根据权利要求1所述的显示面板，其中，所述基础膜层为无机膜层，所述隔断膜层为有机膜层。
  7. 根据权利要求6所述的显示面板，其中，所述无机膜层的厚度为50nm-150nm；所述有机膜层的厚度为1um-2um。
  8. 根据权利要求6所述的显示面板，其中，所述无机膜层的材料是透明无机材料；所述有机膜层的材料是透明有机胶。
  9. 根据权利要求8所述的显示面板，其中，所述无机膜层和/或所述有机膜层的材料的光透过率大于70％。
  10. 根据权利要求6所述的显示面板，其中，所述无机膜层的材料为氧化铟锡、氧化铟锌、掺杂银的氧化铟锡、掺杂银的氧化铟锌、铟镓锌氧化物、铟锡氧化物、或铝掺杂的氧化锌。
  11. 根据权利要求6所述的显示面板，其中，所述有机膜层的材料是光敏聚酰亚胺。
  12. 根据权利要求1所述的显示面板，其中，所述显示面板为PMOLED显示面板或AMOLED显示面板；
  13. 根据权利要求12所述的显示面板，其中，所述AMOLED显示面板的像素电路为包括1个薄膜晶体管的电路、包括2个薄膜晶体管和1个电容的电路、包括3个薄膜晶体管和1个电容的电路、包括3个薄膜晶体管和2个电容的电路、包括7个薄膜晶体管和1个电容的电路、或包括7个薄膜晶体管和2个电容的电路。
  14. 一种显示面板的制备方法，包括：
    提供基板；
    在所述基板上形成隔断结构，隔断位于所述隔断结构上方的膜层；
    其中，所述隔断结构至少包括依次层叠的基础膜层和隔断膜层；所述隔断膜层覆盖所述基础膜层，且所述隔断膜层的至少一个侧边延伸出于所述基础膜层的表面；所述隔断膜层的端部为翘曲结构。
  15. 根据权利要求14所述的显示面板的制备方法，其中，所述在所述基板上形成隔断结构的步骤包括：
    在所述基板上制备第一无机膜层薄膜；
    在所述第一无机膜层薄膜上制备第二有机膜层薄膜；
    图形化所述第二有机膜层薄膜形成第二有机膜层，其中，所述第二有机膜层图形化过程中，不对所述第二有机膜层材料进行固化；
    以图形化后的所述第二有机膜层为掩膜版，刻蚀所述第一无机膜层薄膜，以形成所述基础膜层；
    固化图形化后的所述第二有机膜层端部形成翘曲结构，以形成所述隔断膜层。
  16. 根据权利要求15所述的显示面板的制备方法，其中，所述以图形化后的所述第二有机膜层为掩膜版，刻蚀所述第一无机膜层薄膜，以形成所述基础膜层的步骤包括：
    以图形化后的所述第二有机膜层为掩膜版，湿法刻蚀所述第一无机膜层薄膜，并侧刻蚀所述第一无机膜层薄膜，以形成所述基础膜层。
  17. 根据权利要求16所述的显示面板的制备方法，其中所述侧刻蚀所述第一无机膜 层薄膜，以形成所述基础膜层的步骤包括：
    以宽度为1um-2.5um侧刻蚀所述第一无机膜层薄膜，以形成所述基础膜层，使所述隔断膜层的至少一个侧边凸出于所述基础膜层的表面。
  18. 根据权利要求14所述的显示面板的制备方法，其中，所述显示面板的制备方法进一步包括：
    在隔断结构上制备第二电极层；
    所述隔断结构将第二电极层隔断为相互绝缘的第二电极。
  19. 一种半导体结构，包括：
    基板；
    隔断结构，所述隔断结构设置在所述基板上，用于隔断位于所述隔断结构上方的膜层；
    所述隔断结构至少包括依次层叠设置的基础膜层和隔断膜层；其中，所述隔断膜层覆盖所述基础膜层，且所述隔断膜层的至少一个侧边延伸出所述基础膜层的侧边，所述隔断膜层的端部为翘曲结构。
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