WO2020199640A1 - 一种多层金属膜及其制备方法 - Google Patents

一种多层金属膜及其制备方法 Download PDF

Info

Publication number
WO2020199640A1
WO2020199640A1 PCT/CN2019/123773 CN2019123773W WO2020199640A1 WO 2020199640 A1 WO2020199640 A1 WO 2020199640A1 CN 2019123773 W CN2019123773 W CN 2019123773W WO 2020199640 A1 WO2020199640 A1 WO 2020199640A1
Authority
WO
WIPO (PCT)
Prior art keywords
metal film
metal
multilayer
nano
size
Prior art date
Application number
PCT/CN2019/123773
Other languages
English (en)
French (fr)
Inventor
叶怀宇
刘旭
张国旗
Original Assignee
深圳第三代半导体研究院
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 深圳第三代半导体研究院 filed Critical 深圳第三代半导体研究院
Publication of WO2020199640A1 publication Critical patent/WO2020199640A1/zh

Links

Images

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B22—CASTING; POWDER METALLURGY
    • B22F—WORKING METALLIC POWDER; MANUFACTURE OF ARTICLES FROM METALLIC POWDER; MAKING METALLIC POWDER; APPARATUS OR DEVICES SPECIALLY ADAPTED FOR METALLIC POWDER
    • B22F5/00—Manufacture of workpieces or articles from metallic powder characterised by the special shape of the product
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B22—CASTING; POWDER METALLURGY
    • B22F—WORKING METALLIC POWDER; MANUFACTURE OF ARTICLES FROM METALLIC POWDER; MAKING METALLIC POWDER; APPARATUS OR DEVICES SPECIALLY ADAPTED FOR METALLIC POWDER
    • B22F7/00—Manufacture of composite layers, workpieces, or articles, comprising metallic powder, by sintering the powder, with or without compacting wherein at least one part is obtained by sintering or compression
    • B22F7/02—Manufacture of composite layers, workpieces, or articles, comprising metallic powder, by sintering the powder, with or without compacting wherein at least one part is obtained by sintering or compression of composite layers
    • B22F7/04—Manufacture of composite layers, workpieces, or articles, comprising metallic powder, by sintering the powder, with or without compacting wherein at least one part is obtained by sintering or compression of composite layers with one or more layers not made from powder, e.g. made from solid metal
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01B—CABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
    • H01B1/00—Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors
    • H01B1/02—Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors mainly consisting of metals or alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01B—CABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
    • H01B1/00—Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors
    • H01B1/20—Conductive material dispersed in non-conductive organic material
    • H01B1/22—Conductive material dispersed in non-conductive organic material the conductive material comprising metals or alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01B—CABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
    • H01B13/00—Apparatus or processes specially adapted for manufacturing conductors or cables
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01B—CABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
    • H01B5/00—Non-insulated conductors or conductive bodies characterised by their form
    • H01B5/14—Non-insulated conductors or conductive bodies characterised by their form comprising conductive layers or films on insulating-supports

Definitions

  • the invention relates to the field of chip packaging interconnection, and more specifically to a metal film for sintering and its preparation technology.
  • nano-silver sintering has gradually become the mainstream of power semiconductor device packaging interconnection, and major packaging application manufacturers at home and abroad have entered practical and large-scale use.
  • nano-silver sintering patents, materials, processes and equipment are mainly controlled by foreign manufacturers, and their development in China is greatly restricted.
  • the nano-silver sintering technology also has shortcomings: 1) The high price of silver material itself limits its wide use. 2) The thermal expansion coefficients of the backside materials of silver and SiC chips are different, and other intermediate metal layers need to be added to improve interconnection performance, thereby increasing process complexity and cost. 3) Electromigration exists in the silver layer, which is not conducive to long-term reliable application of power devices.
  • Nano-copper particles similar to nano-silver can be melted under low temperature conditions, and the melting point after sintering is close to copper elemental material (1083°C), which can construct a stable metal interconnection layer. Its single-component metal characteristics avoid the service reliability problem under the thermal cycling effect of alloy materials, realize copper-copper bonding, solve the problem of thermal expansion coefficient matching between the chip and the substrate, and avoid the reliability problem caused by electromigration. Compared with nano-silver particles, it effectively reduces the material and processing costs of interconnect packaging. More importantly, it can further promote the practical application and industrialization of the "All copper" concept from the field of chip packaging applications, and promote the innovative development of the semiconductor industry.
  • Patent document CN103262172A its technical scheme is shown in Figure 1.
  • the thin layer is composed of metal powder, solder paste, adhesive and solvent.
  • the metal powder includes gold, palladium, silver, copper, aluminum, silver-palladium alloy or gold-palladium alloy, and may further include one or more functional additives.
  • the metal powder includes nanoparticles.
  • the metal powder is applied to the substrate, and the material on the substrate is dried to form a thin layer.
  • the substrate material includes polyester fibers.
  • the disadvantage of the prior art is that the nano-metal layer on the substrate has a single component size, which results in a large porosity after sintering and poor electrical and thermal conductivity.
  • Patent document CN105492198A its technical scheme is shown in Figure 2.
  • a composite and multilayer silver film for electrical and mechanical components is disclosed, in which reinforcing particles or fibers are added to the sinterable silver layer to improve its strength.
  • a reinforced metal foil layer is further added to the slightly decomposable silver particle layer.
  • Its composition can be silver, copper, gold or any other metal or any alloy, or metal polymer or ceramic
  • the foil can also be a composite or a coating structure with different metal and alloy layers.
  • the reinforced metal foil layer can be applied in solid, perforated or grid form.
  • the problem with the prior art is that the addition of the multilayer composite metal film and the reinforced metal foil layer increases the number of interfaces of the connection layer after sintering, thereby possibly reducing the connection strength; in addition, the single-size silver particle layer is sintered.
  • the porosity is large, which reduces thermal conductivity, electrical conductivity and shear stress, thereby reducing reliability.
  • the present invention provides a multilayer metal film, including:
  • the first organic medium material layer is the first organic medium material layer
  • the second organic medium material layer is the second organic medium material layer
  • the first organic medium material layer contains first-size nano metal particles
  • the first organic medium material layer contains second-size nano metal particles
  • the diameter of the first size nano metal particles is different from that of the second size nano metal particles.
  • the nano metal particle material is copper.
  • the nano metal particle material is gold, palladium, silver, copper, aluminum, silver-palladium alloy, gold-palladium alloy, copper-silver alloy, copper-silver-nickel alloy or copper-aluminum alloy.
  • the multilayer metal film further includes a supporting substrate, wherein the supporting substrate includes polyester fiber, ceramic, glass and/or metal material.
  • the contact surface of the supporting substrate and the nano metal particles is coated with silicone.
  • the medium material layer includes an organic medium material, and the organic medium material is an organic solvent, flux, solder paste, and/or adhesive.
  • the diameter of the larger size nano metal particles is 1 nm ⁇ D ⁇ 10um.
  • the diameter of the smaller size nano metal particles is 0.5 nm ⁇ d ⁇ 20 nm.
  • a method for preparing a multilayer metal film specifically includes the following steps:
  • Step 1 Configure a nano metal particle solution with a first size and a nano metal particle solution with a second size; the second size nano metal particles have a different diameter from the first size nano metal particles
  • Step 2 Use the first size nano metal particle solution to prepare a first metal paste, and use the second size nano metal particle solution to prepare a second metal paste;
  • Step 3 Use the first metal paste to prepare a first metal film; use the second metal paste to prepare a second metal film;
  • Step 4 bonding the first metal film and the second metal film.
  • the step 3 further includes:
  • the first metal paste is disposed on the first supporting substrate, and then dried to form a first metal film.
  • the step 3 further includes:
  • the second metal paste is disposed on the second supporting substrate, and then dried to form a second metal film.
  • the metal paste is applied to the supporting substrate by screen printing, spraying or coating methods.
  • the nano metal particle material is copper.
  • the nano metal particle material is gold, palladium, silver, copper, aluminum, silver-palladium alloy, gold-palladium alloy, copper-silver alloy, copper-silver-nickel alloy or copper-aluminum alloy.
  • the supporting substrate material is polyester fiber, ceramic, glass and/or metal material.
  • the nano metal particle solution contains an organic medium material, and the organic medium material is an organic solvent, a flux, a solder paste, and/or an adhesive.
  • the organic medium material is an organic solvent, a flux, a solder paste, and/or an adhesive.
  • a method for preparing a multilayer metal film specifically includes the following steps:
  • Step 1 Configure a nano metal particle solution with a first size and a nano metal particle solution with a second size; the second size nano metal particles have a different diameter from the first size nano metal particles
  • Step 2 Use the first size nano metal particle solution to prepare a first metal paste, and use the second size nano metal particle solution to prepare a second metal paste;
  • Step 3 Use the first metal paste to prepare the first metal film
  • Step 4 Apply a second metal paste on the first metal film.
  • the step 3 further includes:
  • the preparation method further includes step 5: after coating the second metal paste on the first metal film, drying is performed to form the second metal film.
  • the metal paste is applied to the supporting substrate by screen printing, spraying or coating methods.
  • the nano metal particle material is copper.
  • the nano metal particle material is gold, palladium, silver, copper, aluminum, silver-palladium alloy, gold-palladium alloy, copper-silver alloy, copper-silver-nickel alloy or copper-aluminum alloy.
  • the supporting substrate material is polyester fiber, ceramic, glass and/or metal material.
  • the nano metal particle solution contains an organic medium material, and the organic medium material is an organic solvent, a flux, a solder paste, and/or an adhesive.
  • the organic medium material is an organic solvent, a flux, a solder paste, and/or an adhesive.
  • a method for interconnecting a chip and a substrate using a multilayer metal film specifically includes the following steps:
  • Step 1 Paste the multilayer metal film to the bottom of the chip to be interconnected
  • Step 2 Heating the chip with the multi-layer metal film attached, and mixing the layers of the multi-layer nano metal film to obtain a multi-layer metal film chip;
  • Step 3 Interconnect the substrate and the multilayer metal film chip.
  • step 1 includes obtaining a multilayer metal film with the same shape as the chip, and the obtaining method is
  • the chip is placed on the heated multilayer metal film so that the multilayer metal film with the same shape as the chip adheres to the chip.
  • step 1 also includes: selecting whether to have pressure assistance during bonding.
  • step 2 also includes: selecting whether to have pressure assistance during heating.
  • step 3 includes:
  • Step 3.1 Peel off the supporting substrate.
  • Step 3.2 Place the multilayer metal film chip on the substrate
  • Step 3.3 Heat the multi-layer metal film chip in the sintering furnace, select whether to have pressure assistance, and interconnect the substrate and the multi-layer metal film chip.
  • the present invention constructs a nano metal film for interconnection by arranging multiple layers and layers of nano copper particles of different sizes stacked on top of each other. During sintering, small size nano metal particles move and fill the gaps of large size nano metal particle clusters. The organic medium will volatilize, and the multilayer film will be sintered to form a complete metal interconnection layer. Compared with a sintered metal film with a single structure and a single number of layers, this technical solution will increase the density of the metal layer, thereby improving the electrical and thermal conductivity of the interconnection layer. nature. It is also optional to use pressure assist and enhance the diffusion mixing effect.
  • FIG. 1 is a structural diagram of a nano-silver thin layer after sintering in the first prior art.
  • FIG. 2 is a structure diagram of a single-layer nano-silver thin film in the second prior art.
  • FIG. 3 is a structure diagram of a double-layer nano silver film in the second prior art.
  • Fig. 4 is a structure diagram of a three-layer nano-silver film of prior art 2.
  • FIG. 5 is a schematic diagram of the structure of the multilayer nano metal film described in the technical scheme of the present invention.
  • Figure 6 is a flow chart of the preparation of the multilayer metal film of the present invention.
  • Fig. 7 is a schematic diagram of the preparation process of the multilayer metal film.
  • FIG. 8 is a process flow diagram of using the metal film to sinter and interconnect the chip and the substrate.
  • Fig. 9 is a schematic diagram of the sintered interconnection process flow.
  • Fig. 10 is a flow chart of preparing multiple single-layer metal films with different nano metal sizes according to the present invention.
  • Figure 11 is a schematic diagram of the metal film preparation process.
  • the multilayer metal film structure provided by the present invention is shown in Figure 5 and includes:
  • At least 2 layers of organic dielectric materials At least 2 layers of organic dielectric materials
  • the organic medium material has nano metal particles
  • the sizes of the nano metal particles in each organic medium material layer are different.
  • the nano metal particles can be metal mixtures including gold, palladium, silver, copper, aluminum, silver-palladium alloys, gold-palladium alloys, copper-silver alloys, copper-silver-nickel alloys or copper-aluminum alloys; copper materials are preferably used instead of gold , Silver materials thus significantly reduce costs, and can effectively avoid high electron migration and high thermal mismatch after the sintering of the nano-silver film.
  • the metal film also includes a supporting substrate including polyester fiber, ceramic, glass and/or metal material.
  • Organic media materials include organic solvents (such as amines, alcohols, fatty acids, mercaptans, and surfactants, etc.), rosin flux, solder paste, and/or adhesives.
  • Fig. 6 shows the preparation method and process of the multilayer metal film provided by the present invention, including the following steps:
  • the copper film C is cut into a small copper film c according to the chip size in the above-mentioned manner; the process flow of sintering and interconnection of the obtained copper film c is shown in FIGS. 8 and 9.
  • the specific steps include: 1) contact the bottom end of the chip to be interconnected with the multilayer composite copper film; 2) choose whether to use pressure assistance to make the top of the copper film adhere to the bottom of the chip; 3) remove the supporting substrate at the bottom of the copper film 4) Place the chip covered with a multilayer composite copper film on the surface of the carrier board; 5) Through a pressure or non-pressure sintering process, the chip is effectively connected to the carrier board, and the organic matter in the interconnecting copper layer is volatilized at the same time, different sizes The nano-copper particles are filled with each other and sintered into a mass, and finally a dense interconnected metal layer is formed.
  • FIG. 10 A simpler preparation process of a multi-layer metal film containing a supporting substrate (2) is shown in Figures 10 and 11.
  • a single layer of small size is set by performing step one
  • step 3 a single layer of metal paste of larger size nano metal particles is set on another supporting substrate.
  • two layers of metal paste can be sequentially bonded to the bottom of the chip.
  • the sintering process enables the particles in the two films to mix with each other during the sintering process to achieve the purpose of filling voids and improving compactness. This solution reduces the difficulty of operation to a greater extent.
  • the present invention further provides a method for sintering and interconnecting a chip and a substrate by using the multilayer nano metal film. Specifically include the following steps:
  • the system is optionally heated and pressurized in the sintering furnace to make the substrate and the chip interconnect.
  • the diameter of nano metal particles prepared by chemical methods is usually above 30 nm, and it is difficult to achieve the preparation and subsequent stable retention of nano metal particles with a diameter of less than 20 nm or even less than 1 nm.
  • the nano metal particles prepared by chemical preparation methods despite the strict control of the operation and environment, the particle size range prepared in the same batch still has the technical problems of poor distribution concentration and large dispersion, which will affect the metal film to varying degrees After sintering performance.
  • the physical method used in the present invention to prepare the nano metal particle size range is 0-20nm.
  • the small size metal nano metal particles prepared by the physical method are combined with The chemically prepared large-size metal particles are combined with a sintered thickness of 90um to achieve the technological breakthrough of high thermal conductivity, electrical conductivity and high shear force as shown in the above table.
  • the specific selection of the larger and smaller sizes of the nano metal particles of the present invention makes the small size nano metal particles have a good filling effect in the gaps of the large size nano metal particles, and the compactness is significantly improved.
  • the above-mentioned metal particle size design achieves the effects of improving the density of the metal layer and reducing the porosity after sintering, which cannot be achieved by the combination of nano metal particles of other diameter sizes.
  • the nano-copper particles can be melted under low temperature conditions, and the melting point after sintering is close to the copper elemental material (1083°C), which can build a stable metal interconnection layer.
  • the sintering nano-copper film made of nano-copper powder and paste has the excellent characteristics of copper materials, but also has the portability and easy formability of metal sintered films. It is the first choice for the next generation of electrical interconnection.

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Mechanical Engineering (AREA)
  • Composite Materials (AREA)
  • Materials Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Dispersion Chemistry (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Powder Metallurgy (AREA)
  • Manufacture Of Metal Powder And Suspensions Thereof (AREA)
  • Laminated Bodies (AREA)

Abstract

一种多层金属膜及其制备方法，包括：第一有机介质材料层，第二有机介质材料层；所述第一有机介质材料层中包含第一尺寸纳米金属颗粒，所述第二有机介质材料层中包含第二尺寸纳米金属颗粒；所述第一尺寸纳米金属颗粒与第二尺寸纳米金属颗粒直径不同。通过机械压合使不同层的不同尺寸颗粒快速混合，互填间隙，形成致密的烧结金属层，提高功率器件整体可靠性性能，具备易于装配的特点，可有效降低成本。

Description

一种多层金属膜及其制备方法 技术领域
本发明涉及芯片封装互连领域，更具体地涉及烧结用金属膜及其制备技术。
背景技术
在功率半导体封装领域，寻求低温工艺、高温服役、热膨胀系数相匹配、高导热导电、低成本的互连材料成为现在急需解决的问题。以焊接及引线键合的传统材料工艺存在熔点低、高温蠕变失效、引线缠绕、寄生参数等无法解决的问题，新型互连材料正从焊接向烧结技术发展。通过减小烧结颗粒的尺寸，降低烧结温度，纳米金属颗粒烧结技术已经成为功率半导体器件新型互连材料中最有前景的技术。
目前以纳米银烧结为代表的先进工艺已逐渐成为功率半导体器件封装互连的主流，国内外主要封装应用厂商已进入实用化和规模化使用中。然而纳米银烧结专利、材料、工艺及设备主要由国外厂商控制，在国内的发展受到较大限制。同时纳米银烧结技术也存在不足：1)银材料本身价格较高，限制其不能被广泛使用。2)银和SiC芯片背面材料热膨胀系数的不同，需要添加其它中间金属层提高互连性能，从而增加了工艺复杂性和成本。3)银层存在电迁移现象，不利于功率器件长期可靠应用。与纳米银近似的纳米铜颗粒可以在低温条件下熔融，烧结后熔点接近铜单质材料(1083℃)，可构筑稳定的金属互连层。其单组分金属的特性，避免了合金材料热循环效应下的服役可靠性问题，实现铜铜键合，解决芯片和基板之间热膨胀系数匹配的问题，同时避免电迁移现象导致可靠性问题。对比纳米银颗粒，有效降低互连封装的材料和加工成本。更重要的是能够从芯片封装应用领域，进一步推进“全铜化”(All copper)理念的实际应用和产业化，推动半导体产业的创新发展。
专利文献CN103262172A，其技术方案如图1所示。公开了一种烧结材料和烧结材料制备的薄层，以及该材料的附着方法。薄层是由金属粉末、焊膏、粘合剂和溶剂组成。其中金属粉末包括金、钯、银、铜、铝、银钯合金或者金钯合金，可进一步包括一种或更多的功能性添加物。金属粉末包括纳米颗粒。金属粉末被适用到基片上，对基片上的材料进行干燥形成薄层。基片材料包括聚酯纤维，该现有技术的缺点在于基片上的纳米金属层成分尺寸单一，由此造成烧结后孔隙率较大，导电导热效果差等后果。
专利文献CN105492198A，其技术方案如图2所示。公开了一种用于电气部件和机械部件的复合和多层银膜，其中在可烧结银层中加入了增强颗粒或纤维，以提高其强度。如图3、4所示，进一步在可稍解的银颗粒层上外加了增强金属箔层，其成分可以是银、铜、金或任何其他金属或任何合金，也可以是金属聚合物或陶瓷箔，还可以是复合的或具有不同金属和合金层的镀层结构。增强金属箔层可以固体的、穿孔或网格等形式施加。然而该现有技术的问题在于该多层复合金属膜、增强金属箔层的加入，增加了烧结后连接层的界面数，从而可能降低连接强度；此外，单一尺寸的银颗粒层，在烧结后孔隙率很大，会降低热导率、电导率和剪切应力，从而降低可靠性。
发明内容
为克服现有技术的不足，避免原有银膜高孔隙率、低热导率、高成本、与Si或SiC基芯片热失配、高电迁移率等问题，提高功率器件整体可靠性性能，同时实现易于装配并有效降低成本的效果，本发明提供了一种多层金属膜，包括：
第一有机介质材料层，
第二有机介质材料层；
所述第一有机介质材料层中包含第一尺寸纳米金属颗粒，
所述第一有机介质材料层中包含第二尺寸纳米金属颗粒；
所述第一尺寸纳米金属颗粒与所述第二尺寸纳米金属颗粒直径不同。
优选的，所述纳米金属颗粒材料为铜。
优选的，所述纳米金属颗粒材料为金、钯、银、铜、铝、银钯合金、金钯合金、铜银合金、铜银镍合金或铜铝合金。
优选的，所述多层金属膜还包括支撑基材，其中支撑基材包括聚酯纤维、陶瓷、玻璃和/或金属材料。
优选的，所述支撑基材和纳米金属颗粒接触的一面具有有机硅涂覆。
优选的，所述介质材料层包括有机介质材料，所述有机介质材料为有机溶剂、助焊剂、焊膏、和/或粘合剂。
优选的，所述第一尺寸纳米金属颗粒与所述第二尺寸纳米金属颗粒中，较大尺寸的纳米金属颗粒直径为1nm<D<10um。
优选的，所述第一尺寸纳米金属颗粒与所述第二尺寸纳米金属颗粒中，较小尺寸的纳米金属颗粒直径为0.5nm<d<20nm。
一种多层金属膜的制备方法，具体包括以下步骤：
步骤1：配置具有第一尺寸纳米金属颗粒溶液，及具有第二尺寸纳米金属颗粒溶液；所述第二尺寸纳米金属颗粒与第一尺寸纳米金属颗粒直径不同
步骤2：采用第一尺寸纳米金属颗粒溶液制备第一金属膏，采用第二尺寸纳米金属颗粒溶液制备第二金属膏；
步骤3：采用第一金属膏制备第一金属膜；采用第二金属膏制备第二金属膜；
步骤4：将所述第一金属膜与所述第二金属膜贴合。
优选的，所述步骤3还包括：
将所述第一金属膏设置于第一支撑基材上，然后进行干燥处理，形成第一金属膜。
优选的，所述步骤3还包括：
将所述第二金属膏设置于第二支撑基材上，然后进行干燥处理，形成第二金属膜。
优选的，所述金属膏通过丝网印制、喷涂或涂覆方法施加到所述支撑基材上。
优选的，所述纳米金属颗粒材料为铜。
优选的，所述纳米金属颗粒材料为金、钯、银、铜、铝、银钯合金、金钯合金、铜银合金、铜银镍合金或铜铝合金。
优选的，所述支撑基材材料为聚酯纤维、陶瓷、玻璃和/或金属材料。
优选的，所述纳米金属颗粒溶液中包含有机介质材料，所述有机介质材料为有机溶剂、助焊剂、焊膏、和/或粘合剂。
一种多层金属膜的制备方法，具体包括以下步骤：
步骤1：配置具有第一尺寸纳米金属颗粒溶液，及具有第二尺寸纳米金属颗粒溶液；所述第二尺寸纳米金属颗粒与第一尺寸纳米金属颗粒直径不同
步骤2：采用第一尺寸纳米金属颗粒溶液制备第一金属膏，采用第二尺寸纳米金属颗粒溶液制备第二金属膏；
步骤3：采用第一金属膏制备第一金属膜；
步骤4：在第一金属膜上涂敷第二金属膏。
优选的，所述步骤3还包括：
将所述第一金属膏设置于第一支撑基材上，然后进行干燥处理，形成第一金属膜；
所述制备方法还包括步骤5:在第一金属膜上涂敷第二金属膏之后，进行干燥处理，形成第二金属膜。
优选的，所述金属膏通过丝网印制、喷涂或涂覆方法施加到所述支撑基材上。
优选的，所述纳米金属颗粒材料为铜。
优选的，所述纳米金属颗粒材料为金、钯、银、铜、铝、银钯合金、金钯合金、铜银合金、铜银镍合金或铜铝合金。
优选的，所述支撑基材材料为聚酯纤维、陶瓷、玻璃和/或金属材料。
优选的，所述纳米金属颗粒溶液中包含有机介质材料，所述有机介质材料为有机溶剂、助焊剂、焊膏、和/或粘合剂。
一种利用多层金属膜互连芯片与基板的方法，具体包括以下步骤：
步骤1：将多层金属膜粘贴至待互连芯片底部；
步骤2：对所述贴好多层金属膜的芯片进行加热，混合多层纳米金属膜的各层，获得多层金属膜芯片；
步骤3：互连基板与多层金属膜芯片。
优选的，步骤1包括获取与芯片形状相同的多层金属膜，获取方式为
根据待互连芯片形状切割多层金属膜；
或，将芯片放置于加热的多层金属膜上，使得与芯片形状相同的多层金属膜粘附在芯片上。
优选的，步骤1还包括：粘合时选择有无压力辅助。
优选的，步骤2还包括：加热时选择有无压力辅助。
优选的，步骤3包括：
步骤3.1：剥离支撑基材。
步骤3.2：将所述多层金属膜芯片置于基板上；
步骤3.3：在烧结炉中对多层金属膜芯片进行加热，选择有无压力辅助，互连基板与多层金属膜芯片。
本发明通过设置多层、不同尺寸纳米铜颗粒层互叠放置的方式构建互连用纳米金属膜，在烧结时，小尺寸纳米金属颗粒移动并填充到大尺寸纳米金属颗粒团簇的缝隙中，有机介质则会挥发，多层膜烧结形成完整的金属互连层，相比较单一结构、单一层数的烧结金属膜，此技术方案将提升金属层的致密性，从而提升了互连层导电导热性质。亦可选则通过压力辅助以及提升扩散混合效果。
附图说明
图1为现有技术一的烧结后纳米银薄层的结构图。
图2为现有技术二的单层纳米银薄膜结构图。
图3为现有技术二的双层纳米银薄膜结构图。
图4为现有技术二的三层纳米银薄膜结构图。
图5为本发明技术方案描述的多层纳米金属膜结构示意图。
图6为本发明多层金属膜的制备流程图。
图7为所述多层金属膜的制备流程示意图。
图8为利用所述金属膜对芯片与基板烧结互连的工艺流程图。
图9为所述烧结互连工艺流程示意图。
图10为本发明制备多个不同纳米金属尺寸的单层金属膜制备流程图。
图11为所述金属膜制备流程示意图。
图中序号：铜膜中的小尺寸纳米铜颗粒1，铜膜中的大尺寸纳米铜颗粒2，支撑基材3，有机介质4，大尺寸纳米铜膏体中的纳米铜颗粒5，小尺寸纳米铜膏体中的纳米铜颗粒6，印刷刮刀7，印刷中的小尺寸纳米铜膏体8，印刷中的大尺寸纳米铜膏体9，多尺寸多层金属膜10，待互连芯片11，基板12，烧结设备13，单层大尺寸铜颗粒铜膜14，单层小尺寸纳米通颗粒铜膜15。
具体实施方式
下面详细说明本发明的具体实施，有必要在此指出的是，以下实施只是用于本发明的进一步说明，不能理解为对本发明保护范围的限制，该领域技术熟练人员根据上述本发明内容对本发明做出的一些非本质的改进和调整，仍然属于本发明的保护范围。
本发明所提供的多层金属膜结构如图5所示，包括：
至少2层有机介质材料；
所述有机介质材料中具有纳米金属颗粒；
各所述有机介质材料层中的所述纳米金属颗粒的尺寸不同。
其中，纳米金属颗粒可采用金属混合物包括金、钯、银、铜、铝、银钯合金、金钯合金、铜银合金、铜银镍合金或铜铝合金；，优选采用铜材料，以取代金、银材料从而显著降低成本，并可以有效避免纳米银膜烧结后高电子迁移、高热失配。
金属膜还包括支撑基材，所述支撑基材包括聚酯纤维、陶瓷、玻璃和/或金属材料。有机介质材料包括有机溶剂(如胺、醇、脂防酸、硫醇和表面活性剂等)、松香助焊剂、焊膏、和/或粘合剂。
实施例一
图6示出了本发明所提供的多层金属膜的制备方法及流程，包括以下步骤：
一、按照比例配置具有第一尺寸的纳米金属颗粒溶液，制备第一金属膏；
二、按照比例配置具有不同于所述第一尺寸的第二尺寸的纳米金属颗粒溶液，制备第二金属膏；
三、将所述第一金属膏与所述第二金属膏贴合。
在包含支撑基材的多层金属膜的制备流程中，可以通过两种方式实施：
(一)是在支撑基材上直接设置两层、三层或更多层不同尺寸纳米颗粒的金属金属膜，如图7所示，在支撑基材表面预先施加脱模涂层，执行步骤一制备一层小尺寸纳米金属颗粒的金属膏并设置在该支撑基材上，再执行步骤二制备一层较大尺寸纳米金属颗粒金属膏；如要构建更多层金属膜，则按照此顺序以此类推向上交替制备更多层不同尺寸纳米颗粒的金属膏。
1、在罐中混合0至5％树脂或聚合物、0至1％成膜剂和30％溶剂混合物以得到均匀溶液。将0至2％润湿剂、0至2％有机过氧化物添加至此混合物。
2、添加90％的前述小尺寸铜粉末(即具有从0.5nm<d<20nm的平均最长尺寸)并且使用轨道式混合器在lOOOrpm下进行混合；
3、在混合后，在研磨机中研磨、混合物持续几分钟以获得均匀的膏；
4、使用相同比例和方式配置大尺寸(即具有从1nm<D<10um的平均最长尺寸)铜膏；
5、将所述小尺寸颗粒的金属膏适用到例如有有机硅涂覆的聚醋片、陶瓷或玻璃支撑基材上；
6、通过在100-130℃，10-15分钟的干燥，在所述支撑基材上形成小尺寸通颗粒的金属膜A；
7、在所述金属膜A的表面适用大尺寸纳米铜膏；
8、通过在100-130℃，10-15分钟的干燥，在形成双层纳米铜膜B；
9、在所述金属膜B的表面适用小尺寸纳米铜膏；
10、通过在100-130℃，10-15分钟的干燥，在形成三层纳米铜膜C。
在本发明的一个优选实施例中，采用上述方式按照芯片尺寸剪切所述铜膜C成铜膜小片c；得到的铜膜c进行烧结互连工艺流程如图8、9所示。具体步骤包括：1)将待互连芯片底端与多层复合铜膜接触；2)可选择有无压力辅助，使得铜膜顶部与芯片底部粘合；3)移除铜膜底部支撑基材；4)将底部覆好多层复合铜膜的芯片放置于载板表面；5)通过有压或无压力烧结工艺，使得芯片与载板有效连接，同时互连铜层中的有机物挥发，不同尺寸的纳米铜颗粒相互填充并烧结成块体，最终形成致密的互连金属层。
实施例二
一种更加简易的包含支撑基材的多层金属膜的制备流程(二)如图10、11所示，在预先施用脱模涂层的支撑基材上，通过执行步骤一设置单层小尺寸纳米金属颗粒金属膏，在执行步骤三前，在另一支撑基材上设置单层较大尺寸纳米金属颗粒的金属膏，在使用时，可将两层金属膏依次粘结在芯片底部，通过烧结工艺，使得在烧结过过程中两膜中的颗粒相互混合，达到填充空隙，提升致密性的目的，此方案更大程度上的降低了操作难度。
1、在罐中混合0至5％树脂或聚合物、0至1％成膜剂和30％溶剂混合物以得到均匀溶液。将0至2％润湿剂、0至2％有机过氧化物添加至此混合物。
2、添加90％的前述小尺寸铜粉末(即具有从0.5nm<d<20nm的平均最长尺寸)并且使用轨道式混合器在lOOOrpm下进行混合；
3、在混合后，在研磨机中研磨、混合物持续几分钟以获得均匀的膏；
4、使用相同比例和方式配置大尺寸(即具有从1nm<D<10um的平均最长尺寸)铜膏。
5、将所述大、小尺寸颗粒的金属膏分别适用两块到例如有有机硅涂覆的聚醋片、陶瓷或玻璃支撑基材上；
6、通过在100-130℃，10-15分钟的干燥，在所述支撑基材上形成大、小尺寸通颗粒的金属膜A和D；
实施例三
如图8所示，本发明进一步提供了一种利用所述多层纳米金属膜烧结互连芯片与基板的方法。具体包括以下步骤：
一、按照芯片尺寸剪切所述铜膜C成铜膜小片c；
二、将所述多层金属膜粘贴到待互连芯片底部；
三、对芯片和铜膜体系可选的进行加热、加压，使得多层铜膜相互混合；剥离支撑基材；
四、将该芯片/铜膜体系置于基板上；
五、在烧结炉中对该体系可选的进行加热、加压，使得基板与芯片形成互连。
本发明与现有技术获得的纳米金属膜的相关性能对比如下：
Figure PCTCN2019123773-appb-000001
Figure PCTCN2019123773-appb-000002
表1
封装领域通过化学方法制备的纳米金属颗粒直径通常在30nm以上，难以实现20nm以下甚至1nm以下粒径的纳米金属颗粒制备及后续的稳定留存。此外，采用化学制备方法制备的纳米金属颗粒，尽管对操作及环境严格控制，其同批次制备的粒径范围依然存在分布集中性差，离散程度大的技术问题，这将不同程度的影响金属膜的烧结后性能。本发明采用的物理法制备纳米金属粒径范围为0-20nm，为克服化学方法制备的粒径尺寸上的限制带来的烧结性能上的瓶颈，将物理法制备的小尺寸金属纳米金属颗粒与化学法制备的大尺寸金属颗粒结合，在90um的烧结厚度下，实现如上表所示的高热导率电导率，高剪切力的技术突破。
本发明的纳米金属颗粒的较大和较小颗粒的尺寸的具体选择，使得小尺寸纳米金属颗粒在大尺寸纳米金属颗粒的间隙的填补效果好，致密性显著提升。上述金属颗粒尺寸的设计达到在烧结后提升金属层致密性、降低孔隙率的效果，是其他直径尺寸的纳米金属颗粒组合所不能达到的。当采用铜颗粒代替纳米银材料等贵重金属材料时，纳米铜颗粒可以在低温条件 下熔融，烧结后熔点接近铜单质材料(1083℃)，可构筑稳定的金属互连层。其单组分金属的特性，避免了合金材料热循环效应下的服役可靠性问题，实现铜铜键合，解决芯片和基板之间热膨胀系数匹配的问题，同时避免电迁移现象导致可靠性问题。对比纳米银颗粒，可有效降低互连封装的材料和加工成本。由纳米铜粉体、膏体制成的烧结用纳米铜膜，在具备铜材料的优良特性同时，也同时具备金属烧结膜的便携性、易成型性等特点，是下一代电气互连首选方案。
尽管为了说明的目的，已描述了本发明的示例性实施方式，但是本领域的技术人员将理解，不脱离所附权利要求中公开的发明的范围和精神的情况下，可以在形式和细节上进行各种修改、添加和替换等的改变，而所有这些改变都应属于本发明所附权利要求的保护范围，并且本发明要求保护的产品各个部门和方法中的各个步骤，可以以任意组合的形式组合在一起。因此，对本发明中所公开的实施方式的描述并非为了限制本发明的范围，而是用于描述本发明。相应地，本发明的范围不受以上实施方式的限制，而是由权利要求或其等同物进行限定。

Claims (28)

  1. 一种多层金属膜，其特征在于，包括：
    第一有机介质材料层，
    第二有机介质材料层；
    所述第一有机介质材料层中包含第一尺寸纳米金属颗粒，
    所述第一有机介质材料层中包含第二尺寸纳米金属颗粒；
    所述第一尺寸纳米金属颗粒与所述第二尺寸纳米金属颗粒直径不同。
  2. 如权利要求1所述的多层金属膜，其特征在于，所述纳米金属颗粒材料为铜。
  3. 如权利要求1所述的多层金属膜，其特征在于，所述纳米金属颗粒材料为金、钯、银、铜、铝、银钯合金、金钯合金、铜银合金、铜银镍合金或铜铝合金。
  4. 如权利要求1至3任一项所述的多层金属膜，其特征在于，所述多层金属膜还包括支撑基材，其中支撑基材包括聚酯纤维、陶瓷、玻璃和/或金属材料。
  5. 如权利要求1至3任一项所述的多层金属膜，其特征在于，所述支撑基材和纳米金属颗粒接触的一面具有有机硅涂覆。
  6. 如权利要求1至3任一项所述的多层金属膜，其特征在于，所述介质材料层包括有机介质材料，所述有机介质材料为有机溶剂、助焊剂、焊膏、和/或粘合剂。
  7. 如权利要求1至3任一项所述的多层金属膜，其特征在于，所述第一尺寸纳米金属颗粒与所述第二尺寸纳米金属颗粒中，较大尺寸的纳米金属颗粒直径为1nm<D<10um。
  8. 如权利要求1至3任一项所述的多层金属膜，其特征在于，所述第一尺寸纳米金属颗粒与所述第二尺寸纳米金属颗粒中，较小尺寸的纳米金属颗粒直径为0.5nm<d<20nm。
  9. 一种多层金属膜的制备方法，其特征在于，具体包括以下步骤：
    步骤1：配置具有第一尺寸纳米金属颗粒溶液，及具有第二尺寸纳米金属颗粒溶液；所述第二尺寸纳米金属颗粒与第一尺寸纳米金属颗粒直径不同；
    步骤2：采用第一尺寸纳米金属颗粒溶液制备第一金属膏，采用第二尺寸纳米金属颗粒溶液制备第二金属膏；
    步骤3：采用第一金属膏制备第一金属膜；采用第二金属膏制备第二金属膜；
    步骤4：将所述第一金属膜与所述第二金属膜贴合。
  10. 如权利要求9所述的多层金属膜的制备方法，其特征在于，所述步骤3还包括：
    将所述第一金属膏设置于第一支撑基材上，然后进行干燥处理，形成第一金属膜。
  11. 如权利要求9所述的多层金属膜的制备方法，其特征在于，所述步骤3还包括：
    将所述第二金属膏设置于第二支撑基材上，然后进行干燥处理，形成第二金属膜。
  12. 如权利要求10或11所述的多层金属膜的制备方法，其特征在于，所述金属膏通过丝网印制、喷涂或涂覆方法施加到所述支撑基材上。
  13. 如权利要求9所述的多层金属膜的制备方法，其特征在于，所述纳米金属颗粒材料为铜。
  14. 如权利要求9所述的多层金属膜的制备方法，其特征在于：所述纳米金属颗粒材料为金、钯、银、铜、铝、银钯合金、金钯合金、铜银合金、铜银镍合金或铜铝合金。
  15. 如权利要求9所述的多层金属膜的制备方法，其特征在于，所述支撑基材材料为聚酯纤维、陶瓷、玻璃和/或金属材料。
  16. 如权利要求9所述的多层金属膜的制备方法，其特征在于，所述纳米金属颗粒溶液中包含有机介质材料，所述有机介质材料为有机溶剂、助焊剂、焊膏、和/或粘合剂。
  17. 一种多层金属膜的制备方法，其特征在于，具体包括以下步骤：
    步骤1：配置具有第一尺寸纳米金属颗粒溶液，及具有第二尺寸纳米金属颗粒溶液；所述第二尺寸纳米金属颗粒与第一尺寸纳米金属颗粒直径不同；
    步骤2：采用第一尺寸纳米金属颗粒溶液制备第一金属膏，采用第二尺寸纳米金属颗粒溶液制备第二金属膏；
    步骤3：采用第一金属膏制备第一金属膜；
    步骤4：在第一金属膜上涂敷第二金属膏。
  18. 如权利要求17所述的多层金属膜的制备方法，其特征在于，所述步骤3还包括：
    将所述第一金属膏设置于第一支撑基材上，然后进行干燥处理，形成第一金属膜；
    所述制备方法还包括步骤5:在第一金属膜上涂敷第二金属膏之后，进行干燥处理，形成第二金属膜。
  19. 如权利要求18所述的多层金属膜的制备方法，其特征在于，所述金属膏通过丝网印制、喷涂或涂覆方法施加到所述支撑基材上。
  20. 如权利要求18所述的多层金属膜的制备方法，其特征在于，所述纳米金属颗粒材料为铜。
  21. 如权利要求18所述的多层金属膜的制备方法，其特征在于：所述纳米金属颗粒材料为金、钯、银、铜、铝、银钯合金、金钯合金、铜银合金、铜银镍合金或铜铝合金。
  22. 如权利要求18所述的多层金属膜的制备方法，其特征在于，所述支撑基材材料为聚酯纤维、陶瓷、玻璃和/或金属材料。
  23. 如权利要求18所述的多层金属膜的制备方法，其特征在于，所述纳米金属颗粒溶液中包含有机介质材料，所述有机介质材料为有机溶剂、助焊剂、焊膏、和/或粘合剂。
  24. 一种利用多层金属膜互连芯片与基板的方法，其特征在于，具体包括以下步骤：
    步骤1：将多层金属膜粘贴至待互连芯片底部；
    步骤2：对所述贴好多层金属膜的芯片进行加热，混合多层纳米金属膜的各层，获得多层金属膜芯片；
    步骤3：互连基板与多层金属膜芯片。
  25. 如权利要求24所述的利用多层金属膜互连芯片与基板方法，其特征在于，步骤1包括获取与芯片形状相同的多层金属膜，获取方式为
    根据待互连芯片形状切割多层金属膜；
    或，将芯片放置于加热的多层金属膜上，使得与芯片形状相同的多层金属膜粘附在芯片上。
  26. 如权利要求24所述的利用多层金属膜互连芯片与基板方法，其特征在于，步骤1还包括：粘合时选择有无压力辅助。
  27. 如权利要求24所述的利用多层金属膜互连芯片与基板方法，其特征在于，步骤2还包括：加热时选择有无压力辅助。
  28. 如权利要求24所述的利用多层金属膜互连芯片与基板方法，其特征在于，步骤3包括：
    步骤3.1：剥离支撑基材；
    步骤3.2：将所述多层金属膜芯片置于基板上；
    步骤3.3：在烧结炉中对多层金属膜芯片进行加热，选择有无压力辅助，互连基板与多层金属膜芯片。
PCT/CN2019/123773 2019-04-03 2019-12-06 一种多层金属膜及其制备方法 WO2020199640A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201910265791.3A CN109967747B (zh) 2019-04-03 2019-04-03 一种多层金属膜及其制备方法
CN201910265791.3 2019-04-03

Publications (1)

Publication Number Publication Date
WO2020199640A1 true WO2020199640A1 (zh) 2020-10-08

Family

ID=67082678

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2019/123773 WO2020199640A1 (zh) 2019-04-03 2019-12-06 一种多层金属膜及其制备方法

Country Status (2)

Country Link
CN (1) CN109967747B (zh)
WO (1) WO2020199640A1 (zh)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109967747B (zh) * 2019-04-03 2021-02-19 深圳第三代半导体研究院 一种多层金属膜及其制备方法
CN111933603A (zh) * 2020-06-28 2020-11-13 深圳第三代半导体研究院 一种半导体芯片封装结构及其制备方法
CN114101661A (zh) * 2021-11-25 2022-03-01 重庆大学 一种填充有微纳米金属颗粒的混合浆料的制备方法及其产品和应用

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009224201A (ja) * 2008-03-17 2009-10-01 Kyoto Elex Kk 低温焼成多層基板用導電性ペースト
CN103262172A (zh) * 2010-11-03 2013-08-21 弗赖斯金属有限公司 烧结材料及使用该材料的附着方法
CN105492198A (zh) * 2013-08-29 2016-04-13 阿尔发金属有限公司 用于连接电气部件和机械部件的复合和多层银膜
CN105609432A (zh) * 2014-11-14 2016-05-25 现代自动车株式会社 使用银浆料进行结合的方法
WO2017154329A1 (ja) * 2016-03-07 2017-09-14 株式会社村田製作所 接合体の製造方法及び接合材料
CN108526751A (zh) * 2018-04-26 2018-09-14 深圳市先进连接科技有限公司 一种可用于无压烧结的微纳米混合焊膏及其制备方法
CN109967747A (zh) * 2019-04-03 2019-07-05 深圳第三代半导体研究院 一种多层金属膜及其制备方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6072239A (en) * 1995-11-08 2000-06-06 Fujitsu Limited Device having resin package with projections
JP4512030B2 (ja) * 2005-12-05 2010-07-28 住友電工ハードメタル株式会社 ダイヤモンド焼結体
CN104576402B (zh) * 2013-10-18 2017-10-13 旭德科技股份有限公司 封装载板及其制作方法
CN104078431B (zh) * 2014-06-27 2017-02-01 中国科学院上海微***与信息技术研究所 双层底充胶填充的铜凸点封装互连结构及方法

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009224201A (ja) * 2008-03-17 2009-10-01 Kyoto Elex Kk 低温焼成多層基板用導電性ペースト
CN103262172A (zh) * 2010-11-03 2013-08-21 弗赖斯金属有限公司 烧结材料及使用该材料的附着方法
CN105492198A (zh) * 2013-08-29 2016-04-13 阿尔发金属有限公司 用于连接电气部件和机械部件的复合和多层银膜
CN105609432A (zh) * 2014-11-14 2016-05-25 现代自动车株式会社 使用银浆料进行结合的方法
WO2017154329A1 (ja) * 2016-03-07 2017-09-14 株式会社村田製作所 接合体の製造方法及び接合材料
CN108526751A (zh) * 2018-04-26 2018-09-14 深圳市先进连接科技有限公司 一种可用于无压烧结的微纳米混合焊膏及其制备方法
CN109967747A (zh) * 2019-04-03 2019-07-05 深圳第三代半导体研究院 一种多层金属膜及其制备方法

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
TENG YUAN , FANGCUN YAN, WENLIN LI, JINGHONG DU, JIAMIN ZHANG, JIKANG YAN: "Properties of Lead-Free Conductive Silver Paste with Different Morphology and Particle Size of Silver", CHINESE JOURNAL OF RARE METALS, vol. 41, no. 11, 30 November 2017 (2017-11-30), pages 1273 - 1278, XP055740316, ISSN: 0258-7076, DOI: 10.13373/j.cnki.cjrm.XY16060003 *
XIAO YONG: "Study on Low Temperature Sintering Mechanism And Performance of Composite Silver Nanoparticles", DOCTORAL DISSERTATION, 15 February 2017 (2017-02-15), CN, pages 1 - 135, XP009523613 *
XIE XIANGZHOU , LIU XINYU , YUAN CHANGLAI: "Effect of Silver Particle Size and Morphology Distribution on the Performance of Lead-Free Silver Paste", RARE METAL MATERIALS AND ENGINEERING, vol. 44, no. 12, 31 December 2015 (2015-12-31), pages 3113 - 3118, XP055740310, ISSN: 1002-874X *

Also Published As

Publication number Publication date
CN109967747A (zh) 2019-07-05
CN109967747B (zh) 2021-02-19

Similar Documents

Publication Publication Date Title
JP7001659B2 (ja) 焼結材料、及びそれを用いる接着方法
WO2020199640A1 (zh) 一种多层金属膜及其制备方法
WO2020199637A1 (zh) 一种多尺寸混合纳米颗粒膏体及其制备方法
CN109979904B (zh) 一种多尺寸纳米颗粒混合金属膜及其制备方法
KR102114489B1 (ko) 소결 재료 및 이를 이용한 부착 방법
CN110071050B (zh) 一种芯片互连结构及其制备方法
CN112157371B (zh) 一种亚微米Cu@Ag焊膏及其制备方法
JP4345066B2 (ja) セラミックス回路基板及びこれを用いたパワー半導体モジュール
WO2008004552A1 (en) Ceramic-metal bonded body, method for manufacturing the bonded body and semiconductor device using the bonded body
JP3714557B2 (ja) セラミックス基板用ろう材及びこれを用いたセラミックス回路基板、パワー半導体モジュール
JP6639394B2 (ja) 電気部品および機械部品を接合するための複合物および複層銀膜
JP2009170930A (ja) セラミックス回路基板及びこれを用いたパワー半導体モジュール
WO2020215739A1 (zh) 一种纳米金属膜模块制备方法及其基板制备方法
CN111843287A (zh) 纳米银焊膏及其制备方法和应用
TWI720823B (zh) 毛細結構之製作方法
CN112475662A (zh) 纳米银焊膏及其制备方法和在芯片封装互连结构中的应用
CN208087501U (zh) 一种AlN陶瓷金属化敷铜基板
CN109979905B (zh) 一种纳米金属膜预制模块及其制备方法
WO2014002949A1 (ja) 接合基板及びその製造方法ならびに接合基板を用いた半導体モジュール及びその製造方法
US20230178509A1 (en) Adhesive transfer film and method for manufacturing power module substrate by using same
JP2006120973A (ja) 回路基板および回路基板の製造方法
Lai et al. Study on the interconnect performance of multicomponent paste for 3rd generation semiconductor packaging
Lu et al. The influence of sintering process on thermal properties of nano-silver paste
TWI811895B (zh) 中介層基板及使用該中介層基板的裝置之製造方法
Jarosz et al. Low temperature joining technique (LTJT) as an alternative to lead-free soldering for die-attach applications

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 19923148

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 19923148

Country of ref document: EP

Kind code of ref document: A1