WO2020192364A1 - 阵列基板及其制备方法和显示装置 - Google Patents
阵列基板及其制备方法和显示装置 Download PDFInfo
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- WO2020192364A1 WO2020192364A1 PCT/CN2020/077438 CN2020077438W WO2020192364A1 WO 2020192364 A1 WO2020192364 A1 WO 2020192364A1 CN 2020077438 W CN2020077438 W CN 2020077438W WO 2020192364 A1 WO2020192364 A1 WO 2020192364A1
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- tin oxide
- indium tin
- layer
- array substrate
- oxide layer
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- 239000000758 substrate Substances 0.000 title claims abstract description 106
- 238000002360 preparation method Methods 0.000 title claims abstract description 13
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 claims abstract description 134
- 230000005611 electricity Effects 0.000 claims abstract description 9
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 claims description 20
- 238000000034 method Methods 0.000 claims description 18
- 239000000463 material Substances 0.000 claims description 14
- 238000005538 encapsulation Methods 0.000 claims description 8
- 238000000605 extraction Methods 0.000 claims description 8
- 229920000144 PEDOT:PSS Polymers 0.000 claims description 7
- 238000004519 manufacturing process Methods 0.000 claims description 7
- 239000007788 liquid Substances 0.000 claims description 2
- 238000005469 granulation Methods 0.000 claims 1
- 230000003179 granulation Effects 0.000 claims 1
- 230000000694 effects Effects 0.000 description 7
- 238000005530 etching Methods 0.000 description 5
- 239000010409 thin film Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 238000002834 transmittance Methods 0.000 description 3
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 238000005401 electroluminescence Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000007641 inkjet printing Methods 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 239000011368 organic material Substances 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 238000007740 vapor deposition Methods 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 239000008367 deionised water Substances 0.000 description 1
- 229910021641 deionized water Inorganic materials 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 229920000172 poly(styrenesulfonic acid) Polymers 0.000 description 1
- 229940005642 polystyrene sulfonic acid Drugs 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 239000012798 spherical particle Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K85/00—Organic materials used in the body or electrodes of devices covered by this subclass
- H10K85/10—Organic polymers or oligomers
- H10K85/111—Organic polymers or oligomers comprising aromatic, heteroaromatic, or aryl chains, e.g. polyaniline, polyphenylene or polyphenylene vinylene
- H10K85/113—Heteroaromatic compounds comprising sulfur or selene, e.g. polythiophene
- H10K85/1135—Polyethylene dioxythiophene [PEDOT]; Derivatives thereof
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
- H10K50/80—Constructional details
- H10K50/84—Passivation; Containers; Encapsulations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/80—Constructional details
- H10K59/805—Electrodes
- H10K59/8051—Anodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/80—Constructional details
- H10K59/875—Arrangements for extracting light from the devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K2102/00—Constructional details relating to the organic devices covered by this subclass
- H10K2102/10—Transparent electrodes, e.g. using graphene
- H10K2102/101—Transparent electrodes, e.g. using graphene comprising transparent conductive oxides [TCO]
- H10K2102/103—Transparent electrodes, e.g. using graphene comprising transparent conductive oxides [TCO] comprising indium oxides, e.g. ITO
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K2102/00—Constructional details relating to the organic devices covered by this subclass
- H10K2102/301—Details of OLEDs
- H10K2102/331—Nanoparticles used in non-emissive layers, e.g. in packaging layer
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/80—Constructional details
- H10K59/87—Passivation; Containers; Encapsulations
- H10K59/873—Encapsulations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
- H10K71/10—Deposition of organic active material
- H10K71/12—Deposition of organic active material using liquid deposition, e.g. spin coating
- H10K71/13—Deposition of organic active material using liquid deposition, e.g. spin coating using printing techniques, e.g. ink-jet printing or screen printing
- H10K71/135—Deposition of organic active material using liquid deposition, e.g. spin coating using printing techniques, e.g. ink-jet printing or screen printing using ink-jet printing
Definitions
- the present invention relates to the field of display technology, in particular to an array substrate, a preparation method thereof, and a display device.
- the array substrate when the light emitted by the organic light-emitting layer propagates in the anode layer and each organic material, due to the difference in refractive index, it is easy to produce an optical waveguide effect at the interface between the anode layer and each organic material, resulting in up to about 50%. % Light loss.
- the light emitted by the organic light-emitting layer reaches the anode layer during the transmission process, it is affected by the total reflection of the substrate or the air interface. The light whose incident angle is greater than the critical angle is totally reflected, and up to about 30% of the light propagates in the substrate. It cannot be coupled to the air, so that the light-emitting efficiency of the array substrate is low.
- the invention provides an array substrate, a preparation method thereof, and a display device.
- an array substrate includes a first electrode layer, and the first electrode layer includes:
- the indium tin oxide layer is arranged on a substrate and includes granular indium tin oxide;
- the planarization layer is provided on a side of the indium tin oxide layer away from the substrate, and the planarization layer fills at least part of the gaps between the granular indium tin oxide, and the planarization layer can conduct electricity.
- the array substrate further includes:
- the insulating layer is arranged between the substrate and the indium tin oxide layer, and the granular indium tin oxide is in contact with the insulating layer.
- the size of the granular indium tin oxide at different positions of the indium tin oxide layer is different to change the light extraction efficiency of light of different wavelengths.
- the array substrate includes a light emitting area and a non-light emitting area, and the indium tin oxide layer located in the light emitting area is granular indium tin oxide.
- the material of the planarization layer includes PEDOT:PSS.
- the thickness of the indium tin oxide layer is greater than or equal to 10 nm and less than or equal to 30 nm.
- the array substrate further includes:
- the organic light emitting layer is arranged on the side of the planarization layer away from the indium tin oxide layer;
- the second electrode layer is arranged on the side of the organic light-emitting layer away from the planarization layer;
- the encapsulation layer is arranged on the side of the second electrode layer away from the organic light emitting layer.
- a method for manufacturing an array substrate including: providing a substrate and forming a first electrode layer on the substrate, wherein forming the first electrode layer on the substrate includes:
- a planarization layer is formed on the side of the indium tin oxide layer away from the substrate, wherein the planarization layer fills at least part of the gaps between the granular indium tin oxide, and the planarization layer can conduct electricity.
- an indium tin oxide layer is formed on the substrate, and the indium tin oxide layer is granulated to form granular indium tin oxide, the method for preparing the array substrate also includes:
- An insulating layer is formed on the substrate, and the indium tin oxide layer is in contact with the insulating layer.
- forming an indium tin oxide layer on the substrate, and granulating the indium tin oxide layer to form granular indium tin oxide includes:
- the indium tin oxide layer is etched by using dilute hydrochloric acid with a preset concentration for a preset time to obtain granular indium tin oxide.
- forming a planarization layer on the side of the indium tin oxide layer away from the substrate includes:
- a liquid PEDOT:PSS material is used to form a planarization layer on the side of the indium tin oxide layer away from the substrate by an inkjet process.
- the manufacturing method of the array substrate further includes:
- An encapsulation layer is formed on the side of the second electrode layer away from the organic light emitting layer.
- a display device including:
- FIG. 1 is a schematic diagram of the structure of a first electrode layer in an embodiment of the present invention
- FIG. 2 is a schematic diagram of the structure of the first electrode layer when only granular indium tin oxide is provided in the light emitting area in the embodiment of the present invention
- FIG. 3 is a schematic diagram of the structure of the first electrode layer when the size of the granular indium tin oxide in different regions of the indium tin oxide layer is different in the embodiment of the present invention
- FIG. 5 is a schematic plan view of the indium tin oxide layer when only granular indium tin oxide is provided in the light emitting area in the embodiment of the present invention
- FIG. 6 is a schematic plan view of the indium tin oxide layer after the indium tin oxide layer is fully granulated in the embodiment of the present invention.
- the present invention first provides an array substrate.
- the array substrate includes a first electrode layer.
- the first electrode layer may include an indium tin oxide layer 1 and a planarization layer 2.
- the indium tin oxide layer 1 is provided on a substrate 3, including granular indium tin oxide;
- the planarization layer 2 is provided on the side of the indium tin oxide layer 1 away from the substrate 3, and the planarization layer 2 fills at least part of the gap between the granular indium tin oxide, the planarization layer 2 can conduct electricity.
- the granular indium tin oxide has electrode characteristics, improves the transmittance, and enhances the light extraction efficiency of the array substrate.
- the indium tin oxide in the first electrode layer in the array substrate is granulated to form granulated indium tin oxide to form a microcavity, and the granular indium tin oxide is provided on the side away from the substrate 3
- the conductive planarization layer 2, and the planarization layer 2 and the indium tin oxide layer 1 together constitute the first electrode layer.
- the microcavity effect is used to solve the optical waveguide effect between the organic light emitting layer and the first electrode layer in the prior art, which improves The light extraction efficiency of the array substrate is improved.
- the first electrode layer may serve as the anode layer of the organic electroluminescence device.
- the array substrate can be divided into a light-emitting area A and a non-light-emitting area B.
- the indium tin oxide layer 1 of the light-emitting area A can be set as granular indium tin oxide, and the size of the granular indium tin oxide is on the order of nm
- the granular indium tin oxide can be spherical particles or particles of other shapes, which is not particularly limited here.
- the indium tin oxide layer 1 in the non-light emitting region B can be set as granular indium tin oxide; referring to Figures 2 and 5, the indium tin oxide layer 1 in the non-light emitting region B can also be omitted Processing, retaining the original whole-layer structure.
- the thickness of the indium tin oxide layer 1 may be about 10 nm, or about 30 nm, or any thickness greater than 10 nm and less than 30 nm, which is not specifically limited here.
- the granular indium tin oxide can be obtained by etching the entire flat indium tin oxide layer 1, and the flat indium tin oxide layer 1 can be corroded by a hydrochloric acid solution.
- the light extraction efficiency can be different according to different sub-pixels. It is required to adjust the size of the granular indium tin oxide by changing the concentration of the hydrochloric acid solution and the etching time, and change the light extraction efficiency of light of different main wavelengths with different sizes of the granular indium tin oxide, thereby improving the quality of the array substrate.
- the planarization layer 2 is arranged on the side of the indium tin oxide layer 1 away from the substrate 3 and can conduct electricity. It forms the first electrode layer together with the indium tin oxide layer 1.
- the material of the planarization layer 2 can be PEDOT:PSS (poly(3) ,4-Ethylenedioxythiophene)-polystyrenesulfonic acid), has good transmittance and conductivity, can function as an auxiliary electrode, and can improve the quality of the array substrate.
- the material of the planarization layer 2 can also be other materials with high throughput and high conductivity, which are not specifically limited here.
- the first electrode layer is composed of PEDOT:PSS and indium tin oxide layer 1, which can achieve a semi-reflective effect.
- the array substrate may further include a thin film transistor 4, and the thin film transistor 4 may be disposed between the substrate 3 and the first electrode layer.
- the array substrate may also include an organic light-emitting layer 5, a second electrode layer 6 and an encapsulation layer 7.
- the organic light-emitting layer 5 is arranged on the side of the planarization layer 2 away from the indium tin oxide layer 1; the second electrode layer 6 is arranged on the organic light-emitting layer.
- the layer 5 is on the side away from the planarization layer 2; the encapsulation layer 7 is provided on the side of the second electrode layer 6 away from the organic light-emitting layer 5.
- the second electrode layer 6 may be a cathode layer of an organic electroluminescence device.
- the array substrate may further include an insulating layer, the insulating layer is disposed between the substrate and the indium tin oxide layer, and the granular indium tin oxide is in contact with the insulating layer.
- the material of the insulating layer can be organic, which can achieve the effect of planarizing the substrate.
- the present invention also provides a method for preparing an array substrate, which may include the following steps:
- step S110 a substrate 3 is provided.
- step S120 an indium tin oxide layer 1 is formed on the substrate 3, and the indium tin oxide layer 1 is granulated to form granular indium tin oxide.
- a planarization layer is formed on the side of the indium tin oxide layer away from the substrate, and the planarization layer fills at least part of the gap between the granular indium tin oxide, and the planarization layer can conduct electricity .
- step S110 a substrate 3 is provided.
- step S120 an indium tin oxide layer 1 is formed on the substrate 3, and the indium tin oxide layer 1 is granulated to form granular indium tin oxide.
- the array substrate can be divided into a light-emitting area A and a non-light-emitting area B.
- the indium tin oxide layer 1 in the light-emitting area A is granulated to form granular indium tin oxide.
- the size of the granular indium tin oxide is nm magnitude.
- the indium tin oxide layer 1 in the non-light emitting region B can be set as granular indium tin oxide; referring to Figures 2 and 5, the indium tin oxide layer 1 in the non-light emitting region B can also be omitted Processing, retaining the original whole-layer structure.
- the thickness of the indium tin oxide layer 1 may be about 10 nm, or about 30 nm, or any thickness greater than 10 nm and less than 30 nm, which is not specifically limited here.
- the granular indium tin oxide can be obtained by etching the entire flat indium tin oxide layer 1.
- the flat indium tin oxide layer 1 can be corroded by a hydrochloric acid solution, and the light extraction efficiency can be improved according to different sub-pixels.
- the size of the granular indium tin oxide is adjusted by changing the concentration of the hydrochloric acid solution and the etching time, and the light extraction efficiency of light of different main wavelengths is changed with the size of different granular indium tin oxide, thereby improving the quality of the array substrate.
- the indium tin oxide layer is etched with a preset concentration of dilute hydrochloric acid for a preset time to obtain granular indium tin oxide.
- a hydrochloric acid solution with a preset concentration of 5% concentration can be used to etch the indium tin oxide layer 1 for 120s, or pre
- a hydrochloric acid solution with a concentration of 30% will corrode the indium tin oxide layer 1 for 30s
- a hydrochloric acid solution with a preset concentration of greater than 5% and less than 30% can also be used to corrode the indium tin oxide layer 1 for 30s to 120s;
- the size of the granular indium tin oxide is needed to adjust the concentration of the hydrochloric acid solution and the etching time of the indium tin oxide layer 1. After the corrosion is over, it can be rinsed with deionized water, or other cleaning equipment can be used, as long as the dilute hydrochloric acid can be cleaned, and there is no specific limitation here.
- a planarization layer is formed on the side of the indium tin oxide layer away from the substrate, and the planarization layer fills at least part of the gap between the granular indium tin oxide, and the planarization layer Can conduct electricity.
- a planarization layer 2 is formed on the side of the indium tin oxide layer 1 away from the substrate 3.
- the planarization layer fills at least part of the gap between the granular indium tin oxide, and the planarization layer 2 and the indium tin oxide
- the layer 1 together constitutes the first electrode layer, and the material of the planarization layer 2 can be PEDOT:PSS, which has good transmittance and conductivity, can function as an auxiliary electrode, and can improve the quality of the array substrate.
- the material of the planarization layer 2 may preferably be other high-throughput and high-conductivity materials, which are not specifically limited here.
- the preparation of the planarization layer 2 can be prepared by a coating or inkjet printing process. Compared with the deposition of the prior art, the process method of the present invention is simple and the equipment cost is lower.
- the planarization layer prepared by the coating or inkjet printing process The roughness is high.
- the preparation method of the array substrate may further include forming a thin film transistor 4 on the substrate 3 before forming the first electrode layer, that is, the thin film transistor 4 is located between the first electrode layer and the substrate 3, and the thin film transistor 4 is also It may be provided between the second electrode layer 6 and the encapsulation layer 7.
- the preparation method of the array substrate may further include vapor deposition to form an organic light emitting layer 5 on the side of the planarization layer 2 away from the indium tin oxide layer 1; vapor deposition to form a second electrode on the side of the organic light emitting layer 5 away from the planarization layer 2 Layer 6;
- the encapsulation layer 7 is formed by evaporation on the side of the second electrode layer 6 away from the organic light-emitting layer 5.
- the preparation of the first electrode layer can be prepared at room temperature, and then evaporate the solvent to complete the preparation at a temperature greater than or equal to 30 degrees Celsius and less than or equal to 80 degrees Celsius.
- the process temperature is relatively low, and the application product field is wide. It is easier to obtain and can be applied in technical fields such as flexible display and wearable display.
- an indium tin oxide layer is formed on a substrate.
- the preparation method of the array substrate may further include forming an insulating layer on the substrate, the indium tin oxide layer is in contact with the insulating layer, and the material of the insulating layer may be organic. Can achieve the effect of planarizing the substrate.
- the present invention also provides a display device, which includes the above-mentioned array substrate.
- the detailed structure of the array substrate has been described in detail above, so it will not be repeated here.
- the display device can be any product or component with display function such as LCD panel, LCD TV, monitor, OLED panel, OLED TV, electronic paper display device, mobile phone, tablet computer, notebook computer, digital photo frame, navigator, etc. The embodiment does not limit this.
- the terms “a”, “an”, “the”, “said” and “at least one” are used to indicate that there are one or more elements/components/etc.; the terms “including”, “including” and “Having” is used to mean open-ended inclusion and means that there may be additional elements/components/etc. besides the listed elements/components/etc.
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Abstract
本公开涉及显示技术领域,提出一种阵列基板及其制备方法和显示装置。该阵列基板包括第一电极层,第一电极层可以包括氧化铟锡层(1)与平坦化层(2),氧化铟锡层设置在一基板(3)之上,包括颗粒状氧化铟锡;平坦化层设于氧化铟锡层远离基板的一侧,且平坦化层填充至少部分颗粒状氧化铟锡之间的间隙,平坦化层能够导电。
Description
交叉引用
本申请要求于2019年3月22日提交的申请号为201910222391.4、名称为“阵列基板及其制备方法和显示装置”的中国专利申请的优先权,该中国专利申请的全部内容通过引用全部并入本文。
本发明涉及显示技术领域,尤其涉及一种阵列基板及其制备方法和显示装置。
随着显示技术的飞速发展,人们对显示器的要求也日益增高,阵列基板决定着显示器的显示效果。
目前,阵列基板中,有机发光层发出的光在阳极层和各有机材料中传播时,由于折射率的不同,容易在阳极层和各有机材料交界面处产生光波导效应,从而导致高达约50%的光损失。有机发光层发出的光在传输过程中到达阳极层出光时,受到衬底或空气界面全反射的影响,入射角大于临界角的光发生全反射,有高达约30%的光在衬底内传播而不能耦合到空气中,使得阵列基板的出光效率较低。
因此有必要设计一种新的阵列基板及其制备方法和显示装置。
所述背景技术部分公开的上述信息仅用于加强对本发明的背景的理解,因此它可以包括不构成对本领域普通技术人员已知的现有技术的信息。
发明内容
本发明提供一种阵列基板及其制备方法和显示装置。
本发明的额外方面和优点将部分地在下面的描述中阐述,并且部分地将从描述中变得显然,或者可以通过本发明的实践而习得。
根据本发明的一个方面,一种阵列基板,包括第一电极层,所述第一电极层包括:
氧化铟锡层,设置在一基板之上,包括颗粒状氧化铟锡;
平坦化层,设于所述氧化铟锡层远离所述基板的一侧,且所述平坦化层填充至少部分所述颗粒状氧化铟锡之间的间隙,所述平坦化层能够导电。
在本公开的一种示例性实施例中,所述阵列基板还包括:
绝缘层,设于所述基板与所述氧化铟锡层之间,所述颗粒状氧化铟锡与所述绝缘层接触。
在本公开的一种示例性实施例中,位于氧化铟锡层的不同位置的所述颗粒状氧化铟锡 的大小不同,以改变不同波长的光的出光效率。
在本公开的一种示例性实施例中,所述阵列基板包括出光区域和非出光区域,位于出光区域的氧化铟锡层为颗粒状氧化铟锡。
在本公开的一种示例性实施例中,所述平坦化层的材料包括PEDOT:PSS。
在本公开的一种示例性实施例中,所述氧化铟锡层的厚度大于等于10nm小于等于30nm。
在本公开的一种示例性实施例中,所述阵列基板还包括:
有机发光层,设于所述平坦化层远离所述氧化铟锡层的一侧;
第二电极层,设于所述有机发光层远离所述平坦化层的一侧;
封装层,设于所述第二电极层远离所述有机发光层的一侧。
根据本公开的一个方面,提供一种阵列基板的制备方法,包括:提供一基板和在所述基板上形成第一电极层,其中,在所述基板上形成第一电极层包括:
在所述基板上形成氧化铟锡层,并对所述氧化铟锡层进行颗粒化处理形成颗粒状氧化铟锡;
在所述氧化铟锡层远离所述基板的一侧形成平坦化层,其中,所述平坦化层填充至少部分所述颗粒状氧化铟锡之间的间隙,并且所述平坦化层能够导电。
在本公开的一种示例性实施例中,在所述基板上形成氧化铟锡层,并对所述氧化铟锡层进行颗粒化处理形成颗粒状氧化铟锡之前,所述阵列基板的制备方法还包括:
在所述基板上形成绝缘层,所述氧化铟锡层与所述绝缘层接触。
在本公开的一种示例性实施例中,在所述基板上形成氧化铟锡层,并对所述氧化铟锡层进行颗粒化处理形成颗粒状氧化铟锡,包括:
利用预设浓度的稀盐酸对所述氧化铟锡层进行腐蚀预设时间得到颗粒状氧化铟锡。
在本公开的一种示例性实施例中,在所述氧化铟锡层远离所述基板的一侧形成平坦化层包括:
利用液态PEDOT:PSS材料采用喷墨工艺在氧化铟锡层远离所述基板的一侧形成平坦化层。
在本公开的一种示例性实施例中,在形成第一电极层之后,所述阵列基板的制备方法还包括:
在所述平坦化层远离所述氧化铟锡层的一侧形成有机发光层;
在所述有机发光层远离所述平坦化层的一侧形成第二电极层;
在所述第二电极层远离所述有机发光层的一侧形成封装层。
根据本公开的一个方面,提供一种显示装置,包括:
上述任意一项所述的阵列基板。
通过参照附图详细描述其示例实施方式,本发明的上述和其它特征及优点将变得更加明显。
图1是本发明实施方式中第一电极层的结构示意图;
图2是本发明实施方式中只在出光区域设置颗粒状氧化铟锡时第一电极层的结构示意图;
图3是本发明实施方式中氧化铟锡层不同区域颗粒状氧化铟锡尺寸不同时第一电极层的结构示意图;
图4是本发明阵列基板的结构示意图;
图5是本发明实施方式中只在出光区域设置颗粒状氧化铟锡时氧化铟锡层的平面结构示意图;
图6是本发明实施方式中氧化铟锡层全部颗粒化后时氧化铟锡层的平面结构示意图。
现在将参考附图更全面地描述示例实施方式。然而,示例实施方式能够以多种形式实施,且不应被理解为限于在此阐述的实施方式;相反,提供这些实施方式使得本发明将全面和完整,并将示例实施方式的构思全面地传达给本领域的技术人员。图中相同的附图标记表示相同或类似的结构,因而将省略它们的详细描述。
本发明首先提供一种阵列基板,参照图1所示,该阵列基板包括第一电极层,第一电极层可以包括氧化铟锡层1与平坦化层2,氧化铟锡层1设置在一基板3之上,包括颗粒状氧化铟锡;平坦化层2设于氧化铟锡层1远离基板3的一侧,且平坦化层2填充至少部分颗粒状氧化铟锡之间的间隙,平坦化层2能够导电。颗粒状氧化铟锡具有电极特性,提升了透过率,增强了阵列基板的出光效率。在本示例实施方式中,对阵列基板中第一电极层中的氧化铟锡进行颗粒化处理形成颗粒化氧化铟锡,形成微腔,在颗粒状氧化铟锡远离基板3的一侧设置有能够导电的平坦化层2,平坦化层2与氧化铟锡层1一同构成第一电极层,利用微腔效应解决了现有技术中有机发光层与第一电极层之间的光波导效应,提升了阵列基板的出光效率。
在本示例实施方式中,第一电极层可以作为有机电致发光器件的阳极层。
在本示例实施方式中,阵列基板可以分为出光区域A与非出光区域B,出光区域A的氧化铟锡层1可以设置为颗粒状氧化铟锡,颗粒状氧化铟锡的尺寸在nm量级,颗粒状氧化铟锡可以是球形颗粒,也可以是其他形状的颗粒,在此不做特殊限定。参照图1和图6所示,非出光区域B的氧化铟锡层1可以设置为颗粒状氧化铟锡;参照图2和图5所示,非出光区域B氧化铟锡层1也可以不做处理,保留原有的整层结构。
氧化铟锡层1的厚度可以大约是10nm,也可以大约是30nm,还可以是大于10nm小于30nm的任意厚度,在此不做具体限定。
参照图3所示,颗粒状氧化铟锡可以通过整层平坦氧化铟锡层1通过腐蚀得到,可以通过盐酸溶液对平坦氧化铟锡层1进行腐蚀,可以根据不同的子像素对出光效率的不同需求,通过变化盐酸溶液的浓度和腐蚀时间来调整颗粒状氧化铟锡的大小,以不同的颗粒状氧化铟锡的大小改变不同主要波长的光的出光效率,从而提高阵列基板的品质。
平坦化层2设置于氧化铟锡层1远离基板3的一侧,且能够导电,与氧化铟锡层1共同构成第一电极层,平坦化层2的材料可以是PEDOT:PSS(聚(3,4-乙烯二氧噻吩)-聚苯乙烯磺酸),具有良好的透过率与导电性,可以起到辅助电极的作用,得以提升阵列基板的品质。平坦化层2的材料还可以是其他高通过率、高导电性的材料,在此不做特殊限定。第一电极层采用PEDOT:PSS与氧化铟锡层1构成,能够达到半反射的效果。
参照图4所示,该阵列基板还可以包括薄膜晶体管4,薄膜晶体管4可以设置在基板3与第一电极层之间。
该阵列基板还可以包括有机发光层5、第二电极层6和封装层7,有机发光层5设于平坦化层2远离氧化铟锡层1的一侧;第二电极层6设于有机发光层5远离平坦化层2的一侧;封装层7设于第二电极层6远离有机发光层5的一侧。
在一示例实施方式中,第二电极层6可以为有机电致发光器件的阴极层。
在另一示例实施方式中,阵列基板还可以包括绝缘层,绝缘层设于基板与氧化铟锡层之间,颗粒状氧化铟锡与绝缘层接触。该绝缘层的材质可以是有机物,可以达到将基板平坦化的作用。
进一步的,本发明还提供一种阵列基板的制备方法,该制备方法可以包括一下步骤:
步骤S110,提供一基板3。
步骤S120,在所述基板3上形成氧化铟锡层1,并对所述氧化铟锡层1进行颗粒化处理形成颗粒状氧化铟锡。
步骤S130,在所述氧化铟锡层远离所述基板的一侧形成平坦化层,且所述平坦化层填充至少部分所述颗粒状氧化铟锡之间的间隙,所述平坦化层能够导电。
下面对上述步骤进行详细介绍;
在步骤S110中,提供一基板3。
在步骤S120中,在所述基板3上形成氧化铟锡层1,并对所述氧化铟锡层1进行颗粒化处理形成颗粒状氧化铟锡。
在本示例实施方式中,阵列基板可以分为出光区域A与非出光区域B,对出光区域A的氧化铟锡层1进行颗粒化处理形成颗粒状氧化铟锡,颗粒状氧化铟锡的尺 寸在nm量级。参照图1和图6所示,非出光区域B的氧化铟锡层1可以设置为颗粒状氧化铟锡;参照图2和图5所示,非出光区域B氧化铟锡层1也可以不做处理,保留原有的整层结构。
氧化铟锡层1的厚度可以大约是10nm,也可以大约是30nm,还可以是大于10nm小于30nm的任意厚度,在此不做具体限定。
参照图3所示,颗粒状氧化铟锡可以通过对整层平坦氧化铟锡层1进行腐蚀得到,可以通过盐酸溶液对平坦氧化铟锡层1进行腐蚀,可以根据不同的子像素对出光效率的不同需求,通过变化盐酸溶液的浓度和腐蚀时间来调整颗粒状氧化铟锡的大小,以不同的颗粒状氧化铟锡的大小改变不同主要波长的光的出光效率,从而提高阵列基板的品质。利用预设浓度的稀盐酸对氧化铟锡层进行腐蚀预设时间得到颗粒状氧化铟锡,可以采用预设浓度为5%浓度的盐酸溶液对氧化铟锡层1腐蚀120s,也可以采用采用预设浓度为30%浓度的盐酸溶液对氧化铟锡层1腐蚀30s,还可以采用预设浓度大于5%小于30%的任一浓度的盐酸溶液对氧化铟锡层1腐蚀30s到120s;可以根据需要颗粒状氧化铟锡的尺寸来调整盐酸溶液的浓度与对氧化铟锡层1的腐蚀时间。在腐蚀结束后可以去离子水将其冲洗干净,或者采用其他清洗设备,只要能够将稀盐酸清理干净即可,在此不做具体限定。
在步骤S130中,在所述氧化铟锡层远离所述基板的一侧形成平坦化层,且所述平坦化层填充至少部分所述颗粒状氧化铟锡之间的间隙,所述平坦化层能够导电。
参照图3所示,在氧化铟锡层1远离基板3的一侧形成平坦化层2,平坦化层填充至少部分所述颗粒状氧化铟锡之间的间隙,平坦化层2与氧化铟锡层1共同构成第一电极层,平坦化层2的材料可以是PEDOT:PSS,具有良好的透过率与导电性,可以起到辅助电极的作用,得以提升阵列基板的品质。平坦化层2的材料好可以是其他高通过率、高导电性的材料,在此不做特殊限定。
平坦化层2的制备可以通过涂覆或喷墨打印工艺制备,相较于现有技术的沉积,本发明的工艺方法简单且设备成本更低廉,涂覆或喷墨打印工艺制备的平坦化层粗糙度较高。
参照图4所示,该阵列基板的制备方法在形成第一电极层之前还可以包括在基板3上形成薄膜晶体管4,即薄膜晶体管4位于第一电极层与基板3之间,薄膜晶体管4还可以设置在第二电极层6与封装层7之间。
该阵列基板的制备方法还可以包括在平坦化层2远离氧化铟锡层1的一侧蒸镀形成有机发光层5;在有机发光层5远离平坦化层2的一侧蒸镀形成第二电极层6;在第二电极层6远离有机发光层5的一侧蒸镀形成封装层7。
第一电极层的制备可以在常温下制备,之后在大于等于30摄氏度小于等于80摄氏度的温度下蒸干溶剂完成制备,工艺温度较低,应用产品领域广泛,本发明阵列基板制备方法的工艺条件更易获得、可在柔性显示和可穿戴显示等技术领域应用。
在另一示例实施方式中,在基板上形成氧化铟锡层,该阵列基板的制备方法还可以包括基板上形成绝缘层,氧化铟锡层与绝缘层接触,该绝缘层的材质可以是有机物。可以达到将基板平坦化的作用。
再进一步的,本发明还提供一种显示装置,该显示装置包括上述阵列基板,阵列基板的详细结构上述已经进行了详细说明,因此,此处不再赘述。该显示装置可以为液晶面板、液晶电视、显示器、OLED面板、OLED电视、电子纸显示装置、手机、平板电脑、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件,本公开的实施例对此不作限制。
上述所描述的特征、结构或特性可以以任何合适的方式结合在一个或更多实施方式中,如有可能,各实施例中所讨论的特征是可互换的。在上面的描述中,提供许多具体细节从而给出对本发明的实施方式的充分理解。然而,本领域技术人员将意识到,可以实践本发明的技术方案而没有所述特定细节中的一个或更多,或者可以采用其它的方法、组件、材料等。在其它情况下,不详细示出或描述公知结构、材料或者操作以避免模糊本发明的各方面。
本说明书中使用“约”“大约”的用语通常表示在一给定值或范围的20%之内,较佳是10%之内,且更佳是5%之内。在此给定的数量为大约的数量,意即在没有特定说明的情况下,仍可隐含“约”“大约”“大致”“大概”的含义。
虽然本说明书中使用相对性的用语,例如“上”“下”来描述图标的一个组件对于另一组件的相对关系,但是这些术语用于本说明书中仅出于方便,例如根据附图中所述的示例的方向。能理解的是,如果将图标的装置翻转使其上下颠倒,则所叙述在“上”的组件将会成为在“下”的组件。当某结构在其它结构“上”时,有可能是指某结构一体形成于其它结构上,或指某结构“直接”设置在其它结构上,或指某结构通过另一结构“间接”设置在其它结构上。
本说明书中,用语“一个”、“一”、“该”、“所述”和“至少一个”用以表示存在一个或多个要素/组成部分/等;用语“包含”、“包括”和“具有”用以表示开放式的包括在内的意思并且是指除了列出的要素/组成部分/等之外还可存在另外的要素/组成部分/等。
应可理解的是,本发明不将其应用限制到本说明书提出的部件的详细结构和布置方式。本发明能够具有其他实施方式,并且能够以多种方式实现并且执行。前述变形形式和修改形式落在本发明的范围内。应可理解的是,本说明书公开和限定的本发明延伸到文中和/或附图中提到或明显的两个或两个以上单独特征的所有可替代组合。所有这些不同的组合构成本发明的多个可替代方面。本说明书所述的实施方式说明了已知用于实现本发明的最佳方式,并且将使本领域技术人员能够利用本发明。
Claims (13)
- 一种阵列基板,包括第一电极层,其中,所述第一电极层包括:氧化铟锡层,设置在一基板之上,包括颗粒状氧化铟锡;平坦化层,设于所述氧化铟锡层远离所述基板的一侧,且所述平坦化层填充至少部分所述颗粒状氧化铟锡之间的间隙,所述平坦化层能够导电。
- 根据权利要求1所述的阵列基板,其中,所述阵列基板还包括:绝缘层,设于所述基板与所述氧化铟锡层之间,所述颗粒状氧化铟锡与所述绝缘层接触。
- 根据权利要求1或2所述的阵列基板,其中,位于氧化铟锡层的不同位置的所述颗粒状氧化铟锡的大小不同,以改变不同波长的光的出光效率。
- 根据权利要求1至3中任意一项所述的阵列基板,其中,所述阵列基板包括出光区域和非出光区域,位于出光区域的氧化铟锡层为颗粒状氧化铟锡。
- 根据权利要求1至4中任意一项所述的阵列基板,其中,所述平坦化层的材料包括PEDOT:PSS。
- 根据权利要求1至5中任意一项所述的阵列基板,其中,所述氧化铟锡层的厚度大于等于10nm小于等于30nm。
- 根据权利要求1~6任一项所述的阵列基板,其中,所述阵列基板还包括:有机发光层,设于所述平坦化层远离所述氧化铟锡层的一侧;第二电极层,设于所述有机发光层远离所述平坦化层的一侧;封装层,设于所述第二电极层远离所述有机发光层的一侧。
- 一种阵列基板的制备方法,包括:提供一基板;以及在所述基板上形成第一电极层,其中,在所述基板上形成第一电极层包括:在所述基板上形成氧化铟锡层,并对所述氧化铟锡层进行颗粒化处理形成颗粒状氧化铟锡;在所述氧化铟锡层远离所述基板的一侧形成平坦化层,其中,所述平坦化层填充至少部分所述颗粒状氧化铟锡之间的间隙,并且所述平坦化层能够导电。
- 根据权利要求8所述的阵列基板的制备方法,其中,在所述基板上形成氧化铟锡层,并对所述氧化铟锡层进行颗粒化处理形成颗粒状氧化铟锡之前,所述阵列基板的制备方法还包括:在所述基板上形成绝缘层,所述氧化铟锡层与所述绝缘层接触。
- 根据权利要求8或9所述的阵列基板的制备方法,其中,在所述基板上形成氧化铟锡层,并对所述氧化铟锡层进行颗粒化处理形成颗粒状氧化铟锡,包括:利用预设浓度的稀盐酸对所述氧化铟锡层进行腐蚀预设时间得到所述颗粒状氧化铟锡。
- 根据权利要求8至10中任意一项所述的阵列基板的制备方法,其中,在所述氧化铟锡层远离所述基板的一侧形成平坦化层包括:利用液态PEDOT:PSS材料采用喷墨工艺在氧化铟锡层远离所述基板的一侧形成所述平坦化层。
- 根据权利要求8~11任意一项所述的阵列基板的制备方法,其中,在形成第一电极层之后,所述阵列基板的制备方法还包括:在所述平坦化层远离所述氧化铟锡层的一侧形成有机发光层;在所述有机发光层远离所述平坦化层的一侧形成第二电极层;在所述第二电极层远离所述有机发光层的一侧形成封装层。
- 一种显示装置,包括:权利要求1~7任意一项所述的阵列基板。
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