WO2020151064A1 - 显示面板及制造方法 - Google Patents

显示面板及制造方法 Download PDF

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Publication number
WO2020151064A1
WO2020151064A1 PCT/CN2019/078010 CN2019078010W WO2020151064A1 WO 2020151064 A1 WO2020151064 A1 WO 2020151064A1 CN 2019078010 W CN2019078010 W CN 2019078010W WO 2020151064 A1 WO2020151064 A1 WO 2020151064A1
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Prior art keywords
layer
electrode
electroluminescent
thickness
display panel
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PCT/CN2019/078010
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English (en)
French (fr)
Inventor
唐甲
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深圳市华星光电半导体显示技术有限公司
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Application filed by 深圳市华星光电半导体显示技术有限公司 filed Critical 深圳市华星光电半导体显示技术有限公司
Priority to US16/339,383 priority Critical patent/US11075354B2/en
Publication of WO2020151064A1 publication Critical patent/WO2020151064A1/zh

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/122Pixel-defining structures or layers, e.g. banks

Definitions

  • the present invention relates to a display panel and a manufacturing method, and in particular to an organic light emitting diode (OLED) display panel.
  • OLED organic light emitting diode
  • the embodiment of the present invention provides a display panel.
  • the display panel includes a substrate, an active component is disposed on the substrate, a passivation layer covers the active component, a flat layer covers the passivation layer, a first electrode is disposed on the flat layer, the pixel definition layer covers the first electrode and the flat layer, and the insulating layer is disposed on The pixel defining layer, the conductive layer is arranged on the insulating layer, the electroluminescent layer is electrically connected to the first electrode, and the second electrode is electrically connected to the electroluminescent layer.
  • the first electrode is electrically connected to the active component through the openings in the passivation layer and the flat layer; the insulating layer covers part of the pixel definition layer; the electroluminescent layer is arranged between the first electrode and the second electrode; and the thickness of the electroluminescent layer Greater than or equal to the thickness of the insulating layer.
  • the electroluminescent layer covers the first electrode, the top of the conductive layer, the sidewalls of the pixel defining layer and part of the top of the pixel layer, and the electroluminescent layer contacts the sidewalls of the insulating layer.
  • the second electrode covers the electroluminescent layer, and the second electrode contacts part of the sidewall of the conductive layer.
  • the thickness of the electroluminescent layer is less than or equal to 4500 angstroms.
  • the thickness of the conductive layer is greater than the thickness of the second electrode.
  • the sum of the thickness of the insulating layer and the thickness of the conductive layer is greater than or equal to 1 micrometer ( ⁇ m).
  • the material of the conductive layer includes metal or organic conductive material.
  • the shape of the conductive layer includes a rectangle, a trapezoid or a groove shape.
  • the method of manufacturing a display panel includes providing a substrate; forming an active device on the substrate; forming a passivation layer covering the active device; forming a planarization layer covering the passivation layer; forming an opening penetrating the planarization layer and the passivation layer, wherein the opening exposes the active device Forming a first electrode on the flat layer, wherein the first electrode is electrically connected to the active component through an opening that penetrates the flat layer and the passivation layer; forming a pixel definition layer covering the first electrode and the flat layer; forming an insulating layer On the pixel defining layer; forming a conductive layer covering the insulating layer; forming an electroluminescent layer, wherein the electroluminescent layer covers the first electrode, the top of the conductive layer, the sidewalls of the pixel defining layer and part of the top of the pixel defining layer, and The electroluminescent layer contacts the sidewall of the insulating layer;
  • the thickness of the insulating layer is less than or equal to the thickness of the electroluminescent layer.
  • the top-emission display device includes a display panel, wherein the display panel includes a substrate; the active component is disposed on the substrate; the passivation layer covers the active component; the flat layer covers the passivation layer; the first electrode is disposed on the flat layer, wherein the first electrode passes The openings located in the passivation layer and the flat layer are electrically connected to the active components; the pixel definition layer covers the first electrode and the flat layer; the insulating layer is arranged on the pixel definition layer, wherein the insulating layer covers part of the pixel definition layer; the conductive layer is arranged on the insulating layer On; the electroluminescent layer is electrically connected to the first electrode; and the second electrode is electrically connected to the electroluminescent layer, the electroluminescent layer is disposed between the first electrode and the second electrode.
  • the electroluminescent layer covers the first electrode, the top of the conductive layer, the sidewalls of the pixel defining layer and part of the top of the pixel layer, and the electroluminescent layer contacts the sidewalls of the insulating layer.
  • the second electrode covers the electroluminescent layer, and the second electrode contacts part of the sidewall of the conductive layer.
  • the thickness of the electroluminescent layer is less than or equal to 4500 Angstroms ( ⁇ ).
  • the thickness of the conductive layer is greater than the thickness of the second electrode.
  • the sum of the thickness of the insulating layer and the thickness of the conductive layer is greater than or equal to 1 micrometer ( ⁇ m).
  • the material of the conductive layer includes metal or organic conductive material.
  • the shape of the conductive layer includes a rectangle, a trapezoid or a groove shape.
  • the insulating layer covers a part of the pixel definition layer.
  • the thickness of the electroluminescent layer is greater than or equal to the thickness of the insulating layer.
  • the display panel of the embodiment of the present invention can increase the light-emitting area of the top-emission display device, and at the same time solve the problem of voltage degradation (IR drop) problem.
  • IR drop voltage degradation
  • FIGS. 1 to 6 are schematic diagrams of manufacturing a top-emitting display panel according to an embodiment of the present invention.
  • FIG. 7 is a top view of the light-emitting area of the display panel
  • FIG. 8 is a partial schematic diagram of a display panel according to another embodiment of the present invention.
  • FIG. 9 is a partial schematic diagram of a display panel according to another embodiment of the present invention.
  • FIG. 10 is a partial schematic diagram of a display panel according to another embodiment of the present invention.
  • FIG. 11 is a partial schematic diagram of a display panel according to another embodiment of the invention.
  • a substrate 100 is first provided, and a light shielding layer 110 and a buffer layer 120 are formed on the substrate 100, and the buffer layer 120 covers the light shielding layer 110.
  • an active device 130 is formed on the buffer layer 120.
  • the active device 130 includes a metal oxide layer 131, a gate insulating layer 132, a gate electrode 133, an interlayer dielectric layer 134, a source electrode 135 and a drain electrode 136.
  • the active component 130 is a thin film transistor (thin film transistor, TFT). More preferably, the active device 130 is a top-gate thin film transistor (top-gate TFT).
  • the metal oxide layer 131 is indium gallium zinc oxide (Indium Gallium Zinc Oxide, IGZO).
  • the metal oxide layer 131 is formed on the buffer layer 120
  • the gate insulating layer 132 is formed on the metal oxide layer 131
  • the interlayer dielectric layer 134 is formed on the buffer layer 120
  • the interlayer dielectric layer 134 Cover the sidewalls of the gate insulating layer 132, the top and sidewalls of the gate electrode 133, part of the metal oxide layer 131 and the buffer layer 120, and then etch the interlayer dielectric layer 134 to form an opening, and form a source on the opening Pole 135 and drain 136.
  • a passivation layer 140 is formed on the active device 130, and the passivation layer 140 covers the interlayer dielectric layer 134 and the active device 130.
  • a flat layer 150 covering the passivation layer 140 is formed, and an opening 145 penetrating the flat layer 150 and the passivation layer 140 is formed, wherein the opening 145 exposes the source electrode 135 in the active device 130.
  • a first electrode 160 is then formed on the flat layer 150, wherein the first electrode 160 is an anode.
  • the first electrode 160 is electrically connected to the source electrode 135 in the active device 130 through the opening 145 penetrating the planarization layer 150 and the passivation layer 140, and further forms a pixel definition layer 170 covering the first electrode 160 and the planarization layer 150.
  • an insulating layer 180 is formed on the pixel defining layer 170, and the insulating layer 180 covers a part of the pixel defining layer 170.
  • a conductive layer 190 is formed on the insulating layer 180, and the conductive layer 190 covers the insulating layer 180.
  • the sum of the thickness of the insulating layer 180 and the thickness of the conductive layer 190 is greater than or equal to 1 micrometer ( ⁇ m)
  • the material of the conductive layer 190 includes metal or organic conductive material
  • the shape of the conductive layer 190 is rectangular.
  • the electroluminescent layer 200 is formed, and the electroluminescent layer 200 covers the first electrode 160, the top of the conductive layer 190, the sidewalls of the pixel defining layer 170, and a portion of the top of the pixel defining layer 170, and the electroluminescent layer 200 contacts the sidewall of the insulating layer 180.
  • the thickness of the insulating layer 180 is equal to the thickness of the electroluminescent layer 200.
  • a second electrode 210 covering the electroluminescent layer 200 is formed, wherein the second electrode 210 is a cathode, and the second electrode 210 contacts a part of the sidewall of the conductive layer 190.
  • the thickness of the electroluminescent layer 200 is less than or equal to 4500 angstroms, and the thickness of the conductive layer 190 is greater than the thickness of the second electrode 210.
  • FIG. 7 is a top view of the light-emitting area of the display panel.
  • the electroluminescent layer and the second electrode are not shown in FIG. 6.
  • the conductive layer 190 is disposed above the pixel defining layer 170, the first electrode 160 is disposed between the two conductive layers 190, the sub-pixel light-emitting area 300 is located between the two first electrodes 160, and the sub-pixel light-emitting area 300 is located Between two conductive layers 190.
  • FIG. 8 is a partial schematic diagram of a display panel according to another embodiment of the present invention.
  • the thickness of the electroluminescent layer 200 is less than or equal to 4500 angstroms, but the thickness of the electroluminescent layer 200 is greater than the thickness of the insulating layer 180.
  • the insulating layer 180 is disposed on top of the pixel definition layer 170.
  • the sum of the thickness of the insulating layer 180 and the thickness of the conductive layer 190 is greater than or equal to 1 micrometer ( ⁇ m), and the thickness of the conductive layer 190 is greater than the thickness of the second electrode 210.
  • FIG. 9 is a partial schematic diagram of a display panel according to another embodiment of the present invention.
  • the insulating layer 180 is disposed on the top of the pixel definition layer 170, and the conductive layer 190 is disposed on the top of the insulating layer 180.
  • the conductive layer 190 has a rectangular shape, and the electroluminescent layer 200 has a stepped shape. When the electroluminescent layer 200 has a stepped shape, the contact area between the second electrode 210 and the conductive layer 190 can be increased.
  • FIG. 10 is a partial schematic diagram of a display panel according to another embodiment of the present invention.
  • the shape of the conductive layer 190 presents a rectangle, and the shape of the electroluminescent layer 200 presents a groove shape.
  • the contact area between the second electrode 210 and the conductive layer 190 can be increased.
  • FIG. 11 is a partial schematic diagram of a display panel according to another embodiment of the present invention.
  • the conductive layer 190 is formed directly above the pixel defining layer 170, and the electroluminescent layer 200 is formed on the conductive layer 190, and no insulating layer is formed above the pixel defining layer 170.
  • the material of the conductive layer 190 is preferably an organic conductive material.
  • the display panel of the embodiment of the present invention can be used in thin film transistors or organic light-emitting diodes, and the display panel of the embodiment of the present invention can also increase the light-emitting area of the top-emission display device, and solve the problem that the top-emission display device emits Voltage Decay (IR drop) problem.
  • IR drop Voltage Decay

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
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Abstract

本发明公开一种显示面板。显示面板包括基板、设置在基板上的主动组件、覆盖主动组件的钝化层、覆盖钝化层的平坦层、设置在平坦层上的第一电极、覆盖第一电极与平坦层的像素定义层、设置在像素定义层上的绝缘层、设置在绝缘层上的导电层、电致发光层以及第二电极。第一电极通过位于钝化层与平坦层的开口电性连接主动组件;绝缘层覆盖部分像素定义层;电致发光层设置在第一电极及第二电极之间;其中电致发光层的厚度大于等于绝缘层的厚度。

Description

显示面板及制造方法 技术领域
本发明是有关于一种显示面板及制造方法,特别是有关于一种有机发光二极管(OLED)的显示面板。
背景技术
由于材料的限制,大尺寸顶部发光型显示设备在发光时,在显示区中心的周围会有电压衰退(IR drop)的问题产生,造成显示不均的问题。此外,大尺寸顶部发光型显示设备的制程复杂,为了简化制程以及克服电压衰退的问题。故,有必要提供一种显示面板及制造方法,以解决现有技术所存在的问题。
技术问题
大尺寸顶部发光型显示设备在发光时,会有显示不均及电压衰退的问题。
技术解决方案
本发明的实施例提供一种显示面板。显示面板包括基板、主动组件设置在基板上、钝化层覆盖主动组件、平坦层覆盖钝化层、第一电极设置在平坦层上、像素定义层覆盖第一电极与平坦层、绝缘层设置在像素定义层上、导电层设置在绝缘层上、电致发光层电性连接第一电极,以及第二电极电性连接电致发光层。第一电极通过位于钝化层与平坦层的开口电性连接主动组件;绝缘层覆盖部分像素定义层;电致发光层设置在第一电极及第二电极之间;以及电致发光层的厚度大于等于绝缘层的厚度。
在本发明的一实施例中,电致发光层覆盖第一电极、导电层的顶部、像素定义层的侧壁及像素层的部分顶部,且电致发光层接触绝缘层的侧壁。
在本发明的一实施例中,第二电极覆盖电致发光层,且第二电极接触导电层的部分侧壁。
在本发明的一实施例中,电致发光层的厚度小于等于4500埃。
在本发明的一实施例中,导电层的厚度大于第二电极的厚度。
在本发明的一实施例中,绝缘层的厚度及导电层的厚度总和大于等于1微米(μm)。
在本发明的一实施例中,导电层的材料包括金属或有机导电材料。
在本发明的一实施例中,导电层的形状包括矩形、梯形或凹槽形。
本发明的另一实施例提供一种制造显示面板的方法。制造显示面板的方法包括提供基板;形成主动组件在基板上;形成覆盖主动组件的钝化层;形成覆盖钝化层的平坦层;形成贯穿平坦层与钝化层的开口,其中开口曝露主动组件中的源极;形成第一电极在平坦层上,其中第一电极通过贯穿平坦层与钝化层的开口电性连接主动组件;形成覆盖第一电极与平坦层的像素定义层;形成绝缘层在像素定义层上;形成覆盖绝缘层的导电层;形成电致发光层,其中电致发光层覆盖第一电极、导电层的顶部、像素定义层的侧壁及像素定义层的部分顶部,且电致发光层接触绝缘层的侧壁;以及形成覆盖电致发光层的第二电极,其中第二电极接触导电层的部分侧壁。
在本发明的一实施例中,绝缘层的厚度小于等于电致发光层的厚度。
本发明的另一实施例提供一种顶部发光型显示设备。顶部发光型显示设备包括显示面板,其中显示面板包括基板;主动组件设置在基板上;钝化层覆盖主动组件;平坦层覆盖钝化层;第一电极设置在平坦层上,其中第一电极通过位于钝化层与平坦层的开口电性连接主动组件;像素定义层覆盖第一电极与平坦层;绝缘层设置在像素定义层上,其中绝缘层覆盖部分像素定义层;导电层设置在绝缘层上;电致发光层电性连接第一电极;以及第二电极电性连接电致发光层,电致发光层设置在第一电极及第二电极之间。
在本发明的一实施例中,电致发光层覆盖第一电极、导电层的顶部、像素定义层的侧壁及像素层的部分顶部,且电致发光层接触绝缘层的侧壁。
在本发明的一实施例中,第二电极覆盖所述电致发光层,且第二电极接触导电层的部分侧壁。
在本发明的一实施例中,电致发光层的厚度小于等于4500埃(Å)。
在本发明的一实施例中,导电层的厚度大于第二电极的厚度。
在本发明的一实施例中,绝缘层的厚度及导电层的厚度总和大于等于1微米(μm)。
在本发明的一实施例中,导电层的材料包括金属或有机导电材料。
在本发明的一实施例中,导电层的形状包括矩形、梯形或凹槽形。
在本发明的一实施例中,绝缘层覆盖部分像素定义层。
在本发明的一实施例中,电致发光层的厚度大于等于绝缘层的厚度。
有益效果
与现有技术相比较,本发明的实施例的显示面板能增大顶部发光型显示设备的发光面积,同时解决顶部发光型显示设备在发光时会有电压衰退(IR drop)的问题。
附图说明
图1至图6是本发明实施例制作顶部发光型显示面板的示意图;
图7是显示面板的发光区俯视图;
图8是本发明另一实施例的显示面板局部示意图;
图9是本发明另一实施例的显示面板局部示意图;
图10是本发明另一实施例的显示面板局部示意图;以及
图11是本发明另一实施例的显示面板局部示意图。
本发明的实施方式
为让本发明的上述内容能更明显易懂,下文特举优选实施例,并配合所附图式作详细说明。
参考图1,首先提供基板100,并在基板100上形成遮光层110及缓冲层120,缓冲层120覆盖遮光层110。接着在缓冲层120上形成主动组件130,主动组件130包括金属氧化物层131、栅极绝缘层132、栅极电极133、层间介电层134、源极135及漏极136。优选地,主动组件130是一薄膜电晶(thin film transistor, TFT)。更优选地,主动组件130是一顶闸极式薄膜电晶(top-gate thin film transistor, top-gate TFT)。优选地,金属氧化物层131是氧化铟镓锌(Indium Gallium Zinc Oxide, IGZO)。具体而言,金属氧化物层131形成在缓冲层120上,栅极绝缘层132形成在金属氧化物层131上,层间介电层134形成在缓冲层120上,且层间介电层134覆盖栅极绝缘层132的侧壁、栅极电极133的顶部及侧壁及、部分金属氧化物层131及缓冲层120,接着蚀刻层间介电层134以形成开口,并在开口上形成源极135及漏极136。主动组件130完成后,形成钝化层140在主动组件130上,且钝化层140覆盖层间介电层134及主动组件130。形成覆盖钝化层140的平坦层150,以及形成贯穿平坦层150与钝化层140的开口145,其中开口145曝露主动组件130中的源极135。
参考图2,接着形成第一电极160在平坦层150上,其中第一电极160是阳极。第一电极160通过贯穿平坦层150及钝化层140的开口145电性连接主动组件130中的源极135,以及进一步形成覆盖第一电极160与平坦层150的像素定义层170。
参考图3,形成绝缘层180在像素定义层170上,且绝缘层180覆盖部分像素定义层170。
参考图4,形成导电层190在绝缘层180,且导电层190覆盖绝缘层180。优选地,绝缘层180的厚度及导电层190的厚度的总和大于等于1微米(μm),导电层190的材料包括金属或有机导电材料,以及导电层190形状是矩形。
参考图5,形成电致发光层200,且电致发光层200覆盖第一电极160、导电层190的顶部、像素定义层170的侧壁及像素定义层170的部分顶部,且电致发光层200接触绝缘层180的侧壁。优选地,绝缘层180的厚度等于电致发光层200的厚度。
参考图6,形成覆盖电致发光层200的第二电极210,其中第二电极210是阴极,且第二电极210接触导电层190的部分侧壁。优选地,电致发光层200的厚度小于等于4500埃,导电层190的厚度大于第二电极210的厚度。
参考图7,图7是显示面板的发光区俯视图。在图6未绘出电致发光层及第二电极。导电层190设置在像素定义层170的上方,第一电极160设置在两个导电层190之间,子像素发光区300位在两个第一电极160之间,以及子像素发光区300位在两个导电层190之间。
参考图8,图8是本发明另一实施例的显示面板局部示意图。电致发光层200的厚度小于等于4500埃,但电致发光层200的厚度大于绝缘层180的厚度。绝缘层180设置在像素定义层170的顶部。绝缘层180的厚度及导电层190的厚度的总和大于等于1微米(μm),以及导电层190的厚度大于第二电极210的厚度。
参考图9,图9是本发明另一实施例的显示面板局部示意图。绝缘层180设置在像素定义层170的顶部,导电层190设置在绝缘层180的顶部。导电层190的形状呈现矩形,以及电致发光层200的形状呈现阶梯形状。当电致发光层200的形状呈现阶梯形时,可以增加第二电极210与导电层190的接触面积。
参考图10,图10是本发明另一实施例的显示面板局部示意图。导电层190的形状呈现矩形,以及电致发光层200的形状呈现凹槽形状。当电致发光层200的形状呈现凹槽形状时,可以增加第二电极210与导电层190的接触面积。
参考图11,图11是本发明另一实施例的显示面板局部示意图。导电层190直接形成在像素定义层170的上方,以及电致发光层200形成在导电层190上,且在像素定义层170的上方不形成绝缘层。此时,导电层190的材料优选是机导电材料。
本发明实施例的显示面板可以使用在薄膜晶体管或有机发光二极管,且本发明实施例的显示面板还能增大顶部发光型显示设备的发光面积,并解决顶部发光型显示设备在发光时会有电压衰退(IR drop)的问题。
虽然本发明结合其具体实施例而被描述,应该理解的是,许多替代、修改及变化对于那些本领域的技术人员将是显而易见的。因此,其意在包含落入所附权利要求书的范围内的所有替代、修改及变化。

Claims (20)

  1. 一种显示面板,包括:
    基板;
    主动组件设置在所述基板上;
    钝化层覆盖所述主动组件;
    平坦层覆盖所述钝化层;
    第一电极设置在所述平坦层上,其中所述第一电极通过位于所述钝化层与所述平坦层的开口电性连接所述主动组件;
    像素定义层覆盖所述第一电极与所述平坦层;
    绝缘层设置在所述像素定义层上,其中所述绝缘层覆盖部分所述像素定义层;
    导电层设置在所述绝缘层上;
    电致发光层电性连接所述第一电极;以及
    第二电极电性连接所述电致发光层,所述电致发光层设置在所述第一电极及所述第二电极之间;
    其中所述电致发光层的厚度大于等于所述绝缘层的厚度。
  2. 如权利要求1所述的显示面板,其中,所述电致发光层覆盖所述第一电极、所述导电层的顶部、所述像素定义层的侧壁及所述像素层的部分顶部,且所述电致发光层接触所述绝缘层的侧壁。
  3. 如权利要求1所述的显示面板,其中,所述第二电极覆盖所述电致发光层,且所述第二电极接触所述导电层的部分侧壁。
  4. 如权利要求1所述的显示面板,其中,所述电致发光层的厚度小于等于4500埃(Å)。
  5. 如权利要求1所述的显示面板,其中,所述导电层的厚度大于第二电极的厚度。
  6. 如权利要求1所述的显示面板,其中,所述绝缘层的厚度及所述导电层的厚度总和大于等于1微米(μm)。
  7. 如权利要求1所述的显示面板,其中,所述导电层的材料包括金属或有机导电材料。
  8. 如权利要求1所述的显示面板,其中,所述导电层的形状包括矩形、梯形或凹槽形。
  9. 一种制造显示面板的方法,包括:
    提供基板;
    形成主动组件在所述基板上;
    形成覆盖所述主动组件的钝化层;
    形成覆盖所述钝化层的平坦层;
    形成贯穿所述平坦层与所述钝化层的开口,其中所述开口曝露所述主动组件中的源极;
    形成第一电极在所述平坦层上,其中所述第一电极通过所述开口电性连接所述主动组件;
    形成覆盖所述第一电极与所述平坦层的像素定义层;
    形成绝缘层在所述像素定义层上,其中所述绝缘层覆盖部分所述像素定义层;
    形成覆盖所述绝缘层的导电层;
    形成电致发光层,其中所述电致发光层覆盖所述第一电极、所述导电层的顶部、所述像素定义层的侧壁及所述像素定义层的部分顶部,所述电致发光层接触所述绝缘层的侧壁,且所述电致发光层电性连接所述第一电极;以及
    形成覆盖所述电致发光层的第二电极,其中所述第二电极接触所述导电层的部分侧壁。
  10. 如权利要求9所述的制造显示面板的方法,其中,所述绝缘层的厚度小于等于所述电致发光层的厚度。
  11. 一种顶部发光型显示设备,包括:
    显示面板,其中所述显示面板包括:
    基板;
    主动组件设置在所述基板上;
    钝化层覆盖所述主动组件;
    平坦层覆盖所述钝化层;
    第一电极设置在所述平坦层上,其中所述第一电极通过位于所述钝化层与所述平坦层的开口电性连接所述主动组件;
    像素定义层覆盖所述第一电极与所述平坦层;
    绝缘层设置在所述像素定义层上;
    导电层设置在所述绝缘层上;
    电致发光层电性连接所述第一电极;以及
    第二电极电性连接所述电致发光层,所述电致发光层设置在所述第一电极及所述第二电极之间。
  12. 如权利要求11所述的顶部发光型显示设备,其中,所述电致发光层覆盖所述第一电极、所述导电层的顶部、所述像素定义层的侧壁及所述像素层的部分顶部,且所述电致发光层接触所述绝缘层的侧壁。
  13. 如权利要求11所述的顶部发光型显示设备,其中,所述第二电极覆盖所述电致发光层,且所述第二电极接触所述导电层的部分侧壁。
  14. 如权利要求11所述的顶部发光型显示设备,其中,所述电致发光层的厚度小于等于4500埃(Å)。
  15. 如权利要求11所述的顶部发光型显示设备,其中,所述导电层的厚度大于第二电极的厚度。
  16. 如权利要求11所述的顶部发光型显示设备,其中,所述绝缘层的厚度及所述导电层的厚度总和大于等于1微米(μm)。
  17. 如权利要求11所述的顶部发光型显示设备,其中,所述导电层的材料包括金属或有机导电材料。
  18. 如权利要求11所述的顶部发光型显示设备,其中,所述导电层的形状包括矩形、梯形或凹槽形。
  19. 如权利要求11所述的顶部发光型显示设备,其中,所述绝缘层覆盖部分所述像素定义层。
  20. 如权利要求11所述的顶部发光型显示设备,其中,所述电致发光层的厚度大于等于所述绝缘层的厚度。
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