WO2020150954A1 - 基于spi异步处理事件的方法、装置及存储介质 - Google Patents
基于spi异步处理事件的方法、装置及存储介质 Download PDFInfo
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- WO2020150954A1 WO2020150954A1 PCT/CN2019/072927 CN2019072927W WO2020150954A1 WO 2020150954 A1 WO2020150954 A1 WO 2020150954A1 CN 2019072927 W CN2019072927 W CN 2019072927W WO 2020150954 A1 WO2020150954 A1 WO 2020150954A1
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- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
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- This application relates to the field of communication technology, and in particular to a method, device and storage medium for asynchronously processing events based on SPI.
- the serial peripheral interface (Serial Peripheral Interface, SPI) protocol is a high-speed, full-duplex, and synchronous communication bus protocol. Since the SPI protocol is full-duplex and has no defined speed limit, its transmission speed can usually reach or exceed 10 megabits per second (Million bits per second, Mbps), which is very suitable for high-speed data transmission.
- the master device (master) sends SPI data transmission events to the slave device (slave) to control the slave device.
- the master device is connected to the slave device (slave) through the master input data line (master input slave output, MISO) and the slave device output data line (master output slave input, MOSI), and is connected to the slave device (slave) through MISO and MOSI Perform SPI data transfer.
- MISO master input data line
- MOSI master output slave input
- a processor such as a central processing unit (CPU), a microcontroller unit (MCU), etc. , Detect whether the slave device has received the SPI data transmission event sent by the master device by means of circular query.
- CPU central processing unit
- MCU microcontroller unit
- the processor in the slave device is used to detect whether the slave device has received the SPI data transmission event sent by the master device in a circular query, and then the SPI data transmission event is processed, which will cause problems in the slave device. Waste of processor operating resources.
- This application provides a method, device and storage medium for asynchronously processing events based on SPI, which not only realizes the detection of SPI data transmission events sent by the master device, but also saves processor operating resources.
- this application provides a method for asynchronously processing events based on SPI, including:
- the level transition status of the chip select signal is obtained, and the level transition status of the chip select signal is used to determine whether there is an SPI data transmission event, and after the completion of the SPI data transmission, a hardware interrupt is initiated to notify the slave
- the processor in the device processes the SPI data transmission event, which not only realizes the monitoring of the SPI data transmission event, but also saves the operating resources of the processor in the slave device.
- determine whether there is an SPI data transmission event according to the level transition state of the chip select signal including:
- the chip select signal has a falling edge transition and a rising edge transition after the falling edge transition, it is determined that there is an SPI data transmission event.
- determine whether there is an SPI data transmission event according to the level transition state of the chip select signal including:
- the chip select signal has a rising edge transition and a falling edge transition after the rising edge transition, it is determined that there is an SPI data transmission event.
- the chip select signal's rising edge and falling edge jumps are used to determine the SPI data transmission event.
- the SPI asynchronous event processing method also includes:
- the slave device allocates storage space for the SPI data.
- the SPI asynchronous event processing method provided in this application also includes:
- the slave device allocates storage space for the SPI data.
- this application provides a device for asynchronously processing events based on SPI, including:
- the acquisition module is used to acquire the level transition status of the chip select signal from the master device through the serial peripheral interface SPI.
- the judgment module is used to judge whether there is an SPI data transmission event according to the level transition state of the chip select signal.
- the processing module is used to initiate a hardware interrupt to notify the processor in the slave device to process the SPI data transmission event if there is an SPI data transmission event and it is determined that the SPI data transmission is completed.
- the judgment module includes:
- the first judging sub-module is used for judging that there is an SPI data transmission event if there is a falling edge transition in the chip select signal, and there is a rising edge transition after the falling edge transition.
- the judgment module includes:
- the second judgment sub-module is used for judging that there is an SPI data transmission event if the chip select signal has a rising edge transition and there is a falling edge transition after the rising edge transition.
- the SPI-based asynchronous event processing device also includes:
- the first allocation module is used to allocate storage space to the SPI data in the slave device if the chip select signal has a falling edge transition.
- the SPI-based asynchronous event processing device also includes:
- the second allocation module is used to allocate storage space to the SPI data in the slave device if the chip select signal has a rising edge transition.
- the present application provides a chip for executing the SPI-based asynchronous event processing method as in the first aspect and the optional methods of the first aspect.
- this application provides a device including a processor and a chip
- the chip is used for:
- the processor is used for:
- determine whether there is an SPI data transmission event according to the level transition state of the chip select signal including:
- the chip select signal has a falling edge transition and a rising edge transition after the falling edge transition, it is determined that there is an SPI data transmission event.
- determine whether there is an SPI data transmission event according to the level transition state of the chip select signal including:
- the chip select signal has a rising edge transition and a falling edge transition after the rising edge transition, it is determined that there is an SPI data transmission event.
- the chip of the device provided in this application is also used for
- the storage space is allocated to the SPI data in the slave device.
- the chip of the device provided in this application is also used for:
- this application provides a computer storage medium.
- the storage medium includes computer instructions. When the instructions are executed by a computer, the computer realizes the SPI-based asynchronous event processing method as in the first aspect or an optional manner in the first aspect.
- the present application provides a computer program product, including computer instructions, which when executed by a computer, enable the computer to implement the first aspect or the SPI-based asynchronous event processing method in an optional manner in the first aspect.
- This application provides a method, device, and storage medium for asynchronously processing events based on SPI.
- the method includes: obtaining the level transition state of a chip select signal from a master device through an SPI interface; and according to the level transition state of the chip select signal, Determine whether there is an SPI data transmission event, if there is an SPI data transmission event, and determine that the SPI data transmission is complete, initiate a hardware interrupt to notify the processor in the slave device to process the SPI data transmission event.
- the processor processes SPI data transmission events, which not only realizes the monitoring of SPI data transmission events, but also saves processor operating resources in the slave device.
- Figure 1 is a schematic application scenario diagram of the technical solution of this application.
- FIG. 2 is a flowchart of a method for asynchronously processing events based on SPI according to an embodiment of the present application
- FIG. 3 is a schematic diagram of processing SPI data processing events provided by an embodiment of the present application.
- FIG. 4 is a schematic structural diagram of an SPI-based asynchronous event processing apparatus provided by an embodiment of the present application.
- FIG. 5 is a schematic structural diagram of an SPI-based asynchronous event processing apparatus provided by another embodiment of the present application.
- FIG. 6 is a schematic structural diagram of an SPI-based asynchronous event processing apparatus provided by another embodiment of the present application.
- Fig. 7 is a schematic diagram of a terminal device provided by an embodiment of the present application.
- the SPI protocol is a high-speed, full-duplex, and synchronous communication bus protocol. Since the SPI protocol is full-duplex and has no defined speed limit, its transmission speed can usually reach or exceed 10Mbps, which is very suitable for high-speed data transmission.
- the master device sends SPI data transmission events to the slave device to control the slave device.
- the master device is connected to the slave device through MISO and MOSI, and performs SPI data transfer through MISO and MOSI. After the slave device receives the SPI data transmission event sent by the master device, the processor in the slave device needs to process the SPI data transmission event sent by the master device.
- this application provides a method, device and storage medium for asynchronously processing events based on SPI.
- Fig. 1 is an exemplary application scenario diagram of the technical solution of the present application.
- the SPI protocol works in a master-slave mode.
- This working mode involves one or more master devices 11 and one or more slave devices 12.
- Figure 1 takes a master device 11 and a slave device 12 as an example for introduction.
- the master device can be a chip, CPU, MCU, Field-Programmable Gate Array (FPGA), or terminal device, etc.
- the device can be a chip, MCU, CPU, FPGA or terminal device, etc.
- the terminal device can be a personal computer (PC) or a mobile terminal, etc.
- PC personal computer
- the mobile terminal can also be referred to as User Equipment (UE), Access terminal, user unit, user station, mobile station, mobile station, user terminal, terminal, wireless communication device, user agent or user device.
- the mobile terminal can be a smart phone, a cellular phone, a cordless phone, a tablet computer, a personal digital assistant (PDA) device, a handheld device with wireless communication function or other processing devices connected to a wireless modem, a vehicle-mounted device, Wearable devices, etc.
- the terminal device has an SPI communication interface.
- serial clock (Serial Clock, SCLK) signal lines for synchronous data transmission.
- the SCLK signal line is only controlled by the master device.
- the slave device cannot control the SCLK signal line.
- the master device controls the communication through the control of the SCLK signal line;
- the Chip Select (CS) line is used by the master device to output chip select signals to the slave device, only the chip select signal When it is a predetermined enable signal, the operation of the slave device by the master device is effective; MOSI data line and MISO data line, because the MOSI data line and MISO data line are independent of each other, the input and output of SPI data are independent, so it is allowed Complete data input and output at the same time.
- the master device 11 transmits data to the slave device 12, the master device 11 will send a CS signal to the slave device 12, and when the master device 11 sends SPI data to the slave device 12, there will be a level jump of the CS signal.
- Fig. 2 is a flowchart of a method for asynchronously processing events based on SPI according to an embodiment of the present application, where the method can be executed by an SPI asynchronous event processing device, which can be implemented by software and/or hardware, for example:
- the device may be part or all of the above-mentioned slave device.
- the following describes the method of asynchronously processing events based on SPI with the chip in the above-mentioned slave device as the execution body. As shown in FIG. 2, the method includes the following steps:
- Step S101 The chip obtains the level transition state of the chip selection signal from the master device through the SPI.
- the master device When the master device transmits SPI data to the slave device, the master device sends a chip select signal to the slave device through the chip select line.
- the chip select signal is a high-level signal or a low-level signal, and the chip select signal can be selected by setting Active high or active low, where active high means that when the chip select signal is a high signal, the master device can transmit SPI data to the slave device through MOSI, and active low means chip select signal When it is a low level signal, the master device can transmit SPI data to the slave device through MOSI.
- the master device can successfully send SPI data to the slave device only when the chip select signal is a low-level signal.
- the slave device sends SPI data
- the chip select signal is a high level signal
- the master device cannot successfully send SPI data to the slave device. Therefore, when the master device is ready to send SPI data to the slave device, the chip select signal sent by the master device through the chip select line jumps from high to low level.
- the master device sends SPI data to the slave device, the master device The chip select signal sent through the chip select line changes from low level to high level.
- the master device can successfully send SPI data to the slave device only when the chip select signal is at high level.
- the chip select signal is a low-level signal
- the master device cannot successfully send SPI data to the slave device. Therefore, when the master device is preparing to send SPI data to the slave device, the chip select signal sent by the master device through the chip select line jumps from low to high level.
- the master device sends SPI data to the slave device, the master device The chip select signal sent through the chip select line changes from high level to low level.
- the embodiment of the present invention does not limit the manner of obtaining the level transition state of the chip select signal, as long as the level transition state of the chip select signal can be accurately obtained.
- Step S102 The chip judges whether there is an SPI data transmission event according to the level jump state of the chip selection signal.
- the chip select signal is active low or the chip select signal is active high to describe how to determine whether there is an SPI data transmission event according to the level transition state of the chip select signal.
- the chip select signal as low-level active as an example.
- the chip select signal is a low-level signal
- the master device sends SPI data to the slave device, there may be an SPI data transmission event.
- the chip select signal is high-level
- the master device cannot send SPI data to the slave device, so there is no SPI data transmission event.
- the chip select signal sent by the master device through the chip select line jumps from high to low.
- the master device passes the chip select The chip selection signal sent by the line selection jumps from low level to high level.
- the chip select signal has a falling edge transition and a rising edge transition after the falling edge transition, it is determined that there is an SPI data transmission event.
- Falling edge transition is the chip select signal changes from high to low level, and the rising edge jumps to chip select signal from low to high.
- the master device changes the chip select signal from a high-level signal to a low-level signal. At this time, the chip select signal has a falling edge transition.
- the master device changes the chip select signal from a low-level signal to a high-level signal. At this time, the chip select signal has a rising edge jump. Therefore, if the chip select signal has a falling edge jump, and it is falling If there is a rising edge transition after the edge transition, it is determined that there is an SPI data transmission event.
- the slave device can successfully receive the SPI data transmission event when the master device sends the SPI data transmission event to the slave device, optionally, there is a falling edge transition through the chip select signal, and there is a rising edge after the falling edge transition Jump, in the process of judging that there is an SPI data transmission event, it can also include:
- the storage space is allocated to the SPI data in the slave device.
- the chip select signal When the chip select signal has a falling edge transition, it means that the master device is ready to send SPI data to the slave device.
- the master device when the chip select signal has a falling edge transition within a preset time, the master device sends For SPI data to the slave device, the embodiment of the present invention does not limit the preset time.
- the slave device can allocate storage space to prepare to receive SPI data.
- the master device when the chip select signal is a high level signal, the master device sends SPI data to the slave device, there may be an SPI data transmission event, when the chip select signal is low level When signal, the master device cannot send SPI data to the slave device, so there is no SPI data transmission event.
- the chip select signal sent by the master device through the chip select line changes from low level to high level.
- the master device passes the chip select The chip selection signal sent by the line selection jumps from high level to low level.
- the chip select signal has a rising edge transition and a falling edge transition after the rising edge transition, it is determined that there is an SPI data transmission event.
- the master device changes the chip select signal from a low-level signal to a high-level signal. At this time, the chip select signal has a rising edge transition.
- the master device changes the chip select signal from a high-level signal to a low-level signal. At this time, the chip select signal has a falling edge transition. Therefore, if the chip select signal has a rising edge transition and is rising If there is a falling edge transition after the edge transition, it is determined that there is an SPI data transmission event.
- the slave device can successfully receive the SPI data transmission event when the master device sends the SPI data transmission event to the slave device, optionally, there is a rising edge transition through the chip select signal, and there is a falling edge after the rising edge transition Jump, in the process of judging that there is an SPI data transmission event, it can also include:
- the storage space is allocated to the SPI data in the slave device.
- the chip select signal When the chip select signal has a rising edge transition, it means that the master device is ready to send SPI data to the slave device.
- the master device when the chip select signal has a rising edge transition within a preset time, the master device sends For SPI data to the slave device, the embodiment of the present invention does not limit the preset time.
- the slave device can allocate storage space to prepare to receive SPI data.
- Step S103 If there is an SPI data transmission event, and it is determined that the SPI data transmission is completed, a hardware interrupt is initiated to notify the processor in the slave device to process the SPI data transmission event.
- the chip select signal is active at low level, by judging that the chip select signal has a falling edge transition, and there is a rising edge transition after the falling edge transition, it is determined that there is an SPI data transmission event, and the SPI data transmission Complete;
- the chip select signal is active at high level, by judging that the chip select signal has a rising edge transition, and there is a falling edge transition after the rising edge transition, it is determined that there is an SPI data transmission event, and SPI The data transfer is complete.
- the terminal device can initiate a hardware interrupt to notify the processor to process the SPI data transmission event, where the hardware interrupt is an asynchronous signal used to interrupt the processor being processed. Tasks, and notify the processor to process SPI data transmission events; hardware interrupts are asynchronous interrupts, which are interrupts generated by electrical signals generated by the processor’s external devices. The timing of the hardware interrupts is unpredictable, as long as there are SPI data transmission events and determine After SPI data transmission is complete, a hardware interrupt can be initiated. By initiating a hardware interrupt to notify the processor to process the SPI data transmission event when the SPI data transmission is determined to be completed, the processor's time can be effectively saved.
- FIG 3 is a schematic diagram of processing SPI data processing events provided by an embodiment of the present application.
- the process of processing SPI data processing events is introduced, as shown in Figure 3
- the processor is sequentially processing subtask 1 and subtask 2 in the slave device.
- the subtasks represent other tasks in the terminal device except for the SPI data transmission event.
- the terminal device passes the level jump state according to the chip select signal , It is judged that there is an SPI data transmission event, and when the SPI data transmission is determined to be completed, a hardware interrupt is initiated to notify the processor to process the SPI data transmission event.
- the processor responds to the hardware terminal and processes the SPI data transmission event.
- the processing After the processing is completed, it then processes the terminal For subtask 3, subtask 4, etc. in the device, when the processor is processing the subtask, as long as the terminal device determines that there is an SPI data transmission event according to the level transition state of the chip select signal, and determines the SPI data
- a hardware interrupt can be initiated to notify the processor to process the SPI data transmission event.
- the processor responds to the hardware terminal and processes the SPI data transmission event. After the processing is completed, it then processes other subtasks.
- a hardware interrupt is initiated to notify the processor to process the SPI data transmission event, which realizes the timely processing of the SPI data transmission event and saves the processor's operating resources.
- Figure 4 is a schematic structural diagram of a device for asynchronous processing of events based on SPI according to an embodiment of the present application.
- the device can be implemented by software and/or hardware.
- the device can be part or all of a slave device.
- the device is a chip in a slave device as an example for description.
- the SPI-based asynchronous event processing device provided in the embodiment of the present application may include:
- the obtaining module 51 is used to obtain the level transition state of the chip select signal from the master device through the SPI.
- the judging module 52 is used for judging whether there is an SPI data transmission event according to the level transition state of the chip select signal.
- the processing module 53 is configured to initiate a hardware interrupt to notify the processor in the slave device to process the SPI data transmission event if there is an SPI data transmission event and it is determined that the SPI data transmission is completed.
- FIG. 5 is a schematic structural diagram of a device for asynchronously processing events based on SPI according to another embodiment of the present application.
- the device can be implemented by software and/or hardware.
- the device can be part of the slave device described above. Or all, the following description takes the device as a chip in a slave device as an example.
- the device judgment module 52 based on SPI asynchronous processing events provided by the embodiment of the present application may include:
- the first judging sub-module 521 is configured to: if the chip select signal has a falling edge transition and there is a rising edge transition after the falling edge transition, then there is an SPI data transmission event.
- the SPI-based asynchronous event processing apparatus may further include:
- the first allocation module 54 is configured to allocate storage space to the SPI data in the slave device if the chip select signal has a falling edge transition.
- FIG. 6 is a schematic structural diagram of a device for asynchronously processing events based on SPI according to another embodiment of the present application.
- the device can be implemented by software and/or hardware.
- the device can be part of the slave device described above. Or all, the following description takes the device as a chip in a slave device as an example.
- the device judgment module 52 based on SPI asynchronous processing events provided in the embodiment of the present application may include:
- the second judging sub-module 522 is used for judging that there is an SPI data transmission event if there is a rising edge transition in the chip select signal, and there is a falling edge transition after the rising edge transition.
- the SPI-based asynchronous event processing device may also include:
- the second allocation module 55 is configured to allocate storage space to the SPI data in the slave device if the chip select signal has a rising edge transition.
- This application provides a chip for executing the above-mentioned SPI-based asynchronous event processing method.
- SPI-based asynchronous event processing method For the content and effect, please refer to the method embodiment.
- FIG. 7 is a schematic diagram of a terminal device provided by an embodiment of this application. As shown in FIG. 7, the terminal device provided by this application includes a processor 71 and a chip 72.
- the chip 72 is used to: obtain the level transition status of the chip select signal from the master device through SPI; determine whether there is an SPI data transmission event according to the level transition status of the chip select signal; if there is an SPI data transmission event, determine the SPI When the data transmission is completed, a hardware interrupt is initiated to notify the processor 71 in the slave device to process the SPI data transmission event.
- the processor 71 is used to respond to hardware interrupts and process SPI data transmission events.
- determine whether there is an SPI data transmission event according to the level transition state of the chip select signal including:
- the chip select signal has a falling edge transition and a rising edge transition after the falling edge transition, it is determined that there is an SPI data transmission event.
- determine whether there is an SPI data transmission event according to the level transition state of the chip select signal including:
- the chip select signal has a rising edge transition and a falling edge transition after the rising edge transition, it is determined that there is an SPI data transmission event.
- the chip 72 of the device provided in this application is also used for the chip 72 of the device provided in this application.
- the storage space is allocated to the SPI data in the slave device.
- the chip 72 of the device provided in this application is also used for:
- the present application provides a computer storage medium.
- the storage medium includes computer instructions. When the instructions are executed by a computer, the computer realizes the above-mentioned SPI-based asynchronous event processing method. Please refer to the method embodiments for its content and effects.
- This application provides a computer program product, including computer instructions.
- the instructions When the instructions are executed by a computer, the computer realizes the above-mentioned SPI-based asynchronous processing event method.
- the content and effects please refer to the method embodiments.
- a person of ordinary skill in the art can understand that all or part of the steps in the foregoing method embodiments can be implemented by a program instructing relevant hardware.
- the aforementioned program can be stored in a computer readable storage medium. When the program is executed, it executes the steps including the foregoing method embodiments; and the foregoing storage medium includes: ROM, RAM, magnetic disk, or optical disk and other media that can store program codes.
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Abstract
本申请提供一种基于SPI异步处理事件的方法、装置及存储介质,该方法包括:通过串行外设接口SPI从主设备获取片选信号的电平跳变状态;根据片选信号的电平跳变状态,判断是否存在SPI数据传输事件,若存在所述SPI数据传输事件,并确定所述SPI数据传输完成,则发起硬件中断以通知从设备中的处理器处理所述SPI数据传输事件,不仅实现了对SPI数据传输事件的监测,而且节约了处理器的运行资源。
Description
本申请涉及通信技术领域,尤其涉及一种基于SPI异步处理事件的方法、装置及存储介质。
串行外设接口(Serial Peripheral Interface,SPI)协议是一种高速的、全双工、同步的通信总线协议。由于SPI协议为全双工且没有定义速度限制,其传输速度通常能够达到甚至超过10兆比特每秒(Million bits per second,Mbps),非常适用于高速数据传输。主设备(master)发送SPI数据传输事件至从设备(slave),以实现对从设备的控制。主设备通过主设备输出从设备输入数据线(master input slave output,MISO)以及从设备输出主设备输入数据线(master output slave input,MOSI)与从设备(slave)相连接,并通过MISO和MOSI进行SPI数据传递。在从设备接收到主设备发送的SPI数据传输事件之后,需要与从设备连接的处理器或从设备中的处理器对主设备发送的SPI数据传输事件进行处理。
现有技术中,针对如何判断主设备是否发送SPI数据传输事件至从设备的问题,通常是采用处理器,例如中央处理器(Central Processing Unit,CPU)、微控制单元(Microcontroller Unit,MCU)等,通过循环查询的方式侦测从设备是否有收到主设备发送的SPI数据传输事件。
然而现有技术中,通过从设备中的处理器以循环查询的方式侦测从设备是否收到主设备发送的SPI数据传输事件,然后再对SPI数据传输事件进行处理,会造成从设备中的处理器运行资源的浪费。
发明内容
本申请提供一种基于SPI异步处理事件的方法、装置及存储介质,不仅实现了对主设备发送的SPI数据传输事件的侦测,而且节约了处理器运行资源。
第一方面,本申请提供一种基于SPI异步处理事件的方法,包括:
通过串行外设接口SPI从主设备获取片选信号的电平跳变状态;根据片选信号的电平跳变状态,判断是否存在SPI数据传输事件;若存在SPI数据传输事件,并确定SPI数据传输完成,则发起硬件中断以通知从设备中的处理器处理SPI数据传输事件。
本方案中,通过获取片选信号的电平跳变状态,并根据片选信号的电平跳变状态来判断是否存在SPI数据传输事件,并确定SPI数据传输完成后,发起硬件中断以通知从设备中的处理器处理SPI数据传输事件,不仅实现了对SPI数据传输事件的监测,而且节约了从设备中处理器的运行资源。
可选的,根据片选信号的电平跳变状态,判断是否存在SPI数据传输事件,包括:
若片选信号存在下降沿跳变,并在下降沿跳变之后存在上升沿跳变,则判断存在SPI数据传输事件。
本方案中,通过片选信号的下降沿跳变与上升沿跳变,实现了对SPI数据传输事件的判断。
可选的,根据片选信号的电平跳变状态,判断是否存在SPI数据传输事件,包括:
若片选信号存在上升沿跳变,并在上升沿跳变之后存在下降沿跳变,则判断存在SPI数据传输事件。
本方案中,通过片选信号的上升沿跳变与下降沿跳变,实现了对SPI数据传输事件的判断。
可选的,本申请提供的SPI异步处理事件的方法,还包括:
若片选信号存在下降沿跳变,则在从设备中向所述SPI数据分配存储空间。
本方案中,通过在片选信号存在下降沿跳变时,分配存储空间以准备接收SPI数据,以避免无法正常接收SPI数据的情况。可选的,本申请提供的SPI异步处理事件的方法,还包括:
若片选信号存在上升沿跳变,则在从设备中向所述SPI数据分配存储空间。
本方案中,通过在片选信号存在上升沿跳变时,分配存储空间以准备接 收SPI数据,以避免无法正常接收SPI数据的情况。
下面将介绍基于SPI异步处理事件的装置、芯片、设备、存储介质及计算机程序产品,其效果可参考方法部分的效果,下面对此不再赘述。
第二方面,本申请提供一种基于SPI异步处理事件的装置,包括:
获取模块,用于通过串行外设接口SPI从主设备获取片选信号的电平跳变状态。判断模块,用于根据片选信号的电平跳变状态,判断是否存在SPI数据传输事件。
处理模块,用于若存在SPI数据传输事件,并确定SPI数据传输完成,则发起硬件中断以通知从设备中的处理器处理SPI数据传输事件。
可选的,判断模块包括:
第一判断子模块,用于若片选信号存在下降沿跳变,并在下降沿跳变之后存在上升沿跳变,则判断存在SPI数据传输事件。
可选的,判断模块包括:
第二判断子模块,用于若片选信号存在上升沿跳变,并在上升沿跳变之后存在下降沿跳变,则判断存在SPI数据传输事件。
可选的,本申请提供的基于SPI异步处理事件的装置,还包括:
第一分配模块,用于若片选信号存在下降沿跳变,则在从设备中向SPI数据分配存储空间。
可选的,本申请提供的基于SPI异步处理事件的装置,还包括:
第二分配模块,用于若片选信号存在上升沿跳变,则在从设备中向SPI数据分配存储空间。
第三方面,本申请提供一种芯片,用于执行如第一方面及第一方面可选方式的基于SPI异步处理事件的方法。
第四方面,本申请提供一种设备,包括:处理器和芯片,
芯片用于:
通过串行外设接口SPI从主设备获取片选信号的电平跳变状态;根据片选信号的电平跳变状态,判断是否存在SPI数据传输事件;若存在SPI数据传输事件,并确定SPI数据传输完成,则发起硬件中断以通知从设备中的处理器处理SPI数据传输事件。
处理器用于:
响应硬件中断,并处理SPI数据传输事件。
可选的,根据片选信号的电平跳变状态,判断是否存在SPI数据传输事件,包括:
若片选信号存在下降沿跳变,并在下降沿跳变之后存在上升沿跳变,则判断存在SPI数据传输事件。
可选的,根据片选信号的电平跳变状态,判断是否存在SPI数据传输事件,包括:
若片选信号存在上升沿跳变,并在上升沿跳变之后存在下降沿跳变,则判断存在SPI数据传输事件。
可选的,本申请提供的设备,其芯片还用于
若片选信号存在下降沿跳变,则在从设备中向SPI数据分配存储空间。
可选的,本申请提供的设备,其芯片还用于:
若片选信号存在上升沿跳变,则在从设备中向SPI数据分配存储空间。第五方面,本申请提供一种计算机存储介质,存储介质包括计算机指令,当指令被计算机执行时,使得计算机实现如第一方面或第一方面可选方式的基于SPI异步处理事件的方法。
第六方面,本申请提供一种计算机程序产品,包括计算机指令,当指令被计算机执行时,使得计算机实现第一方面或第一方面可选方式的基于SPI异步处理事件的方法。
本申请提供一种基于SPI异步处理事件的方法、装置及存储介质,该方法包括:通过SPI接口从主设备获取片选信号的电平跳变状态;根据片选信号的电平跳变状态,判断是否存在SPI数据传输事件,若存在SPI数据传输事件,并确定SPI数据传输完成,则发起硬件中断以通知从设备中的处理器处理SPI数据传输事件。由于通过获取片选信号的电平跳变状态,并根据片选信号的电平跳变状态来判断是否存在SPI数据传输事件,并确定SPI数据传输完成之后发起硬件中断以通知从设备中的处理器处理SPI数据传输事件,不仅实现了对SPI数据传输事件的监测,而且节约了从设备中处理器运行资源。
为了更清楚地说明本申请实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作一简单地介绍,显而易见地,下面描述中的附图是本申请的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动性的前提下,还可以根据这些附图获得其他的附图。
图1为本申请技术方案的一种示意性应用场景图;
图2是本申请一实施例提供的基于SPI异步处理事件的方法的流程图;
图3是本申请实施例提供的处理SPI数据处理事件的示意图;
图4是本申请一实施例提供的基于SPI异步处理事件的装置的结构示意图;
图5是本申请另一实施例提供的基于SPI异步处理事件的装置的结构示意图;
图6是本申请又一实施例提供的基于SPI异步处理事件的装置的结构示意图;
图7是本申请一实施例提供的终端设备的示意图。
为使本申请实施例的目的、技术方案和优点更加清楚,下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例是本申请一部分实施例,而不是全部的实施例。基于本申请中的实施例,本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例,都属于本申请保护的范围。
本申请的说明书和权利要求书及上述附图中的术语“第一”、“第二”、“第三”、“第四”等(如果存在)是用于区别类似的对象,而不必用于描述特定的顺序或先后次序。应该理解这样使用的数据在适当情况下可以互换,以便这里描述的本申请的实施例,例如能够以除了在这里图示或描述的那些以外的顺序实施。此外,术语“包括”和“具有”以及他们的任何变形,意图在于覆盖不排他的包含,例如,包含了一系列步骤或单元的过程、方法、***、产品或设备不必限于清楚地列出的那些步骤或单元,而是可包括没有清楚地列出的或对于这些过程、方法、产品或设备固有的其它步骤或单元。
SPI协议是一种高速的、全双工、同步的通信总线协议。由于SPI协议为全双工且没有定义速度限制,其传输速度通常能够达到甚至超过10Mbps,非常适用于高速数据传输。主设备发送SPI数据传输事件至从设备,以实现对从设备的控制。主设备通过MISO以及MOSI与从设备相连接,并通过MISO和MOSI进行SPI数据传递。在从设备接收到主设备的发送的SPI数据传输事件之后,需要从设备中的处理器对主设备发送的SPI数据传输事件进行处理。然而现有技术中,通过从设备中的处理器以循环查询的方式侦测从设备是否收到主设备发送的SPI数据传输事件,会造成处理器运行资源浪费。为了解决上述问题,本申请提供一种基于SPI异步处理事件的方法、装置及存储介质。
以下,对本申请实施例的示例性应用场景进行介绍。
图1是本申请技术方案一种示例性应用场景图,如图1所示,SPI协议以主从方式工作,这种工作模式涉及一个或多个主设备11和一个或多个从设备12,图1中以一个主设备11与一个从设备12为例进行介绍,其中,主设备可以是芯片、CPU、MCU、现场可编程门阵列(Field-Programmable Gate Array,FPGA)或终端设备等,从设备可以是芯片、MCU、CPU、FPGA或终端设备等,终端设备可以是个人电脑(Personal Computer,PC)或者移动终端等,该移动终端也可以称为用户设备(User Equipment,简称:UE)、接入终端、用户单元、用户站、移动站、移动台、用户终端、终端、无线通信设备、用户代理或用户装置。移动终端可以是智能手机、蜂窝电话、无绳电话、平板电脑、个人数字处理(Personal Digital Assistant,简称:PDA)设备、具有无线通信功能的手持设备或连接到无线调制解调器的其它处理设备、车载设备、可穿戴设备等。在本发明实施例中,该终端设备具有SPI进行通信的接口。
主设备11与从设备12之间进行数据传输,通常需要4根数据线,它们分别是串行时钟(Serial Clock,SCLK)信号线,用于同步数据传输,SCLK信号线只由主设备控制,从设备不能控制SCLK信号线,主设备通过对SCLK信号线的控制进而实现对通讯的控制;片选(Chip Select,CS)线,用于主设备输出片选信号至从设备,只有片选信号为预先规定的使能信号时,主设备对此从设备的操作才有效;MOSI数据线以及MISO数据线,由于MOSI数据线和MISO数据线相互独立,因此SPI数据的输入和输出独立,所以允 许同时完成数据的输入和输出。在主设备11向从设备12传输数据时,主设备11会发送CS信号至从设备12,且在主设备11向从设备12发送SPI数据时,CS信号会存在电平跳变。
基于上述应用场景,下面对本申请技术方案进行详细介绍:
图2是本申请一实施例提供的基于SPI异步处理事件的方法的流程图,其中该方法可以由SPI异步处理事件的装置执行,该装置可以通过软件和/或硬件的方式实现,例如:该装置可以是上述从设备的部分或全部,下面以上述从设备中的芯片为执行主体对基于SPI异步处理事件的方法进行说明,如图2所示,该方法包括如下步骤:
步骤S101:芯片通过SPI从主设备获取片选信号的电平跳变状态。
在主设备向从设备传输SPI数据时,主设备会通过片选线发送片选信号至从设备,其中,片选信号为高电平信号或低电平信号,通过设置,可以选择片选信号为高电平有效或低电平有效,其中,高电平有效是指片选信号为高电平信号时,主设备可以通过MOSI传输SPI数据至从设备,低电平有效是指片选信号为低电平信号时,主设备可以通过MOSI传输SPI数据至从设备。
在一种可能的实施方式中,若设置片选信号为低电平有效,则只有当片选信号为低电平信号时,主设备才可以向从设备成功发送SPI数据,若在主设备向从设备发送SPI数据时,片选信号为高电平信号,则主设备无法向从设备成功发送SPI数据。因此,在主设备准备向从设备发送SPI数据时,主设备通过片选线发送的片选信号由高电平跳变为低电平,在主设备向从设备发送SPI数据完成时,主设备通过片选线发送的片选信号由低电平跳变为高电平。
在另一种可能的实施方式中,若设置片选信号为高电平有效,则只有当片选信号为高电平时,主设备才可以向从设备成功发送SPI数据,若在主设备向从设备发送SPI数据时,片选信号为低电平信号,则主设备无法向从设备成功发送SPI数据。因此,在主设备准备向从设备发送SPI数据时,主设备通过片选线发送的片选信号由低电平跳变为高电平,在主设备向从设备发送SPI数据完成时,主设备通过片选线发送的片选信号由高电平跳变为低电平。
本发明实施例对获取片选信号的电平跳变状态的方式不做限制,只要能够准确的获取片选信号的电平跳变状态即可。
步骤S102:芯片根据片选信号的电平跳变状态,判断是否存在SPI数据传输事件。
为了便于描述,下面分别以片选信号为低电平有效或片选信号为高电平有效为例,对如何根据片选信号的电平跳变状态,判断是否存在SPI数据传输事件进行介绍。
首先,以片选信号为低电平有效为例,当片选信号为低电平信号时,主设备向从设备发送SPI数据,则可能存在SPI数据传输事件,当片选信号为高电平信号时,主设备无法向从设备发送SPI数据,因此不存在SPI数据传输事件。
在主设备准备向从设备发送SPI数据时,主设备通过片选线发送的片选信号由高电平跳变为低电平,在主设备向从设备发送SPI数据完成时,主设备通过片选线发送的片选信号由低电平跳变为高电平。为了根据片选信号的电平跳变状态,判断是否存在SPI数据传输事件,在一种可能的实施方式中,根据片选信号的电平跳变状态,判断是否存在SPI数据传输事件,包括:
若片选信号存在下降沿跳变,并在下降沿跳变之后存在上升沿跳变,则判断存在SPI数据传输事件。
下降沿跳变是片选信号由高电平变为低电平,上升沿跳变为片选信号由低电平变为高电平。在主设备与从设备之间开始进行SPI数据传输时,主设备将片选信号由高电平信号变为低电平信号,此时,片选信号存在下降沿跳变,在主设备与从设备通信结束时,主设备将片选信号由低电平信号变为高电平信号,此时,片选信号存在上升沿跳变,因此,若片选信号存在下降沿跳变,并在下降沿跳变之后存在上升沿跳变,则判断存在SPI数据传输事件。
本方案中,通过获取片选信号的电平跳变状态,并根据片选信号的电平跳变状态来判断是否存在SPI数据传输事件,不仅实现了对SPI数据传输事件的监测,而且节约了处理器的运行资源。
为了在主设备向从设备发送SPI数据传输事件时,保证从设备能够顺利接收SPI数据传输事件,可选的,在通过片选信号存在下降沿跳变,并在下降沿跳变之后存在上升沿跳变,判断存在SPI数据传输事件的过程中,还可 以包括:
若片选信号存在下降沿跳变,则在从设备中向SPI数据分配存储空间。
当片选信号存在下降沿跳变时,表示主设备准备发送SPI数据至从设备,在一种可能的实施方式中,当片选信号存在下降沿跳变后的预设时间内,主设备发送SPI数据至从设备,本发明实施例对预设时间不做限制。为了保证SPI数据的顺利接收,从设备可以通过分配存储空间以准备接收SPI数据。
本方案中,通过在片选信号存在下降沿跳变时,分配存储空间以准备接收SPI数据,以避免无法正常接收SPI数据的情况。
另外,以片选信号为高电平有效为例,当片选信号为高电平信号时,主设备向从设备发送SPI数据,则可能存在SPI数据传输事件,当片选信号为低电平信号时,主设备无法向从设备发送SPI数据,因此不存在SPI数据传输事件。
在主设备准备向从设备发送SPI数据时,主设备通过片选线发送的片选信号由低电平跳变为高电平,在主设备向从设备发送SPI数据完成时,主设备通过片选线发送的片选信号由高电平跳变为低电平。为了根据片选信号的电平跳变状态,判断是否存在SPI数据传输事件,在一种可能的实施方式中,根据片选信号的电平跳变状态,判断是否存在SPI数据传输事件,包括:
若片选信号存在上升沿跳变,并在上升沿跳变之后存在下降沿跳变,则判断存在SPI数据传输事件。
在主设备与从设备之间开始进行SPI数据传输时,主设备将片选信号由低电平信号变为高电平信号,此时,片选信号存在上升沿跳变,在主设备与从设备通信结束时,主设备将片选信号由高电平信号变为低电平信号,此时,片选信号存在下降沿跳变,因此,若片选信号存在上升沿跳变,并在上升沿跳变之后存在下降沿跳变,则判断存在SPI数据传输事件。
本方案中,通过获取片选信号的电平跳变状态,并根据片选信号的电平跳变状态来判断是否存在SPI数据传输事件,不仅实现了对SPI数据传输事件的监测,而且节约了处理器的运行资源。
为了在主设备向从设备发送SPI数据传输事件时,保证从设备能够顺利接收SPI数据传输事件,可选的,在通过片选信号存在上升沿跳变,并在上升沿跳变之后存在下降沿跳变,判断存在SPI数据传输事件的过程中,还可 以包括:
若片选信号存在上升沿跳变,则在从设备中向SPI数据分配存储空间。
当片选信号存在上升沿跳变时,表示主设备准备发送SPI数据至从设备,在一种可能的实施方式中,当片选信号存在上升沿跳变后的预设时间内,主设备发送SPI数据至从设备,本发明实施例对预设时间不做限制。为了保证SPI数据的顺利接收,从设备可以通过分配存储空间以准备接收SPI数据。
步骤S103:若存在SPI数据传输事件,并确定SPI数据传输完成,则发起硬件中断以通知从设备中的处理器处理SPI数据传输事件。
在上述片选信号低电平有效的实施例中,通过判断片选信号存在下降沿跳变,并在下降沿跳变之后存在上升沿跳变,进而判断存在SPI数据传输事件,且SPI数据传输完成;在上述片选信号高电平有效的实施例中,通过判断片选信号存在上升沿跳变,并在上升沿跳变之后存在下降沿跳变,进而判断存在SPI数据传输事件,且SPI数据传输完成。若经过判断,存在SPI数据传事件并确定SPI数据传输完成,终端设备可以通过发起硬件中断以通知处理器处理SPI数据传输事件,其中硬件中断是一个异步信号用于打断处理器正在处理的子任务,并通知处理器处理SPI数据传输事件;硬件中断即异步中断,是由处理器的外部设备产生的电信号产生的中断,硬件中断发生的时间点不可预期,只要存在SPI数据传事件并确定SPI数据传输完成,即可发起硬件中断。通过在确定SPI数据传输完成时发起硬件中断以通知处理器处理SPI数据传输事件,可以有效节省处理器的时间。
图3是本申请实施例提供的处理SPI数据处理事件的示意图,以从设备为终端设备,且终端设备中包括芯片和处理器为例,对处理SPI数据处理事件的流程进行介绍,如图3所示,处理器在依次处理从设备中的子任务1、子任务2,其中子任务表示终端设备中除了SPI数据传输事件的其他任务,当终端设备通过根据片选信号的电平跳变状态,判断存在SPI数据传输事件,并确定SPI数据传输完成时,则发起硬件中断以通知处理器处理SPI数据传输事件,处理器响应该硬件终端并处理SPI数据传输事件,处理完成之后,接着处理终端设备中的子任务3、子任务4等等,在处理器处理子任务的过程中,只要当终端设备通过根据片选信号的电平跳变状态,判断存在SPI数据传输事件,并确定SPI数据传输完成时,便可以发起硬件中断以通知处理 器处理SPI数据传输事件,处理器响应该硬件终端并处理SPI数据传输事件,处理完成之后,接着处理其他子任务。
本方案中,通过在确定SPI数据传输完成之后,发起硬件中断以通知处理器处理SPI数据传输事件,实现了对SPI数据传输事件的及时处理,并节约了处理器的运行资源。
下面将介绍基于SPI异步处理事件的装置、芯片、设备、存储介质及计算机程序产品,其效果可参考方法部分的效果,下面对此不再赘述。
图4是本申请一实施例提供的基于SPI异步处理事件的装置的结构示意图,该装置可以通过软件和/或硬件的方式实现,例如:该装置可以是从设备的部分或全部,下面以该装置为从设备中的芯片为例进行说明,如图4所示,本申请实施例提供的基于SPI异步处理事件的装置可以包括:
获取模块51,用于通过SPI从主设备获取片选信号的电平跳变状态。
判断模块52,用于根据片选信号的电平跳变状态,判断是否存在SPI数据传输事件。
处理模块53,用于若存在SPI数据传输事件,并确定SPI数据传输完成,则发起硬件中断以通知从设备中的处理器处理SPI数据传输事件。
可选的,图5是本申请另一实施例提供的基于SPI异步处理事件的装置的结构示意图,该装置可以通过软件和/或硬件的方式实现,例如:该装置可以是上述从设备的部分或全部,下面以该装置为从设备中的芯片为例进行说明,如图5所示,本申请实施例提供的基于SPI异步处理事件的装置判断模块52可以包括:
第一判断子模块521,用于若片选信号存在下降沿跳变,并在下降沿跳变之后存在上升沿跳变,则存在SPI数据传输事件。
可选的,如图5所示,本申请实施例提供的基于SPI异步处理事件的装置还可以包括:
第一分配模块54,用于若片选信号存在下降沿跳变,则在从设备中向SPI数据分配存储空间。
可选的,图6是本申请又一实施例提供的基于SPI异步处理事件的装置的结构示意图,该装置可以通过软件和/或硬件的方式实现,例如:该装置可以是上述从设备的部分或全部,下面以该装置为从设备中的芯片为例进行说 明,如图6所示,本申请实施例提供的基于SPI异步处理事件的装置判断模块52可以包括:
第二判断子模块522,用于若片选信号存在上升沿跳变,并在上升沿跳变之后存在下降沿跳变,则判断存在SPI数据传输事件。
可选的,如图6所示,本申请提供的基于SPI异步处理事件的装置,还可以包括:
第二分配模块55,用于若片选信号存在上升沿跳变,则在从设备中向SPI数据分配存储空间。
本申请提供一种芯片,用于执行上述基于SPI异步处理事件的方法,其内容及效果请参考方法实施例。
本申请提供一种终端设备,图7是本申请一实施例提供的终端设备的示意图,如图7所示,本申请提供的终端设备包括:处理器71和芯片72。
芯片72用于:通过SPI从主设备获取片选信号的电平跳变状态;根据片选信号的电平跳变状态,判断是否存在SPI数据传输事件;若存在SPI数据传输事件,并确定SPI数据传输完成,则发起硬件中断以通知从设备中的处理器71处理SPI数据传输事件。
处理器71用于:响应硬件中断,并处理SPI数据传输事件。
可选的,根据片选信号的电平跳变状态,判断是否存在SPI数据传输事件,包括:
若片选信号存在下降沿跳变,并在下降沿跳变之后存在上升沿跳变,则判断存在SPI数据传输事件。
可选的,根据片选信号的电平跳变状态,判断是否存在SPI数据传输事件,包括:
若片选信号存在上升沿跳变,并在上升沿跳变之后存在下降沿跳变,则判断存在SPI数据传输事件。
可选的,本申请提供的设备,其芯片72还用于
若片选信号存在下降沿跳变,则在从设备中向SPI数据分配存储空间。
可选的,本申请提供的设备,其芯片72还用于:
若片选信号存在上升沿跳变,则在从设备中向SPI数据分配存储空间。本申请提供一种计算机存储介质,存储介质包括计算机指令,当指令被计算 机执行时,使得计算机实现上述基于SPI异步处理事件的方法,其内容及效果请参考方法实施例。
本申请提供一种计算机程序产品,包括计算机指令,当指令被计算机执行时,使得计算机实现上述基于SPI异步处理事件的方法,其内容及效果请参考方法实施例。
本领域普通技术人员可以理解:实现上述各方法实施例的全部或部分步骤可以通过程序指令相关的硬件来完成。前述的程序可以存储于一计算机可读取存储介质中。该程序在执行时,执行包括上述各方法实施例的步骤;而前述的存储介质包括:ROM、RAM、磁碟或者光盘等各种可以存储程序代码的介质。
最后应说明的是:以上各实施例仅用以说明本发明的技术方案,而非对其限制;尽管参照前述各实施例对本发明进行了详细的说明,本领域的普通技术人员应当理解:其依然可以对前述各实施例所记载的技术方案进行修改,或者对其中部分或者全部技术特征进行等同替换;而这些修改或者替换,并不使相应技术方案的本质脱离本发明各实施例技术方案的范围。
Claims (17)
- 一种基于SPI异步处理事件的方法,其特征在于,包括:通过串行外设接口SPI从主设备获取片选信号的电平跳变状态;根据所述片选信号的电平跳变状态,判断是否存在SPI数据传输事件;若存在所述SPI数据传输事件,并确定所述SPI数据传输完成,则发起硬件中断以通知从设备中的处理器处理所述SPI数据传输事件。
- 根据权利要求1所述的方法,其特征在于,所述根据所述片选信号的电平跳变状态,判断是否存在SPI数据传输事件,包括:若所述片选信号存在下降沿跳变,并在所述下降沿跳变之后存在上升沿跳变,则判断存在所述SPI数据传输事件。
- 根据权利要求1所述的方法,其特征在于,所述根据所述片选信号的电平跳变状态,判断是否存在SPI数据传输事件,包括:若所述片选信号存在上升沿跳变,并在所述上升沿跳变之后存在下降沿跳变,则判断存在所述SPI数据传输事件。
- 根据权利要求2所述的方法,其特征在于,包括:若所述片选信号存在所述下降沿跳变,则在所述从设备中向所述SPI数据分配存储空间。
- 根据权利要求3所述的方法,其特征在于,包括:若所述片选信号存在所述上升沿跳变,则在所述从设备中向所述SPI数据分配存储空间。
- 一种基于SPI异步处理事件的装置,其特征在于,包括:获取模块,用于通过串行外设接口SPI从主设备获取片选信号的电平跳变状态;判断模块,用于根据所述片选信号的电平跳变状态,判断是否存在SPI数据传输事件;处理模块,用于若存在所述SPI数据传输事件,并确定所述SPI数据传输完成,则发起硬件中断以通知从设备中的处理器处理所述SPI数据传输事件。
- 根据权利要求6所述的装置,其特征在于,所述判断模块包括:第一判断子模块,用于若所述片选信号存在下降沿跳变,并在所述下降 沿跳变之后存在上升沿跳变,则判断存在所述SPI数据传输事件。
- 根据权利要求6所述的装置,其特征在于,所述判断模块包括:第二判断子模块,用于若所述片选信号存在上升沿跳变,并在所述上升沿跳变之后存在下降沿跳变,则判断存在所述SPI数据传输事件。
- 根据权利要求7所述的装置,其特征在于,还包括:第一分配模块,用于若所述片选信号存在所述下降沿跳变,则在所述从设备中向所述SPI数据分配存储空间。
- 根据权利要求8所述的装置,其特征在于,还包括:第二分配模块,用于若所述片选信号存在所述上升沿跳变,则在所述从设备中向所述SPI数据分配存储空间。
- 一种芯片,其特征在于,用于执行如权利要求1-5任一项所述的方法。
- 一种从设备,其特征在于,包括:处理器和芯片,所述芯片用于:通过串行外设接口SPI从主设备获取片选信号的电平跳变状态;根据所述片选信号的电平跳变状态,判断是否存在SPI数据传输事件;若存在所述SPI数据传输事件,并确定所述SPI数据传输完成,则发起硬件中断以通知所述从设备中的处理器处理所述SPI数据传输事件;所述处理器用于:响应所述硬件中断,并处理所述SPI数据传输事件。
- 根据权利要求12所述的设备,其特征在于,所述根据所述片选信号的电平跳变状态,判断是否存在SPI数据传输事件,包括:若所述片选信号存在下降沿跳变,并在所述下降沿跳变之后存在上升沿跳变,则判断存在所述SPI数据传输事件。
- 根据权利要求12所述的设备,其特征在于,所述根据所述片选信号的电平跳变状态,判断是否存在SPI数据传输事件,包括:若所述片选信号存在上升沿跳变,并在所述上升沿跳变之后存在下降沿跳变,则判断存在所述SPI数据传输事件。
- 根据权利要求13所述的设备,其特征在于,所述芯片还用于:若所述片选信号存在所述下降沿跳变,则在所述从设备中向所述SPI数 据分配存储空间。
- 根据权利要求14所述的设备,其特征在于,所述芯片还用于:若所述片选信号存在所述上升沿跳变,则在所述从设备中向所述SPI数据分配存储空间。
- 一种计算机存储介质,其特征在于,所述存储介质包括计算机指令,当所述指令被计算机执行时,使得所述计算机实现如权利要求1-5中任一项权利要求所述的基于SPI异步处理事件的方法。
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