WO2020118903A1 - 柔性tft基板的制作方法及柔性oled面板的制作方法 - Google Patents
柔性tft基板的制作方法及柔性oled面板的制作方法 Download PDFInfo
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- WO2020118903A1 WO2020118903A1 PCT/CN2019/075969 CN2019075969W WO2020118903A1 WO 2020118903 A1 WO2020118903 A1 WO 2020118903A1 CN 2019075969 W CN2019075969 W CN 2019075969W WO 2020118903 A1 WO2020118903 A1 WO 2020118903A1
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- 239000000758 substrate Substances 0.000 title claims abstract description 92
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 58
- 239000002184 metal Substances 0.000 claims abstract description 79
- 229910052751 metal Inorganic materials 0.000 claims abstract description 79
- 238000000034 method Methods 0.000 claims abstract description 47
- 238000005452 bending Methods 0.000 claims abstract description 46
- 238000004544 sputter deposition Methods 0.000 claims abstract description 40
- 238000000151 deposition Methods 0.000 claims abstract description 30
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 27
- 238000005240 physical vapour deposition Methods 0.000 claims abstract description 26
- 239000010410 layer Substances 0.000 claims description 233
- 239000007769 metal material Substances 0.000 claims description 20
- 239000011229 interlayer Substances 0.000 claims description 16
- 239000000463 material Substances 0.000 claims description 16
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 13
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 13
- 230000004888 barrier function Effects 0.000 claims description 12
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 10
- 229920005591 polysilicon Polymers 0.000 claims description 9
- 239000004642 Polyimide Substances 0.000 claims description 8
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 8
- 238000000059 patterning Methods 0.000 claims description 8
- 229920001721 polyimide Polymers 0.000 claims description 8
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical group N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 8
- 238000005530 etching Methods 0.000 claims description 5
- 239000011368 organic material Substances 0.000 claims description 2
- 238000010943 off-gassing Methods 0.000 abstract description 10
- 239000011799 hole material Substances 0.000 description 21
- 230000008021 deposition Effects 0.000 description 7
- 239000010409 thin film Substances 0.000 description 7
- 238000010586 diagram Methods 0.000 description 6
- 239000010936 titanium Substances 0.000 description 5
- 229920001621 AMOLED Polymers 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 2
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 239000010408 film Substances 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 239000002346 layers by function Substances 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 229910004205 SiNX Inorganic materials 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005401 electroluminescence Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 239000005416 organic matter Substances 0.000 description 1
- 239000011241 protective layer Substances 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/04—Coating on selected surface areas, e.g. using masks
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
- C23C14/14—Metallic material, boron or silicon
- C23C14/18—Metallic material, boron or silicon on other inorganic substrates
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/34—Sputtering
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/2855—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by physical means, e.g. sputtering, evaporation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
Definitions
- the invention relates to the field of display technology, in particular to a method for manufacturing a flexible TFT substrate and a method for manufacturing a flexible OLED panel.
- liquid crystal displays Liquid Crystal Display, LCD
- active matrix driven organic electroluminescence Active Matrix Organic Light-Emitting Diode, AMOLED
- other flat panel display devices have thin bodies, high image quality, Many advantages, such as power saving and no radiation, have been widely used, such as: mobile phones, personal digital assistants (PDAs), digital cameras, computer screens or notebook screens.
- Thin film transistor (TFT) array (Array) substrate is currently the main component of LCD devices and AMOLED devices, which is directly related to the development direction of high-performance flat panel display devices. It is used to provide driving circuits to displays.
- a plurality of gate scanning lines and a plurality of data lines, the plurality of gate scanning lines and the plurality of data lines define a plurality of pixel units, each pixel unit is provided with a thin film transistor and a pixel electrode, the gate of the thin film transistor is corresponding to Is connected to the gate scan line, when the voltage on the gate scan line reaches the turn-on voltage, the source and drain of the thin film transistor are turned on, thereby inputting the data voltage on the data line to the pixel electrode, thereby controlling the corresponding pixel area display.
- the structure of the thin film transistor on the array substrate further includes a gate, a gate insulating layer, an active layer, a source and drain, and an insulating protective layer stacked on the base substrate.
- LTPS Low Temperature Poly-Silicon
- A-Si amorphous silicon
- LCD and AMOLED display panels Compared with the traditional amorphous silicon (A-Si) thin film transistor, although the manufacturing process is complicated, because of its higher carrier mobility, it is widely used in the production of small and medium-sized high-resolution LCD and AMOLED display panels.
- Low-temperature polysilicon is regarded as an important material for realizing low-cost full-color flat panel displays.
- FIG. 1 there is a structural schematic diagram of an existing flexible OLED panel.
- the bending area (bending area) Etching a deep hole (DH) 100, and then filling the DH100 with ODH material (organic deep hole material); but in the subsequent production of source drain (SD), physical meteorological deposition (Physical Vapor) Deposition (PVD) deposits the SD metal layer 200.
- SD source drain
- PVD physical meteorological deposition
- the sputtering power is about 40-50kw, slowly depositing the SD metal layer 200 During the process, the heat will slowly accumulate. The accumulated heat will cause outgassing of the ODH material in the lower DH100, which will eventually cause the SD metal layer 200 above it to break or even fall off, which will seriously affect the properties of the TFT and make it good. The rate drops.
- the object of the present invention is to provide a method for manufacturing a flexible TFT substrate, which can prevent the outgassing phenomenon of the organic photoresist block in the deep hole for bending and reduce the risk of the source and drain metal layer breaking and falling off, thereby greatly Improve the properties of flexible TFT substrates and increase product yield.
- the purpose of the present invention is also to provide a method for manufacturing a flexible OLED panel, which can prevent the outgassing phenomenon of the organic photoresist block in the deep hole for bending and reduce the risk of the source and drain metal layer breaking and falling off Improve the properties of flexible TFT substrates and improve product yield.
- the present invention first provides a method for manufacturing a flexible TFT substrate.
- the flexible TFT substrate is divided into a display region located in the middle and a bending region located outside the display region.
- the manufacturing method includes providing a flexible substrate The step of forming an inorganic layer on the flexible substrate, the step of etching the deep hole for bending exposing the flexible substrate on the inorganic layer in the bending area, filling the deep hole for bending to form an organic light A step of blocking, a step of depositing and patterning a source and drain metal layer on the inorganic layer;
- a physical vapor deposition method is used to form the source-drain metal layer by sputtering corresponding elements, wherein the temperature in the sputtering chamber is 90-100° C.
- the power is 20-30kw.
- the manufacturing method of the flexible TFT substrate specifically includes the following steps:
- Step S1 providing a flexible substrate, depositing a barrier layer and a buffer layer of inorganic non-metallic material on the flexible substrate in sequence, forming a polysilicon active layer on the buffer layer, and forming the buffer layer and the polysilicon active layer Depositing and forming a first gate insulating layer of inorganic non-metallic material, depositing and patterning a first gate metal layer on the first gate insulating layer, and forming a first gate insulating layer on the first gate insulating layer and the first gate A second gate insulating layer formed of inorganic non-metallic material is deposited on the metal layer, a second gate metal layer is deposited and patterned on the second gate insulating layer, and insulated on the second gate electrode Depositing an interlayer insulating layer of inorganic non-metallic material on the layer and the second gate metal layer;
- all the film layers of inorganic metal materials on the flexible substrate together constitute an inorganic layer, including a barrier layer, a buffer layer, a first gate insulating layer, a second gate electrode insulating layer, and an interlayer insulating layer;
- Step S2 a deep hole for bending exposing the flexible substrate is etched on the inorganic layer in the bending area, and an organic photoresist material is filled into the deep hole for bending to obtain an organic material located in the deep hole for bending Photoresist block
- Step S3 depositing and patterning a source-drain metal layer on the interlayer insulating layer to obtain a source and drain corresponding to the display area and metal traces passing through the bending area;
- a physical vapor deposition method is used to deposit and form the source-drain metal layer by sputtering corresponding elements, wherein the indoor temperature of the sputtering chamber is 90-100° C. and the sputtering power is 20-30 kw.
- the source-drain metal layer is a triple layer formed of Ti/Al/Ti.
- Both the first gate metal layer and the second gate metal layer are Mo layers.
- the first gate insulating layer is a silicon oxide layer
- the second gate insulating layer is a silicon nitride layer.
- the barrier layer is a silicon oxide layer.
- the buffer layer and the interlayer insulating layer are both a stack combination of a silicon oxide layer and a silicon nitride layer.
- the flexible substrate is a polyimide flexible substrate.
- the material of the organic photoresist block is a polyimide material.
- the invention also provides a method for manufacturing a flexible OLED panel.
- a flexible TFT substrate is manufactured according to the method for manufacturing a flexible TFT substrate as described above, a flat layer is formed on the flexible TFT substrate, and an OLED layer is formed on the flat layer .
- the manufacturing method of the flexible TFT substrate of the present invention uses physical vapor deposition (PVD) to deposit and form the source-drain metal layer by sputtering the corresponding elements.
- PVD physical vapor deposition
- the indoor temperature of the sputtering chamber is 90-100°C, and the sputtering power is 20-30kw.
- the PVD deposits the source and drain metal layers and reduces the indoor temperature and sputtering power of the sputtering chamber ,
- reducing the heat accumulated in the process of depositing the source and drain metal layers of the organic photoresist block in the deep hole for bending can prevent the outgassing phenomenon of the organic photoresist block in the deep hole for bending, and reduce the source here
- the risk of breakage and shedding of the drain metal layer greatly improves the properties of the flexible TFT substrate and improves the product yield.
- the method for manufacturing a flexible OLED panel of the present invention uses the above-mentioned method for manufacturing a flexible TFT substrate to obtain a flexible TFT substrate, and then forms a flat layer and an OLED layer on the flexible TFT substrate to prevent the organic matter in the deep hole for bending
- the outgassing phenomenon of the photoresist block reduces the risk of the source and drain metal layer breaking and falling off, thereby greatly improving the properties of the flexible TFT substrate and improving the product yield.
- FIG. 1 is a schematic diagram of outgassing of ODH material in a conventional flexible OLED panel
- FIG. 2 is a schematic flow chart of a preferred embodiment of a method for manufacturing a flexible TFT substrate of the present invention
- step S3 is a schematic diagram of step S3 of a preferred embodiment of a method for manufacturing a flexible TFT substrate of the present invention
- FIG. 7 is a schematic diagram of the manufacturing method of the flexible OLED panel of the present invention.
- the manufacturing method of the substrate includes the following steps:
- a flexible substrate is provided 10 , In the flexible substrate 10 In order to form a barrier layer of inorganic non-metallic materials twenty one And buffer layer twenty two , In the buffer layer twenty two Polysilicon active layer 40 , In the buffer layer twenty two Polysilicon active layer 40 A first gate insulating layer formed of inorganic non-metallic material is deposited thereon twenty three , In the first gate insulating layer twenty three Deposit and pattern on the first gate metal layer 51 , In the first gate insulating layer twenty three And the first gate metal layer 51 A second gate insulating layer formed of inorganic non-metallic material is deposited thereon twenty four , In the second gate insulating layer twenty four Deposited and patterned thereon to form a second gate metal layer 52 , In the second gate insulating layer twenty four And the second gate metal layer 52 An interlayer insulating layer formed of inorganic non-metallic material is deposited thereon 25 .
- the flexible substrate 10 The film layers of all the inorganic metal materials together form an inorganic layer 20 , Including barrier twenty one , The buffer layer twenty two ⁇ First gate insulating layer twenty three ⁇ Second gate insulating layer twenty four And interlayer insulation 25 .
- the first gate metal layer 51 And the second gate metal layer 52 All Mo (Molybdenum) layer.
- the barrier layer twenty one It is a silicon oxide layer.
- the buffer layer twenty two And interlayer insulation 25 Both are a stack combination of a silicon oxide layer and a silicon nitride layer.
- the flexible substrate 10 For polyimide ( PI ) Flexible substrate.
- step S2 As shown 4-5 As shown, in the bending zone 2 Inorganic layer 20 Etched to expose flexible substrate 10 Deep hole for bending 29 , To the deep hole for bending 29 Filled with organic photoresist material to obtain deep holes for bending 29 Organic photoresist block 28 .
- the organic photoresist block 28 The material is polyimide material.
- step S3 As shown 6 As shown, in the interlayer insulating layer 25 Deposited and patterned on the source and drain metal layer 30 , Corresponding to the display area 1 Source-drain 31 And through the bending zone 2 Metal trace 32 .
- the steps S3 The physical vapor deposition method ( PVD ) Sputtering the corresponding elements to form the source-drain metal layer 30 , Where the indoor temperature of the sputtering chamber is 90-100 °C, the sputtering power is 20-30kw .
- the source-drain metal layer 30 Reason Ti/Al/Ti (titanium / aluminum / Titanium) to form a triple layer.
- the manufacturing method of the substrate adopts the physical vapor deposition method ( PVD ) Source and drain metal layers are deposited by sputtering corresponding elements 30 ,in PVD Depositing the source-drain metal layer 30 During the process, the indoor temperature of the sputtering chamber is 90-100 °C, the sputtering power is 20-30kw , Compared to existing technology, in PVD Depositing the source-drain metal layer 30 Reduces the indoor temperature and sputtering power of the sputtering chamber, thereby reducing deep holes for bending 29 Inner organic photoresist block 28 Depositing the source-drain metal layer 30 The heat accumulated during the process can prevent deep holes for bending 29 Organic photoresist block 28 Outgassing occurs, reducing the source-drain metal layer here 30 Metal trace 32 Risk of breakage and shedding, which greatly improves flexibility TFT The nature of the substrate enhances the product yield.
- PVD physical vapor deposition method
- the invention also provides a flexible OLED
- the manufacturing method of the panel first according to the flexibility as described above TFT
- Substrate manufacturing method makes flexible TFT The substrate and then the flexible TFT A flat layer is formed on the substrate 60 , In the flat layer 60 Form OLED Floor 70 .
- form OLED Floor 70 The specific process includes 60 Deposited and patterned on top to form an anode layer 71 , In the flat layer 60 And anode layer 71 Pixel definition layer 72 , The pixel definition layer 72 In the anode layer 71 A pixel opening is surrounded on the top, and an organic functional layer is formed by evaporation in the pixel opening 73 , And finally in the organic functional layer 73 And pixel definition layer 72 Cathode layer 74 .
- the flexibility of the invention OLED
- the manufacturing method of the panel adopts the above-mentioned flexibility TFT
- Substrate manufacturing method makes flexible TFT The substrate and then the flexible TFT A flat layer is formed on the substrate 60 and OLED Floor 70 , Can prevent deep holes for bending 29 Organic photoresist block 28 Outgassing occurs, reducing the source-drain metal layer here 30 Metal trace 32 Risk of breakage and shedding, which greatly improves flexibility TFT
- the nature of the substrate enhances the product yield.
- the flexibility of the present invention TFT
- the manufacturing method of the substrate adopts the physical vapor deposition method ( PVD ) By sputtering the corresponding elements to form a source and drain metal layer, in PVD
- the indoor temperature of the sputtering chamber is 90-100 °C
- the sputtering power is 20-30kw
- the deposition of the source-drain metal layer reduces the indoor temperature and sputtering power of the sputtering chamber, thereby reducing the heat accumulated during the deposition of the source-drain metal layer in the organic photoresist block in the deep hole for bending, which can prevent
- the organic photoresist block in the deep hole for bending has outgas, reducing the risk of the source and drain metal layer breaking and falling off, thereby greatly improving the flexibility TFT
- the nature of the substrate enhances the product yield.
- the flexibility of the invention OLED
- the manufacturing method of the panel adopts the above-mentioned flexibility TFT Substrate manufacturing method makes flexible TFT The substrate and then the flexible TFT Forming a flat layer on the substrate and OLED Layer, which can prevent the outgassing phenomenon of the organic photoresist block in the deep hole for bending, reduce the risk of the source and drain metal layer breaking and falling off, thereby greatly improving the flexibility TFT
- the nature of the substrate enhances the product yield.
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Abstract
本发明提供一种柔性TFT基板的制作方法及柔性OLED面板的制作方法。本发明的柔性TFT基板的制作方法,采用物理气相沉积法(PVD)通过溅射相应元素来沉积形成源漏极金属层,在PVD沉积源漏极金属层的过程中,溅射腔室的室内温度为90-100℃,溅射功率为20-30kw,相比于现有技术,在PVD沉积源漏极金属层时降低了溅射腔室的室内温度及溅射功率,从而减少了弯折用深孔内有机光阻块在沉积源漏极金属层过程中所积累的热量,能够防止弯折用深孔内的有机光阻块发生放气现象,降低此处源漏极金属层断裂及脱落的风险,从而大幅度改善了柔性TFT基板的性质,提升了产品良率。
Description
本发明涉及显示技术领域,尤其涉及一种柔性TFT基板的制作方法及柔性OLED面板的制作方法。
在显示技术领域,液晶显示器(Liquid Crystal Display,LCD)和有源矩阵驱动式有机电致发光(Active Matrix Organic Light-Emitting Diode,AMOLED)显示器等平板显示装置因具有机身薄、高画质、省电、无辐射等众多优点,得到了广泛的应用,如:移动电话、个人数字助理(PDA)、数字相机、计算机屏幕或笔记本屏幕等。
薄膜晶体管(Thin Film Transistor,TFT)阵列(Array)基板是目前LCD装置和AMOLED装置中的主要组成部件,直接关系到高性能平板显示装置的发展方向,用于向显示器提供驱动电路,通常设置有数条栅极扫描线和数条数据线,该数条栅极扫描线和数条数据线限定出多个像素单元,每个像素单元内设置有薄膜晶体管和像素电极,薄膜晶体管的栅极与相应的栅极扫描线相连,当栅极扫描线上的电压达到开启电压时,薄膜晶体管的源极和漏极导通,从而将数据线上的数据电压输入至像素电极,进而控制相应像素区域的显示。通常阵列基板上薄膜晶体管的结构又包括层叠设置于衬底基板上的栅极、栅极绝缘层、有源层、源漏极、及绝缘保护层。
其中,低温多晶硅(Low Temperature Poly-Silicon,LTPS)薄膜晶体管与
传统非晶硅(A-Si)薄膜晶体管相比,虽然制作工艺复杂,但因其具有更高的载流子迁移率,被广泛用于中小尺寸高分辨率的LCD和AMOLED显示面板的制作,低温多晶硅被视为实现低成本全彩平板显示的重要材料。
在传统的柔性OLED面板的LTPS-TFT背板制作过程中,如图1所示现有一种柔性OLED面板的结构示意图,为增强柔性TFT背板的弯折性,会在弯折区(bending area)蚀刻出一个较深的洞(deep hole,DH)100,然后在DH100中填充ODH材料 (organic
deep hole material);但是在后续制作源漏极(source drain,SD)时,需利用物理气象沉积(Physical Vapor
Deposition,PVD)沉积SD金属层200,由于进行PVD沉积时溅射室的室内温度较高,在220℃-230℃左右,溅射功率为40-50kw左右,在慢慢沉积SD金属层200的过程中热量会慢慢累积,累积的热量会使下部DH100中的ODH材料发生放气(outgassing)现象,最终导致其上方的SD金属层200断裂甚至是脱落,进而严重影响TFT的性质,使良率下降。
本发明的目的在于提供一种柔性TFT基板的制作方法,能够防止弯折用深孔内的有机光阻块发生放气现象,降低此处源漏极金属层断裂及脱落的风险,从而大幅度改善柔性TFT基板的性质,提升产品良率。
本发明的目的还在于提供一种柔性OLED面板的制作方法,能够防止弯折用深孔内的有机光阻块发生放气现象,降低此处源漏极金属层断裂及脱落的风险,从而大幅度改善柔性TFT基板的性质,提升产品良率。
为实现上述目的,本发明首先提供一种柔性TFT基板的制作方法,所述柔性TFT基板被划分出位于中部的显示区及位于所述显示区外侧的弯折区,该制作方法包括提供柔性基板的步骤、在柔性基板上形成无机层的步骤、在所述弯折区的无机层上蚀刻出露出柔性基板的弯折用深孔的步骤、在所述弯折用深孔内填充形成有机光阻块的步骤、在所述无机层上沉积并图案化形成源漏极金属层的步骤;
在形成所述源漏极金属层的步骤中采用物理气相沉积法通过溅射相应元素来沉积形成所述源漏极金属层,其中,溅射腔室的室内温度为90-100℃,溅射功率为20-30kw。
所述的柔性TFT基板的制作方法具体包括如下步骤:
步骤S1、提供柔性基板,在所述柔性基板上依次沉积形成无机非金属材料的阻挡层和缓冲层,在所述缓冲层上形成多晶硅有源层,在所述缓冲层及多晶硅有源层上沉积形成无机非金属材料的第一栅极绝缘层,在所述第一栅极绝缘层上沉积并图案化形成第一栅极金属层,在所述第一栅极绝缘层及第一栅极金属层上沉积形成无机非金属材料的第二栅极极绝缘层,在所述第二栅极极绝缘层上沉积并图案化形成第二栅极金属层,在所述第二栅极极绝缘层及第二栅极金属层上沉积形成无机非金属材料的层间绝缘层;
此时,所述柔性基板上所有的无机金属材料的膜层共同组成无机层,包括阻挡层、缓冲层、第一栅极绝缘层、第二栅极极绝缘层及层间绝缘层;
步骤S2、在所述弯折区的无机层上蚀刻出露出柔性基板的弯折用深孔,向所述弯折用深孔内填充有机光阻材料,得到位于弯折用深孔内的有机光阻块;
步骤S3、在所述层间绝缘层上沉积并图案化形成源漏极金属层,得到对应位于所述显示区的源漏极及贯穿所述弯折区的金属走线;
所述步骤S3中采用物理气相沉积法通过溅射相应元素来沉积形成所述源漏极金属层,其中,溅射腔室的室内温度为90-100℃,溅射功率为20-30kw。
所述源漏极金属层为由Ti/Al/Ti形成的三重层。
所述第一栅极金属层和第二栅极金属层均为Mo层。
所述第一栅极绝缘层为氧化硅层,所述第二栅极极绝缘层为氮化硅层。
所述阻挡层为氧化硅层。
所述缓冲层和所述层间绝缘层均为氧化硅层和氮化硅层的堆栈组合。
所述柔性基板为聚酰亚胺柔性基板。
所述有机光阻块的材料为聚酰亚胺材料。
本发明还提供一种柔性OLED面板的制作方法,按照如上所述的柔性TFT基板的制作方法制得柔性TFT基板,在所述柔性TFT基板上形成平坦层,在所述平坦层上形成OLED层。
本发明的有益效果:本发明的柔性TFT基板的制作方法,采用物理气相沉积法(PVD)通过溅射相应元素来沉积形成源漏极金属层,在PVD沉积源漏极金属层的过程中,溅射腔室的室内温度为90-100℃,溅射功率为20-30kw,相比于现有技术,在PVD沉积源漏极金属层时降低了溅射腔室的室内温度及溅射功率,从而减少了弯折用深孔内有机光阻块在沉积源漏极金属层过程中所积累的热量,能够防止弯折用深孔内的有机光阻块发生放气现象,降低此处源漏极金属层断裂及脱落的风险,从而大幅度改善了柔性TFT基板的性质,提升了产品良率。本发明的柔性OLED面板的制作方法,采用上述的柔性TFT基板的制作方法制得柔性TFT基板,然后在所述柔性TFT基板上形成平坦层及OLED层,能够防止弯折用深孔内的有机光阻块发生放气现象,降低此处源漏极金属层断裂及脱落的风险,从而大幅度改善了柔性TFT基板的性质,提升了产品良率。
为了能更进一步了解本发明的特征以及技术内容,请参阅以下有关本发明的详细说明与附图,然而附图仅提供参考与说明用,并非用来对本发明加以限制。
附图中,
图1为现有一种柔性OLED面板内ODH材料发生放气现象的示意图,
图2本发明的柔性TFT基板的制作方法一优选实施例的流程示意图;
图3为本发明的柔性TFT基板的制作方法一优选实施例的步骤S1的示意图;
图4-5为本发明的柔性TFT基板的制作方法一优选实施例的步骤S2的示意图;
图6为本发明的柔性TFT基板的制作方法一优选实施例的步骤S3的示意图;
图7为本发明的柔性OLED面板的制作方法的示意图。
为更进一步阐述本发明所采取的技术手段及其效果,以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图
2
,本发明首先提供一种柔性
TFT
基板的制作方法,包括如下步骤:
步骤
S1
、如图
3
所示,提供柔性基板
10
,在所述柔性基板
10
上依次沉积形成无机非金属材料的阻挡层
21
和缓冲层
22
,在所述缓冲层
22
上形成多晶硅有源层
40
,在所述缓冲层
22
及多晶硅有源层
40
上沉积形成无机非金属材料的第一栅极绝缘层
23
,在所述第一栅极绝缘层
23
上沉积并图案化形成第一栅极金属层
51
,在所述第一栅极绝缘层
23
及第一栅极金属层
51
上沉积形成无机非金属材料的第二栅极极绝缘层
24
,在所述第二栅极极绝缘层
24
上沉积并图案化形成第二栅极金属层
52
,在所述第二栅极极绝缘层
24
及第二栅极金属层
52
上沉积形成无机非金属材料的层间绝缘层
25
。
此时,所述柔性基板
10
上所有的无机金属材料的膜层共同组成无机层
20
,包括阻挡层
21
、缓冲层
22
、第一栅极绝缘层
23
、第二栅极极绝缘层
24
及层间绝缘层
25
。
具体地,所述第一栅极金属层
51
和第二栅极金属层
52
均为
Mo
(钼)层。
具体地,所述第一栅极绝缘层
23
为氧化硅(
SiOx
)层,所述第二栅极极绝缘层
24
为氮化硅(
SiNx
)层。
具体地,所述阻挡层
21
为氧化硅层。
具体地,所述缓冲层
22
和层间绝缘层
25
均为氧化硅层和氮化硅层的堆栈组合。
具体地,所述柔性基板
10
为聚酰亚胺(
PI
)柔性基板。
步骤
S2
、如图
4-5
所示,在所述弯折区
2
的无机层
20
上蚀刻出露出柔性基板
10
的弯折用深孔
29
,向所述弯折用深孔
29
内填充有机光阻材料,得到位于弯折用深孔
29
内的有机光阻块
28
。
具体地,所述有机光阻块
28
的材料为聚酰亚胺材料。
步骤
S3
、如图
6
所示,在所述层间绝缘层
25
上沉积并图案化形成源漏极金属层
30
,得到对应位于所述显示区
1
的源漏极
31
及贯穿所述弯折区
2
的金属走线
32
。
所述步骤
S3
中采用物理气相沉积法(
PVD
)通过溅射相应元素来沉积形成所述源漏极金属层
30
,其中,溅射腔室的室内温度为
90-100
℃,溅射功率为
20-30kw
。
具体地,所述源漏极金属层
30
为由
Ti/Al/Ti
(钛
/
铝
/
钛)形成的三重层。
本发明的柔性
TFT
基板的制作方法,采用物理气相沉积法(
PVD
)通过溅射相应元素来沉积形成源漏极金属层
30
,在
PVD
沉积源漏极金属层
30
的过程中,溅射腔室的室内温度为
90-100
℃,溅射功率为
20-30kw
,相比于现有技术,在
PVD
沉积源漏极金属层
30
时降低了溅射腔室的室内温度及溅射功率,从而减少了弯折用深孔
29
内有机光阻块
28
在沉积源漏极金属层
30
过程中所积累的热量,能够防止弯折用深孔
29
内的有机光阻块
28
发生放气现象,降低此处源漏极金属层
30
的金属走线
32
断裂及脱落的风险,从而大幅度改善了柔性
TFT
基板的性质,提升了产品良率。
请参阅图
6
,基于上述的柔性
TFT
基板的制作方法,本发明还提供一种柔性
OLED
面板的制作方法,首先按照如上所述的柔性
TFT
基板的制作方法制得柔性
TFT
基板,然后在所述柔性
TFT
基板上形成平坦层
60
,在所述平坦层
60
上形成
OLED
层
70
。
具体地,形成
OLED
层
70
的具体过程包括在所述平坦层
60
上沉积并图案化形成阳极层
71
,在所述平坦层
60
及阳极层
71
上形成像素定义层
72
,所述像素定义层
72
在所述阳极层
71
上围拢出像素开口,在所述像素开口内蒸镀形成有机功能层
73
,最后在所述有机功能层
73
和像素定义层
72
上的阴极层
74
。
本发明的柔性
OLED
面板的制作方法,采用上述的柔性
TFT
基板的制作方法制得柔性
TFT
基板,然后在所述柔性
TFT
基板上形成平坦层
60
及
OLED
层
70
,能够防止弯折用深孔
29
内的有机光阻块
28
发生放气现象,降低此处源漏极金属层
30
的金属走线
32
断裂及脱落的风险,从而大幅度改善了柔性
TFT
基板的性质,提升了产品良率。
综上所述,本发明的柔性
TFT
基板的制作方法,采用物理气相沉积法(
PVD
)通过溅射相应元素来沉积形成源漏极金属层,在
PVD
沉积源漏极金属层的过程中,溅射腔室的室内温度为
90-100
℃,溅射功率为
20-30kw
,相比于现有技术,在
PVD
沉积源漏极金属层时降低了溅射腔室的室内温度及溅射功率,从而减少了弯折用深孔内有机光阻块在沉积源漏极金属层过程中所积累的热量,能够防止弯折用深孔内的有机光阻块发生放气现象,降低此处源漏极金属层断裂及脱落的风险,从而大幅度改善了柔性
TFT
基板的性质,提升了产品良率。本发明的柔性
OLED
面板的制作方法,采用上述的柔性
TFT
基板的制作方法制得柔性
TFT
基板,然后在所述柔性
TFT
基板上形成平坦层及
OLED
层,能够防止弯折用深孔内的有机光阻块发生放气现象,降低此处源漏极金属层断裂及脱落的风险,从而大幅度改善了柔性
TFT
基板的性质,提升了产品良率。
以上所述,对于本领域的普通技术人员来说,可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形,而所有这些改变和变形都应属于本发明后附的权利要求的保护范围。
Claims (18)
- 一种柔性TFT基板的制作方法,其中,所述柔性TFT基板被划分出位于中部的显示区及位于所述显示区外侧的弯折区,该制作方法包括提供柔性基板的步骤、在柔性基板上形成无机层的步骤、在所述弯折区的无机层上蚀刻出露出柔性基板的弯折用深孔的步骤、在所述弯折用深孔内填充形成有机光阻块的步骤、在所述无机层上沉积并图案化形成源漏极金属层的步骤;在形成所述源漏极金属层的步骤中采用物理气相沉积法通过溅射相应元素来沉积形成所述源漏极金属层,其中,溅射腔室的室内温度为90-100℃,溅射功率为20-30kw。
- 如权利要求1所述的柔性TFT基板的制作方法,具体包括如下步骤:步骤S1、提供柔性基板,在所述柔性基板上依次沉积形成无机非金属材料的阻挡层和缓冲层,在所述缓冲层上形成多晶硅有源层,在所述缓冲层及多晶硅有源层上沉积形成无机非金属材料的第一栅极绝缘层,在所述第一栅极绝缘层上沉积并图案化形成第一栅极金属层,在所述第一栅极绝缘层及第一栅极金属层上沉积形成无机非金属材料的第二栅极极绝缘层,在所述第二栅极极绝缘层上沉积并图案化形成第二栅极金属层,在所述第二栅极极绝缘层及第二栅极金属层上沉积形成无机非金属材料的层间绝缘层;此时,所述柔性基板上所有的无机金属材料的膜层共同组成无机层,包括阻挡层、缓冲层、第一栅极绝缘层、第二栅极极绝缘层及层间绝缘层;步骤S2、在所述弯折区的无机层上蚀刻出露出柔性基板的弯折用深孔,向所述弯折用深孔内填充有机光阻材料,得到位于弯折用深孔内的有机光阻块;步骤S3、在所述层间绝缘层上沉积并图案化形成源漏极金属层,得到对应位于所述显示区的源漏极及贯穿所述弯折区的金属走线;所述步骤S3中采用物理气相沉积法通过溅射相应元素来沉积形成所述源漏极金属层,其中,溅射腔室的室内温度为90-100℃,溅射功率为20-30kw。
- 如权利要求1所述的柔性TFT基板的制作方法,其中,所述源漏极金属层为由Ti/Al/Ti形成的三重层。
- 如权利要求2所述的柔性TFT基板的制作方法,其中,所述第一栅极金属层和第二栅极金属层均为Mo层。
- 如权利要求2所述的柔性TFT基板的制作方法,其中,所述第一栅极绝缘层为氧化硅层,所述第二栅极极绝缘层为氮化硅层。
- 如权利要求2所述的柔性TFT基板的制作方法,其中,所述阻挡层为氧化硅层。
- 如权利要求2所述的柔性TFT基板的制作方法,其中,所述缓冲层和层间绝缘层均为氧化硅层和氮化硅层的堆栈组合。
- 如权利要求1所述的柔性TFT基板的制作方法,其中,所述柔性基板为聚酰亚胺柔性基板。
- 如权利要求1 所述的柔性TFT 基板的制作方法,其中,所述有机光阻块的材料为聚酰亚胺材料。
- 一种柔性OLED面板的制作方法,按照柔性TFT基板的制作方法制得柔性TFT基板,在所述柔性TFT基板上形成平坦层,在所述平坦层上形成OLED层;所述柔性TFT基板被划分出位于中部的显示区及位于所述显示区外侧的弯折区,所述柔性TFT基板的制作方法包括提供柔性基板的步骤、在柔性基板上形成无机层的步骤、在所述弯折区的无机层上蚀刻出露出柔性基板的弯折用深孔的步骤、在所述弯折用深孔内填充形成有机光阻块的步骤、在所述无机层上沉积并图案化形成源漏极金属层的步骤;在形成所述源漏极金属层的步骤中采用物理气相沉积法通过溅射相应元素来沉积形成所述源漏极金属层,其中,溅射腔室的室内温度为90-100℃,溅射功率为20-30kw。
- 如权利要求10 所述的柔性OLED 面板的制作方法,其中,所述柔性TFT 基板的制作方法具体包括如下步骤:步骤S1 、提供柔性基板,在所述柔性基板上依次沉积形成无机非金属材料的阻挡层和缓冲层,在所述缓冲层上形成多晶硅有源层,在所述缓冲层及多晶硅有源层上沉积形成无机非金属材料的第一栅极绝缘层,在所述第一栅极绝缘层上沉积并图案化形成第一栅极金属层,在所述第一栅极绝缘层及第一栅极金属层上沉积形成无机非金属材料的第二栅极极绝缘层,在所述第二栅极极绝缘层上沉积并图案化形成第二栅极金属层,在所述第二栅极极绝缘层及第二栅极金属层上沉积形成无机非金属材料的层间绝缘层;此时,所述柔性基板上所有的无机金属材料的膜层共同组成无机层,包括阻挡层、缓冲层、第一栅极绝缘层、第二栅极极绝缘层及层间绝缘层;步骤S2 、在所述弯折区的无机层上蚀刻出露出柔性基板的弯折用深孔,向所述弯折用深孔内填充有机光阻材料,得到位于弯折用深孔内的有机光阻块;步骤S3 、在所述层间绝缘层上沉积并图案化形成源漏极金属层,得到对应位于所述显示区的源漏极及贯穿所述弯折区的金属走线;所述步骤S3 中采用物理气相沉积法通过溅射相应元素来沉积形成所述源漏极金属层,其中,溅射腔室的室内温度为90-100 ℃,溅射功率为20-30kw 。
- 如权利要求10 所述的柔性OLED 面板的制作方法,其中,所述源漏极金属层为由Ti/Al/Ti 形成的三重层。
- 如权利要求11 所述的柔性OLED 面板的制作方法,其中,所述第一栅极金属层和第二栅极金属层均为Mo 层。
- 如权利要求11 所述的柔性OLED 面板的制作方法,其中,所述第一栅极绝缘层为氧化硅层,所述第二栅极极绝缘层为氮化硅层。
- 如权利要求11 所述的柔性OLED 面板的制作方法,其中,所述阻挡层为氧化硅层。
- 如权利要求11 所述的柔性OLED 面板的制作方法,其中,所述缓冲层和层间绝缘层均为氧化硅层和氮化硅层的堆栈组合。
- 如权利要求10 所述的柔性OLED 面板的制作方法,其中,所述柔性基板为聚酰亚胺柔性基板。
- 如权利要求10 所述的柔性OLED 面板的制作方法,其中,所述有机光阻块的材料为聚酰亚胺材料。
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